xref: /dpdk/doc/guides/prog_guide/profile_app.rst (revision c6dab2a873f65c5a4ea9735aa24d9539426adba4)
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30
31Profile Your Application
32========================
33
34The following sections describe methods of profiling DPDK applications on
35different architectures.
36
37
38Profiling on x86
39----------------
40
41Intel processors provide performance counters to monitor events.
42Some tools provided by Intel, such as VTune, can be used to profile and benchmark an application.
43See the *VTune Performance Analyzer Essentials* publication from Intel Press for more information.
44
45For a DPDK application, this can be done in a Linux* application environment only.
46
47The main situations that should be monitored through event counters are:
48
49*   Cache misses
50
51*   Branch mis-predicts
52
53*   DTLB misses
54
55*   Long latency instructions and exceptions
56
57Refer to the
58`Intel Performance Analysis Guide <http://software.intel.com/sites/products/collateral/hpc/vtune/performance_analysis_guide.pdf>`_
59for details about application profiling.
60
61
62Profiling on ARM64
63------------------
64
65Using Linux perf
66~~~~~~~~~~~~~~~~
67
68The ARM64 architecture provide performance counters to monitor events.  The
69Linux ``perf`` tool can be used to profile and benchmark an application.  In
70addition to the standard events, ``perf`` can be used to profile arm64
71specific PMU (Performance Monitor Unit) events through raw events (``-e``
72``-rXX``).
73
74For more derails refer to the
75`ARM64 specific PMU events enumeration <http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100095_0002_04_en/way1382543438508.html>`_.
76
77
78High-resolution cycle counter
79~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
80
81The default ``cntvct_el0`` based ``rte_rdtsc()`` provides a portable means to
82get a wall clock counter in user space. Typically it runs at <= 100MHz.
83
84The alternative method to enable ``rte_rdtsc()`` for a high resolution wall
85clock counter is through the armv8 PMU subsystem. The PMU cycle counter runs
86at CPU frequency. However, access to the PMU cycle counter from user space is
87not enabled by default in the arm64 linux kernel. It is possible to enable
88cycle counter for user space access by configuring the PMU from the privileged
89mode (kernel space).
90
91By default the ``rte_rdtsc()`` implementation uses a portable ``cntvct_el0``
92scheme.  Application can choose the PMU based implementation with
93``CONFIG_RTE_ARM_EAL_RDTSC_USE_PMU``.
94
95The example below shows the steps to configure the PMU based cycle counter on
96an armv8 machine.
97
98.. code-block:: console
99
100    git clone https://github.com/jerinjacobk/armv8_pmu_cycle_counter_el0
101    cd armv8_pmu_cycle_counter_el0
102    make
103    sudo insmod pmu_el0_cycle_counter.ko
104    cd $DPDK_DIR
105    make config T=arm64-armv8a-linuxapp-gcc
106    echo "CONFIG_RTE_ARM_EAL_RDTSC_USE_PMU=y" >> build/.config
107    make
108
109.. warning::
110
111   The PMU based scheme is useful for high accuracy performance profiling with
112   ``rte_rdtsc()``. However, this method can not be used in conjunction with
113   Linux userspace profiling tools like ``perf`` as this scheme alters the PMU
114   registers state.
115