1.. SPDX-License-Identifier: BSD-3-Clause 2 Copyright(c) 2010-2014 Intel Corporation. 3 4Profile Your Application 5======================== 6 7The following sections describe methods of profiling DPDK applications on 8different architectures. 9 10 11Profiling on x86 12---------------- 13 14Intel processors provide performance counters to monitor events. 15Some tools provided by Intel, such as Intel® VTune™ Amplifier, can be used 16to profile and benchmark an application. 17See the *VTune Performance Analyzer Essentials* publication from Intel Press for more information. 18 19For a DPDK application, this can be done in a Linux* application environment only. 20 21The main situations that should be monitored through event counters are: 22 23* Cache misses 24 25* Branch mis-predicts 26 27* DTLB misses 28 29* Long latency instructions and exceptions 30 31Refer to the 32`Intel Performance Analysis Guide <http://software.intel.com/sites/products/collateral/hpc/vtune/performance_analysis_guide.pdf>`_ 33for details about application profiling. 34 35 36Profiling with VTune 37~~~~~~~~~~~~~~~~~~~~ 38 39To allow VTune attaching to the DPDK application, reconfigure and recompile 40the DPDK with ``CONFIG_RTE_ETHDEV_RXTX_CALLBACKS`` and 41``CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE`` enabled. 42 43 44Profiling on ARM64 45------------------ 46 47Using Linux perf 48~~~~~~~~~~~~~~~~ 49 50The ARM64 architecture provide performance counters to monitor events. The 51Linux ``perf`` tool can be used to profile and benchmark an application. In 52addition to the standard events, ``perf`` can be used to profile arm64 53specific PMU (Performance Monitor Unit) events through raw events (``-e`` 54``-rXX``). 55 56For more derails refer to the 57`ARM64 specific PMU events enumeration <http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100095_0002_04_en/way1382543438508.html>`_. 58 59 60High-resolution cycle counter 61~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 62 63The default ``cntvct_el0`` based ``rte_rdtsc()`` provides a portable means to 64get a wall clock counter in user space. Typically it runs at <= 100MHz. 65 66The alternative method to enable ``rte_rdtsc()`` for a high resolution wall 67clock counter is through the armv8 PMU subsystem. The PMU cycle counter runs 68at CPU frequency. However, access to the PMU cycle counter from user space is 69not enabled by default in the arm64 linux kernel. It is possible to enable 70cycle counter for user space access by configuring the PMU from the privileged 71mode (kernel space). 72 73By default the ``rte_rdtsc()`` implementation uses a portable ``cntvct_el0`` 74scheme. Application can choose the PMU based implementation with 75``CONFIG_RTE_ARM_EAL_RDTSC_USE_PMU``. 76 77The example below shows the steps to configure the PMU based cycle counter on 78an armv8 machine. 79 80.. code-block:: console 81 82 git clone https://github.com/jerinjacobk/armv8_pmu_cycle_counter_el0 83 cd armv8_pmu_cycle_counter_el0 84 make 85 sudo insmod pmu_el0_cycle_counter.ko 86 cd $DPDK_DIR 87 make config T=arm64-armv8a-linuxapp-gcc 88 echo "CONFIG_RTE_ARM_EAL_RDTSC_USE_PMU=y" >> build/.config 89 make 90 91.. warning:: 92 93 The PMU based scheme is useful for high accuracy performance profiling with 94 ``rte_rdtsc()``. However, this method can not be used in conjunction with 95 Linux userspace profiling tools like ``perf`` as this scheme alters the PMU 96 registers state. 97