xref: /dpdk/doc/guides/prog_guide/power_man.rst (revision 450f0791312ccc82f5b28f8a93986936779f0a54)
15630257fSFerruh Yigit..  SPDX-License-Identifier: BSD-3-Clause
25630257fSFerruh Yigit    Copyright(c) 2010-2014 Intel Corporation.
3fc1f2750SBernard Iremonger
4fc1f2750SBernard IremongerPower Management
5fc1f2750SBernard Iremonger================
6fc1f2750SBernard Iremonger
748624fd9SSiobhan ButlerThe DPDK Power Management feature allows users space applications to save power
8fc1f2750SBernard Iremongerby dynamically adjusting CPU frequency or entering into different C-States.
9fc1f2750SBernard Iremonger
10fc1f2750SBernard Iremonger*   Adjusting the CPU frequency dynamically according to the utilization of RX queue.
11fc1f2750SBernard Iremonger
12fc1f2750SBernard Iremonger*   Entering into different deeper C-States according to the adaptive algorithms to speculate
13fc1f2750SBernard Iremonger    brief periods of time suspending the application if no packets are received.
14fc1f2750SBernard Iremonger
15fc1f2750SBernard IremongerThe interfaces for adjusting the operating CPU frequency are in the power management library.
16fc1f2750SBernard IremongerC-State control is implemented in applications according to the different use cases.
17fc1f2750SBernard Iremonger
18fc1f2750SBernard IremongerCPU Frequency Scaling
19fc1f2750SBernard Iremonger---------------------
20fc1f2750SBernard Iremonger
21fc1f2750SBernard IremongerThe Linux kernel provides a cpufreq module for CPU frequency scaling for each lcore.
22fc1f2750SBernard IremongerFor example, for cpuX, /sys/devices/system/cpu/cpuX/cpufreq/ has the following sys files for frequency scaling:
23fc1f2750SBernard Iremonger
24fc1f2750SBernard Iremonger*   affected_cpus
25fc1f2750SBernard Iremonger
26fc1f2750SBernard Iremonger*   bios_limit
27fc1f2750SBernard Iremonger
28fc1f2750SBernard Iremonger*   cpuinfo_cur_freq
29fc1f2750SBernard Iremonger
30fc1f2750SBernard Iremonger*   cpuinfo_max_freq
31fc1f2750SBernard Iremonger
32fc1f2750SBernard Iremonger*   cpuinfo_min_freq
33fc1f2750SBernard Iremonger
34fc1f2750SBernard Iremonger*   cpuinfo_transition_latency
35fc1f2750SBernard Iremonger
36fc1f2750SBernard Iremonger*   related_cpus
37fc1f2750SBernard Iremonger
38fc1f2750SBernard Iremonger*   scaling_available_frequencies
39fc1f2750SBernard Iremonger
40fc1f2750SBernard Iremonger*   scaling_available_governors
41fc1f2750SBernard Iremonger
42fc1f2750SBernard Iremonger*   scaling_cur_freq
43fc1f2750SBernard Iremonger
44fc1f2750SBernard Iremonger*   scaling_driver
45fc1f2750SBernard Iremonger
46fc1f2750SBernard Iremonger*   scaling_governor
47fc1f2750SBernard Iremonger
48fc1f2750SBernard Iremonger*   scaling_max_freq
49fc1f2750SBernard Iremonger
50fc1f2750SBernard Iremonger*   scaling_min_freq
51fc1f2750SBernard Iremonger
52fc1f2750SBernard Iremonger*   scaling_setspeed
53fc1f2750SBernard Iremonger
5448624fd9SSiobhan ButlerIn the DPDK, scaling_governor is configured in user space.
55fc1f2750SBernard IremongerThen, a user space application can prompt the kernel by writing scaling_setspeed to adjust the CPU frequency
56fc1f2750SBernard Iremongeraccording to the strategies defined by the user space application.
57fc1f2750SBernard Iremonger
58fc1f2750SBernard IremongerCore-load Throttling through C-States
59fc1f2750SBernard Iremonger-------------------------------------
60fc1f2750SBernard Iremonger
61fc1f2750SBernard IremongerCore state can be altered by speculative sleeps whenever the specified lcore has nothing to do.
6248624fd9SSiobhan ButlerIn the DPDK, if no packet is received after polling,
63fc1f2750SBernard Iremongerspeculative sleeps can be triggered according the strategies defined by the user space application.
64fc1f2750SBernard Iremonger
6594608a0fSDavid HuntPer-core Turbo Boost
6694608a0fSDavid Hunt--------------------
6794608a0fSDavid Hunt
6894608a0fSDavid HuntIndividual cores can be allowed to enter a Turbo Boost state on a per-core
6994608a0fSDavid Huntbasis. This is achieved by enabling Turbo Boost Technology in the BIOS, then
7094608a0fSDavid Huntlooping through the relevant cores and enabling/disabling Turbo Boost on each
7194608a0fSDavid Huntcore.
7294608a0fSDavid Hunt
73d9e71f52SDavid HuntUse of Power Library in a Hyper-Threaded Environment
74d9e71f52SDavid Hunt----------------------------------------------------
75d9e71f52SDavid Hunt
76d9e71f52SDavid HuntIn the case where the power library is in use on a system with Hyper-Threading enabled,
77d9e71f52SDavid Huntthe frequency on the physical core is set to the highest frequency of the Hyper-Thread siblings.
78d9e71f52SDavid HuntSo even though an application may request a scale down, the core frequency will
79d9e71f52SDavid Huntremain at the highest frequency until all Hyper-Threads on that core request a scale down.
80d9e71f52SDavid Hunt
81fc1f2750SBernard IremongerAPI Overview of the Power Library
82fc1f2750SBernard Iremonger---------------------------------
83fc1f2750SBernard Iremonger
84fc1f2750SBernard IremongerThe main methods exported by power library are for CPU frequency scaling and include the following:
85fc1f2750SBernard Iremonger
86fc1f2750SBernard Iremonger*   **Freq up**: Prompt the kernel to scale up the frequency of the specific lcore.
87fc1f2750SBernard Iremonger
88fc1f2750SBernard Iremonger*   **Freq down**: Prompt the kernel to scale down the frequency of the specific lcore.
89fc1f2750SBernard Iremonger
90fc1f2750SBernard Iremonger*   **Freq max**: Prompt the kernel to scale up the frequency of the specific lcore to the maximum.
91fc1f2750SBernard Iremonger
92fc1f2750SBernard Iremonger*   **Freq min**: Prompt the kernel to scale down the frequency of the specific lcore to the minimum.
93fc1f2750SBernard Iremonger
94fc1f2750SBernard Iremonger*   **Get available freqs**: Read the available frequencies of the specific lcore from the sys file.
95fc1f2750SBernard Iremonger
96fc1f2750SBernard Iremonger*   **Freq get**: Get the current frequency of the specific lcore.
97fc1f2750SBernard Iremonger
98fc1f2750SBernard Iremonger*   **Freq set**: Prompt the kernel to set the frequency for the specific lcore.
99fc1f2750SBernard Iremonger
10094608a0fSDavid Hunt*   **Enable turbo**: Prompt the kernel to enable Turbo Boost for the specific lcore.
10194608a0fSDavid Hunt
10294608a0fSDavid Hunt*   **Disable turbo**: Prompt the kernel to disable Turbo Boost for the specific lcore.
10394608a0fSDavid Hunt
104fc1f2750SBernard IremongerUser Cases
105fc1f2750SBernard Iremonger----------
106fc1f2750SBernard Iremonger
107fc1f2750SBernard IremongerThe power management mechanism is used to save power when performing L3 forwarding.
108fc1f2750SBernard Iremonger
109*450f0791SLiang Ma
110*450f0791SLiang MaEmpty Poll API
111*450f0791SLiang Ma--------------
112*450f0791SLiang Ma
113*450f0791SLiang MaAbstract
114*450f0791SLiang Ma~~~~~~~~
115*450f0791SLiang Ma
116*450f0791SLiang MaFor packet processing workloads such as DPDK polling is continuous.
117*450f0791SLiang MaThis means CPU cores always show 100% busy independent of how much work
118*450f0791SLiang Mathose cores are doing. It is critical to accurately determine how busy
119*450f0791SLiang Maa core is hugely important for the following reasons:
120*450f0791SLiang Ma
121*450f0791SLiang Ma        * No indication of overload conditions
122*450f0791SLiang Ma        * User does not know how much real load is on a system, resulting
123*450f0791SLiang Ma          in wasted energy as no power management is utilized
124*450f0791SLiang Ma
125*450f0791SLiang MaCompared to the original l3fwd-power design, instead of going to sleep
126*450f0791SLiang Maafter detecting an empty poll, the new mechanism just lowers the core frequency.
127*450f0791SLiang MaAs a result, the application does not stop polling the device, which leads
128*450f0791SLiang Mato improved handling of bursts of traffic.
129*450f0791SLiang Ma
130*450f0791SLiang MaWhen the system become busy, the empty poll mechanism can also increase the core
131*450f0791SLiang Mafrequency (including turbo) to do best effort for intensive traffic. This gives
132*450f0791SLiang Maus more flexible and balanced traffic awareness over the standard l3fwd-power
133*450f0791SLiang Maapplication.
134*450f0791SLiang Ma
135*450f0791SLiang Ma
136*450f0791SLiang MaProposed Solution
137*450f0791SLiang Ma~~~~~~~~~~~~~~~~~
138*450f0791SLiang MaThe proposed solution focuses on how many times empty polls are executed.
139*450f0791SLiang MaThe less the number of empty polls, means current core is busy with processing
140*450f0791SLiang Maworkload, therefore, the higher frequency is needed. The high empty poll number
141*450f0791SLiang Maindicates the current core not doing any real work therefore, we can lower the
142*450f0791SLiang Mafrequency to safe power.
143*450f0791SLiang Ma
144*450f0791SLiang MaIn the current implementation, each core has 1 empty-poll counter which assume
145*450f0791SLiang Ma1 core is dedicated to 1 queue. This will need to be expanded in the future to
146*450f0791SLiang Masupport multiple queues per core.
147*450f0791SLiang Ma
148*450f0791SLiang MaPower state definition:
149*450f0791SLiang Ma^^^^^^^^^^^^^^^^^^^^^^^
150*450f0791SLiang Ma
151*450f0791SLiang Ma* LOW:  Not currently used, reserved for future use.
152*450f0791SLiang Ma
153*450f0791SLiang Ma* MED:  the frequency is used to process modest traffic workload.
154*450f0791SLiang Ma
155*450f0791SLiang Ma* HIGH: the frequency is used to process busy traffic workload.
156*450f0791SLiang Ma
157*450f0791SLiang MaThere are two phases to establish the power management system:
158*450f0791SLiang Ma^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
159*450f0791SLiang Ma* Training phase. This phase is used to measure the optimal frequency
160*450f0791SLiang Ma  change thresholds for a given system. The thresholds will differ from
161*450f0791SLiang Ma  system to system due to differences in processor micro-architecture,
162*450f0791SLiang Ma  cache and device configurations.
163*450f0791SLiang Ma  In this phase, the user must ensure that no traffic can enter the
164*450f0791SLiang Ma  system so that counts can be measured for empty polls at low, medium
165*450f0791SLiang Ma  and high frequencies. Each frequency is measured for two seconds.
166*450f0791SLiang Ma  Once the training phase is complete, the threshold numbers are
167*450f0791SLiang Ma  displayed, and normal mode resumes, and traffic can be allowed into
168*450f0791SLiang Ma  the system. These threshold number can be used on the command line
169*450f0791SLiang Ma  when starting the application in normal mode to avoid re-training
170*450f0791SLiang Ma  every time.
171*450f0791SLiang Ma
172*450f0791SLiang Ma* Normal phase. Every 10ms the run-time counters are compared
173*450f0791SLiang Ma  to the supplied threshold values, and the decision will be made
174*450f0791SLiang Ma  whether to move to a different power state (by adjusting the
175*450f0791SLiang Ma  frequency).
176*450f0791SLiang Ma
177*450f0791SLiang MaAPI Overview for Empty Poll Power Management
178*450f0791SLiang Ma~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
179*450f0791SLiang Ma* **State Init**: initialize the power management system.
180*450f0791SLiang Ma
181*450f0791SLiang Ma* **State Free**: free the resource hold by power management system.
182*450f0791SLiang Ma
183*450f0791SLiang Ma* **Update Empty Poll Counter**: update the empty poll counter.
184*450f0791SLiang Ma
185*450f0791SLiang Ma* **Update Valid Poll Counter**: update the valid poll counter.
186*450f0791SLiang Ma
187*450f0791SLiang Ma* **Set the Fequence Index**: update the power state/frequency mapping.
188*450f0791SLiang Ma
189*450f0791SLiang Ma* **Detect empty poll state change**: empty poll state change detection algorithm then take action.
190*450f0791SLiang Ma
191*450f0791SLiang MaUser Cases
192*450f0791SLiang Ma----------
193*450f0791SLiang MaThe mechanism can applied to any device which is based on polling. e.g. NIC, FPGA.
194*450f0791SLiang Ma
195fc1f2750SBernard IremongerReferences
196fc1f2750SBernard Iremonger----------
197fc1f2750SBernard Iremonger
19848624fd9SSiobhan Butler*   l3fwd-power: The sample application in DPDK that performs L3 forwarding with power management.
199fc1f2750SBernard Iremonger
20048624fd9SSiobhan Butler*   The "L3 Forwarding with Power Management Sample Application" chapter in the *DPDK Sample Application's User Guide*.
201