1.. BSD LICENSE 2 Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 3 All rights reserved. 4 5 Redistribution and use in source and binary forms, with or without 6 modification, are permitted provided that the following conditions 7 are met: 8 9 * Redistributions of source code must retain the above copyright 10 notice, this list of conditions and the following disclaimer. 11 * Redistributions in binary form must reproduce the above copyright 12 notice, this list of conditions and the following disclaimer in 13 the documentation and/or other materials provided with the 14 distribution. 15 * Neither the name of Intel Corporation nor the names of its 16 contributors may be used to endorse or promote products derived 17 from this software without specific prior written permission. 18 19 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 22 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 23 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 25 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 31Programmer's Guide 32================== 33 34|today| 35 36 37**Contents** 38 39.. toctree:: 40 :maxdepth: 3 41 :numbered: 42 43 intro 44 overview 45 env_abstraction_layer 46 malloc_lib 47 ring_lib 48 mempool_lib 49 mbuf_lib 50 poll_mode_drv 51 i40e_ixgbe_igb_virt_func_drv 52 driver_vm_emul_dev 53 ivshmem_lib 54 poll_mode_drv_emulated_virtio_nic 55 poll_mode_drv_paravirtual_vmxnets_nic 56 intel_dpdk_xen_based_packet_switch_sol 57 libpcap_ring_based_poll_mode_drv 58 link_bonding_poll_mode_drv_lib 59 timer_lib 60 hash_lib 61 lpm_lib 62 lpm6_lib 63 packet_distrib_lib 64 ip_fragment_reassembly_lib 65 multi_proc_support 66 kernel_nic_interface 67 thread_safety_intel_dpdk_functions 68 qos_framework 69 power_man 70 packet_classif_access_ctrl 71 packet_framework 72 vhost_lib 73 source_org 74 dev_kit_build_system 75 dev_kit_root_make_help 76 extend_intel_dpdk 77 build_app 78 ext_app_lib_make_help 79 perf_opt_guidelines 80 writing_efficient_code 81 profile_app 82 glossary 83 84 85**Figures** 86 87:ref:`Figure 1. Core Components Architecture <pg_figure_1>` 88 89:ref:`Figure 2. EAL Initialization in a Linux Application Environment <pg_figure_2>` 90 91:ref:`Figure 3. Example of a malloc heap and malloc elements within the malloc library <pg_figure_3>` 92 93:ref:`Figure 4. Ring Structure <pg_figure_4>` 94 95:ref:`Figure 5. Two Channels and Quad-ranked DIMM Example <pg_figure_5>` 96 97:ref:`Figure 6. Three Channels and Two Dual-ranked DIMM Example <pg_figure_6>` 98 99:ref:`Figure 7. A mempool in Memory with its Associated Ring <pg_figure_7>` 100 101:ref:`Figure 8. An mbuf with One Segment <pg_figure_8>` 102 103:ref:`Figure 9. An mbuf with Three Segments <pg_figure_9>` 104 105:ref:`Figure 10. Virtualization for a Single Port NIC in SR-IOV Mode <pg_figure_10>` 106 107:ref:`Figure 11. Performance Benchmark Setup <pg_figure_11>` 108 109:ref:`Figure 12. Fast Host-based Packet Processing <pg_figure_12>` 110 111:ref:`Figure 13. Inter-VM Communication <pg_figure_13>` 112 113:ref:`Figure 14. Host2VM Communication Example Using kni vhost Back End <pg_figure_14>` 114 115:ref:`Figure 15. Host2VM Communication Example Using qemu vhost Back End <pg_figure_15>` 116 117:ref:`Figure 16. Memory Sharing inthe Intel® DPDK Multi-process Sample Application <pg_figure_16>` 118 119:ref:`Figure 17. Components of an Intel® DPDK KNI Application <pg_figure_17>` 120 121:ref:`Figure 18. Packet Flow via mbufs in the Intel DPDK® KNI <pg_figure_18>` 122 123:ref:`Figure 19. vHost-net Architecture Overview <pg_figure_19>` 124 125:ref:`Figure 20. KNI Traffic Flow <pg_figure_20>` 126 127:ref:`Figure 21. Complex Packet Processing Pipeline with QoS Support <pg_figure_21>` 128 129:ref:`Figure 22. Hierarchical Scheduler Block Internal Diagram <pg_figure_22>` 130 131:ref:`Figure 23. Scheduling Hierarchy per Port <pg_figure_23>` 132 133:ref:`Figure 24. Internal Data Structures per Port <pg_figure_24>` 134 135:ref:`Figure 25. Prefetch Pipeline for the Hierarchical Scheduler Enqueue Operation <pg_figure_25>` 136 137:ref:`Figure 26. Pipe Prefetch State Machine for the Hierarchical Scheduler Dequeue Operation <pg_figure_26>` 138 139:ref:`Figure 27. High-level Block Diagram of the Intel® DPDK Dropper <pg_figure_27>` 140 141:ref:`Figure 28. Flow Through the Dropper <pg_figure_28>` 142 143:ref:`Figure 29. Example Data Flow Through Dropper <pg_figure_29>` 144 145:ref:`Figure 30. Packet Drop Probability for a Given RED Configuration <pg_figure_30>` 146 147:ref:`Figure 31. Initial Drop Probability (pb), Actual Drop probability (pa) Computed Using a Factor 1 (Blue Curve) and a Factor 2 (Red Curve) <pg_figure_31>` 148 149:ref:`Figure 32. Example of packet processing pipeline. The input ports 0 and 1 are connected with the output ports 0, 1 and 2 through tables 0 and 1. <pg_figure_32>` 150 151:ref:`Figure 33. Sequence of steps for hash table operations in packet processing context <pg_figure_33>` 152 153:ref:`Figure 34. Data structures for configurable key size hash tables <pg_figure_34>` 154 155:ref:`Figure 35. Bucket search pipeline for key lookup operation (configurable key size hash tables) <pg_figure_35>` 156 157:ref:`Figure 36. Pseudo-code for match, match_many and match_pos <pg_figure_36>` 158 159:ref:`Figure 37. Data structures for 8-byte key hash tables <pg_figure_37>` 160 161:ref:`Figure 38. Data structures for 16-byte key hash tables <pg_figure_38>` 162 163:ref:`Figure 39. Bucket search pipeline for key lookup operation (single key size hash tables) <pg_figure_39>` 164 165**Tables** 166 167:ref:`Table 1. Packet Processing Pipeline Implementing QoS <pg_table_1>` 168 169:ref:`Table 2. Infrastructure Blocks Used by the Packet Processing Pipeline <pg_table_2>` 170 171:ref:`Table 3. Port Scheduling Hierarchy <pg_table_3>` 172 173:ref:`Table 4. Scheduler Internal Data Structures per Port <pg_table_4>` 174 175:ref:`Table 5. Ethernet Frame Overhead Fields <pg_table_5>` 176 177:ref:`Table 6. Token Bucket Generic Operations <pg_table_6>` 178 179:ref:`Table 7. Token Bucket Generic Parameters <pg_table_7>` 180 181:ref:`Table 8. Token Bucket Persistent Data Structure <pg_table_8>` 182 183:ref:`Table 9. Token Bucket Operations <pg_table_9>` 184 185:ref:`Table 10. Subport/Pipe Traffic Class Upper Limit Enforcement Persistent Data Structure <pg_table_10>` 186 187:ref:`Table 11. Subport/Pipe Traffic Class Upper Limit Enforcement Operations <pg_table_11>` 188 189:ref:`Table 12. Weighted Round Robin (WRR) <pg_table_12>` 190 191:ref:`Table 13. Subport Traffic Class Oversubscription <pg_table_13>` 192 193:ref:`Table 14. Watermark Propagation from Subport Level to Member Pipes at the Beginning of Each Traffic Class Upper Limit Enforcement Period <pg_table_14>` 194 195:ref:`Table 15. Watermark Calculation <pg_table_15>` 196 197:ref:`Table 16. RED Configuration Parameters <pg_table_16>` 198 199:ref:`Table 17. Relative Performance of Alternative Approaches <pg_table_17>` 200 201:ref:`Table 18. RED Configuration Corresponding to RED Configuration File <pg_table_18>` 202 203:ref:`Table 19. Port types <pg_table_19>` 204 205:ref:`Table 20. Port abstract interface <pg_table_20>` 206 207:ref:`Table 21. Table types <pg_table_21>` 208 209:ref:`Table 29. Table Abstract Interface <pg_table_29_1>` 210 211:ref:`Table 22. Configuration parameters common for all hash table types <pg_table_22>` 212 213:ref:`Table 23. Configuration parameters specific to extendible bucket hash table <pg_table_23>` 214 215:ref:`Table 24. Configuration parameters specific to pre-computed key signature hash table <pg_table_24>` 216 217:ref:`Table 25. The main large data structures (arrays) used for configurable key size hash tables <pg_table_25>` 218 219:ref:`Table 26. Field description for bucket array entry (configurable key size hash tables) <pg_table_26>` 220 221:ref:`Table 27. Description of the bucket search pipeline stages (configurable key size hash tables) <pg_table_27>` 222 223:ref:`Table 28. Lookup tables for match, match_many, match_pos <pg_table_28>` 224 225:ref:`Table 29. Collapsed lookup tables for match, match_many and match_pos <pg_table_29>` 226 227:ref:`Table 30. The main large data structures (arrays) used for 8-byte and 16-byte key size hash tables <pg_table_30>` 228 229:ref:`Table 31. Field description for bucket array entry (8-byte and 16-byte key hash tables) <pg_table_31>` 230 231:ref:`Table 32. Description of the bucket search pipeline stages (8-byte and 16-byte key hash tables) <pg_table_32>` 232 233:ref:`Table 33. Next hop actions (reserved) <pg_table_33>` 234 235:ref:`Table 34. User action examples <pg_table_34>` 236