10318c02bSDeclan Doherty.. BSD LICENSE 25209df0dSPablo de Lara Copyright(c) 2016-2017 Intel Corporation. All rights reserved. 30318c02bSDeclan Doherty 40318c02bSDeclan Doherty Redistribution and use in source and binary forms, with or without 50318c02bSDeclan Doherty modification, are permitted provided that the following conditions 60318c02bSDeclan Doherty are met: 70318c02bSDeclan Doherty 80318c02bSDeclan Doherty * Redistributions of source code must retain the above copyright 90318c02bSDeclan Doherty notice, this list of conditions and the following disclaimer. 100318c02bSDeclan Doherty * Redistributions in binary form must reproduce the above copyright 110318c02bSDeclan Doherty notice, this list of conditions and the following disclaimer in 120318c02bSDeclan Doherty the documentation and/or other materials provided with the 130318c02bSDeclan Doherty distribution. 140318c02bSDeclan Doherty * Neither the name of Intel Corporation nor the names of its 150318c02bSDeclan Doherty contributors may be used to endorse or promote products derived 160318c02bSDeclan Doherty from this software without specific prior written permission. 170318c02bSDeclan Doherty 180318c02bSDeclan Doherty THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 190318c02bSDeclan Doherty "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 200318c02bSDeclan Doherty LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 210318c02bSDeclan Doherty A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 220318c02bSDeclan Doherty OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 230318c02bSDeclan Doherty SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 240318c02bSDeclan Doherty LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 250318c02bSDeclan Doherty DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 260318c02bSDeclan Doherty THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 270318c02bSDeclan Doherty (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 280318c02bSDeclan Doherty OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 290318c02bSDeclan Doherty 300318c02bSDeclan Doherty 310318c02bSDeclan DohertyCryptography Device Library 320318c02bSDeclan Doherty=========================== 330318c02bSDeclan Doherty 340318c02bSDeclan DohertyThe cryptodev library provides a Crypto device framework for management and 350318c02bSDeclan Dohertyprovisioning of hardware and software Crypto poll mode drivers, defining generic 360318c02bSDeclan DohertyAPIs which support a number of different Crypto operations. The framework 370318c02bSDeclan Dohertycurrently only supports cipher, authentication, chained cipher/authentication 380318c02bSDeclan Dohertyand AEAD symmetric Crypto operations. 390318c02bSDeclan Doherty 400318c02bSDeclan Doherty 410318c02bSDeclan DohertyDesign Principles 420318c02bSDeclan Doherty----------------- 430318c02bSDeclan Doherty 440318c02bSDeclan DohertyThe cryptodev library follows the same basic principles as those used in DPDKs 450318c02bSDeclan DohertyEthernet Device framework. The Crypto framework provides a generic Crypto device 460318c02bSDeclan Dohertyframework which supports both physical (hardware) and virtual (software) Crypto 470318c02bSDeclan Dohertydevices as well as a generic Crypto API which allows Crypto devices to be 480318c02bSDeclan Dohertymanaged and configured and supports Crypto operations to be provisioned on 490318c02bSDeclan DohertyCrypto poll mode driver. 500318c02bSDeclan Doherty 510318c02bSDeclan Doherty 520318c02bSDeclan DohertyDevice Management 530318c02bSDeclan Doherty----------------- 540318c02bSDeclan Doherty 550318c02bSDeclan DohertyDevice Creation 560318c02bSDeclan Doherty~~~~~~~~~~~~~~~ 570318c02bSDeclan Doherty 580318c02bSDeclan DohertyPhysical Crypto devices are discovered during the PCI probe/enumeration of the 590318c02bSDeclan DohertyEAL function which is executed at DPDK initialization, based on 600318c02bSDeclan Dohertytheir PCI device identifier, each unique PCI BDF (bus/bridge, device, 610318c02bSDeclan Dohertyfunction). Specific physical Crypto devices, like other physical devices in DPDK 620318c02bSDeclan Dohertycan be white-listed or black-listed using the EAL command line options. 630318c02bSDeclan Doherty 640318c02bSDeclan DohertyVirtual devices can be created by two mechanisms, either using the EAL command 650318c02bSDeclan Dohertyline options or from within the application using an EAL API directly. 660318c02bSDeclan Doherty 670318c02bSDeclan DohertyFrom the command line using the --vdev EAL option 680318c02bSDeclan Doherty 690318c02bSDeclan Doherty.. code-block:: console 700318c02bSDeclan Doherty 7130883f3eSPablo de Lara --vdev 'crypto_aesni_mb0,max_nb_queue_pairs=2,max_nb_sessions=1024,socket_id=0' 720318c02bSDeclan Doherty 732f6fec53SThomas MonjalonOur using the rte_vdev_init API within the application code. 740318c02bSDeclan Doherty 750318c02bSDeclan Doherty.. code-block:: c 760318c02bSDeclan Doherty 7730883f3eSPablo de Lara rte_vdev_init("crypto_aesni_mb", 780318c02bSDeclan Doherty "max_nb_queue_pairs=2,max_nb_sessions=1024,socket_id=0") 790318c02bSDeclan Doherty 800318c02bSDeclan DohertyAll virtual Crypto devices support the following initialization parameters: 810318c02bSDeclan Doherty 820318c02bSDeclan Doherty* ``max_nb_queue_pairs`` - maximum number of queue pairs supported by the device. 830318c02bSDeclan Doherty* ``max_nb_sessions`` - maximum number of sessions supported by the device 840318c02bSDeclan Doherty* ``socket_id`` - socket on which to allocate the device resources on. 850318c02bSDeclan Doherty 860318c02bSDeclan Doherty 870318c02bSDeclan DohertyDevice Identification 880318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~ 890318c02bSDeclan Doherty 900318c02bSDeclan DohertyEach device, whether virtual or physical is uniquely designated by two 910318c02bSDeclan Dohertyidentifiers: 920318c02bSDeclan Doherty 930318c02bSDeclan Doherty- A unique device index used to designate the Crypto device in all functions 940318c02bSDeclan Doherty exported by the cryptodev API. 950318c02bSDeclan Doherty 960318c02bSDeclan Doherty- A device name used to designate the Crypto device in console messages, for 970318c02bSDeclan Doherty administration or debugging purposes. For ease of use, the port name includes 980318c02bSDeclan Doherty the port index. 990318c02bSDeclan Doherty 1000318c02bSDeclan Doherty 1010318c02bSDeclan DohertyDevice Configuration 1020318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~ 1030318c02bSDeclan Doherty 1040318c02bSDeclan DohertyThe configuration of each Crypto device includes the following operations: 1050318c02bSDeclan Doherty 1060318c02bSDeclan Doherty- Allocation of resources, including hardware resources if a physical device. 1070318c02bSDeclan Doherty- Resetting the device into a well-known default state. 1080318c02bSDeclan Doherty- Initialization of statistics counters. 1090318c02bSDeclan Doherty 1100318c02bSDeclan DohertyThe rte_cryptodev_configure API is used to configure a Crypto device. 1110318c02bSDeclan Doherty 1120318c02bSDeclan Doherty.. code-block:: c 1130318c02bSDeclan Doherty 1140318c02bSDeclan Doherty int rte_cryptodev_configure(uint8_t dev_id, 1150318c02bSDeclan Doherty struct rte_cryptodev_config *config) 1160318c02bSDeclan Doherty 117bb59dac7SPablo de LaraThe ``rte_cryptodev_config`` structure is used to pass the configuration 118bb59dac7SPablo de Laraparameters for socket selection and number of queue pairs. 1190318c02bSDeclan Doherty 1200318c02bSDeclan Doherty.. code-block:: c 1210318c02bSDeclan Doherty 1220318c02bSDeclan Doherty struct rte_cryptodev_config { 1230318c02bSDeclan Doherty int socket_id; 1240318c02bSDeclan Doherty /**< Socket to allocate resources on */ 1250318c02bSDeclan Doherty uint16_t nb_queue_pairs; 1260318c02bSDeclan Doherty /**< Number of queue pairs to configure on device */ 1270318c02bSDeclan Doherty }; 1280318c02bSDeclan Doherty 1290318c02bSDeclan Doherty 1300318c02bSDeclan DohertyConfiguration of Queue Pairs 1310318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1320318c02bSDeclan Doherty 1330318c02bSDeclan DohertyEach Crypto devices queue pair is individually configured through the 1340318c02bSDeclan Doherty``rte_cryptodev_queue_pair_setup`` API. 1350318c02bSDeclan DohertyEach queue pairs resources may be allocated on a specified socket. 1360318c02bSDeclan Doherty 1370318c02bSDeclan Doherty.. code-block:: c 1380318c02bSDeclan Doherty 1390318c02bSDeclan Doherty int rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id, 1400318c02bSDeclan Doherty const struct rte_cryptodev_qp_conf *qp_conf, 1410318c02bSDeclan Doherty int socket_id) 1420318c02bSDeclan Doherty 1430318c02bSDeclan Doherty struct rte_cryptodev_qp_conf { 1440318c02bSDeclan Doherty uint32_t nb_descriptors; /**< Number of descriptors per queue pair */ 1450318c02bSDeclan Doherty }; 1460318c02bSDeclan Doherty 1470318c02bSDeclan Doherty 1480318c02bSDeclan DohertyLogical Cores, Memory and Queues Pair Relationships 1490318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1500318c02bSDeclan Doherty 1510318c02bSDeclan DohertyThe Crypto device Library as the Poll Mode Driver library support NUMA for when 1520318c02bSDeclan Dohertya processor’s logical cores and interfaces utilize its local memory. Therefore 1530318c02bSDeclan DohertyCrypto operations, and in the case of symmetric Crypto operations, the session 1540318c02bSDeclan Dohertyand the mbuf being operated on, should be allocated from memory pools created 1550318c02bSDeclan Dohertyin the local memory. The buffers should, if possible, remain on the local 1560318c02bSDeclan Dohertyprocessor to obtain the best performance results and buffer descriptors should 1570318c02bSDeclan Dohertybe populated with mbufs allocated from a mempool allocated from local memory. 1580318c02bSDeclan Doherty 1590318c02bSDeclan DohertyThe run-to-completion model also performs better, especially in the case of 1600318c02bSDeclan Dohertyvirtual Crypto devices, if the Crypto operation and session and data buffer is 1610318c02bSDeclan Dohertyin local memory instead of a remote processor's memory. This is also true for 1620318c02bSDeclan Dohertythe pipe-line model provided all logical cores used are located on the same 1630318c02bSDeclan Dohertyprocessor. 1640318c02bSDeclan Doherty 1650318c02bSDeclan DohertyMultiple logical cores should never share the same queue pair for enqueuing 1660318c02bSDeclan Dohertyoperations or dequeuing operations on the same Crypto device since this would 1670318c02bSDeclan Dohertyrequire global locks and hinder performance. It is however possible to use a 1680318c02bSDeclan Dohertydifferent logical core to dequeue an operation on a queue pair from the logical 1690318c02bSDeclan Dohertycore which it was enqueued on. This means that a crypto burst enqueue/dequeue 1700318c02bSDeclan DohertyAPIs are a logical place to transition from one logical core to another in a 1710318c02bSDeclan Dohertypacket processing pipeline. 1720318c02bSDeclan Doherty 1730318c02bSDeclan Doherty 1740318c02bSDeclan DohertyDevice Features and Capabilities 1750318c02bSDeclan Doherty--------------------------------- 1760318c02bSDeclan Doherty 1770318c02bSDeclan DohertyCrypto devices define their functionality through two mechanisms, global device 1780318c02bSDeclan Dohertyfeatures and algorithm capabilities. Global devices features identify device 1790318c02bSDeclan Dohertywide level features which are applicable to the whole device such as 1800318c02bSDeclan Dohertythe device having hardware acceleration or supporting symmetric Crypto 1810318c02bSDeclan Dohertyoperations, 1820318c02bSDeclan Doherty 1830318c02bSDeclan DohertyThe capabilities mechanism defines the individual algorithms/functions which 18483984b7fSPablo de Larathe device supports, such as a specific symmetric Crypto cipher, 18583984b7fSPablo de Laraauthentication operation or Authenticated Encryption with Associated Data 18683984b7fSPablo de Lara(AEAD) operation. 1870318c02bSDeclan Doherty 1880318c02bSDeclan Doherty 1890318c02bSDeclan DohertyDevice Features 1900318c02bSDeclan Doherty~~~~~~~~~~~~~~~ 1910318c02bSDeclan Doherty 1920318c02bSDeclan DohertyCurrently the following Crypto device features are defined: 1930318c02bSDeclan Doherty 1940318c02bSDeclan Doherty* Symmetric Crypto operations 1950318c02bSDeclan Doherty* Asymmetric Crypto operations 1960318c02bSDeclan Doherty* Chaining of symmetric Crypto operations 1970318c02bSDeclan Doherty* SSE accelerated SIMD vector operations 1980318c02bSDeclan Doherty* AVX accelerated SIMD vector operations 1990318c02bSDeclan Doherty* AVX2 accelerated SIMD vector operations 2000318c02bSDeclan Doherty* AESNI accelerated instructions 2010318c02bSDeclan Doherty* Hardware off-load processing 2020318c02bSDeclan Doherty 2030318c02bSDeclan Doherty 2040318c02bSDeclan DohertyDevice Operation Capabilities 2050318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2060318c02bSDeclan Doherty 2070318c02bSDeclan DohertyCrypto capabilities which identify particular algorithm which the Crypto PMD 2080318c02bSDeclan Dohertysupports are defined by the operation type, the operation transform, the 2090318c02bSDeclan Dohertytransform identifier and then the particulars of the transform. For the full 2100318c02bSDeclan Dohertyscope of the Crypto capability see the definition of the structure in the 2110318c02bSDeclan Doherty*DPDK API Reference*. 2120318c02bSDeclan Doherty 2130318c02bSDeclan Doherty.. code-block:: c 2140318c02bSDeclan Doherty 2150318c02bSDeclan Doherty struct rte_cryptodev_capabilities; 2160318c02bSDeclan Doherty 2170318c02bSDeclan DohertyEach Crypto poll mode driver defines its own private array of capabilities 2180318c02bSDeclan Dohertyfor the operations it supports. Below is an example of the capabilities for a 2190318c02bSDeclan DohertyPMD which supports the authentication algorithm SHA1_HMAC and the cipher 2200318c02bSDeclan Dohertyalgorithm AES_CBC. 2210318c02bSDeclan Doherty 2220318c02bSDeclan Doherty.. code-block:: c 2230318c02bSDeclan Doherty 2240318c02bSDeclan Doherty static const struct rte_cryptodev_capabilities pmd_capabilities[] = { 2250318c02bSDeclan Doherty { /* SHA1 HMAC */ 2260318c02bSDeclan Doherty .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 2270318c02bSDeclan Doherty .sym = { 2280318c02bSDeclan Doherty .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 2290318c02bSDeclan Doherty .auth = { 2300318c02bSDeclan Doherty .algo = RTE_CRYPTO_AUTH_SHA1_HMAC, 2310318c02bSDeclan Doherty .block_size = 64, 2320318c02bSDeclan Doherty .key_size = { 2330318c02bSDeclan Doherty .min = 64, 2340318c02bSDeclan Doherty .max = 64, 2350318c02bSDeclan Doherty .increment = 0 2360318c02bSDeclan Doherty }, 2370318c02bSDeclan Doherty .digest_size = { 2380318c02bSDeclan Doherty .min = 12, 2390318c02bSDeclan Doherty .max = 12, 2400318c02bSDeclan Doherty .increment = 0 2410318c02bSDeclan Doherty }, 242acf86169SPablo de Lara .aad_size = { 0 }, 243acf86169SPablo de Lara .iv_size = { 0 } 2440318c02bSDeclan Doherty } 2450318c02bSDeclan Doherty } 2460318c02bSDeclan Doherty }, 2470318c02bSDeclan Doherty { /* AES CBC */ 2480318c02bSDeclan Doherty .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 2490318c02bSDeclan Doherty .sym = { 2500318c02bSDeclan Doherty .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 2510318c02bSDeclan Doherty .cipher = { 2520318c02bSDeclan Doherty .algo = RTE_CRYPTO_CIPHER_AES_CBC, 2530318c02bSDeclan Doherty .block_size = 16, 2540318c02bSDeclan Doherty .key_size = { 2550318c02bSDeclan Doherty .min = 16, 2560318c02bSDeclan Doherty .max = 32, 2570318c02bSDeclan Doherty .increment = 8 2580318c02bSDeclan Doherty }, 2590318c02bSDeclan Doherty .iv_size = { 2600318c02bSDeclan Doherty .min = 16, 2610318c02bSDeclan Doherty .max = 16, 2620318c02bSDeclan Doherty .increment = 0 2630318c02bSDeclan Doherty } 2640318c02bSDeclan Doherty } 2650318c02bSDeclan Doherty } 2660318c02bSDeclan Doherty } 2670318c02bSDeclan Doherty } 2680318c02bSDeclan Doherty 2690318c02bSDeclan Doherty 2700318c02bSDeclan DohertyCapabilities Discovery 2710318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~ 2720318c02bSDeclan Doherty 2730318c02bSDeclan DohertyDiscovering the features and capabilities of a Crypto device poll mode driver 2740318c02bSDeclan Dohertyis achieved through the ``rte_cryptodev_info_get`` function. 2750318c02bSDeclan Doherty 2760318c02bSDeclan Doherty.. code-block:: c 2770318c02bSDeclan Doherty 2780318c02bSDeclan Doherty void rte_cryptodev_info_get(uint8_t dev_id, 2790318c02bSDeclan Doherty struct rte_cryptodev_info *dev_info); 2800318c02bSDeclan Doherty 2810318c02bSDeclan DohertyThis allows the user to query a specific Crypto PMD and get all the device 2820318c02bSDeclan Dohertyfeatures and capabilities. The ``rte_cryptodev_info`` structure contains all the 2830318c02bSDeclan Dohertyrelevant information for the device. 2840318c02bSDeclan Doherty 2850318c02bSDeclan Doherty.. code-block:: c 2860318c02bSDeclan Doherty 2870318c02bSDeclan Doherty struct rte_cryptodev_info { 2880318c02bSDeclan Doherty const char *driver_name; 2897a364faeSSlawomir Mrozowicz uint8_t driver_id; 2900318c02bSDeclan Doherty struct rte_pci_device *pci_dev; 2910318c02bSDeclan Doherty 2920318c02bSDeclan Doherty uint64_t feature_flags; 2930318c02bSDeclan Doherty 2940318c02bSDeclan Doherty const struct rte_cryptodev_capabilities *capabilities; 2950318c02bSDeclan Doherty 2960318c02bSDeclan Doherty unsigned max_nb_queue_pairs; 2970318c02bSDeclan Doherty 2980318c02bSDeclan Doherty struct { 2990318c02bSDeclan Doherty unsigned max_nb_sessions; 3000318c02bSDeclan Doherty } sym; 3010318c02bSDeclan Doherty }; 3020318c02bSDeclan Doherty 3030318c02bSDeclan Doherty 3040318c02bSDeclan DohertyOperation Processing 3050318c02bSDeclan Doherty-------------------- 3060318c02bSDeclan Doherty 3070318c02bSDeclan DohertyScheduling of Crypto operations on DPDK's application data path is 3080318c02bSDeclan Dohertyperformed using a burst oriented asynchronous API set. A queue pair on a Crypto 3090318c02bSDeclan Dohertydevice accepts a burst of Crypto operations using enqueue burst API. On physical 3100318c02bSDeclan DohertyCrypto devices the enqueue burst API will place the operations to be processed 3110318c02bSDeclan Dohertyon the devices hardware input queue, for virtual devices the processing of the 3120318c02bSDeclan DohertyCrypto operations is usually completed during the enqueue call to the Crypto 3130318c02bSDeclan Dohertydevice. The dequeue burst API will retrieve any processed operations available 3140318c02bSDeclan Dohertyfrom the queue pair on the Crypto device, from physical devices this is usually 3150318c02bSDeclan Dohertydirectly from the devices processed queue, and for virtual device's from a 3160318c02bSDeclan Doherty``rte_ring`` where processed operations are place after being processed on the 3170318c02bSDeclan Dohertyenqueue call. 3180318c02bSDeclan Doherty 3190318c02bSDeclan Doherty 3200318c02bSDeclan DohertyEnqueue / Dequeue Burst APIs 3210318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 3220318c02bSDeclan Doherty 3230318c02bSDeclan DohertyThe burst enqueue API uses a Crypto device identifier and a queue pair 3240318c02bSDeclan Dohertyidentifier to specify the Crypto device queue pair to schedule the processing on. 3250318c02bSDeclan DohertyThe ``nb_ops`` parameter is the number of operations to process which are 3260318c02bSDeclan Dohertysupplied in the ``ops`` array of ``rte_crypto_op`` structures. 3270318c02bSDeclan DohertyThe enqueue function returns the number of operations it actually enqueued for 3280318c02bSDeclan Dohertyprocessing, a return value equal to ``nb_ops`` means that all packets have been 3290318c02bSDeclan Dohertyenqueued. 3300318c02bSDeclan Doherty 3310318c02bSDeclan Doherty.. code-block:: c 3320318c02bSDeclan Doherty 3330318c02bSDeclan Doherty uint16_t rte_cryptodev_enqueue_burst(uint8_t dev_id, uint16_t qp_id, 3340318c02bSDeclan Doherty struct rte_crypto_op **ops, uint16_t nb_ops) 3350318c02bSDeclan Doherty 3360318c02bSDeclan DohertyThe dequeue API uses the same format as the enqueue API of processed but 3370318c02bSDeclan Dohertythe ``nb_ops`` and ``ops`` parameters are now used to specify the max processed 3380318c02bSDeclan Dohertyoperations the user wishes to retrieve and the location in which to store them. 3390318c02bSDeclan DohertyThe API call returns the actual number of processed operations returned, this 3400318c02bSDeclan Dohertycan never be larger than ``nb_ops``. 3410318c02bSDeclan Doherty 3420318c02bSDeclan Doherty.. code-block:: c 3430318c02bSDeclan Doherty 3440318c02bSDeclan Doherty uint16_t rte_cryptodev_dequeue_burst(uint8_t dev_id, uint16_t qp_id, 3450318c02bSDeclan Doherty struct rte_crypto_op **ops, uint16_t nb_ops) 3460318c02bSDeclan Doherty 3470318c02bSDeclan Doherty 3480318c02bSDeclan DohertyOperation Representation 3490318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~ 3500318c02bSDeclan Doherty 3510318c02bSDeclan DohertyAn Crypto operation is represented by an rte_crypto_op structure, which is a 3520318c02bSDeclan Dohertygeneric metadata container for all necessary information required for the 3530318c02bSDeclan DohertyCrypto operation to be processed on a particular Crypto device poll mode driver. 3540318c02bSDeclan Doherty 3550318c02bSDeclan Doherty.. figure:: img/crypto_op.* 3560318c02bSDeclan Doherty 3575209df0dSPablo de LaraThe operation structure includes the operation type, the operation status 3585209df0dSPablo de Laraand the session type (session-based/less), a reference to the operation 3595209df0dSPablo de Laraspecific data, which can vary in size and content depending on the operation 3605209df0dSPablo de Larabeing provisioned. It also contains the source mempool for the operation, 361b1f6192bSPablo de Laraif it allocated from a mempool. 3620318c02bSDeclan Doherty 3630318c02bSDeclan DohertyIf Crypto operations are allocated from a Crypto operation mempool, see next 3640318c02bSDeclan Dohertysection, there is also the ability to allocate private memory with the 3650318c02bSDeclan Dohertyoperation for applications purposes. 3660318c02bSDeclan Doherty 3670318c02bSDeclan DohertyApplication software is responsible for specifying all the operation specific 3680318c02bSDeclan Dohertyfields in the ``rte_crypto_op`` structure which are then used by the Crypto PMD 3690318c02bSDeclan Dohertyto process the requested operation. 3700318c02bSDeclan Doherty 3710318c02bSDeclan Doherty 3720318c02bSDeclan DohertyOperation Management and Allocation 3730318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 3740318c02bSDeclan Doherty 3750318c02bSDeclan DohertyThe cryptodev library provides an API set for managing Crypto operations which 3760318c02bSDeclan Dohertyutilize the Mempool Library to allocate operation buffers. Therefore, it ensures 3770318c02bSDeclan Dohertythat the crytpo operation is interleaved optimally across the channels and 3780318c02bSDeclan Dohertyranks for optimal processing. 3790318c02bSDeclan DohertyA ``rte_crypto_op`` contains a field indicating the pool that it originated from. 3800318c02bSDeclan DohertyWhen calling ``rte_crypto_op_free(op)``, the operation returns to its original pool. 3810318c02bSDeclan Doherty 3820318c02bSDeclan Doherty.. code-block:: c 3830318c02bSDeclan Doherty 3840318c02bSDeclan Doherty extern struct rte_mempool * 3850318c02bSDeclan Doherty rte_crypto_op_pool_create(const char *name, enum rte_crypto_op_type type, 3860318c02bSDeclan Doherty unsigned nb_elts, unsigned cache_size, uint16_t priv_size, 3870318c02bSDeclan Doherty int socket_id); 3880318c02bSDeclan Doherty 3890318c02bSDeclan DohertyDuring pool creation ``rte_crypto_op_init()`` is called as a constructor to 3900318c02bSDeclan Dohertyinitialize each Crypto operation which subsequently calls 3910318c02bSDeclan Doherty``__rte_crypto_op_reset()`` to configure any operation type specific fields based 3920318c02bSDeclan Dohertyon the type parameter. 3930318c02bSDeclan Doherty 3940318c02bSDeclan Doherty 3950318c02bSDeclan Doherty``rte_crypto_op_alloc()`` and ``rte_crypto_op_bulk_alloc()`` are used to allocate 3960318c02bSDeclan DohertyCrypto operations of a specific type from a given Crypto operation mempool. 3970318c02bSDeclan Doherty``__rte_crypto_op_reset()`` is called on each operation before being returned to 3980318c02bSDeclan Dohertyallocate to a user so the operation is always in a good known state before use 3990318c02bSDeclan Dohertyby the application. 4000318c02bSDeclan Doherty 4010318c02bSDeclan Doherty.. code-block:: c 4020318c02bSDeclan Doherty 4030318c02bSDeclan Doherty struct rte_crypto_op *rte_crypto_op_alloc(struct rte_mempool *mempool, 4040318c02bSDeclan Doherty enum rte_crypto_op_type type) 4050318c02bSDeclan Doherty 4060318c02bSDeclan Doherty unsigned rte_crypto_op_bulk_alloc(struct rte_mempool *mempool, 4070318c02bSDeclan Doherty enum rte_crypto_op_type type, 4080318c02bSDeclan Doherty struct rte_crypto_op **ops, uint16_t nb_ops) 4090318c02bSDeclan Doherty 4100318c02bSDeclan Doherty``rte_crypto_op_free()`` is called by the application to return an operation to 4110318c02bSDeclan Dohertyits allocating pool. 4120318c02bSDeclan Doherty 4130318c02bSDeclan Doherty.. code-block:: c 4140318c02bSDeclan Doherty 4150318c02bSDeclan Doherty void rte_crypto_op_free(struct rte_crypto_op *op) 4160318c02bSDeclan Doherty 4170318c02bSDeclan Doherty 4180318c02bSDeclan DohertySymmetric Cryptography Support 4190318c02bSDeclan Doherty------------------------------ 4200318c02bSDeclan Doherty 4210318c02bSDeclan DohertyThe cryptodev library currently provides support for the following symmetric 4220318c02bSDeclan DohertyCrypto operations; cipher, authentication, including chaining of these 4230318c02bSDeclan Dohertyoperations, as well as also supporting AEAD operations. 4240318c02bSDeclan Doherty 4250318c02bSDeclan Doherty 4260318c02bSDeclan DohertySession and Session Management 427e3346dfcSPablo de Lara~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 4280318c02bSDeclan Doherty 429bb59dac7SPablo de LaraSessions are used in symmetric cryptographic processing to store the immutable 4300318c02bSDeclan Dohertydata defined in a cryptographic transform which is used in the operation 4310318c02bSDeclan Dohertyprocessing of a packet flow. Sessions are used to manage information such as 4320318c02bSDeclan Dohertyexpand cipher keys and HMAC IPADs and OPADs, which need to be calculated for a 4330318c02bSDeclan Dohertyparticular Crypto operation, but are immutable on a packet to packet basis for 4340318c02bSDeclan Dohertya flow. Crypto sessions cache this immutable data in a optimal way for the 4350318c02bSDeclan Dohertyunderlying PMD and this allows further acceleration of the offload of 4360318c02bSDeclan DohertyCrypto workloads. 4370318c02bSDeclan Doherty 4380318c02bSDeclan Doherty.. figure:: img/cryptodev_sym_sess.* 4390318c02bSDeclan Doherty 440bb59dac7SPablo de LaraThe Crypto device framework provides APIs to allocate and initizalize sessions 441bb59dac7SPablo de Larafor crypto devices, where sessions are mempool objects. 442bb59dac7SPablo de LaraIt is the application's responsibility to create and manage the session mempools. 443bb59dac7SPablo de LaraThis approach allows for different scenarios such as having a single session 444bb59dac7SPablo de Laramempool for all crypto devices (where the mempool object size is big 445bb59dac7SPablo de Laraenough to hold the private session of any crypto device), as well as having 446bb59dac7SPablo de Laramultiple session mempools of different sizes for better memory usage. 4470318c02bSDeclan Doherty 448bb59dac7SPablo de LaraAn application can use ``rte_cryptodev_get_private_session_size()`` to 449bb59dac7SPablo de Laraget the private session size of given crypto device. This function would allow 450bb59dac7SPablo de Laraan application to calculate the max device session size of all crypto devices 451bb59dac7SPablo de Larato create a single session mempool. 452bb59dac7SPablo de LaraIf instead an application creates multiple session mempools, the Crypto device 453bb59dac7SPablo de Laraframework also provides ``rte_cryptodev_get_header_session_size`` to get 454bb59dac7SPablo de Larathe size of an uninitialized session. 4550318c02bSDeclan Doherty 456bb59dac7SPablo de LaraOnce the session mempools have been created, ``rte_cryptodev_sym_session_create()`` 457bb59dac7SPablo de Larais used to allocate an uninitialized session from the given mempool. 458bb59dac7SPablo de LaraThe session then must be initialized using ``rte_cryptodev_sym_session_init()`` 459bb59dac7SPablo de Larafor each of the required crypto devices. A symmetric transform chain 460bb59dac7SPablo de Larais used to specify the operation and its parameters. See the section below for 461bb59dac7SPablo de Laradetails on transforms. 4620318c02bSDeclan Doherty 463bb59dac7SPablo de LaraWhen a session is no longer used, user must call ``rte_cryptodev_sym_session_clear()`` 464bb59dac7SPablo de Larafor each of the crypto devices that are using the session, to free all driver 465bb59dac7SPablo de Laraprivate session data. Once this is done, session should be freed using 466bb59dac7SPablo de Lara``rte_cryptodev_sym_session_free`` which returns them to their mempool. 4670318c02bSDeclan Doherty 4680318c02bSDeclan Doherty 4690318c02bSDeclan DohertyTransforms and Transform Chaining 4700318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 4710318c02bSDeclan Doherty 4720318c02bSDeclan DohertySymmetric Crypto transforms (``rte_crypto_sym_xform``) are the mechanism used 4730318c02bSDeclan Dohertyto specify the details of the Crypto operation. For chaining of symmetric 4740318c02bSDeclan Dohertyoperations such as cipher encrypt and authentication generate, the next pointer 4750318c02bSDeclan Dohertyallows transform to be chained together. Crypto devices which support chaining 4760318c02bSDeclan Dohertymust publish the chaining of symmetric Crypto operations feature flag. 4770318c02bSDeclan Doherty 47883984b7fSPablo de LaraCurrently there are three transforms types cipher, authentication and AEAD. 47983984b7fSPablo de LaraAlso it is important to note that the order in which the 4800318c02bSDeclan Dohertytransforms are passed indicates the order of the chaining. 4810318c02bSDeclan Doherty 4820318c02bSDeclan Doherty.. code-block:: c 4830318c02bSDeclan Doherty 4840318c02bSDeclan Doherty struct rte_crypto_sym_xform { 4850318c02bSDeclan Doherty struct rte_crypto_sym_xform *next; 4860318c02bSDeclan Doherty /**< next xform in chain */ 4870318c02bSDeclan Doherty enum rte_crypto_sym_xform_type type; 4880318c02bSDeclan Doherty /**< xform type */ 4890318c02bSDeclan Doherty union { 4900318c02bSDeclan Doherty struct rte_crypto_auth_xform auth; 4910318c02bSDeclan Doherty /**< Authentication / hash xform */ 4920318c02bSDeclan Doherty struct rte_crypto_cipher_xform cipher; 4930318c02bSDeclan Doherty /**< Cipher xform */ 49483984b7fSPablo de Lara struct rte_crypto_aead_xform aead; 49583984b7fSPablo de Lara /**< AEAD xform */ 4960318c02bSDeclan Doherty }; 4970318c02bSDeclan Doherty }; 4980318c02bSDeclan Doherty 4990318c02bSDeclan DohertyThe API does not place a limit on the number of transforms that can be chained 5000318c02bSDeclan Dohertytogether but this will be limited by the underlying Crypto device poll mode 5010318c02bSDeclan Dohertydriver which is processing the operation. 5020318c02bSDeclan Doherty 5030318c02bSDeclan Doherty.. figure:: img/crypto_xform_chain.* 5040318c02bSDeclan Doherty 5050318c02bSDeclan Doherty 5060318c02bSDeclan DohertySymmetric Operations 5070318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~ 5080318c02bSDeclan Doherty 5090318c02bSDeclan DohertyThe symmetric Crypto operation structure contains all the mutable data relating 5100318c02bSDeclan Dohertyto performing symmetric cryptographic processing on a referenced mbuf data 5110318c02bSDeclan Dohertybuffer. It is used for either cipher, authentication, AEAD and chained 5120318c02bSDeclan Dohertyoperations. 5130318c02bSDeclan Doherty 5140318c02bSDeclan DohertyAs a minimum the symmetric operation must have a source data buffer (``m_src``), 5155209df0dSPablo de Laraa valid session (or transform chain if in session-less mode) and the minimum 51683984b7fSPablo de Laraauthentication/ cipher/ AEAD parameters required depending on the type of operation 5175209df0dSPablo de Laraspecified in the session or the transform 5180318c02bSDeclan Dohertychain. 5190318c02bSDeclan Doherty 5200318c02bSDeclan Doherty.. code-block:: c 5210318c02bSDeclan Doherty 5220318c02bSDeclan Doherty struct rte_crypto_sym_op { 5230318c02bSDeclan Doherty struct rte_mbuf *m_src; 5240318c02bSDeclan Doherty struct rte_mbuf *m_dst; 5250318c02bSDeclan Doherty 5260318c02bSDeclan Doherty union { 5270318c02bSDeclan Doherty struct rte_cryptodev_sym_session *session; 5280318c02bSDeclan Doherty /**< Handle for the initialised session context */ 5290318c02bSDeclan Doherty struct rte_crypto_sym_xform *xform; 5300318c02bSDeclan Doherty /**< Session-less API Crypto operation parameters */ 5310318c02bSDeclan Doherty }; 5320318c02bSDeclan Doherty 533b59502a5SPablo de Lara union { 534b59502a5SPablo de Lara struct { 535b59502a5SPablo de Lara struct { 536b59502a5SPablo de Lara uint32_t offset; 537b59502a5SPablo de Lara uint32_t length; 538b59502a5SPablo de Lara } data; /**< Data offsets and length for AEAD */ 539b59502a5SPablo de Lara 540b59502a5SPablo de Lara struct { 541b59502a5SPablo de Lara uint8_t *data; 542*c4509373SSantosh Shukla rte_iova_t phys_addr; 543b59502a5SPablo de Lara } digest; /**< Digest parameters */ 544b59502a5SPablo de Lara 545b59502a5SPablo de Lara struct { 546b59502a5SPablo de Lara uint8_t *data; 547*c4509373SSantosh Shukla rte_iova_t phys_addr; 548b59502a5SPablo de Lara } aad; 549b59502a5SPablo de Lara /**< Additional authentication parameters */ 550b59502a5SPablo de Lara } aead; 551b59502a5SPablo de Lara 552b59502a5SPablo de Lara struct { 5530318c02bSDeclan Doherty struct { 5540318c02bSDeclan Doherty struct { 5550318c02bSDeclan Doherty uint32_t offset; 5560318c02bSDeclan Doherty uint32_t length; 5570318c02bSDeclan Doherty } data; /**< Data offsets and length for ciphering */ 5580318c02bSDeclan Doherty } cipher; 5590318c02bSDeclan Doherty 5600318c02bSDeclan Doherty struct { 5610318c02bSDeclan Doherty struct { 5620318c02bSDeclan Doherty uint32_t offset; 5630318c02bSDeclan Doherty uint32_t length; 564b59502a5SPablo de Lara } data; 565b59502a5SPablo de Lara /**< Data offsets and length for authentication */ 5660318c02bSDeclan Doherty 5670318c02bSDeclan Doherty struct { 5680318c02bSDeclan Doherty uint8_t *data; 569*c4509373SSantosh Shukla rte_iova_t phys_addr; 5700318c02bSDeclan Doherty } digest; /**< Digest parameters */ 5710318c02bSDeclan Doherty } auth; 572b59502a5SPablo de Lara }; 573b59502a5SPablo de Lara }; 574b59502a5SPablo de Lara }; 5750318c02bSDeclan Doherty 57631850d26SPablo de LaraSample code 57731850d26SPablo de Lara----------- 57831850d26SPablo de Lara 57931850d26SPablo de LaraThere are various sample applications that show how to use the cryptodev library, 58031850d26SPablo de Larasuch as the L2fwd with Crypto sample application (L2fwd-crypto) and 58131850d26SPablo de Larathe IPSec Security Gateway application (ipsec-secgw). 58231850d26SPablo de Lara 58331850d26SPablo de LaraWhile these applications demonstrate how an application can be created to perform 58431850d26SPablo de Larageneric crypto operation, the required complexity hides the basic steps of 58531850d26SPablo de Larahow to use the cryptodev APIs. 58631850d26SPablo de Lara 58731850d26SPablo de LaraThe following sample code shows the basic steps to encrypt several buffers 58831850d26SPablo de Larawith AES-CBC (although performing other crypto operations is similar), 58931850d26SPablo de Larausing one of the crypto PMDs available in DPDK. 59031850d26SPablo de Lara 59131850d26SPablo de Lara.. code-block:: c 59231850d26SPablo de Lara 59331850d26SPablo de Lara /* 59431850d26SPablo de Lara * Simple example to encrypt several buffers with AES-CBC using 59531850d26SPablo de Lara * the Cryptodev APIs. 59631850d26SPablo de Lara */ 59731850d26SPablo de Lara 59831850d26SPablo de Lara #define MAX_SESSIONS 1024 59931850d26SPablo de Lara #define NUM_MBUFS 1024 60031850d26SPablo de Lara #define POOL_CACHE_SIZE 128 60131850d26SPablo de Lara #define BURST_SIZE 32 60231850d26SPablo de Lara #define BUFFER_SIZE 1024 60331850d26SPablo de Lara #define AES_CBC_IV_LENGTH 16 60431850d26SPablo de Lara #define AES_CBC_KEY_LENGTH 16 60531850d26SPablo de Lara #define IV_OFFSET (sizeof(struct rte_crypto_op) + \ 60631850d26SPablo de Lara sizeof(struct rte_crypto_sym_op)) 60731850d26SPablo de Lara 60831850d26SPablo de Lara struct rte_mempool *mbuf_pool, *crypto_op_pool, *session_pool; 60931850d26SPablo de Lara unsigned int session_size; 61031850d26SPablo de Lara int ret; 61131850d26SPablo de Lara 61231850d26SPablo de Lara /* Initialize EAL. */ 61331850d26SPablo de Lara ret = rte_eal_init(argc, argv); 61431850d26SPablo de Lara if (ret < 0) 61531850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Invalid EAL arguments\n"); 61631850d26SPablo de Lara 61731850d26SPablo de Lara uint8_t socket_id = rte_socket_id(); 61831850d26SPablo de Lara 61931850d26SPablo de Lara /* Create the mbuf pool. */ 62031850d26SPablo de Lara mbuf_pool = rte_pktmbuf_pool_create("mbuf_pool", 62131850d26SPablo de Lara NUM_MBUFS, 62231850d26SPablo de Lara POOL_CACHE_SIZE, 62331850d26SPablo de Lara 0, 62431850d26SPablo de Lara RTE_MBUF_DEFAULT_BUF_SIZE, 62531850d26SPablo de Lara socket_id); 62631850d26SPablo de Lara if (mbuf_pool == NULL) 62731850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Cannot create mbuf pool\n"); 62831850d26SPablo de Lara 62931850d26SPablo de Lara /* 63031850d26SPablo de Lara * The IV is always placed after the crypto operation, 63131850d26SPablo de Lara * so some private data is required to be reserved. 63231850d26SPablo de Lara */ 63331850d26SPablo de Lara unsigned int crypto_op_private_data = AES_CBC_IV_LENGTH; 63431850d26SPablo de Lara 63531850d26SPablo de Lara /* Create crypto operation pool. */ 63631850d26SPablo de Lara crypto_op_pool = rte_crypto_op_pool_create("crypto_op_pool", 63731850d26SPablo de Lara RTE_CRYPTO_OP_TYPE_SYMMETRIC, 63831850d26SPablo de Lara NUM_MBUFS, 63931850d26SPablo de Lara POOL_CACHE_SIZE, 64031850d26SPablo de Lara crypto_op_private_data, 64131850d26SPablo de Lara socket_id); 64231850d26SPablo de Lara if (crypto_op_pool == NULL) 64331850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Cannot create crypto op pool\n"); 64431850d26SPablo de Lara 64531850d26SPablo de Lara /* Create the virtual crypto device. */ 64631850d26SPablo de Lara char args[128]; 64731850d26SPablo de Lara const char *crypto_name = "crypto_aesni_mb0"; 64831850d26SPablo de Lara snprintf(args, sizeof(args), "socket_id=%d", socket_id); 64931850d26SPablo de Lara ret = rte_vdev_init(crypto_name, args); 65031850d26SPablo de Lara if (ret != 0) 65131850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Cannot create virtual device"); 65231850d26SPablo de Lara 65331850d26SPablo de Lara uint8_t cdev_id = rte_cryptodev_get_dev_id(crypto_name); 65431850d26SPablo de Lara 65531850d26SPablo de Lara /* Get private session data size. */ 65631850d26SPablo de Lara session_size = rte_cryptodev_get_private_session_size(cdev_id); 65731850d26SPablo de Lara 65831850d26SPablo de Lara /* 65931850d26SPablo de Lara * Create session mempool, with two objects per session, 66031850d26SPablo de Lara * one for the session header and another one for the 66131850d26SPablo de Lara * private session data for the crypto device. 66231850d26SPablo de Lara */ 66331850d26SPablo de Lara session_pool = rte_mempool_create("session_pool", 66431850d26SPablo de Lara MAX_SESSIONS * 2, 66531850d26SPablo de Lara session_size, 66631850d26SPablo de Lara POOL_CACHE_SIZE, 66731850d26SPablo de Lara 0, NULL, NULL, NULL, 66831850d26SPablo de Lara NULL, socket_id, 66931850d26SPablo de Lara 0); 67031850d26SPablo de Lara 67131850d26SPablo de Lara /* Configure the crypto device. */ 67231850d26SPablo de Lara struct rte_cryptodev_config conf = { 67331850d26SPablo de Lara .nb_queue_pairs = 1, 67431850d26SPablo de Lara .socket_id = socket_id 67531850d26SPablo de Lara }; 67631850d26SPablo de Lara struct rte_cryptodev_qp_conf qp_conf = { 67731850d26SPablo de Lara .nb_descriptors = 2048 67831850d26SPablo de Lara }; 67931850d26SPablo de Lara 68031850d26SPablo de Lara if (rte_cryptodev_configure(cdev_id, &conf) < 0) 68131850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Failed to configure cryptodev %u", cdev_id); 68231850d26SPablo de Lara 68331850d26SPablo de Lara if (rte_cryptodev_queue_pair_setup(cdev_id, 0, &qp_conf, 68431850d26SPablo de Lara socket_id, session_pool) < 0) 68531850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Failed to setup queue pair\n"); 68631850d26SPablo de Lara 68731850d26SPablo de Lara if (rte_cryptodev_start(cdev_id) < 0) 68831850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Failed to start device\n"); 68931850d26SPablo de Lara 69031850d26SPablo de Lara /* Create the crypto transform. */ 69131850d26SPablo de Lara uint8_t cipher_key[16] = {0}; 69231850d26SPablo de Lara struct rte_crypto_sym_xform cipher_xform = { 69331850d26SPablo de Lara .next = NULL, 69431850d26SPablo de Lara .type = RTE_CRYPTO_SYM_XFORM_CIPHER, 69531850d26SPablo de Lara .cipher = { 69631850d26SPablo de Lara .op = RTE_CRYPTO_CIPHER_OP_ENCRYPT, 69731850d26SPablo de Lara .algo = RTE_CRYPTO_CIPHER_AES_CBC, 69831850d26SPablo de Lara .key = { 69931850d26SPablo de Lara .data = cipher_key, 70031850d26SPablo de Lara .length = AES_CBC_KEY_LENGTH 70131850d26SPablo de Lara }, 70231850d26SPablo de Lara .iv = { 70331850d26SPablo de Lara .offset = IV_OFFSET, 70431850d26SPablo de Lara .length = AES_CBC_IV_LENGTH 70531850d26SPablo de Lara } 70631850d26SPablo de Lara } 70731850d26SPablo de Lara }; 70831850d26SPablo de Lara 70931850d26SPablo de Lara /* Create crypto session and initialize it for the crypto device. */ 71031850d26SPablo de Lara struct rte_cryptodev_sym_session *session; 71131850d26SPablo de Lara session = rte_cryptodev_sym_session_create(session_pool); 71231850d26SPablo de Lara if (session == NULL) 71331850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Session could not be created\n"); 71431850d26SPablo de Lara 71531850d26SPablo de Lara if (rte_cryptodev_sym_session_init(cdev_id, session, 71631850d26SPablo de Lara &cipher_xform, session_pool) < 0) 71731850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Session could not be initialized " 71831850d26SPablo de Lara "for the crypto device\n"); 71931850d26SPablo de Lara 72031850d26SPablo de Lara /* Get a burst of crypto operations. */ 72131850d26SPablo de Lara struct rte_crypto_op *crypto_ops[BURST_SIZE]; 72231850d26SPablo de Lara if (rte_crypto_op_bulk_alloc(crypto_op_pool, 72331850d26SPablo de Lara RTE_CRYPTO_OP_TYPE_SYMMETRIC, 72431850d26SPablo de Lara crypto_ops, BURST_SIZE) == 0) 72531850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Not enough crypto operations available\n"); 72631850d26SPablo de Lara 72731850d26SPablo de Lara /* Get a burst of mbufs. */ 72831850d26SPablo de Lara struct rte_mbuf *mbufs[BURST_SIZE]; 72931850d26SPablo de Lara if (rte_pktmbuf_alloc_bulk(mbuf_pool, mbufs, BURST_SIZE) < 0) 73031850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Not enough mbufs available"); 73131850d26SPablo de Lara 73231850d26SPablo de Lara /* Initialize the mbufs and append them to the crypto operations. */ 73331850d26SPablo de Lara unsigned int i; 73431850d26SPablo de Lara for (i = 0; i < BURST_SIZE; i++) { 73531850d26SPablo de Lara if (rte_pktmbuf_append(mbufs[i], BUFFER_SIZE) == NULL) 73631850d26SPablo de Lara rte_exit(EXIT_FAILURE, "Not enough room in the mbuf\n"); 73731850d26SPablo de Lara crypto_ops[i]->sym->m_src = mbufs[i]; 73831850d26SPablo de Lara } 73931850d26SPablo de Lara 74031850d26SPablo de Lara /* Set up the crypto operations. */ 74131850d26SPablo de Lara for (i = 0; i < BURST_SIZE; i++) { 74231850d26SPablo de Lara struct rte_crypto_op *op = crypto_ops[i]; 74331850d26SPablo de Lara /* Modify bytes of the IV at the end of the crypto operation */ 74431850d26SPablo de Lara uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *, 74531850d26SPablo de Lara IV_OFFSET); 74631850d26SPablo de Lara 74731850d26SPablo de Lara generate_random_bytes(iv_ptr, AES_CBC_IV_LENGTH); 74831850d26SPablo de Lara 74931850d26SPablo de Lara op->sym->cipher.data.offset = 0; 75031850d26SPablo de Lara op->sym->cipher.data.length = BUFFER_SIZE; 75131850d26SPablo de Lara 75231850d26SPablo de Lara /* Attach the crypto session to the operation */ 75331850d26SPablo de Lara rte_crypto_op_attach_sym_session(op, session); 75431850d26SPablo de Lara } 75531850d26SPablo de Lara 75631850d26SPablo de Lara /* Enqueue the crypto operations in the crypto device. */ 75731850d26SPablo de Lara uint16_t num_enqueued_ops = rte_cryptodev_enqueue_burst(cdev_id, 0, 75831850d26SPablo de Lara crypto_ops, BURST_SIZE); 75931850d26SPablo de Lara 76031850d26SPablo de Lara /* 76131850d26SPablo de Lara * Dequeue the crypto operations until all the operations 76231850d26SPablo de Lara * are proccessed in the crypto device. 76331850d26SPablo de Lara */ 76431850d26SPablo de Lara uint16_t num_dequeued_ops, total_num_dequeued_ops = 0; 76531850d26SPablo de Lara do { 76631850d26SPablo de Lara struct rte_crypto_op *dequeued_ops[BURST_SIZE]; 76731850d26SPablo de Lara num_dequeued_ops = rte_cryptodev_dequeue_burst(cdev_id, 0, 76831850d26SPablo de Lara dequeued_ops, BURST_SIZE); 76931850d26SPablo de Lara total_num_dequeued_ops += num_dequeued_ops; 77031850d26SPablo de Lara 77131850d26SPablo de Lara /* Check if operation was processed successfully */ 77231850d26SPablo de Lara for (i = 0; i < num_dequeued_ops; i++) { 77331850d26SPablo de Lara if (dequeued_ops[i]->status != RTE_CRYPTO_OP_STATUS_SUCCESS) 77431850d26SPablo de Lara rte_exit(EXIT_FAILURE, 77531850d26SPablo de Lara "Some operations were not processed correctly"); 77631850d26SPablo de Lara } 77731850d26SPablo de Lara 77831850d26SPablo de Lara rte_mempool_put_bulk(crypto_op_pool, (void **)dequeued_ops, 77931850d26SPablo de Lara num_dequeued_ops); 78031850d26SPablo de Lara } while (total_num_dequeued_ops < num_enqueued_ops); 78131850d26SPablo de Lara 7820318c02bSDeclan Doherty 7830318c02bSDeclan DohertyAsymmetric Cryptography 7840318c02bSDeclan Doherty----------------------- 7850318c02bSDeclan Doherty 7860318c02bSDeclan DohertyAsymmetric functionality is currently not supported by the cryptodev API. 7870318c02bSDeclan Doherty 7880318c02bSDeclan Doherty 7890318c02bSDeclan DohertyCrypto Device API 7900318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~ 7910318c02bSDeclan Doherty 7920318c02bSDeclan DohertyThe cryptodev Library API is described in the *DPDK API Reference* document. 793