1*0318c02bSDeclan Doherty.. BSD LICENSE 2*0318c02bSDeclan Doherty Copyright(c) 2016 Intel Corporation. All rights reserved. 3*0318c02bSDeclan Doherty 4*0318c02bSDeclan Doherty Redistribution and use in source and binary forms, with or without 5*0318c02bSDeclan Doherty modification, are permitted provided that the following conditions 6*0318c02bSDeclan Doherty are met: 7*0318c02bSDeclan Doherty 8*0318c02bSDeclan Doherty * Redistributions of source code must retain the above copyright 9*0318c02bSDeclan Doherty notice, this list of conditions and the following disclaimer. 10*0318c02bSDeclan Doherty * Redistributions in binary form must reproduce the above copyright 11*0318c02bSDeclan Doherty notice, this list of conditions and the following disclaimer in 12*0318c02bSDeclan Doherty the documentation and/or other materials provided with the 13*0318c02bSDeclan Doherty distribution. 14*0318c02bSDeclan Doherty * Neither the name of Intel Corporation nor the names of its 15*0318c02bSDeclan Doherty contributors may be used to endorse or promote products derived 16*0318c02bSDeclan Doherty from this software without specific prior written permission. 17*0318c02bSDeclan Doherty 18*0318c02bSDeclan Doherty THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19*0318c02bSDeclan Doherty "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20*0318c02bSDeclan Doherty LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21*0318c02bSDeclan Doherty A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22*0318c02bSDeclan Doherty OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23*0318c02bSDeclan Doherty SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24*0318c02bSDeclan Doherty LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25*0318c02bSDeclan Doherty DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26*0318c02bSDeclan Doherty THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27*0318c02bSDeclan Doherty (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28*0318c02bSDeclan Doherty OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29*0318c02bSDeclan Doherty 30*0318c02bSDeclan Doherty 31*0318c02bSDeclan DohertyCryptography Device Library 32*0318c02bSDeclan Doherty=========================== 33*0318c02bSDeclan Doherty 34*0318c02bSDeclan DohertyThe cryptodev library provides a Crypto device framework for management and 35*0318c02bSDeclan Dohertyprovisioning of hardware and software Crypto poll mode drivers, defining generic 36*0318c02bSDeclan DohertyAPIs which support a number of different Crypto operations. The framework 37*0318c02bSDeclan Dohertycurrently only supports cipher, authentication, chained cipher/authentication 38*0318c02bSDeclan Dohertyand AEAD symmetric Crypto operations. 39*0318c02bSDeclan Doherty 40*0318c02bSDeclan Doherty 41*0318c02bSDeclan DohertyDesign Principles 42*0318c02bSDeclan Doherty----------------- 43*0318c02bSDeclan Doherty 44*0318c02bSDeclan DohertyThe cryptodev library follows the same basic principles as those used in DPDKs 45*0318c02bSDeclan DohertyEthernet Device framework. The Crypto framework provides a generic Crypto device 46*0318c02bSDeclan Dohertyframework which supports both physical (hardware) and virtual (software) Crypto 47*0318c02bSDeclan Dohertydevices as well as a generic Crypto API which allows Crypto devices to be 48*0318c02bSDeclan Dohertymanaged and configured and supports Crypto operations to be provisioned on 49*0318c02bSDeclan DohertyCrypto poll mode driver. 50*0318c02bSDeclan Doherty 51*0318c02bSDeclan Doherty 52*0318c02bSDeclan DohertyDevice Management 53*0318c02bSDeclan Doherty----------------- 54*0318c02bSDeclan Doherty 55*0318c02bSDeclan DohertyDevice Creation 56*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~ 57*0318c02bSDeclan Doherty 58*0318c02bSDeclan DohertyPhysical Crypto devices are discovered during the PCI probe/enumeration of the 59*0318c02bSDeclan DohertyEAL function which is executed at DPDK initialization, based on 60*0318c02bSDeclan Dohertytheir PCI device identifier, each unique PCI BDF (bus/bridge, device, 61*0318c02bSDeclan Dohertyfunction). Specific physical Crypto devices, like other physical devices in DPDK 62*0318c02bSDeclan Dohertycan be white-listed or black-listed using the EAL command line options. 63*0318c02bSDeclan Doherty 64*0318c02bSDeclan DohertyVirtual devices can be created by two mechanisms, either using the EAL command 65*0318c02bSDeclan Dohertyline options or from within the application using an EAL API directly. 66*0318c02bSDeclan Doherty 67*0318c02bSDeclan DohertyFrom the command line using the --vdev EAL option 68*0318c02bSDeclan Doherty 69*0318c02bSDeclan Doherty.. code-block:: console 70*0318c02bSDeclan Doherty 71*0318c02bSDeclan Doherty --vdev 'cryptodev_aesni_mb_pmd0,max_nb_queue_pairs=2,max_nb_sessions=1024,socket_id=0' 72*0318c02bSDeclan Doherty 73*0318c02bSDeclan DohertyOur using the rte_eal_vdev_init API within the application code. 74*0318c02bSDeclan Doherty 75*0318c02bSDeclan Doherty.. code-block:: c 76*0318c02bSDeclan Doherty 77*0318c02bSDeclan Doherty rte_eal_vdev_init("cryptodev_aesni_mb_pmd", 78*0318c02bSDeclan Doherty "max_nb_queue_pairs=2,max_nb_sessions=1024,socket_id=0") 79*0318c02bSDeclan Doherty 80*0318c02bSDeclan DohertyAll virtual Crypto devices support the following initialization parameters: 81*0318c02bSDeclan Doherty 82*0318c02bSDeclan Doherty* ``max_nb_queue_pairs`` - maximum number of queue pairs supported by the device. 83*0318c02bSDeclan Doherty* ``max_nb_sessions`` - maximum number of sessions supported by the device 84*0318c02bSDeclan Doherty* ``socket_id`` - socket on which to allocate the device resources on. 85*0318c02bSDeclan Doherty 86*0318c02bSDeclan Doherty 87*0318c02bSDeclan DohertyDevice Identification 88*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~ 89*0318c02bSDeclan Doherty 90*0318c02bSDeclan DohertyEach device, whether virtual or physical is uniquely designated by two 91*0318c02bSDeclan Dohertyidentifiers: 92*0318c02bSDeclan Doherty 93*0318c02bSDeclan Doherty- A unique device index used to designate the Crypto device in all functions 94*0318c02bSDeclan Doherty exported by the cryptodev API. 95*0318c02bSDeclan Doherty 96*0318c02bSDeclan Doherty- A device name used to designate the Crypto device in console messages, for 97*0318c02bSDeclan Doherty administration or debugging purposes. For ease of use, the port name includes 98*0318c02bSDeclan Doherty the port index. 99*0318c02bSDeclan Doherty 100*0318c02bSDeclan Doherty 101*0318c02bSDeclan DohertyDevice Configuration 102*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~ 103*0318c02bSDeclan Doherty 104*0318c02bSDeclan DohertyThe configuration of each Crypto device includes the following operations: 105*0318c02bSDeclan Doherty 106*0318c02bSDeclan Doherty- Allocation of resources, including hardware resources if a physical device. 107*0318c02bSDeclan Doherty- Resetting the device into a well-known default state. 108*0318c02bSDeclan Doherty- Initialization of statistics counters. 109*0318c02bSDeclan Doherty 110*0318c02bSDeclan DohertyThe rte_cryptodev_configure API is used to configure a Crypto device. 111*0318c02bSDeclan Doherty 112*0318c02bSDeclan Doherty.. code-block:: c 113*0318c02bSDeclan Doherty 114*0318c02bSDeclan Doherty int rte_cryptodev_configure(uint8_t dev_id, 115*0318c02bSDeclan Doherty struct rte_cryptodev_config *config) 116*0318c02bSDeclan Doherty 117*0318c02bSDeclan DohertyThe ``rte_cryptodev_config`` structure is used to pass the configuration parameters. 118*0318c02bSDeclan DohertyIn contains parameter for socket selection, number of queue pairs and the 119*0318c02bSDeclan Dohertysession mempool configuration. 120*0318c02bSDeclan Doherty 121*0318c02bSDeclan Doherty.. code-block:: c 122*0318c02bSDeclan Doherty 123*0318c02bSDeclan Doherty struct rte_cryptodev_config { 124*0318c02bSDeclan Doherty int socket_id; 125*0318c02bSDeclan Doherty /**< Socket to allocate resources on */ 126*0318c02bSDeclan Doherty uint16_t nb_queue_pairs; 127*0318c02bSDeclan Doherty /**< Number of queue pairs to configure on device */ 128*0318c02bSDeclan Doherty 129*0318c02bSDeclan Doherty struct { 130*0318c02bSDeclan Doherty uint32_t nb_objs; 131*0318c02bSDeclan Doherty uint32_t cache_size; 132*0318c02bSDeclan Doherty } session_mp; 133*0318c02bSDeclan Doherty /**< Session mempool configuration */ 134*0318c02bSDeclan Doherty }; 135*0318c02bSDeclan Doherty 136*0318c02bSDeclan Doherty 137*0318c02bSDeclan DohertyConfiguration of Queue Pairs 138*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 139*0318c02bSDeclan Doherty 140*0318c02bSDeclan DohertyEach Crypto devices queue pair is individually configured through the 141*0318c02bSDeclan Doherty``rte_cryptodev_queue_pair_setup`` API. 142*0318c02bSDeclan DohertyEach queue pairs resources may be allocated on a specified socket. 143*0318c02bSDeclan Doherty 144*0318c02bSDeclan Doherty.. code-block:: c 145*0318c02bSDeclan Doherty 146*0318c02bSDeclan Doherty int rte_cryptodev_queue_pair_setup(uint8_t dev_id, uint16_t queue_pair_id, 147*0318c02bSDeclan Doherty const struct rte_cryptodev_qp_conf *qp_conf, 148*0318c02bSDeclan Doherty int socket_id) 149*0318c02bSDeclan Doherty 150*0318c02bSDeclan Doherty struct rte_cryptodev_qp_conf { 151*0318c02bSDeclan Doherty uint32_t nb_descriptors; /**< Number of descriptors per queue pair */ 152*0318c02bSDeclan Doherty }; 153*0318c02bSDeclan Doherty 154*0318c02bSDeclan Doherty 155*0318c02bSDeclan DohertyLogical Cores, Memory and Queues Pair Relationships 156*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 157*0318c02bSDeclan Doherty 158*0318c02bSDeclan DohertyThe Crypto device Library as the Poll Mode Driver library support NUMA for when 159*0318c02bSDeclan Dohertya processor’s logical cores and interfaces utilize its local memory. Therefore 160*0318c02bSDeclan DohertyCrypto operations, and in the case of symmetric Crypto operations, the session 161*0318c02bSDeclan Dohertyand the mbuf being operated on, should be allocated from memory pools created 162*0318c02bSDeclan Dohertyin the local memory. The buffers should, if possible, remain on the local 163*0318c02bSDeclan Dohertyprocessor to obtain the best performance results and buffer descriptors should 164*0318c02bSDeclan Dohertybe populated with mbufs allocated from a mempool allocated from local memory. 165*0318c02bSDeclan Doherty 166*0318c02bSDeclan DohertyThe run-to-completion model also performs better, especially in the case of 167*0318c02bSDeclan Dohertyvirtual Crypto devices, if the Crypto operation and session and data buffer is 168*0318c02bSDeclan Dohertyin local memory instead of a remote processor's memory. This is also true for 169*0318c02bSDeclan Dohertythe pipe-line model provided all logical cores used are located on the same 170*0318c02bSDeclan Dohertyprocessor. 171*0318c02bSDeclan Doherty 172*0318c02bSDeclan DohertyMultiple logical cores should never share the same queue pair for enqueuing 173*0318c02bSDeclan Dohertyoperations or dequeuing operations on the same Crypto device since this would 174*0318c02bSDeclan Dohertyrequire global locks and hinder performance. It is however possible to use a 175*0318c02bSDeclan Dohertydifferent logical core to dequeue an operation on a queue pair from the logical 176*0318c02bSDeclan Dohertycore which it was enqueued on. This means that a crypto burst enqueue/dequeue 177*0318c02bSDeclan DohertyAPIs are a logical place to transition from one logical core to another in a 178*0318c02bSDeclan Dohertypacket processing pipeline. 179*0318c02bSDeclan Doherty 180*0318c02bSDeclan Doherty 181*0318c02bSDeclan DohertyDevice Features and Capabilities 182*0318c02bSDeclan Doherty--------------------------------- 183*0318c02bSDeclan Doherty 184*0318c02bSDeclan DohertyCrypto devices define their functionality through two mechanisms, global device 185*0318c02bSDeclan Dohertyfeatures and algorithm capabilities. Global devices features identify device 186*0318c02bSDeclan Dohertywide level features which are applicable to the whole device such as 187*0318c02bSDeclan Dohertythe device having hardware acceleration or supporting symmetric Crypto 188*0318c02bSDeclan Dohertyoperations, 189*0318c02bSDeclan Doherty 190*0318c02bSDeclan DohertyThe capabilities mechanism defines the individual algorithms/functions which 191*0318c02bSDeclan Dohertythe device supports, such as a specific symmetric Crypto cipher or 192*0318c02bSDeclan Dohertyauthentication operation. 193*0318c02bSDeclan Doherty 194*0318c02bSDeclan Doherty 195*0318c02bSDeclan DohertyDevice Features 196*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~ 197*0318c02bSDeclan Doherty 198*0318c02bSDeclan DohertyCurrently the following Crypto device features are defined: 199*0318c02bSDeclan Doherty 200*0318c02bSDeclan Doherty* Symmetric Crypto operations 201*0318c02bSDeclan Doherty* Asymmetric Crypto operations 202*0318c02bSDeclan Doherty* Chaining of symmetric Crypto operations 203*0318c02bSDeclan Doherty* SSE accelerated SIMD vector operations 204*0318c02bSDeclan Doherty* AVX accelerated SIMD vector operations 205*0318c02bSDeclan Doherty* AVX2 accelerated SIMD vector operations 206*0318c02bSDeclan Doherty* AESNI accelerated instructions 207*0318c02bSDeclan Doherty* Hardware off-load processing 208*0318c02bSDeclan Doherty 209*0318c02bSDeclan Doherty 210*0318c02bSDeclan DohertyDevice Operation Capabilities 211*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 212*0318c02bSDeclan Doherty 213*0318c02bSDeclan DohertyCrypto capabilities which identify particular algorithm which the Crypto PMD 214*0318c02bSDeclan Dohertysupports are defined by the operation type, the operation transform, the 215*0318c02bSDeclan Dohertytransform identifier and then the particulars of the transform. For the full 216*0318c02bSDeclan Dohertyscope of the Crypto capability see the definition of the structure in the 217*0318c02bSDeclan Doherty*DPDK API Reference*. 218*0318c02bSDeclan Doherty 219*0318c02bSDeclan Doherty.. code-block:: c 220*0318c02bSDeclan Doherty 221*0318c02bSDeclan Doherty struct rte_cryptodev_capabilities; 222*0318c02bSDeclan Doherty 223*0318c02bSDeclan DohertyEach Crypto poll mode driver defines its own private array of capabilities 224*0318c02bSDeclan Dohertyfor the operations it supports. Below is an example of the capabilities for a 225*0318c02bSDeclan DohertyPMD which supports the authentication algorithm SHA1_HMAC and the cipher 226*0318c02bSDeclan Dohertyalgorithm AES_CBC. 227*0318c02bSDeclan Doherty 228*0318c02bSDeclan Doherty.. code-block:: c 229*0318c02bSDeclan Doherty 230*0318c02bSDeclan Doherty static const struct rte_cryptodev_capabilities pmd_capabilities[] = { 231*0318c02bSDeclan Doherty { /* SHA1 HMAC */ 232*0318c02bSDeclan Doherty .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 233*0318c02bSDeclan Doherty .sym = { 234*0318c02bSDeclan Doherty .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH, 235*0318c02bSDeclan Doherty .auth = { 236*0318c02bSDeclan Doherty .algo = RTE_CRYPTO_AUTH_SHA1_HMAC, 237*0318c02bSDeclan Doherty .block_size = 64, 238*0318c02bSDeclan Doherty .key_size = { 239*0318c02bSDeclan Doherty .min = 64, 240*0318c02bSDeclan Doherty .max = 64, 241*0318c02bSDeclan Doherty .increment = 0 242*0318c02bSDeclan Doherty }, 243*0318c02bSDeclan Doherty .digest_size = { 244*0318c02bSDeclan Doherty .min = 12, 245*0318c02bSDeclan Doherty .max = 12, 246*0318c02bSDeclan Doherty .increment = 0 247*0318c02bSDeclan Doherty }, 248*0318c02bSDeclan Doherty .aad_size = { 0 } 249*0318c02bSDeclan Doherty } 250*0318c02bSDeclan Doherty } 251*0318c02bSDeclan Doherty }, 252*0318c02bSDeclan Doherty { /* AES CBC */ 253*0318c02bSDeclan Doherty .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC, 254*0318c02bSDeclan Doherty .sym = { 255*0318c02bSDeclan Doherty .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER, 256*0318c02bSDeclan Doherty .cipher = { 257*0318c02bSDeclan Doherty .algo = RTE_CRYPTO_CIPHER_AES_CBC, 258*0318c02bSDeclan Doherty .block_size = 16, 259*0318c02bSDeclan Doherty .key_size = { 260*0318c02bSDeclan Doherty .min = 16, 261*0318c02bSDeclan Doherty .max = 32, 262*0318c02bSDeclan Doherty .increment = 8 263*0318c02bSDeclan Doherty }, 264*0318c02bSDeclan Doherty .iv_size = { 265*0318c02bSDeclan Doherty .min = 16, 266*0318c02bSDeclan Doherty .max = 16, 267*0318c02bSDeclan Doherty .increment = 0 268*0318c02bSDeclan Doherty } 269*0318c02bSDeclan Doherty } 270*0318c02bSDeclan Doherty } 271*0318c02bSDeclan Doherty } 272*0318c02bSDeclan Doherty } 273*0318c02bSDeclan Doherty 274*0318c02bSDeclan Doherty 275*0318c02bSDeclan DohertyCapabilities Discovery 276*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~ 277*0318c02bSDeclan Doherty 278*0318c02bSDeclan DohertyDiscovering the features and capabilities of a Crypto device poll mode driver 279*0318c02bSDeclan Dohertyis achieved through the ``rte_cryptodev_info_get`` function. 280*0318c02bSDeclan Doherty 281*0318c02bSDeclan Doherty.. code-block:: c 282*0318c02bSDeclan Doherty 283*0318c02bSDeclan Doherty void rte_cryptodev_info_get(uint8_t dev_id, 284*0318c02bSDeclan Doherty struct rte_cryptodev_info *dev_info); 285*0318c02bSDeclan Doherty 286*0318c02bSDeclan DohertyThis allows the user to query a specific Crypto PMD and get all the device 287*0318c02bSDeclan Dohertyfeatures and capabilities. The ``rte_cryptodev_info`` structure contains all the 288*0318c02bSDeclan Dohertyrelevant information for the device. 289*0318c02bSDeclan Doherty 290*0318c02bSDeclan Doherty.. code-block:: c 291*0318c02bSDeclan Doherty 292*0318c02bSDeclan Doherty struct rte_cryptodev_info { 293*0318c02bSDeclan Doherty const char *driver_name; 294*0318c02bSDeclan Doherty enum rte_cryptodev_type dev_type; 295*0318c02bSDeclan Doherty struct rte_pci_device *pci_dev; 296*0318c02bSDeclan Doherty 297*0318c02bSDeclan Doherty uint64_t feature_flags; 298*0318c02bSDeclan Doherty 299*0318c02bSDeclan Doherty const struct rte_cryptodev_capabilities *capabilities; 300*0318c02bSDeclan Doherty 301*0318c02bSDeclan Doherty unsigned max_nb_queue_pairs; 302*0318c02bSDeclan Doherty 303*0318c02bSDeclan Doherty struct { 304*0318c02bSDeclan Doherty unsigned max_nb_sessions; 305*0318c02bSDeclan Doherty } sym; 306*0318c02bSDeclan Doherty }; 307*0318c02bSDeclan Doherty 308*0318c02bSDeclan Doherty 309*0318c02bSDeclan DohertyOperation Processing 310*0318c02bSDeclan Doherty-------------------- 311*0318c02bSDeclan Doherty 312*0318c02bSDeclan DohertyScheduling of Crypto operations on DPDK's application data path is 313*0318c02bSDeclan Dohertyperformed using a burst oriented asynchronous API set. A queue pair on a Crypto 314*0318c02bSDeclan Dohertydevice accepts a burst of Crypto operations using enqueue burst API. On physical 315*0318c02bSDeclan DohertyCrypto devices the enqueue burst API will place the operations to be processed 316*0318c02bSDeclan Dohertyon the devices hardware input queue, for virtual devices the processing of the 317*0318c02bSDeclan DohertyCrypto operations is usually completed during the enqueue call to the Crypto 318*0318c02bSDeclan Dohertydevice. The dequeue burst API will retrieve any processed operations available 319*0318c02bSDeclan Dohertyfrom the queue pair on the Crypto device, from physical devices this is usually 320*0318c02bSDeclan Dohertydirectly from the devices processed queue, and for virtual device's from a 321*0318c02bSDeclan Doherty``rte_ring`` where processed operations are place after being processed on the 322*0318c02bSDeclan Dohertyenqueue call. 323*0318c02bSDeclan Doherty 324*0318c02bSDeclan Doherty 325*0318c02bSDeclan DohertyEnqueue / Dequeue Burst APIs 326*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 327*0318c02bSDeclan Doherty 328*0318c02bSDeclan DohertyThe burst enqueue API uses a Crypto device identifier and a queue pair 329*0318c02bSDeclan Dohertyidentifier to specify the Crypto device queue pair to schedule the processing on. 330*0318c02bSDeclan DohertyThe ``nb_ops`` parameter is the number of operations to process which are 331*0318c02bSDeclan Dohertysupplied in the ``ops`` array of ``rte_crypto_op`` structures. 332*0318c02bSDeclan DohertyThe enqueue function returns the number of operations it actually enqueued for 333*0318c02bSDeclan Dohertyprocessing, a return value equal to ``nb_ops`` means that all packets have been 334*0318c02bSDeclan Dohertyenqueued. 335*0318c02bSDeclan Doherty 336*0318c02bSDeclan Doherty.. code-block:: c 337*0318c02bSDeclan Doherty 338*0318c02bSDeclan Doherty uint16_t rte_cryptodev_enqueue_burst(uint8_t dev_id, uint16_t qp_id, 339*0318c02bSDeclan Doherty struct rte_crypto_op **ops, uint16_t nb_ops) 340*0318c02bSDeclan Doherty 341*0318c02bSDeclan DohertyThe dequeue API uses the same format as the enqueue API of processed but 342*0318c02bSDeclan Dohertythe ``nb_ops`` and ``ops`` parameters are now used to specify the max processed 343*0318c02bSDeclan Dohertyoperations the user wishes to retrieve and the location in which to store them. 344*0318c02bSDeclan DohertyThe API call returns the actual number of processed operations returned, this 345*0318c02bSDeclan Dohertycan never be larger than ``nb_ops``. 346*0318c02bSDeclan Doherty 347*0318c02bSDeclan Doherty.. code-block:: c 348*0318c02bSDeclan Doherty 349*0318c02bSDeclan Doherty uint16_t rte_cryptodev_dequeue_burst(uint8_t dev_id, uint16_t qp_id, 350*0318c02bSDeclan Doherty struct rte_crypto_op **ops, uint16_t nb_ops) 351*0318c02bSDeclan Doherty 352*0318c02bSDeclan Doherty 353*0318c02bSDeclan DohertyOperation Representation 354*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~ 355*0318c02bSDeclan Doherty 356*0318c02bSDeclan DohertyAn Crypto operation is represented by an rte_crypto_op structure, which is a 357*0318c02bSDeclan Dohertygeneric metadata container for all necessary information required for the 358*0318c02bSDeclan DohertyCrypto operation to be processed on a particular Crypto device poll mode driver. 359*0318c02bSDeclan Doherty 360*0318c02bSDeclan Doherty.. figure:: img/crypto_op.* 361*0318c02bSDeclan Doherty 362*0318c02bSDeclan DohertyThe operation structure includes the operation type and the operation status, 363*0318c02bSDeclan Dohertya reference to the operation specific data, which can vary in size and content 364*0318c02bSDeclan Dohertydepending on the operation being provisioned. It also contains the source 365*0318c02bSDeclan Dohertymempool for the operation, if it allocate from a mempool. Finally an 366*0318c02bSDeclan Dohertyopaque pointer for user specific data is provided. 367*0318c02bSDeclan Doherty 368*0318c02bSDeclan DohertyIf Crypto operations are allocated from a Crypto operation mempool, see next 369*0318c02bSDeclan Dohertysection, there is also the ability to allocate private memory with the 370*0318c02bSDeclan Dohertyoperation for applications purposes. 371*0318c02bSDeclan Doherty 372*0318c02bSDeclan DohertyApplication software is responsible for specifying all the operation specific 373*0318c02bSDeclan Dohertyfields in the ``rte_crypto_op`` structure which are then used by the Crypto PMD 374*0318c02bSDeclan Dohertyto process the requested operation. 375*0318c02bSDeclan Doherty 376*0318c02bSDeclan Doherty 377*0318c02bSDeclan DohertyOperation Management and Allocation 378*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 379*0318c02bSDeclan Doherty 380*0318c02bSDeclan DohertyThe cryptodev library provides an API set for managing Crypto operations which 381*0318c02bSDeclan Dohertyutilize the Mempool Library to allocate operation buffers. Therefore, it ensures 382*0318c02bSDeclan Dohertythat the crytpo operation is interleaved optimally across the channels and 383*0318c02bSDeclan Dohertyranks for optimal processing. 384*0318c02bSDeclan DohertyA ``rte_crypto_op`` contains a field indicating the pool that it originated from. 385*0318c02bSDeclan DohertyWhen calling ``rte_crypto_op_free(op)``, the operation returns to its original pool. 386*0318c02bSDeclan Doherty 387*0318c02bSDeclan Doherty.. code-block:: c 388*0318c02bSDeclan Doherty 389*0318c02bSDeclan Doherty extern struct rte_mempool * 390*0318c02bSDeclan Doherty rte_crypto_op_pool_create(const char *name, enum rte_crypto_op_type type, 391*0318c02bSDeclan Doherty unsigned nb_elts, unsigned cache_size, uint16_t priv_size, 392*0318c02bSDeclan Doherty int socket_id); 393*0318c02bSDeclan Doherty 394*0318c02bSDeclan DohertyDuring pool creation ``rte_crypto_op_init()`` is called as a constructor to 395*0318c02bSDeclan Dohertyinitialize each Crypto operation which subsequently calls 396*0318c02bSDeclan Doherty``__rte_crypto_op_reset()`` to configure any operation type specific fields based 397*0318c02bSDeclan Dohertyon the type parameter. 398*0318c02bSDeclan Doherty 399*0318c02bSDeclan Doherty 400*0318c02bSDeclan Doherty``rte_crypto_op_alloc()`` and ``rte_crypto_op_bulk_alloc()`` are used to allocate 401*0318c02bSDeclan DohertyCrypto operations of a specific type from a given Crypto operation mempool. 402*0318c02bSDeclan Doherty``__rte_crypto_op_reset()`` is called on each operation before being returned to 403*0318c02bSDeclan Dohertyallocate to a user so the operation is always in a good known state before use 404*0318c02bSDeclan Dohertyby the application. 405*0318c02bSDeclan Doherty 406*0318c02bSDeclan Doherty.. code-block:: c 407*0318c02bSDeclan Doherty 408*0318c02bSDeclan Doherty struct rte_crypto_op *rte_crypto_op_alloc(struct rte_mempool *mempool, 409*0318c02bSDeclan Doherty enum rte_crypto_op_type type) 410*0318c02bSDeclan Doherty 411*0318c02bSDeclan Doherty unsigned rte_crypto_op_bulk_alloc(struct rte_mempool *mempool, 412*0318c02bSDeclan Doherty enum rte_crypto_op_type type, 413*0318c02bSDeclan Doherty struct rte_crypto_op **ops, uint16_t nb_ops) 414*0318c02bSDeclan Doherty 415*0318c02bSDeclan Doherty``rte_crypto_op_free()`` is called by the application to return an operation to 416*0318c02bSDeclan Dohertyits allocating pool. 417*0318c02bSDeclan Doherty 418*0318c02bSDeclan Doherty.. code-block:: c 419*0318c02bSDeclan Doherty 420*0318c02bSDeclan Doherty void rte_crypto_op_free(struct rte_crypto_op *op) 421*0318c02bSDeclan Doherty 422*0318c02bSDeclan Doherty 423*0318c02bSDeclan DohertySymmetric Cryptography Support 424*0318c02bSDeclan Doherty------------------------------ 425*0318c02bSDeclan Doherty 426*0318c02bSDeclan DohertyThe cryptodev library currently provides support for the following symmetric 427*0318c02bSDeclan DohertyCrypto operations; cipher, authentication, including chaining of these 428*0318c02bSDeclan Dohertyoperations, as well as also supporting AEAD operations. 429*0318c02bSDeclan Doherty 430*0318c02bSDeclan Doherty 431*0318c02bSDeclan DohertySession and Session Management 432*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 433*0318c02bSDeclan Doherty 434*0318c02bSDeclan DohertySession are used in symmetric cryptographic processing to store the immutable 435*0318c02bSDeclan Dohertydata defined in a cryptographic transform which is used in the operation 436*0318c02bSDeclan Dohertyprocessing of a packet flow. Sessions are used to manage information such as 437*0318c02bSDeclan Dohertyexpand cipher keys and HMAC IPADs and OPADs, which need to be calculated for a 438*0318c02bSDeclan Dohertyparticular Crypto operation, but are immutable on a packet to packet basis for 439*0318c02bSDeclan Dohertya flow. Crypto sessions cache this immutable data in a optimal way for the 440*0318c02bSDeclan Dohertyunderlying PMD and this allows further acceleration of the offload of 441*0318c02bSDeclan DohertyCrypto workloads. 442*0318c02bSDeclan Doherty 443*0318c02bSDeclan Doherty.. figure:: img/cryptodev_sym_sess.* 444*0318c02bSDeclan Doherty 445*0318c02bSDeclan DohertyThe Crypto device framework provides a set of session pool management APIs for 446*0318c02bSDeclan Dohertythe creation and freeing of the sessions, utilizing the Mempool Library. 447*0318c02bSDeclan Doherty 448*0318c02bSDeclan DohertyThe framework also provides hooks so the PMDs can pass the amount of memory 449*0318c02bSDeclan Dohertyrequired for that PMDs private session parameters, as well as initialization 450*0318c02bSDeclan Dohertyfunctions for the configuration of the session parameters and freeing function 451*0318c02bSDeclan Dohertyso the PMD can managed the memory on destruction of a session. 452*0318c02bSDeclan Doherty 453*0318c02bSDeclan Doherty**Note**: Sessions created on a particular device can only be used on Crypto 454*0318c02bSDeclan Dohertydevices of the same type, and if you try to use a session on a device different 455*0318c02bSDeclan Dohertyto that on which it was created then the Crypto operation will fail. 456*0318c02bSDeclan Doherty 457*0318c02bSDeclan Doherty``rte_cryptodev_sym_session_create()`` is used to create a symmetric session on 458*0318c02bSDeclan DohertyCrypto device. A symmetric transform chain is used to specify the particular 459*0318c02bSDeclan Dohertyoperation and its parameters. See the section below for details on transforms. 460*0318c02bSDeclan Doherty 461*0318c02bSDeclan Doherty.. code-block:: c 462*0318c02bSDeclan Doherty 463*0318c02bSDeclan Doherty struct rte_cryptodev_sym_session * rte_cryptodev_sym_session_create( 464*0318c02bSDeclan Doherty uint8_t dev_id, struct rte_crypto_sym_xform *xform); 465*0318c02bSDeclan Doherty 466*0318c02bSDeclan Doherty**Note**: For AEAD operations the algorithm selected for authentication and 467*0318c02bSDeclan Dohertyciphering must aligned, eg AES_GCM. 468*0318c02bSDeclan Doherty 469*0318c02bSDeclan Doherty 470*0318c02bSDeclan DohertyTransforms and Transform Chaining 471*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 472*0318c02bSDeclan Doherty 473*0318c02bSDeclan DohertySymmetric Crypto transforms (``rte_crypto_sym_xform``) are the mechanism used 474*0318c02bSDeclan Dohertyto specify the details of the Crypto operation. For chaining of symmetric 475*0318c02bSDeclan Dohertyoperations such as cipher encrypt and authentication generate, the next pointer 476*0318c02bSDeclan Dohertyallows transform to be chained together. Crypto devices which support chaining 477*0318c02bSDeclan Dohertymust publish the chaining of symmetric Crypto operations feature flag. 478*0318c02bSDeclan Doherty 479*0318c02bSDeclan DohertyCurrently there are two transforms types cipher and authentication, to specify 480*0318c02bSDeclan Dohertyan AEAD operation it is required to chain a cipher and an authentication 481*0318c02bSDeclan Dohertytransform together. Also it is important to note that the order in which the 482*0318c02bSDeclan Dohertytransforms are passed indicates the order of the chaining. 483*0318c02bSDeclan Doherty 484*0318c02bSDeclan Doherty.. code-block:: c 485*0318c02bSDeclan Doherty 486*0318c02bSDeclan Doherty struct rte_crypto_sym_xform { 487*0318c02bSDeclan Doherty struct rte_crypto_sym_xform *next; 488*0318c02bSDeclan Doherty /**< next xform in chain */ 489*0318c02bSDeclan Doherty enum rte_crypto_sym_xform_type type; 490*0318c02bSDeclan Doherty /**< xform type */ 491*0318c02bSDeclan Doherty union { 492*0318c02bSDeclan Doherty struct rte_crypto_auth_xform auth; 493*0318c02bSDeclan Doherty /**< Authentication / hash xform */ 494*0318c02bSDeclan Doherty struct rte_crypto_cipher_xform cipher; 495*0318c02bSDeclan Doherty /**< Cipher xform */ 496*0318c02bSDeclan Doherty }; 497*0318c02bSDeclan Doherty }; 498*0318c02bSDeclan Doherty 499*0318c02bSDeclan DohertyThe API does not place a limit on the number of transforms that can be chained 500*0318c02bSDeclan Dohertytogether but this will be limited by the underlying Crypto device poll mode 501*0318c02bSDeclan Dohertydriver which is processing the operation. 502*0318c02bSDeclan Doherty 503*0318c02bSDeclan Doherty.. figure:: img/crypto_xform_chain.* 504*0318c02bSDeclan Doherty 505*0318c02bSDeclan Doherty 506*0318c02bSDeclan DohertySymmetric Operations 507*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~~~~ 508*0318c02bSDeclan Doherty 509*0318c02bSDeclan DohertyThe symmetric Crypto operation structure contains all the mutable data relating 510*0318c02bSDeclan Dohertyto performing symmetric cryptographic processing on a referenced mbuf data 511*0318c02bSDeclan Dohertybuffer. It is used for either cipher, authentication, AEAD and chained 512*0318c02bSDeclan Dohertyoperations. 513*0318c02bSDeclan Doherty 514*0318c02bSDeclan DohertyAs a minimum the symmetric operation must have a source data buffer (``m_src``), 515*0318c02bSDeclan Dohertythe session type (session-based/less), a valid session (or transform chain if in 516*0318c02bSDeclan Dohertysession-less mode) and the minimum authentication/ cipher parameters required 517*0318c02bSDeclan Dohertydepending on the type of operation specified in the session or the transform 518*0318c02bSDeclan Dohertychain. 519*0318c02bSDeclan Doherty 520*0318c02bSDeclan Doherty.. code-block:: c 521*0318c02bSDeclan Doherty 522*0318c02bSDeclan Doherty struct rte_crypto_sym_op { 523*0318c02bSDeclan Doherty struct rte_mbuf *m_src; 524*0318c02bSDeclan Doherty struct rte_mbuf *m_dst; 525*0318c02bSDeclan Doherty 526*0318c02bSDeclan Doherty enum rte_crypto_sym_op_sess_type type; 527*0318c02bSDeclan Doherty 528*0318c02bSDeclan Doherty union { 529*0318c02bSDeclan Doherty struct rte_cryptodev_sym_session *session; 530*0318c02bSDeclan Doherty /**< Handle for the initialised session context */ 531*0318c02bSDeclan Doherty struct rte_crypto_sym_xform *xform; 532*0318c02bSDeclan Doherty /**< Session-less API Crypto operation parameters */ 533*0318c02bSDeclan Doherty }; 534*0318c02bSDeclan Doherty 535*0318c02bSDeclan Doherty struct { 536*0318c02bSDeclan Doherty struct { 537*0318c02bSDeclan Doherty uint32_t offset; 538*0318c02bSDeclan Doherty uint32_t length; 539*0318c02bSDeclan Doherty } data; /**< Data offsets and length for ciphering */ 540*0318c02bSDeclan Doherty 541*0318c02bSDeclan Doherty struct { 542*0318c02bSDeclan Doherty uint8_t *data; 543*0318c02bSDeclan Doherty phys_addr_t phys_addr; 544*0318c02bSDeclan Doherty uint16_t length; 545*0318c02bSDeclan Doherty } iv; /**< Initialisation vector parameters */ 546*0318c02bSDeclan Doherty } cipher; 547*0318c02bSDeclan Doherty 548*0318c02bSDeclan Doherty struct { 549*0318c02bSDeclan Doherty struct { 550*0318c02bSDeclan Doherty uint32_t offset; 551*0318c02bSDeclan Doherty uint32_t length; 552*0318c02bSDeclan Doherty } data; /**< Data offsets and length for authentication */ 553*0318c02bSDeclan Doherty 554*0318c02bSDeclan Doherty struct { 555*0318c02bSDeclan Doherty uint8_t *data; 556*0318c02bSDeclan Doherty phys_addr_t phys_addr; 557*0318c02bSDeclan Doherty uint16_t length; 558*0318c02bSDeclan Doherty } digest; /**< Digest parameters */ 559*0318c02bSDeclan Doherty 560*0318c02bSDeclan Doherty struct { 561*0318c02bSDeclan Doherty uint8_t *data; 562*0318c02bSDeclan Doherty phys_addr_t phys_addr; 563*0318c02bSDeclan Doherty uint16_t length; 564*0318c02bSDeclan Doherty } aad; /**< Additional authentication parameters */ 565*0318c02bSDeclan Doherty } auth; 566*0318c02bSDeclan Doherty } 567*0318c02bSDeclan Doherty 568*0318c02bSDeclan Doherty 569*0318c02bSDeclan DohertyAsymmetric Cryptography 570*0318c02bSDeclan Doherty----------------------- 571*0318c02bSDeclan Doherty 572*0318c02bSDeclan DohertyAsymmetric functionality is currently not supported by the cryptodev API. 573*0318c02bSDeclan Doherty 574*0318c02bSDeclan Doherty 575*0318c02bSDeclan DohertyCrypto Device API 576*0318c02bSDeclan Doherty~~~~~~~~~~~~~~~~~ 577*0318c02bSDeclan Doherty 578*0318c02bSDeclan DohertyThe cryptodev Library API is described in the *DPDK API Reference* document. 579