xref: /dpdk/doc/guides/nics/ixgbe.rst (revision 9fd2193e56a55c6509477f8d5751c18a388f3977)
15630257fSFerruh Yigit..  SPDX-License-Identifier: BSD-3-Clause
25630257fSFerruh Yigit    Copyright(c) 2010-2016 Intel Corporation.
3972e365bSThomas Monjalon
46be66901SWilliam Tu.. include:: <isonum.txt>
56be66901SWilliam Tu
6972e365bSThomas MonjalonIXGBE Driver
7972e365bSThomas Monjalon============
8972e365bSThomas Monjalon
9b583b9a1SFerruh YigitSupported Chipsets and NICs
10b583b9a1SFerruh Yigit---------------------------
11b583b9a1SFerruh Yigit
12b583b9a1SFerruh Yigit- Intel 82599EB 10 Gigabit Ethernet Controller
13b583b9a1SFerruh Yigit- Intel 82598EB 10 Gigabit Ethernet Controller
14b583b9a1SFerruh Yigit- Intel 82599ES 10 Gigabit Ethernet Controller
15b583b9a1SFerruh Yigit- Intel 82599EN 10 Gigabit Ethernet Controller
16b583b9a1SFerruh Yigit- Intel Ethernet Controller X540-AT2
17b583b9a1SFerruh Yigit- Intel Ethernet Controller X550-BT2
18b583b9a1SFerruh Yigit- Intel Ethernet Controller X550-AT2
19b583b9a1SFerruh Yigit- Intel Ethernet Controller X550-AT
20b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X520-SR1
21b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X520-SR2
22b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X520-LR1
23b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X520-DA1
24b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X520-DA2
25b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X520-DA4
26b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X520-QDA1
27b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X520-T2
28b583b9a1SFerruh Yigit- Intel 10 Gigabit AF DA Dual Port Server Adapter
29b583b9a1SFerruh Yigit- Intel 10 Gigabit AT Server Adapter
30b583b9a1SFerruh Yigit- Intel 10 Gigabit AT2 Server Adapter
31b583b9a1SFerruh Yigit- Intel 10 Gigabit CX4 Dual Port Server Adapter
32b583b9a1SFerruh Yigit- Intel 10 Gigabit XF LR Server Adapter
33b583b9a1SFerruh Yigit- Intel 10 Gigabit XF SR Dual Port Server Adapter
34b583b9a1SFerruh Yigit- Intel 10 Gigabit XF SR Server Adapter
35b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X540-T1
36b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X540-T2
37b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X550-T1
38b583b9a1SFerruh Yigit- Intel Ethernet Converged Network Adapter X550-T2
39b583b9a1SFerruh Yigit
40972e365bSThomas MonjalonVector PMD for IXGBE
41972e365bSThomas Monjalon--------------------
42972e365bSThomas Monjalon
43972e365bSThomas MonjalonVector PMD uses Intel® SIMD instructions to optimize packet I/O.
44972e365bSThomas MonjalonIt improves load/store bandwidth efficiency of L1 data cache by using a wider SSE/AVX register 1 (1).
45972e365bSThomas MonjalonThe wider register gives space to hold multiple packet buffers so as to save instruction number when processing bulk of packets.
46972e365bSThomas Monjalon
47972e365bSThomas MonjalonThere is no change to PMD API. The RX/TX handler are the only two entries for vPMD packet I/O.
48972e365bSThomas MonjalonThey are transparently registered at runtime RX/TX execution if all condition checks pass.
49972e365bSThomas Monjalon
50972e365bSThomas MonjalonSome constraints apply as pre-conditions for specific optimizations on bulk packet transfers.
51972e365bSThomas MonjalonThe following sections explain RX and TX constraints in the vPMD.
52972e365bSThomas Monjalon
53972e365bSThomas MonjalonRX Constraints
54972e365bSThomas Monjalon~~~~~~~~~~~~~~
55972e365bSThomas Monjalon
566be66901SWilliam TuLinux Prerequisites and Pre-conditions
576be66901SWilliam Tu^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
58972e365bSThomas Monjalon
59972e365bSThomas MonjalonThe following prerequisites apply:
60972e365bSThomas Monjalon
61972e365bSThomas Monjalon*   To enable vPMD to work for RX, bulk allocation for Rx must be allowed.
62972e365bSThomas Monjalon
63972e365bSThomas MonjalonEnsure that the following pre-conditions are satisfied:
64972e365bSThomas Monjalon
65972e365bSThomas Monjalon*   rxq->rx_free_thresh >= RTE_PMD_IXGBE_RX_MAX_BURST
66972e365bSThomas Monjalon
67972e365bSThomas Monjalon*   rxq->rx_free_thresh < rxq->nb_rx_desc
68972e365bSThomas Monjalon
69972e365bSThomas Monjalon*   (rxq->nb_rx_desc % rxq->rx_free_thresh) == 0
70972e365bSThomas Monjalon
71972e365bSThomas Monjalon*   rxq->nb_rx_desc  < (IXGBE_MAX_RING_DESC - RTE_PMD_IXGBE_RX_MAX_BURST)
72972e365bSThomas Monjalon
73972e365bSThomas MonjalonThese conditions are checked in the code.
74972e365bSThomas Monjalon
75972e365bSThomas MonjalonScattered packets are not supported in this mode.
76972e365bSThomas MonjalonIf an incoming packet is greater than the maximum acceptable length of one "mbuf" data size (by default, the size is 2 KB),
77972e365bSThomas MonjalonvPMD for RX would be disabled.
78972e365bSThomas Monjalon
79*9fd2193eSLukas SismisBy default, IXGBE_MAX_RING_DESC is set to 8192 and RTE_PMD_IXGBE_RX_MAX_BURST is set to 32.
80972e365bSThomas Monjalon
816be66901SWilliam TuWindows Prerequisites and Pre-conditions
826be66901SWilliam Tu^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
836be66901SWilliam Tu
846be66901SWilliam Tu- Follow the :doc:`guide for Windows <../windows_gsg/run_apps>`
856be66901SWilliam Tu  to setup the basic DPDK environment.
866be66901SWilliam Tu
876be66901SWilliam Tu- Identify the Intel\ |reg| Ethernet adapter and get the latest NVM/FW version.
886be66901SWilliam Tu
896be66901SWilliam Tu- To access any Intel\ |reg| Ethernet hardware,
906be66901SWilliam Tu  load the NetUIO driver in place of existing built-in (inbox) driver.
916be66901SWilliam Tu
926be66901SWilliam Tu- To load NetUIO driver, follow the steps mentioned in `dpdk-kmods repository
936be66901SWilliam Tu  <https://git.dpdk.org/dpdk-kmods/tree/windows/netuio/README.rst>`_.
946be66901SWilliam Tu
956be66901SWilliam Tu- Loading of private Dynamic Device Personalization (DDP) package
966be66901SWilliam Tu  is not supported on Windows.
976be66901SWilliam Tu
986be66901SWilliam Tu
99972e365bSThomas MonjalonFeature not Supported by RX Vector PMD
100972e365bSThomas Monjalon^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
101972e365bSThomas Monjalon
102972e365bSThomas MonjalonSome features are not supported when trying to increase the throughput in vPMD.
103972e365bSThomas MonjalonThey are:
104972e365bSThomas Monjalon
105972e365bSThomas Monjalon*   IEEE1588
106972e365bSThomas Monjalon
107972e365bSThomas Monjalon*   FDIR
108972e365bSThomas Monjalon
109972e365bSThomas Monjalon*   RX checksum off load
110972e365bSThomas Monjalon
111972e365bSThomas MonjalonOther features are supported using optional MACRO configuration. They include:
112972e365bSThomas Monjalon
113972e365bSThomas Monjalon*   HW VLAN strip
114972e365bSThomas Monjalon
115972e365bSThomas Monjalon*   HW extend dual VLAN
116972e365bSThomas Monjalon
117a19b7265SQi ZhangTo guarantee the constraint, capabilities in dev_conf.rxmode.offloads will be checked:
118972e365bSThomas Monjalon
119295968d1SFerruh Yigit*   RTE_ETH_RX_OFFLOAD_VLAN_STRIP
120972e365bSThomas Monjalon
121295968d1SFerruh Yigit*   RTE_ETH_RX_OFFLOAD_VLAN_EXTEND
122972e365bSThomas Monjalon
123295968d1SFerruh Yigit*   RTE_ETH_RX_OFFLOAD_CHECKSUM
124972e365bSThomas Monjalon
125972e365bSThomas Monjalon*   dev_conf
126972e365bSThomas Monjalon
127972e365bSThomas Monjalon
1280f9fb100SJeff DalyDisable SDP3 TX_DISABLE for Fiber Links
1290f9fb100SJeff Daly^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
1300f9fb100SJeff Daly
1310f9fb100SJeff DalyThe following ``devargs`` option can be enabled at runtime.  It must
1320f9fb100SJeff Dalybe passed as part of EAL arguments. For example,
1330f9fb100SJeff Daly
1340f9fb100SJeff Daly.. code-block:: console
1350f9fb100SJeff Daly
1360f9fb100SJeff Daly   dpdk-testpmd -a fiber_sdp3_no_tx_disable=1 -- -i
1370f9fb100SJeff Daly
1380f9fb100SJeff Daly- ``fiber_sdp3_no_tx_disable`` (default **0**)
1390f9fb100SJeff Daly
1400f9fb100SJeff Daly  Not all IXGBE implementations with SFP cages use the SDP3 signal as
1410f9fb100SJeff Daly  TX_DISABLE as a means to disable the laser on fiber SFP modules.
1420f9fb100SJeff Daly  This option informs the driver that in this case, SDP3 is not to be
1430f9fb100SJeff Daly  used as a check for link up by testing for laser on/off.
1440f9fb100SJeff Daly
145bd282035SHaiyue WangVF Runtime Options
146bd282035SHaiyue Wang^^^^^^^^^^^^^^^^^^
147bd282035SHaiyue Wang
148bd282035SHaiyue WangThe following ``devargs`` options can be enabled at runtime. They must
149bd282035SHaiyue Wangbe passed as part of EAL arguments. For example,
150bd282035SHaiyue Wang
151bd282035SHaiyue Wang.. code-block:: console
152bd282035SHaiyue Wang
153e3f15be4SSarosh Arif   dpdk-testpmd -a af:10.0,pflink_fullchk=1 -- -i
154bd282035SHaiyue Wang
155bd282035SHaiyue Wang- ``pflink_fullchk`` (default **0**)
156bd282035SHaiyue Wang
157bd282035SHaiyue Wang  When calling ``rte_eth_link_get_nowait()`` to get VF link status,
158bd282035SHaiyue Wang  this option is used to control how VF synchronizes its status with
159bd282035SHaiyue Wang  PF's. If set, VF will not only check the PF's physical link status
160bd282035SHaiyue Wang  by reading related register, but also check the mailbox status. We
161bd282035SHaiyue Wang  call this behavior as fully checking. And checking mailbox will
162bd282035SHaiyue Wang  trigger PF's mailbox interrupt generation. If unset, the application
163bd282035SHaiyue Wang  can get the VF's link status quickly by just reading the PF's link
164bd282035SHaiyue Wang  status register, this will avoid the whole system's mailbox interrupt
165bd282035SHaiyue Wang  generation.
166bd282035SHaiyue Wang
167bd282035SHaiyue Wang  ``rte_eth_link_get()`` will still use the mailbox method regardless
168bd282035SHaiyue Wang  of the pflink_fullchk setting.
169bd282035SHaiyue Wang
170972e365bSThomas MonjalonRX Burst Size
171972e365bSThomas Monjalon^^^^^^^^^^^^^
172972e365bSThomas Monjalon
173972e365bSThomas MonjalonAs vPMD is focused on high throughput, it assumes that the RX burst size is equal to or greater than 32 per burst.
174972e365bSThomas MonjalonIt returns zero if using nb_pkt < 32 as the expected packet number in the receive handler.
175972e365bSThomas Monjalon
176972e365bSThomas MonjalonTX Constraint
177972e365bSThomas Monjalon~~~~~~~~~~~~~
178972e365bSThomas Monjalon
179972e365bSThomas MonjalonPrerequisite
180972e365bSThomas Monjalon^^^^^^^^^^^^
181972e365bSThomas Monjalon
182972e365bSThomas MonjalonThe only prerequisite is related to tx_rs_thresh.
183972e365bSThomas MonjalonThe tx_rs_thresh value must be greater than or equal to RTE_PMD_IXGBE_TX_MAX_BURST,
184972e365bSThomas Monjalonbut less or equal to RTE_IXGBE_TX_MAX_FREE_BUF_SZ.
185972e365bSThomas MonjalonConsequently, by default the tx_rs_thresh value is in the range 32 to 64.
186972e365bSThomas Monjalon
18731214d49SWenzhuo LuFeature not Supported by TX Vector PMD
188972e365bSThomas Monjalon^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
189972e365bSThomas Monjalon
190e435197aSQi ZhangTX vPMD only works when offloads is set to 0
191972e365bSThomas Monjalon
192e435197aSQi ZhangThis means that it does not support any TX offload.
193972e365bSThomas Monjalon
1947a4915b4SBernard IremongerApplication Programming Interface
19531214d49SWenzhuo Lu---------------------------------
1967a4915b4SBernard Iremonger
1977a4915b4SBernard IremongerIn DPDK release v16.11 an API for ixgbe specific functions has been added to the ixgbe PMD.
1987a4915b4SBernard IremongerThe declarations for the API functions are in the header ``rte_pmd_ixgbe.h``.
199972e365bSThomas Monjalon
200972e365bSThomas MonjalonSample Application Notes
20131214d49SWenzhuo Lu------------------------
202972e365bSThomas Monjalon
203972e365bSThomas Monjalonl3fwd
20431214d49SWenzhuo Lu~~~~~
205972e365bSThomas Monjalon
206972e365bSThomas MonjalonWhen running l3fwd with vPMD, there is one thing to note.
207295968d1SFerruh YigitIn the configuration, ensure that RTE_ETH_RX_OFFLOAD_CHECKSUM in port_conf.rxmode.offloads is NOT set.
208972e365bSThomas MonjalonOtherwise, by default, RX vPMD is disabled.
209972e365bSThomas Monjalon
210972e365bSThomas Monjalonload_balancer
21131214d49SWenzhuo Lu~~~~~~~~~~~~~
212972e365bSThomas Monjalon
213295968d1SFerruh YigitAs in the case of l3fwd, to enable vPMD, do NOT set RTE_ETH_RX_OFFLOAD_CHECKSUM in port_conf.rxmode.offloads.
214972e365bSThomas MonjalonIn addition, for improved performance, use -bsz "(32,32),(64,64),(32,32)" in load_balancer to avoid using the default burst size of 144.
215db39dd26SWenzhuo Lu
216db39dd26SWenzhuo Lu
21731214d49SWenzhuo LuLimitations or Known issues
21831214d49SWenzhuo Lu---------------------------
21931214d49SWenzhuo Lu
220db39dd26SWenzhuo LuMalicious Driver Detection not Supported
22131214d49SWenzhuo Lu~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
222db39dd26SWenzhuo Lu
2238d257235SJohn McNamaraThe Intel x550 series NICs support a feature called MDD (Malicious
224db39dd26SWenzhuo LuDriver Detection) which checks the behavior of the VF driver.
225db39dd26SWenzhuo LuIf this feature is enabled, the VF must use the advanced context descriptor
226db39dd26SWenzhuo Lucorrectly and set the CC (Check Context) bit.
227db39dd26SWenzhuo LuDPDK PF doesn't support MDD, but kernel PF does. We may hit problem in this
228db39dd26SWenzhuo Luscenario kernel PF + DPDK VF. If user enables MDD in kernel PF, DPDK VF will
229db39dd26SWenzhuo Lunot work. Because kernel PF thinks the VF is malicious. But actually it's not.
230db39dd26SWenzhuo LuThe only reason is the VF doesn't act as MDD required.
231db39dd26SWenzhuo LuThere's significant performance impact to support MDD. DPDK should check if
232db39dd26SWenzhuo Luthe advanced context descriptor should be set and set it. And DPDK has to ask
233db39dd26SWenzhuo Luthe info about the header length from the upper layer, because parsing the
2348d257235SJohn McNamarapacket itself is not acceptable. So, it's too expensive to support MDD.
2359e5c3faeSWenzhuo LuWhen using kernel PF + DPDK VF on x550, please make sure to use a kernel
2369e5c3faeSWenzhuo LuPF driver that disables MDD or can disable MDD.
2379e5c3faeSWenzhuo Lu
2389e5c3faeSWenzhuo LuSome kernel drivers already disable MDD by default while some kernels can use
2399e5c3faeSWenzhuo Luthe command ``insmod ixgbe.ko MDD=0,0`` to disable MDD. Each "0" in the
2409e5c3faeSWenzhuo Lucommand refers to a port. For example, if there are 6 ixgbe ports, the command
2419e5c3faeSWenzhuo Lushould be changed to ``insmod ixgbe.ko MDD=0,0,0,0,0,0``.
242125f6edbSHarry van Haaren
243125f6edbSHarry van Haaren
244125f6edbSHarry van HaarenStatistics
24531214d49SWenzhuo Lu~~~~~~~~~~
246125f6edbSHarry van Haaren
247125f6edbSHarry van HaarenThe statistics of ixgbe hardware must be polled regularly in order for it to
248125f6edbSHarry van Haarenremain consistent. Running a DPDK application without polling the statistics will
249125f6edbSHarry van Haarencause registers on hardware to count to the maximum value, and "stick" at
250125f6edbSHarry van Haarenthat value.
251125f6edbSHarry van Haaren
252125f6edbSHarry van HaarenIn order to avoid statistic registers every reaching the maximum value,
253125f6edbSHarry van Haarenread the statistics from the hardware using ``rte_eth_stats_get()`` or
254125f6edbSHarry van Haaren``rte_eth_xstats_get()``.
255125f6edbSHarry van Haaren
256125f6edbSHarry van HaarenThe maximum time between statistics polls that ensures consistent results can
257125f6edbSHarry van Haarenbe calculated as follows:
258125f6edbSHarry van Haaren
259125f6edbSHarry van Haaren.. code-block:: c
260125f6edbSHarry van Haaren
261125f6edbSHarry van Haaren  max_read_interval = UINT_MAX / max_packets_per_second
262125f6edbSHarry van Haaren  max_read_interval = 4294967295 / 14880952
263125f6edbSHarry van Haaren  max_read_interval = 288.6218096127183 (seconds)
264125f6edbSHarry van Haaren  max_read_interval = ~4 mins 48 sec.
265125f6edbSHarry van Haaren
266125f6edbSHarry van HaarenIn order to ensure valid results, it is recommended to poll every 4 minutes.
2673f073226SWei Dai
2689aaa9954SWenzhuo LuMTU setting
2699aaa9954SWenzhuo Lu~~~~~~~~~~~
2709aaa9954SWenzhuo Lu
2719aaa9954SWenzhuo LuAlthough the user can set the MTU separately on PF and VF ports, the ixgbe NIC
2729aaa9954SWenzhuo Luonly supports one global MTU per physical port.
2739aaa9954SWenzhuo LuSo when the user sets different MTUs on PF and VF ports in one physical port,
2749aaa9954SWenzhuo Luthe real MTU for all these PF and VF ports is the largest value set.
2759aaa9954SWenzhuo LuThis behavior is based on the kernel driver behavior.
2769aaa9954SWenzhuo Lu
277f8879d22SWenzhuo LuVF MAC address setting
278f8879d22SWenzhuo Lu~~~~~~~~~~~~~~~~~~~~~~
279f8879d22SWenzhuo Lu
280f8879d22SWenzhuo LuOn ixgbe, the concept of "pool" can be used for different things depending on
281f8879d22SWenzhuo Luthe mode. In VMDq mode, "pool" means a VMDq pool. In IOV mode, "pool" means a
282f8879d22SWenzhuo LuVF.
283f8879d22SWenzhuo Lu
284f8879d22SWenzhuo LuThere is no RTE API to add a VF's MAC address from the PF. On ixgbe, the
285f8879d22SWenzhuo Lu``rte_eth_dev_mac_addr_add()`` function can be used to add a VF's MAC address,
286f8879d22SWenzhuo Luas a workaround.
287f8879d22SWenzhuo Lu
288621c5c1dSXiaoyun LiX550 does not support legacy interrupt mode
289621c5c1dSXiaoyun Li~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
290621c5c1dSXiaoyun Li
291d629b7b5SJohn McNamaraDescription
292d629b7b5SJohn McNamara^^^^^^^^^^^
293621c5c1dSXiaoyun LiX550 cannot get interrupts if using ``uio_pci_generic`` module or using legacy
294621c5c1dSXiaoyun Liinterrupt mode of ``igb_uio`` or ``vfio``. Because the errata of X550 states
295621c5c1dSXiaoyun Lithat the Interrupt Status bit is not implemented. The errata is the item #22
296621c5c1dSXiaoyun Lifrom `X550 spec update <https://www.intel.com/content/dam/www/public/us/en/
297621c5c1dSXiaoyun Lidocuments/specification-updates/ethernet-x550-spec-update.pdf>`_
298621c5c1dSXiaoyun Li
299621c5c1dSXiaoyun LiImplication
300621c5c1dSXiaoyun Li^^^^^^^^^^^
301621c5c1dSXiaoyun LiWhen using ``uio_pci_generic`` module or using legacy interrupt mode of
302621c5c1dSXiaoyun Li``igb_uio`` or ``vfio``, the Interrupt Status bit would be checked if the
303621c5c1dSXiaoyun Liinterrupt is coming. Since the bit is not implemented in X550, the irq cannot
304621c5c1dSXiaoyun Libe handled correctly and cannot report the event fd to DPDK apps. Then apps
305621c5c1dSXiaoyun Licannot get interrupts and ``dmesg`` will show messages like ``irq #No.: ``
306621c5c1dSXiaoyun Li``nobody cared.``
307621c5c1dSXiaoyun Li
308621c5c1dSXiaoyun LiWorkaround
309621c5c1dSXiaoyun Li^^^^^^^^^^
310621c5c1dSXiaoyun LiDo not bind the ``uio_pci_generic`` module in X550 NICs.
311621c5c1dSXiaoyun LiDo not bind ``igb_uio`` with legacy mode in X550 NICs.
312621c5c1dSXiaoyun LiBefore binding ``vfio`` with legacy mode in X550 NICs, use ``modprobe vfio ``
313621c5c1dSXiaoyun Li``nointxmask=1`` to load ``vfio`` module if the intx is not shared with other
314621c5c1dSXiaoyun Lidevices.
3153f073226SWei Dai
3169baf3ecfSBeilei XingRSS isn't supported when QinQ is enabled
3179baf3ecfSBeilei Xing~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3189baf3ecfSBeilei Xing
3199baf3ecfSBeilei XingDue to FW limitation, IXGBE doesn't support RSS when QinQ is enabled currently.
3209baf3ecfSBeilei Xing
3219a40edb5SHaiyue WangUDP with zero checksum is reported as error
3229a40edb5SHaiyue Wang~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3239a40edb5SHaiyue Wang
3249a40edb5SHaiyue WangIntel 82599 10 Gigabit Ethernet Controller Specification Update (Revision 2.87)
3259a40edb5SHaiyue WangErrata: 44 Integrity Error Reported for IPv4/UDP Packets With Zero Checksum
3269a40edb5SHaiyue Wang
3279a40edb5SHaiyue WangTo support UDP zero checksum, the zero and bad UDP checksum packet is marked as
328daa02b5cSOlivier MatzRTE_MBUF_F_RX_L4_CKSUM_UNKNOWN, so the application needs to recompute the checksum to
3299a40edb5SHaiyue Wangvalidate it.
3309a40edb5SHaiyue Wang
33113e855a3SRadu NicolauInline crypto processing support
33213e855a3SRadu Nicolau--------------------------------
33313e855a3SRadu Nicolau
33413e855a3SRadu NicolauInline IPsec processing is supported for ``RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO``
33513e855a3SRadu Nicolaumode for ESP packets only:
33613e855a3SRadu Nicolau
33713e855a3SRadu Nicolau- ESP authentication only: AES-128-GMAC (128-bit key)
33813e855a3SRadu Nicolau- ESP encryption and authentication: AES-128-GCM (128-bit key)
33913e855a3SRadu Nicolau
34013e855a3SRadu NicolauIPsec Security Gateway Sample Application supports inline IPsec processing for
34113e855a3SRadu Nicolauixgbe PMD.
34213e855a3SRadu Nicolau
34313e855a3SRadu NicolauFor more details see the IPsec Security Gateway Sample Application and Security
34413e855a3SRadu Nicolaulibrary documentation.
34513e855a3SRadu Nicolau
34613e855a3SRadu Nicolau
347cf80ba6eSDeclan DohertyVirtual Function Port Representors
348cf80ba6eSDeclan Doherty----------------------------------
349cf80ba6eSDeclan DohertyThe IXGBE PF PMD supports the creation of VF port representors for the control
350cf80ba6eSDeclan Dohertyand monitoring of IXGBE virtual function devices. Each port representor
351cf80ba6eSDeclan Dohertycorresponds to a single virtual function of that device. Using the ``devargs``
352cf80ba6eSDeclan Dohertyoption ``representor`` the user can specify which virtual functions to create
353cf80ba6eSDeclan Dohertyport representors for on initialization of the PF PMD by passing the VF IDs of
354cf80ba6eSDeclan Dohertythe VFs which are required.::
355cf80ba6eSDeclan Doherty
356db27370bSStephen Hemminger  -a DBDF,representor=[0,1,4]
357cf80ba6eSDeclan Doherty
358cf80ba6eSDeclan DohertyCurrently hot-plugging of representor ports is not supported so all required
359cf80ba6eSDeclan Dohertyrepresentors must be specified on the creation of the PF.
360cf80ba6eSDeclan Doherty
3610100a038SDavid Marchand.. _net_ixgbe_testpmd_commands:
3620100a038SDavid Marchand
3630100a038SDavid MarchandTestpmd driver specific commands
3640100a038SDavid Marchand--------------------------------
3650100a038SDavid Marchand
3660100a038SDavid MarchandSome ixgbe driver specific features are integrated in testpmd.
3670100a038SDavid Marchand
3680100a038SDavid Marchandset split drop enable (for VF)
3690100a038SDavid Marchand~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3700100a038SDavid Marchand
3710100a038SDavid MarchandSet split drop enable bit for VF from PF::
3720100a038SDavid Marchand
3730100a038SDavid Marchand   testpmd> set vf split drop (port_id) (vf_id) (on|off)
3740100a038SDavid Marchand
3750100a038SDavid Marchandset macsec offload
3760100a038SDavid Marchand~~~~~~~~~~~~~~~~~~
3770100a038SDavid Marchand
3780100a038SDavid MarchandEnable/disable MACsec offload::
3790100a038SDavid Marchand
3800100a038SDavid Marchand   testpmd> set macsec offload (port_id) on encrypt (on|off) replay-protect (on|off)
3810100a038SDavid Marchand   testpmd> set macsec offload (port_id) off
3820100a038SDavid Marchand
3830100a038SDavid Marchandset macsec sc
3840100a038SDavid Marchand~~~~~~~~~~~~~
3850100a038SDavid Marchand
3860100a038SDavid MarchandConfigure MACsec secure connection (SC)::
3870100a038SDavid Marchand
3880100a038SDavid Marchand   testpmd> set macsec sc (tx|rx) (port_id) (mac) (pi)
3890100a038SDavid Marchand
3900100a038SDavid Marchand.. note::
3910100a038SDavid Marchand
3920100a038SDavid Marchand   The pi argument is ignored for tx.
3930100a038SDavid Marchand   Check the NIC Datasheet for hardware limitations.
3940100a038SDavid Marchand
3950100a038SDavid Marchandset macsec sa
3960100a038SDavid Marchand~~~~~~~~~~~~~
3970100a038SDavid Marchand
3980100a038SDavid MarchandConfigure MACsec secure association (SA)::
3990100a038SDavid Marchand
4000100a038SDavid Marchand   testpmd> set macsec sa (tx|rx) (port_id) (idx) (an) (pn) (key)
4010100a038SDavid Marchand
4020100a038SDavid Marchand.. note::
4030100a038SDavid Marchand
4040100a038SDavid Marchand   The IDX value must be 0 or 1.
4050100a038SDavid Marchand   Check the NIC Datasheet for hardware limitations.
4060100a038SDavid Marchand
4070100a038SDavid Marchandset tc tx min bandwidth
4080100a038SDavid Marchand~~~~~~~~~~~~~~~~~~~~~~~
4090100a038SDavid Marchand
4100100a038SDavid MarchandSet all TCs' TX min relative bandwidth (%) globally for all PF and VFs::
4110100a038SDavid Marchand
4120100a038SDavid Marchand   testpmd> set tc tx min-bandwidth (port_id) (bw1, bw2, ...)
4130100a038SDavid Marchand
4143ab51564SDavid Marchandport config bypass
4153ab51564SDavid Marchand~~~~~~~~~~~~~~~~~~
4163ab51564SDavid Marchand
4173ab51564SDavid MarchandEnable/disable bypass feature::
4183ab51564SDavid Marchand
4193ab51564SDavid Marchand   port config bypass (port_id) (on|off)
4203ab51564SDavid Marchand
4210100a038SDavid Marchandset bypass mode
4220100a038SDavid Marchand~~~~~~~~~~~~~~~
4230100a038SDavid Marchand
4240100a038SDavid MarchandSet the bypass mode for the lowest port on bypass enabled NIC::
4250100a038SDavid Marchand
4260100a038SDavid Marchand   testpmd> set bypass mode (normal|bypass|isolate) (port_id)
4270100a038SDavid Marchand
4280100a038SDavid Marchandset bypass event
4290100a038SDavid Marchand~~~~~~~~~~~~~~~~
4300100a038SDavid Marchand
4310100a038SDavid MarchandSet the event required to initiate specified bypass mode for the lowest port on a bypass enabled::
4320100a038SDavid Marchand
4330100a038SDavid Marchand   testpmd> set bypass event (timeout|os_on|os_off|power_on|power_off) \
4340100a038SDavid Marchand            mode (normal|bypass|isolate) (port_id)
4350100a038SDavid Marchand
4360100a038SDavid MarchandWhere:
4370100a038SDavid Marchand
4380100a038SDavid Marchand* ``timeout``: Enable bypass after watchdog timeout.
4390100a038SDavid Marchand
4400100a038SDavid Marchand* ``os_on``: Enable bypass when OS/board is powered on.
4410100a038SDavid Marchand
4420100a038SDavid Marchand* ``os_off``: Enable bypass when OS/board is powered off.
4430100a038SDavid Marchand
4440100a038SDavid Marchand* ``power_on``: Enable bypass when power supply is turned on.
4450100a038SDavid Marchand
4460100a038SDavid Marchand* ``power_off``: Enable bypass when power supply is turned off.
4470100a038SDavid Marchand
4480100a038SDavid Marchand
4490100a038SDavid Marchandset bypass timeout
4500100a038SDavid Marchand~~~~~~~~~~~~~~~~~~
4510100a038SDavid Marchand
4520100a038SDavid MarchandSet the bypass watchdog timeout to ``n`` seconds where 0 = instant::
4530100a038SDavid Marchand
4540100a038SDavid Marchand   testpmd> set bypass timeout (0|1.5|2|3|4|8|16|32)
4550100a038SDavid Marchand
4560100a038SDavid Marchandshow bypass config
4570100a038SDavid Marchand~~~~~~~~~~~~~~~~~~
4580100a038SDavid Marchand
4590100a038SDavid MarchandShow the bypass configuration for a bypass enabled NIC using the lowest port on the NIC::
4600100a038SDavid Marchand
4610100a038SDavid Marchand   testpmd> show bypass config (port_id)
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