xref: /dpdk/doc/guides/nics/dpaa.rst (revision 7e5f49ae767da93486d28142ef53a8fd745f240b)
1d81734caSHemant Agrawal..  SPDX-License-Identifier: BSD-3-Clause
2a0edbb8aSRohit Raj    Copyright 2017,2020-2024 NXP
3e4a880d5SShreyansh Jain
4e4a880d5SShreyansh Jain
5e4a880d5SShreyansh JainDPAA Poll Mode Driver
6e4a880d5SShreyansh Jain=====================
7e4a880d5SShreyansh Jain
88809f78cSBruce RichardsonThe DPAA NIC PMD (**librte_net_dpaa**) provides poll mode driver
9e4a880d5SShreyansh Jainsupport for the inbuilt NIC found in the **NXP DPAA** SoC family.
10e4a880d5SShreyansh Jain
11e4a880d5SShreyansh JainMore information can be found at `NXP Official Website
12e4a880d5SShreyansh Jain<http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-arm-processors:QORIQ-ARM>`_.
13e4a880d5SShreyansh Jain
14e4a880d5SShreyansh JainNXP DPAA (Data Path Acceleration Architecture - Gen 1)
15e4a880d5SShreyansh Jain------------------------------------------------------
16e4a880d5SShreyansh Jain
17e4a880d5SShreyansh JainThis section provides an overview of the NXP DPAA architecture
18e4a880d5SShreyansh Jainand how it is integrated into the DPDK.
19e4a880d5SShreyansh Jain
20e4a880d5SShreyansh JainContents summary
21e4a880d5SShreyansh Jain
22e4a880d5SShreyansh Jain- DPAA overview
23e4a880d5SShreyansh Jain- DPAA driver architecture overview
242ffc1057SHemant Agrawal- FMAN configuration tools and library
25e4a880d5SShreyansh Jain
26e4a880d5SShreyansh Jain.. _dpaa_overview:
27e4a880d5SShreyansh Jain
28e4a880d5SShreyansh JainDPAA Overview
29e4a880d5SShreyansh Jain~~~~~~~~~~~~~
30e4a880d5SShreyansh Jain
31e4a880d5SShreyansh JainReference: `FSL DPAA Architecture <http://www.nxp.com/assets/documents/data/en/white-papers/QORIQDPAAWP.pdf>`_.
32e4a880d5SShreyansh Jain
33e4a880d5SShreyansh JainThe QorIQ Data Path Acceleration Architecture (DPAA) is a set of hardware
34e4a880d5SShreyansh Jaincomponents on specific QorIQ series multicore processors. This architecture
35e4a880d5SShreyansh Jainprovides the infrastructure to support simplified sharing of networking
36e4a880d5SShreyansh Jaininterfaces and accelerators by multiple CPU cores, and the accelerators
37e4a880d5SShreyansh Jainthemselves.
38e4a880d5SShreyansh Jain
39e4a880d5SShreyansh JainDPAA includes:
40e4a880d5SShreyansh Jain
41e4a880d5SShreyansh Jain- Cores
42e4a880d5SShreyansh Jain- Network and packet I/O
43e4a880d5SShreyansh Jain- Hardware offload accelerators
44e4a880d5SShreyansh Jain- Infrastructure required to facilitate flow of packets between the components above
45e4a880d5SShreyansh Jain
46e4a880d5SShreyansh JainInfrastructure components are:
47e4a880d5SShreyansh Jain
48e4a880d5SShreyansh Jain- The Queue Manager (QMan) is a hardware accelerator that manages frame queues.
49e4a880d5SShreyansh Jain  It allows  CPUs and other accelerators connected to the SoC datapath to
50e4a880d5SShreyansh Jain  enqueue and dequeue ethernet frames, thus providing the infrastructure for
51e4a880d5SShreyansh Jain  data exchange among CPUs and datapath accelerators.
52e4a880d5SShreyansh Jain- The Buffer Manager (BMan) is a hardware buffer pool management block that
53e4a880d5SShreyansh Jain  allows software and accelerators on the datapath to acquire and release
54e4a880d5SShreyansh Jain  buffers in order to build frames.
55e4a880d5SShreyansh Jain
56e4a880d5SShreyansh JainHardware accelerators are:
57e4a880d5SShreyansh Jain
58e4a880d5SShreyansh Jain- SEC - Cryptographic accelerator
59e4a880d5SShreyansh Jain- PME - Pattern matching engine
60e4a880d5SShreyansh Jain
61e4a880d5SShreyansh JainThe Network and packet I/O component:
62e4a880d5SShreyansh Jain
63e4a880d5SShreyansh Jain- The Frame Manager (FMan) is a key component in the DPAA and makes use of the
64e4a880d5SShreyansh Jain  DPAA infrastructure (QMan and BMan). FMan  is responsible for packet
65e4a880d5SShreyansh Jain  distribution and policing. Each frame can be parsed, classified and results
66e4a880d5SShreyansh Jain  may be attached to the frame. This meta data can be used to select
67e4a880d5SShreyansh Jain  particular QMan queue, which the packet is forwarded to.
68e4a880d5SShreyansh Jain
69e4a880d5SShreyansh Jain
70e4a880d5SShreyansh JainDPAA DPDK - Poll Mode Driver Overview
71e4a880d5SShreyansh Jain-------------------------------------
72e4a880d5SShreyansh Jain
73e4a880d5SShreyansh JainThis section provides an overview of the drivers for DPAA:
74e4a880d5SShreyansh Jain
75e4a880d5SShreyansh Jain* Bus driver and associated "DPAA infrastructure" drivers
76e4a880d5SShreyansh Jain* Functional object drivers (such as Ethernet).
77e4a880d5SShreyansh Jain
78e4a880d5SShreyansh JainBrief description of each driver is provided in layout below as well as
79e4a880d5SShreyansh Jainin the following sections.
80e4a880d5SShreyansh Jain
81e4a880d5SShreyansh Jain.. code-block:: console
82e4a880d5SShreyansh Jain
83e4a880d5SShreyansh Jain                                       +------------+
84e4a880d5SShreyansh Jain                                       | DPDK DPAA  |
85e4a880d5SShreyansh Jain                                       |    PMD     |
86e4a880d5SShreyansh Jain                                       +-----+------+
87e4a880d5SShreyansh Jain                                             |
88e4a880d5SShreyansh Jain                                       +-----+------+       +---------------+
89e4a880d5SShreyansh Jain                                       :  Ethernet  :.......| DPDK DPAA     |
90e4a880d5SShreyansh Jain                    . . . . . . . . .  :   (FMAN)   :       | Mempool driver|
91e4a880d5SShreyansh Jain                   .                   +---+---+----+       |  (BMAN)       |
92e4a880d5SShreyansh Jain                  .                        ^   |            +-----+---------+
93e4a880d5SShreyansh Jain                 .                         |   |<enqueue,         .
94e4a880d5SShreyansh Jain                .                          |   | dequeue>         .
95e4a880d5SShreyansh Jain               .                           |   |                  .
96e4a880d5SShreyansh Jain              .                        +---+---V----+             .
97e4a880d5SShreyansh Jain             .      . . . . . . . . . .: Portal drv :             .
98e4a880d5SShreyansh Jain            .      .                   :            :             .
99e4a880d5SShreyansh Jain           .      .                    +-----+------+             .
100e4a880d5SShreyansh Jain          .      .                     :   QMAN     :             .
101e4a880d5SShreyansh Jain         .      .                      :  Driver    :             .
102e4a880d5SShreyansh Jain    +----+------+-------+              +-----+------+             .
103e4a880d5SShreyansh Jain    |   DPDK DPAA Bus   |                    |                    .
104e4a880d5SShreyansh Jain    |   driver          |....................|.....................
105e4a880d5SShreyansh Jain    |   /bus/dpaa       |                    |
106e4a880d5SShreyansh Jain    +-------------------+                    |
107e4a880d5SShreyansh Jain                                             |
108e4a880d5SShreyansh Jain    ========================== HARDWARE =====|========================
109e4a880d5SShreyansh Jain                                            PHY
110e4a880d5SShreyansh Jain    =========================================|========================
111e4a880d5SShreyansh Jain
112e4a880d5SShreyansh JainIn the above representation, solid lines represent components which interface
113e4a880d5SShreyansh Jainwith DPDK RTE Framework and dotted lines represent DPAA internal components.
114e4a880d5SShreyansh Jain
115e4a880d5SShreyansh JainDPAA Bus driver
116e4a880d5SShreyansh Jain~~~~~~~~~~~~~~~
117e4a880d5SShreyansh Jain
118e4a880d5SShreyansh JainThe DPAA bus driver is a ``rte_bus`` driver which scans the platform like bus.
119e4a880d5SShreyansh JainKey functions include:
120e4a880d5SShreyansh Jain
121e4a880d5SShreyansh Jain- Scanning and parsing the various objects and adding them to their respective
122e4a880d5SShreyansh Jain  device list.
123e4a880d5SShreyansh Jain- Performing probe for available drivers against each scanned device
124e4a880d5SShreyansh Jain- Creating necessary ethernet instance before passing control to the PMD
125e4a880d5SShreyansh Jain
126e4a880d5SShreyansh JainDPAA NIC Driver (PMD)
127e4a880d5SShreyansh Jain~~~~~~~~~~~~~~~~~~~~~
128e4a880d5SShreyansh Jain
129e4a880d5SShreyansh JainDPAA PMD is traditional DPDK PMD which provides necessary interface between
130e4a880d5SShreyansh JainRTE framework and DPAA internal components/drivers.
131e4a880d5SShreyansh Jain
132e4a880d5SShreyansh Jain- Once devices have been identified by DPAA Bus, each device is associated
133e4a880d5SShreyansh Jain  with the PMD
134e4a880d5SShreyansh Jain- PMD is responsible for implementing necessary glue layer between RTE APIs
135e4a880d5SShreyansh Jain  and lower level QMan and FMan blocks.
136e4a880d5SShreyansh Jain  The Ethernet driver is bound to a FMAN port and implements the interfaces
137e4a880d5SShreyansh Jain  needed to connect the DPAA network interface to the network stack.
138e4a880d5SShreyansh Jain  Each FMAN Port corresponds to a DPDK network interface.
139*7e5f49aeSRohit Raj- PMD also support OH/ONIC mode, where the port works as a HW assisted virtual port
140a0edbb8aSRohit Raj  without actually connecting to a Physical MAC.
141e4a880d5SShreyansh Jain
142e4a880d5SShreyansh Jain
143e4a880d5SShreyansh JainFeatures
144e4a880d5SShreyansh Jain^^^^^^^^
145e4a880d5SShreyansh Jain
146e4a880d5SShreyansh Jain  Features of the DPAA PMD are:
147e4a880d5SShreyansh Jain
148e4a880d5SShreyansh Jain  - Multiple queues for TX and RX
149e4a880d5SShreyansh Jain  - Receive Side Scaling (RSS)
150e4a880d5SShreyansh Jain  - Packet type information
151e4a880d5SShreyansh Jain  - Checksum offload
152e4a880d5SShreyansh Jain  - Promiscuous mode
15373585446SVanshika Shukla  - IEEE1588 PTP
154a0edbb8aSRohit Raj  - OH Port for inter application communication
155*7e5f49aeSRohit Raj  - ONIC virtual port support
156a0edbb8aSRohit Raj
157e4a880d5SShreyansh Jain
158e4a880d5SShreyansh JainDPAA Mempool Driver
159e4a880d5SShreyansh Jain~~~~~~~~~~~~~~~~~~~
160e4a880d5SShreyansh Jain
161e4a880d5SShreyansh JainDPAA has a hardware offloaded buffer pool manager, called BMan, or Buffer
162e4a880d5SShreyansh JainManager.
163e4a880d5SShreyansh Jain
164e4a880d5SShreyansh Jain- Using standard Mempools operations RTE API, the mempool driver interfaces
165e4a880d5SShreyansh Jain  with RTE to service each mempool creation, deletion, buffer allocation and
166e4a880d5SShreyansh Jain  deallocation requests.
167e4a880d5SShreyansh Jain- Each FMAN instance has a BMan pool attached to it during initialization.
168e4a880d5SShreyansh Jain  Each Tx frame can be automatically released by hardware, if allocated from
169e4a880d5SShreyansh Jain  this pool.
170e4a880d5SShreyansh Jain
171e4a880d5SShreyansh Jain
172db27370bSStephen HemmingerAllowing & Blocking
173db27370bSStephen Hemminger-------------------
1746e075220SHemant Agrawal
175db27370bSStephen HemmingerFor blocking a DPAA device, following commands can be used.
1766e075220SHemant Agrawal
1776e075220SHemant Agrawal .. code-block:: console
1786e075220SHemant Agrawal
1796e075220SHemant Agrawal    <dpdk app> <EAL args> -b "dpaa_bus:fmX-macY" -- ...
1806e075220SHemant Agrawal    e.g. "dpaa_bus:fm1-mac4"
1816e075220SHemant Agrawal
182e4a880d5SShreyansh JainSupported DPAA SoCs
183e4a880d5SShreyansh Jain-------------------
184e4a880d5SShreyansh Jain
185e4a880d5SShreyansh Jain- LS1043A/LS1023A
186e4a880d5SShreyansh Jain- LS1046A/LS1026A
187e4a880d5SShreyansh Jain
188e4a880d5SShreyansh JainPrerequisites
189e4a880d5SShreyansh Jain-------------
190e4a880d5SShreyansh Jain
191ceccf8dcSHemant AgrawalSee :doc:`../platform/dpaa` for setup information
192e4a880d5SShreyansh Jain
193e4a880d5SShreyansh Jain
194e4a880d5SShreyansh Jain- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>`
195e4a880d5SShreyansh Jain  to setup the basic DPDK environment.
196afda3432SGagandeep Singh- DPAA driver has dependency on kernel to perform various functionalities.
197afda3432SGagandeep Singh  So kernel and DPDK version should be compatible for proper working.
198afda3432SGagandeep Singh  Refer release notes of NXP SDK guide to match the versions `NXP LSDK GUIDE
199afda3432SGagandeep Singh  <https://www.nxp.com/design/software/embedded-software/linux-software-and-development-tools/layerscape-software-development-kit-v21-08:LAYERSCAPE-SDK>`_.
200e4a880d5SShreyansh Jain
201e4a880d5SShreyansh Jain.. note::
202e4a880d5SShreyansh Jain
203e4a880d5SShreyansh Jain   Some part of dpaa bus code (qbman and fman - library) routines are
204f4be2da0SHemant Agrawal   dual licensed (BSD & GPLv2), however they are used as BSD in DPDK in userspace.
205e4a880d5SShreyansh Jain
206b583b9a1SFerruh YigitConfiguration
207b583b9a1SFerruh Yigit-------------
208e4a880d5SShreyansh Jain
209e4a880d5SShreyansh JainEnvironment Variables
210e4a880d5SShreyansh Jain~~~~~~~~~~~~~~~~~~~~~
211e4a880d5SShreyansh Jain
212e4a880d5SShreyansh JainDPAA drivers uses the following environment variables to configure its
213e4a880d5SShreyansh Jainstate during application initialization:
214e4a880d5SShreyansh Jain
215e4a880d5SShreyansh Jain- ``DPAA_NUM_RX_QUEUES`` (default 1)
216e4a880d5SShreyansh Jain
217e4a880d5SShreyansh Jain  This defines the number of Rx queues configured for an application, per
218e4a880d5SShreyansh Jain  port. Hardware would distribute across these many number of queues on Rx
219e4a880d5SShreyansh Jain  of packets.
220e4a880d5SShreyansh Jain  In case the application is configured to use lesser number of queues than
221e4a880d5SShreyansh Jain  configured above, it might result in packet loss (because of distribution).
222e4a880d5SShreyansh Jain
2230c504f69SHemant Agrawal- ``DPAA_PUSH_QUEUES_NUMBER`` (default 4)
2240c504f69SHemant Agrawal
2250c504f69SHemant Agrawal  This defines the number of High performance queues to be used for ethdev Rx.
2260c504f69SHemant Agrawal  These queues use one private HW portal per queue configured, so they are
2270c504f69SHemant Agrawal  limited in the system. The first configured ethdev queues will be
2280c504f69SHemant Agrawal  automatically be assigned from the these high perf PUSH queues. Any queue
2290c504f69SHemant Agrawal  configuration beyond that will be standard Rx queues. The application can
2300c504f69SHemant Agrawal  choose to change their number if HW portals are limited.
231d629b7b5SJohn McNamara  The valid values are from '0' to '4'. The values shall be set to '0' if the
2320c504f69SHemant Agrawal  application want to use eventdev with DPAA device.
233b2702df2SHemant Agrawal  Currently these queues are not used for LS1023/LS1043 platform by default.
2340c504f69SHemant Agrawal
235480ec5b4SHemant Agrawal- ``DPAA_DISPLAY_FRAME_AND_PARSER_RESULT`` (default 0)
236480ec5b4SHemant Agrawal
237480ec5b4SHemant Agrawal  This defines the debug flag, whether to dump the detailed frame
238480ec5b4SHemant Agrawal  and packet parsing result for the incoming packets.
239480ec5b4SHemant Agrawal
240e4a880d5SShreyansh Jain
241e4a880d5SShreyansh JainDriver compilation and testing
242e4a880d5SShreyansh Jain------------------------------
243e4a880d5SShreyansh Jain
244e4a880d5SShreyansh JainRefer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
245e4a880d5SShreyansh Jainfor details.
246e4a880d5SShreyansh Jain
247e4a880d5SShreyansh Jain#. Running testpmd:
248e4a880d5SShreyansh Jain
249e4a880d5SShreyansh Jain   Follow instructions available in the document
250e4a880d5SShreyansh Jain   :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
251e4a880d5SShreyansh Jain   to run testpmd.
252e4a880d5SShreyansh Jain
253e4a880d5SShreyansh Jain   Example output:
254e4a880d5SShreyansh Jain
255e4a880d5SShreyansh Jain   .. code-block:: console
256e4a880d5SShreyansh Jain
25768d99d00SCiara Power      ./<build_dir>/app/dpdk-testpmd -c 0xff -n 1 \
258e4a880d5SShreyansh Jain        -- -i --portmask=0x3 --nb-cores=1 --no-flush-rx
259e4a880d5SShreyansh Jain
260e4a880d5SShreyansh Jain      .....
261e4a880d5SShreyansh Jain      EAL: Registered [pci] bus.
262e4a880d5SShreyansh Jain      EAL: Registered [dpaa] bus.
263e4a880d5SShreyansh Jain      EAL: Detected 4 lcore(s)
264e4a880d5SShreyansh Jain      .....
265e4a880d5SShreyansh Jain      EAL: dpaa: Bus scan completed
266e4a880d5SShreyansh Jain      .....
267e4a880d5SShreyansh Jain      Configuring Port 0 (socket 0)
268e4a880d5SShreyansh Jain      Port 0: 00:00:00:00:00:01
269e4a880d5SShreyansh Jain      Configuring Port 1 (socket 0)
270e4a880d5SShreyansh Jain      Port 1: 00:00:00:00:00:02
271e4a880d5SShreyansh Jain      .....
272e4a880d5SShreyansh Jain      Checking link statuses...
273e4a880d5SShreyansh Jain      Port 0 Link Up - speed 10000 Mbps - full-duplex
274e4a880d5SShreyansh Jain      Port 1 Link Up - speed 10000 Mbps - full-duplex
275e4a880d5SShreyansh Jain      Done
276e4a880d5SShreyansh Jain      testpmd>
277e4a880d5SShreyansh Jain
27858e0420fSVanshika Shukla* Use dev arg option ``drv_ieee1588=1`` to enable IEEE 1588 support
27958e0420fSVanshika Shukla  at driver level, e.g. ``dpaa:fm1-mac3,drv_ieee1588=1``.
28058e0420fSVanshika Shukla
2812ffc1057SHemant AgrawalFMAN Config
2822ffc1057SHemant Agrawal-----------
2832ffc1057SHemant Agrawal
2842ffc1057SHemant AgrawalFrame Manager is also responsible for parser, classify and distribute
2852ffc1057SHemant Agrawalfunctionality in the DPAA.
2862ffc1057SHemant Agrawal
2872ffc1057SHemant Agrawal   FMAN supports:
2882ffc1057SHemant Agrawal   Packet parsing at wire speed. It supports standard protocols parsing and
2892ffc1057SHemant Agrawal   identification by HW (VLAN/IP/UDP/TCP/SCTP/PPPoE/PPP/MPLS/GRE/IPSec).
2902ffc1057SHemant Agrawal   It supports non-standard UDF header parsing for custom protocols.
2912ffc1057SHemant Agrawal   Classification / Distribution: Coarse classification based on Key generation
2922ffc1057SHemant Agrawal   Hash and exact match lookup
2932ffc1057SHemant Agrawal
2942ffc1057SHemant AgrawalFMC - FMAN Configuration Tool
2952ffc1057SHemant Agrawal~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2962ffc1057SHemant Agrawal   This tool is available in User Space. The tool is used to configure FMAN
2972ffc1057SHemant Agrawal   Physical (MAC) or Ephemeral (OH)ports for Parse/Classify/distribute.
2982ffc1057SHemant Agrawal   The PCDs can be hash based where a set of fields are key input for hash
2992ffc1057SHemant Agrawal   generation within FMAN keygen. The hash value is used to generate a FQID for
3002ffc1057SHemant Agrawal   frame. There is a provision to setup exact match lookup too where field
3012ffc1057SHemant Agrawal   values within a packet drives corresponding FQID.
3022ffc1057SHemant Agrawal   Currently it works on XML file inputs.
3032ffc1057SHemant Agrawal
3042ffc1057SHemant Agrawal   Limitations:
3052ffc1057SHemant Agrawal   1.For Dynamic Configuration change, currently no support is available.
3062ffc1057SHemant Agrawal   E.g. enable/disable a port, a operator (set of VLANs and associate rules).
3072ffc1057SHemant Agrawal
3082ffc1057SHemant Agrawal   2.During FMC configuration, port for which policy is being configured is
3092ffc1057SHemant Agrawal   brought down and the policy is flushed on port before new policy is updated
3102ffc1057SHemant Agrawal   for the port. Support is required to add/append/delete etc.
3112ffc1057SHemant Agrawal
3122ffc1057SHemant Agrawal   3.FMC, being a separate user-space application, needs to be invoked from
3132ffc1057SHemant Agrawal   Shell.
3142ffc1057SHemant Agrawal
3152ffc1057SHemant Agrawal
3162ffc1057SHemant Agrawal   The details can be found in FMC Doc at:
3179c30a6f3SHenry Nadeau   `Frame Manager Configuration Tool <https://www.nxp.com/docs/en/application-note/AN4760.pdf>`_.
3182ffc1057SHemant Agrawal
3192ffc1057SHemant AgrawalFMLIB
3202ffc1057SHemant Agrawal~~~~~
3212ffc1057SHemant Agrawal   The Frame Manager library provides an API on top of the Frame Manager driver
3222ffc1057SHemant Agrawal   ioctl calls, that provides a user space application with a simple way to
3232ffc1057SHemant Agrawal   configure driver parameters and PCD (parse - classify - distribute) rules.
3242ffc1057SHemant Agrawal
3252ffc1057SHemant Agrawal   This is an alternate to the FMC based configuration. This library provides
3262ffc1057SHemant Agrawal   direct ioctl based interfaces for FMAN configuration as used by the FMC tool
3279c30a6f3SHenry Nadeau   as well. This helps in overcoming the main limitation of FMC - i.e. lack
3282ffc1057SHemant Agrawal   of dynamic configuration.
3292ffc1057SHemant Agrawal
3302ffc1057SHemant Agrawal   The location for the fmd driver as used by FMLIB and FMC is as follows:
3312ffc1057SHemant Agrawal   `Kernel FMD Driver
3322ffc1057SHemant Agrawal   <https://source.codeaurora.org/external/qoriq/qoriq-components/linux/tree/drivers/net/ethernet/freescale/sdk_fman?h=linux-4.19-rt>`_.
3332ffc1057SHemant Agrawal
334a0edbb8aSRohit RajOH Port
335a0edbb8aSRohit Raj~~~~~~~
336a0edbb8aSRohit Raj   Offline(O/H) port is a type of hardware port
337a0edbb8aSRohit Raj   which is able to dequeue and enqueue from/to a QMan queue.
338a0edbb8aSRohit Raj   The FMan applies a Parse Classify Distribute (PCD) flow
339a0edbb8aSRohit Raj   and (if configured to do so) enqueues the frame back in a QMan queue.
340a0edbb8aSRohit Raj
341a0edbb8aSRohit Raj   The FMan is able to copy the frame into new buffers and enqueue back to the QMan.
342a0edbb8aSRohit Raj   This means these ports can be used to send and receive packets
343a0edbb8aSRohit Raj   between two applications as well.
344a0edbb8aSRohit Raj
345a0edbb8aSRohit Raj   An O/H port have two queues.
346a0edbb8aSRohit Raj   One to receive and one to send the packets.
347a0edbb8aSRohit Raj   It will loopback all the packets on Tx queue which are received on Rx queue.
348a0edbb8aSRohit Raj
349a0edbb8aSRohit Raj
350a0edbb8aSRohit Raj		--------      Tx Packets      ---------
351a0edbb8aSRohit Raj		| App  | - -  - - - - - - - > | O/H   |
352a0edbb8aSRohit Raj		|      | < - - - - - - - - -  | Port  |
353a0edbb8aSRohit Raj		--------      Rx Packets      ---------
354a0edbb8aSRohit Raj
355a0edbb8aSRohit Raj
356*7e5f49aeSRohit RajONIC
357*7e5f49aeSRohit Raj~~~~
358*7e5f49aeSRohit Raj   To use OH port to communicate between two applications,
359*7e5f49aeSRohit Raj   we can assign Rx port of an O/H port to Application 1
360*7e5f49aeSRohit Raj   and Tx port to Application 2
361*7e5f49aeSRohit Raj   so that Application 1 can send packets to Application 2.
362*7e5f49aeSRohit Raj   Similarly, we can assign Tx port of another O/H port to Application 1
363*7e5f49aeSRohit Raj   and Rx port to Application 2
364*7e5f49aeSRohit Raj   so that Application 2 can send packets to Application 1.
365*7e5f49aeSRohit Raj
366*7e5f49aeSRohit Raj   ONIC is logically defined to achieve it.
367*7e5f49aeSRohit Raj   Internally it will use one Rx queue of an O/H port
368*7e5f49aeSRohit Raj   and one Tx queue of another O/H port.
369*7e5f49aeSRohit Raj   For application, it will behave as single O/H port.
370*7e5f49aeSRohit Raj
371*7e5f49aeSRohit Raj   +------+         +------+        +------+        +------+        +------+
372*7e5f49aeSRohit Raj   |      |   Tx    |      |   Rx   | O/H  |   Tx   |      |   Rx   |      |
373*7e5f49aeSRohit Raj   |      | - - - > |      | -  - > | Port | -  - > |      | -  - > |      |
374*7e5f49aeSRohit Raj   |      |         |      |        |  1   |        |      |        |      |
375*7e5f49aeSRohit Raj   |      |         |      |        +------+        |      |        |      |
376*7e5f49aeSRohit Raj   | App  |         | ONIC |                        | ONIC |        | App  |
377*7e5f49aeSRohit Raj   |  1   |         | Port |                        | Port |        |  2   |
378*7e5f49aeSRohit Raj   |      |         |  1   |        +------+        |  2   |        |      |
379*7e5f49aeSRohit Raj   |      |   Rx    |      |   Tx   | O/H  |   Rx   |      |   Tx   |      |
380*7e5f49aeSRohit Raj   |      | < - - - |      | < - - -| Port | < - - -|      | < - - -|      |
381*7e5f49aeSRohit Raj   |      |         |      |        |  2   |        |      |        |      |
382*7e5f49aeSRohit Raj   +------+         +------+        +------+        +------+        +------+
383*7e5f49aeSRohit Raj
384*7e5f49aeSRohit Raj   All the packets received by ONIC port 1 will be send to ONIC port 2 and vice versa.
385*7e5f49aeSRohit Raj   These ports can be used by DPDK applications just like physical ports.
386*7e5f49aeSRohit Raj
387*7e5f49aeSRohit Raj
388663ff698SJun YangVSP (Virtual Storage Profile)
389663ff698SJun Yang~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
390663ff698SJun Yang   The storage profiled are means to provide virtualized interface. A ranges of
391663ff698SJun Yang   storage profiles cab be associated to Ethernet ports.
392663ff698SJun Yang   They are selected during classification. Specify how the frame should be
3939c30a6f3SHenry Nadeau   written to memory and which buffer pool to select for packet storage in
394663ff698SJun Yang   queues. Start and End margin of buffer can also be configured.
395663ff698SJun Yang
396e4a880d5SShreyansh JainLimitations
397e4a880d5SShreyansh Jain-----------
398e4a880d5SShreyansh Jain
399e4a880d5SShreyansh JainPlatform Requirement
400e4a880d5SShreyansh Jain~~~~~~~~~~~~~~~~~~~~
401e4a880d5SShreyansh Jain
402e4a880d5SShreyansh JainDPAA drivers for DPDK can only work on NXP SoCs as listed in the
403e4a880d5SShreyansh Jain``Supported DPAA SoCs``.
404e4a880d5SShreyansh Jain
405e4a880d5SShreyansh JainMaximum packet length
406e4a880d5SShreyansh Jain~~~~~~~~~~~~~~~~~~~~~
407e4a880d5SShreyansh Jain
408e4a880d5SShreyansh JainThe DPAA SoC family support a maximum of a 10240 jumbo frame. The value
4091bb4a528SFerruh Yigitis fixed and cannot be changed. So, even when the ``rxmode.mtu``
410e4a880d5SShreyansh Jainmember of ``struct rte_eth_conf`` is set to a value lower than 10240, frames
411e4a880d5SShreyansh Jainup to 10240 bytes can still reach the host interface.
412e4a880d5SShreyansh Jain
413e4a880d5SShreyansh JainMultiprocess Support
414e4a880d5SShreyansh Jain~~~~~~~~~~~~~~~~~~~~
415e4a880d5SShreyansh Jain
416e4a880d5SShreyansh JainCurrent version of DPAA driver doesn't support multi-process applications
417e4a880d5SShreyansh Jainwhere I/O is performed using secondary processes. This feature would be
418e4a880d5SShreyansh Jainimplemented in subsequent versions.
419