xref: /dpdk/doc/guides/cryptodevs/qat.rst (revision f43d3dbbd90c9e195d26d18ac7da9ca2854c3f1e)
1..  SPDX-License-Identifier: BSD-3-Clause
2    Copyright(c) 2015-2019 Intel Corporation.
3
4Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
5==================================================
6
7QAT documentation consists of three parts:
8
9* Details of the symmetric and asymmetric crypto services below.
10* Details of the :doc:`compression service <../compressdevs/qat_comp>`
11  in the compressdev drivers section.
12* Details of building the common QAT infrastructure and the PMDs to support the
13  above services. See :ref:`building_qat` below.
14
15
16Symmetric Crypto Service on QAT
17-------------------------------
18
19The QAT symmetric crypto PMD (hereafter referred to as `QAT SYM [PMD]`) provides
20poll mode crypto driver support for the following hardware accelerator devices:
21
22* ``Intel QuickAssist Technology DH895xCC``
23* ``Intel QuickAssist Technology C62x``
24* ``Intel QuickAssist Technology C3xxx``
25* ``Intel QuickAssist Technology D15xx``
26* ``Intel QuickAssist Technology C4xxx``
27
28
29Features
30~~~~~~~~
31
32The QAT SYM PMD has support for:
33
34Cipher algorithms:
35
36* ``RTE_CRYPTO_CIPHER_3DES_CBC``
37* ``RTE_CRYPTO_CIPHER_3DES_CTR``
38* ``RTE_CRYPTO_CIPHER_AES128_CBC``
39* ``RTE_CRYPTO_CIPHER_AES192_CBC``
40* ``RTE_CRYPTO_CIPHER_AES256_CBC``
41* ``RTE_CRYPTO_CIPHER_AES128_CTR``
42* ``RTE_CRYPTO_CIPHER_AES192_CTR``
43* ``RTE_CRYPTO_CIPHER_AES256_CTR``
44* ``RTE_CRYPTO_CIPHER_AES_XTS``
45* ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
46* ``RTE_CRYPTO_CIPHER_NULL``
47* ``RTE_CRYPTO_CIPHER_KASUMI_F8``
48* ``RTE_CRYPTO_CIPHER_DES_CBC``
49* ``RTE_CRYPTO_CIPHER_AES_DOCSISBPI``
50* ``RTE_CRYPTO_CIPHER_DES_DOCSISBPI``
51* ``RTE_CRYPTO_CIPHER_ZUC_EEA3``
52
53Hash algorithms:
54
55* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
56* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
57* ``RTE_CRYPTO_AUTH_SHA256_HMAC``
58* ``RTE_CRYPTO_AUTH_SHA384_HMAC``
59* ``RTE_CRYPTO_AUTH_SHA512_HMAC``
60* ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
61* ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
62* ``RTE_CRYPTO_AUTH_MD5_HMAC``
63* ``RTE_CRYPTO_AUTH_NULL``
64* ``RTE_CRYPTO_AUTH_KASUMI_F9``
65* ``RTE_CRYPTO_AUTH_AES_GMAC``
66* ``RTE_CRYPTO_AUTH_ZUC_EIA3``
67* ``RTE_CRYPTO_AUTH_AES_CMAC``
68
69Supported AEAD algorithms:
70
71* ``RTE_CRYPTO_AEAD_AES_GCM``
72* ``RTE_CRYPTO_AEAD_AES_CCM``
73
74
75Limitations
76~~~~~~~~~~~
77
78* Only supports the session-oriented API implementation (session-less APIs are not supported).
79* SNOW 3G (UEA2), KASUMI (F8) and ZUC (EEA3) supported only if cipher length and offset fields are byte-multiple.
80* SNOW 3G (UIA2) and ZUC (EIA3) supported only if hash length and offset fields are byte-multiple.
81* No BSD support as BSD QAT kernel driver not available.
82* ZUC EEA3/EIA3 is not supported by dh895xcc devices
83* Maximum additional authenticated data (AAD) for GCM is 240 bytes long and must be passed to the device in a buffer rounded up to the nearest block-size multiple (x16) and padded with zeros.
84* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
85* A GCM limitation exists, but only in the case where there are multiple
86  generations of QAT devices on a single platform.
87  To optimise performance, the GCM crypto session should be initialised for the
88  device generation to which the ops will be enqueued. Specifically if a GCM
89  session is initialised on a GEN2 device, but then attached to an op enqueued
90  to a GEN3 device, it will work but cannot take advantage of hardware
91  optimisations in the GEN3 device. And if a GCM session is initialised on a
92  GEN3 device, then attached to an op sent to a GEN1/GEN2 device, it will not be
93  enqueued to the device and will be marked as failed. The simplest way to
94  mitigate this is to use the bdf whitelist to avoid mixing devices of different
95  generations in the same process if planning to use for GCM.
96
97Extra notes on KASUMI F9
98~~~~~~~~~~~~~~~~~~~~~~~~
99
100When using KASUMI F9 authentication algorithm, the input buffer must be
101constructed according to the
102`3GPP KASUMI specification <http://cryptome.org/3gpp/35201-900.pdf>`_
103(section 4.4, page 13). The input buffer has to have COUNT (4 bytes),
104FRESH (4 bytes), MESSAGE and DIRECTION (1 bit) concatenated. After the DIRECTION
105bit, a single '1' bit is appended, followed by between 0 and 7 '0' bits, so that
106the total length of the buffer is multiple of 8 bits. Note that the actual
107message can be any length, specified in bits.
108
109Once this buffer is passed this way, when creating the crypto operation,
110length of data to authenticate "op.sym.auth.data.length" must be the length
111of all the items described above, including the padding at the end.
112Also, offset of data to authenticate "op.sym.auth.data.offset"
113must be such that points at the start of the COUNT bytes.
114
115Asymmetric Crypto Service on QAT
116--------------------------------
117
118The QAT asymmetric crypto PMD (hereafter referred to as `QAT ASYM [PMD]`) provides
119poll mode crypto driver support for the following hardware accelerator devices:
120
121* ``Intel QuickAssist Technology DH895xCC``
122* ``Intel QuickAssist Technology C62x``
123* ``Intel QuickAssist Technology C3xxx``
124* ``Intel QuickAssist Technology D15xx``
125* ``Intel QuickAssist Technology C4xxx``
126
127The QAT ASYM PMD has support for:
128
129* ``RTE_CRYPTO_ASYM_XFORM_MODEX``
130* ``RTE_CRYPTO_ASYM_XFORM_MODINV``
131
132Limitations
133~~~~~~~~~~~
134
135* Big integers longer than 4096 bits are not supported.
136* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
137* RSA-2560, RSA-3584 are not supported
138
139.. _building_qat:
140
141Building PMDs on QAT
142--------------------
143
144A QAT device can host multiple acceleration services:
145
146* symmetric cryptography
147* data compression
148* asymmetric cryptography
149
150These services are provided to DPDK applications via PMDs which register to
151implement the corresponding cryptodev and compressdev APIs. The PMDs use
152common QAT driver code which manages the QAT PCI device. They also depend on a
153QAT kernel driver being installed on the platform, see :ref:`qat_kernel` below.
154
155
156Configuring and Building the DPDK QAT PMDs
157~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
158
159
160Further information on configuring, building and installing DPDK is described
161:doc:`here <../linux_gsg/build_dpdk>`.
162
163
164Quick instructions for QAT cryptodev PMD are as follows:
165
166.. code-block:: console
167
168	cd to the top-level DPDK directory
169	make defconfig
170	sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\)=n,\1=y,' build/.config
171	or/and
172	sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_ASYM\)=n,\1=y,' build/.config
173	make
174
175Quick instructions for QAT compressdev PMD are as follows:
176
177.. code-block:: console
178
179	cd to the top-level DPDK directory
180	make defconfig
181	make
182
183
184.. _building_qat_config:
185
186Build Configuration
187~~~~~~~~~~~~~~~~~~~
188
189These are the build configuration options affecting QAT, and their default values:
190
191.. code-block:: console
192
193	CONFIG_RTE_LIBRTE_PMD_QAT=y
194	CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
195	CONFIG_RTE_LIBRTE_PMD_QAT_ASYM=n
196	CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
197	CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
198
199CONFIG_RTE_LIBRTE_PMD_QAT must be enabled for any QAT PMD to be built.
200
201Both QAT SYM PMD and QAT ASYM PMD have an external dependency on libcrypto, so are not
202built by default. CONFIG_RTE_LIBRTE_PMD_QAT_SYM/ASYM should be enabled to build them.
203
204The QAT compressdev PMD has no external dependencies, so needs no configuration
205options and is built by default.
206
207The number of VFs per PF varies - see table below. If multiple QAT packages are
208installed on a platform then CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES should be
209adjusted to the number of VFs which the QAT common code will need to handle.
210
211.. Note::
212
213        There are separate config items (not QAT-specific) for max cryptodevs
214        CONFIG_RTE_CRYPTO_MAX_DEVS and max compressdevs CONFIG_RTE_COMPRESS_MAX_DEVS,
215        if necessary these should be adjusted to handle the total of QAT and other
216        devices which the process will use. In particular for crypto, where each
217        QAT VF may expose two crypto devices, sym and asym, it may happen that the
218        number of devices will be bigger than MAX_DEVS and the process will show an error
219        during PMD initialisation. To avoid this problem CONFIG_RTE_CRYPTO_MAX_DEVS may be
220        increased or -w, pci-whitelist domain:bus:devid:func option may be used.
221
222
223QAT compression PMD needs intermediate buffers to support Deflate compression
224with Dynamic Huffman encoding. CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE
225specifies the size of a single buffer, the PMD will allocate a multiple of these,
226plus some extra space for associated meta-data. For GEN2 devices, 20 buffers are
227allocated while for GEN1 devices, 12 buffers are allocated, plus 1472 bytes overhead.
228
229.. Note::
230
231	If the compressed output of a Deflate operation using Dynamic Huffman
232        Encoding is too big to fit in an intermediate buffer, then the
233	operation will fall back to fixed compression rather than failing the operation.
234	To avoid this less performant case, applications should configure
235	the intermediate buffer size to be larger than the expected input data size
236	(compressed output size is usually unknown, so the only option is to make
237	larger than the input size).
238
239
240Device and driver naming
241~~~~~~~~~~~~~~~~~~~~~~~~
242
243* The qat cryptodev symmetric crypto driver name is "crypto_qat".
244* The qat cryptodev asymmetric crypto driver name is "crypto_qat_asym".
245
246The "rte_cryptodev_devices_get()" returns the devices exposed by either of these drivers.
247
248* Each qat sym crypto device has a unique name, in format
249  "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_sym".
250* Each qat asym crypto device has a unique name, in format
251  "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_asym".
252  This name can be passed to "rte_cryptodev_get_dev_id()" to get the device_id.
253
254.. Note::
255
256	The cryptodev driver name is passed to the dpdk-test-crypto-perf tool in the "-devtype" parameter.
257
258	The qat crypto device name is in the format of the slave parameter passed to the crypto scheduler.
259
260* The qat compressdev driver name is "compress_qat".
261  The rte_compressdev_devices_get() returns the devices exposed by this driver.
262
263* Each qat compression device has a unique name, in format
264  <pci bdf>_<service>, e.g. "0000:41:01.0_qat_comp".
265  This name can be passed to rte_compressdev_get_dev_id() to get the device_id.
266
267.. _qat_kernel:
268
269Dependency on the QAT kernel driver
270~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
271
272To use QAT an SRIOV-enabled QAT kernel driver is required. The VF
273devices created and initialised by this driver will be used by the QAT PMDs.
274
275Instructions for installation are below, but first an explanation of the
276relationships between the PF/VF devices and the PMDs visible to
277DPDK applications.
278
279Each QuickAssist PF device exposes a number of VF devices. Each VF device can
280enable one symmetric cryptodev PMD and/or one asymmetric cryptodev PMD and/or
281one compressdev PMD.
282These QAT PMDs share the same underlying device and pci-mgmt code, but are
283enumerated independently on their respective APIs and appear as independent
284devices to applications.
285
286.. Note::
287
288   Each VF can only be used by one DPDK process. It is not possible to share
289   the same VF across multiple processes, even if these processes are using
290   different acceleration services.
291
292   Conversely one DPDK process can use one or more QAT VFs and can expose both
293   cryptodev and compressdev instances on each of those VFs.
294
295
296Available kernel drivers
297~~~~~~~~~~~~~~~~~~~~~~~~
298
299Kernel drivers for each device for each service are listed in the following table. (Scroll right
300to see the full table)
301
302
303.. _table_qat_pmds_drivers:
304
305.. table:: QAT device generations, devices and drivers
306
307   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
308   | S   | A   | C   | Gen | Device   | Driver/ver    | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF |
309   +=====+=====+=====+=====+==========+===============+===============+============+========+======+========+========+
310   | Yes | No  | No  | 1   | DH895xCC | linux/4.4+    | qat_dh895xcc  | dh895xcc   | 435    | 1    | 443    | 32     |
311   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
312   | Yes | Yes | No  | "   | "        | 01.org/4.2.0+ | "             | "          | "      | "    | "      | "      |
313   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
314   | Yes | Yes | Yes | "   | "        | 01.org/4.3.0+ | "             | "          | "      | "    | "      | "      |
315   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
316   | Yes | No  | No  | 2   | C62x     | linux/4.5+    | qat_c62x      | c6xx       | 37c8   | 3    | 37c9   | 16     |
317   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
318   | Yes | Yes | Yes | "   | "        | 01.org/4.2.0+ | "             | "          | "      | "    | "      | "      |
319   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
320   | Yes | No  | No  | 2   | C3xxx    | linux/4.5+    | qat_c3xxx     | c3xxx      | 19e2   | 1    | 19e3   | 16     |
321   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
322   | Yes | Yes | Yes | "   | "        | 01.org/4.2.0+ | "             | "          | "      | "    | "      | "      |
323   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
324   | Yes | No  | No  | 2   | D15xx    | p             | qat_d15xx     | d15xx      | 6f54   | 1    | 6f55   | 16     |
325   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
326   | Yes | No  | No  | 3   | C4xxx    | p             | qat_c4xxx     | c4xxx      | 18a0   | 1    | 18a1   | 128    |
327   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
328
329The first 3 columns indicate the service:
330
331* S = Symmetric crypto service (via cryptodev API)
332* A = Asymmetric crypto service  (via cryptodev API)
333* C = Compression service (via compressdev API)
334
335The ``Driver`` column indicates either the Linux kernel version in which
336support for this device was introduced or a driver available on Intel's 01.org
337website. There are both linux in-tree and 01.org kernel drivers available for some
338devices. p = release pending.
339
340If you are running on a kernel which includes a driver for your device, see
341`Installation using kernel.org driver`_ below. Otherwise see
342`Installation using 01.org QAT driver`_.
343
344
345Installation using kernel.org driver
346~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
347
348The examples below are based on the C62x device, if you have a different device
349use the corresponding values in the above table.
350
351In BIOS ensure that SRIOV is enabled and either:
352
353* Disable VT-d or
354* Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
355
356Check that the QAT driver is loaded on your system, by executing::
357
358    lsmod | grep qa
359
360You should see the kernel module for your device listed, e.g.::
361
362    qat_c62x               5626  0
363    intel_qat              82336  1 qat_c62x
364
365Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
366
367First find the BDFs (Bus-Device-Function) of the physical functions (PFs) of
368your device, e.g.::
369
370    lspci -d:37c8
371
372You should see output similar to::
373
374    1a:00.0 Co-processor: Intel Corporation Device 37c8
375    3d:00.0 Co-processor: Intel Corporation Device 37c8
376    3f:00.0 Co-processor: Intel Corporation Device 37c8
377
378Enable the VFs for each PF by echoing the number of VFs per PF to the pci driver::
379
380     echo 16 > /sys/bus/pci/drivers/c6xx/0000:1a:00.0/sriov_numvfs
381     echo 16 > /sys/bus/pci/drivers/c6xx/0000:3d:00.0/sriov_numvfs
382     echo 16 > /sys/bus/pci/drivers/c6xx/0000:3f:00.0/sriov_numvfs
383
384Check that the VFs are available for use. For example ``lspci -d:37c9`` should
385list 48 VF devices available for a ``C62x`` device.
386
387To complete the installation follow the instructions in
388`Binding the available VFs to the DPDK UIO driver`_.
389
390.. Note::
391
392   If the QAT kernel modules are not loaded and you see an error like ``Failed
393   to load MMP firmware qat_895xcc_mmp.bin`` in kernel logs, this may be as a
394   result of not using a distribution, but just updating the kernel directly.
395
396   Download firmware from the `kernel firmware repo
397   <http://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/>`_.
398
399   Copy qat binaries to ``/lib/firmware``::
400
401      cp qat_895xcc.bin /lib/firmware
402      cp qat_895xcc_mmp.bin /lib/firmware
403
404   Change to your linux source root directory and start the qat kernel modules::
405
406      insmod ./drivers/crypto/qat/qat_common/intel_qat.ko
407      insmod ./drivers/crypto/qat/qat_dh895xcc/qat_dh895xcc.ko
408
409
410.. Note::
411
412   If you see the following warning in ``/var/log/messages`` it can be ignored:
413   ``IOMMU should be enabled for SR-IOV to work correctly``.
414
415
416Installation using 01.org QAT driver
417~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
418
419Download the latest QuickAssist Technology Driver from `01.org
420<https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_.
421Consult the *Getting Started Guide* at the same URL for further information.
422
423The steps below assume you are:
424
425* Building on a platform with one ``C62x`` device.
426* Using package ``qat1.7.l.4.2.0-000xx.tar.gz``.
427* On Fedora26 kernel ``4.11.11-300.fc26.x86_64``.
428
429In the BIOS ensure that SRIOV is enabled and VT-d is disabled.
430
431Uninstall any existing QAT driver, for example by running:
432
433* ``./installer.sh uninstall`` in the directory where originally installed.
434
435
436Build and install the SRIOV-enabled QAT driver::
437
438    mkdir /QAT
439    cd /QAT
440
441    # Copy the package to this location and unpack
442    tar zxof qat1.7.l.4.2.0-000xx.tar.gz
443
444    ./configure --enable-icp-sriov=host
445    make install
446
447You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0.
448You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF.
449
450Confirm the driver is correctly installed and is using firmware version 4.2.0::
451
452    cat /sys/kernel/debug/qat<your device type and bdf>/version/fw
453
454
455Confirm the presence of 48 VF devices - 16 per PF::
456
457    lspci -d:37c9
458
459
460To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
461
462.. Note::
463
464   If using a later kernel and the build fails with an error relating to
465   ``strict_stroul`` not being available apply the following patch:
466
467   .. code-block:: diff
468
469      /QAT/QAT1.6/quickassist/utilities/downloader/Target_CoreLibs/uclo/include/linux/uclo_platform.h
470      + #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,5)
471      + #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (kstrtoul((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
472      + #else
473      #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)
474      #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (strict_strtoull((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
475      #else
476      #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
477      #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; strict_strtoll((str), (base), (num));}
478      #else
479      #define STR_TO_64(str, base, num, endPtr)                                 \
480           do {                                                               \
481                 if (str[0] == '-')                                           \
482                 {                                                            \
483                      *(num) = -(simple_strtoull((str+1), &(endPtr), (base))); \
484                 }else {                                                      \
485                      *(num) = simple_strtoull((str), &(endPtr), (base));      \
486                 }                                                            \
487           } while(0)
488      + #endif
489      #endif
490      #endif
491
492
493.. Note::
494
495   If the build fails due to missing header files you may need to do following::
496
497      sudo yum install zlib-devel
498      sudo yum install openssl-devel
499      sudo yum install libudev-devel
500
501.. Note::
502
503   If the build or install fails due to mismatching kernel sources you may need to do the following::
504
505      sudo yum install kernel-headers-`uname -r`
506      sudo yum install kernel-src-`uname -r`
507      sudo yum install kernel-devel-`uname -r`
508
509
510Binding the available VFs to the DPDK UIO driver
511~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
512
513Unbind the VFs from the stock driver so they can be bound to the uio driver.
514
515For an Intel(R) QuickAssist Technology DH895xCC device
516^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
517
518The unbind command below assumes ``BDFs`` of ``03:01.00-03:04.07``, if your
519VFs are different adjust the unbind command below::
520
521    for device in $(seq 1 4); do \
522        for fn in $(seq 0 7); do \
523            echo -n 0000:03:0${device}.${fn} > \
524            /sys/bus/pci/devices/0000\:03\:0${device}.${fn}/driver/unbind; \
525        done; \
526    done
527
528For an Intel(R) QuickAssist Technology C62x device
529^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
530
531The unbind command below assumes ``BDFs`` of ``1a:01.00-1a:02.07``,
532``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``, if your VFs are different
533adjust the unbind command below::
534
535    for device in $(seq 1 2); do \
536        for fn in $(seq 0 7); do \
537            echo -n 0000:1a:0${device}.${fn} > \
538            /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
539
540            echo -n 0000:3d:0${device}.${fn} > \
541            /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
542
543            echo -n 0000:3f:0${device}.${fn} > \
544            /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
545        done; \
546    done
547
548For Intel(R) QuickAssist Technology C3xxx or D15xx device
549^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
550
551The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your
552VFs are different adjust the unbind command below::
553
554    for device in $(seq 1 2); do \
555        for fn in $(seq 0 7); do \
556            echo -n 0000:01:0${device}.${fn} > \
557            /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
558        done; \
559    done
560
561Bind to the DPDK uio driver
562^^^^^^^^^^^^^^^^^^^^^^^^^^^
563
564Install the DPDK igb_uio driver, bind the VF PCI Device id to it and use lspci
565to confirm the VF devices are now in use by igb_uio kernel driver,
566e.g. for the C62x device::
567
568    cd to the top-level DPDK directory
569    modprobe uio
570    insmod ./build/kmod/igb_uio.ko
571    echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
572    lspci -vvd:37c9
573
574
575Another way to bind the VFs to the DPDK UIO driver is by using the
576``dpdk-devbind.py`` script::
577
578    cd to the top-level DPDK directory
579    ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1
580
581Testing
582~~~~~~~
583
584QAT SYM crypto PMD can be tested by running the test application::
585
586    make defconfig
587    make -j
588    cd ./build/app
589    ./test -l1 -n1 -w <your qat bdf>
590    RTE>>cryptodev_qat_autotest
591
592QAT ASYM crypto PMD can be tested by running the test application::
593
594    make defconfig
595    make -j
596    cd ./build/app
597    ./test -l1 -n1 -w <your qat bdf>
598    RTE>>cryptodev_qat_asym_autotest
599
600QAT compression PMD can be tested by running the test application::
601
602    make defconfig
603    sed -i 's,\(CONFIG_RTE_COMPRESSDEV_TEST\)=n,\1=y,' build/.config
604    make -j
605    cd ./build/app
606    ./test -l1 -n1 -w <your qat bdf>
607    RTE>>compressdev_autotest
608
609
610Debugging
611~~~~~~~~~
612
613There are 2 sets of trace available via the dynamic logging feature:
614
615* pmd.qat_dp exposes trace on the data-path.
616* pmd.qat_general exposes all other trace.
617
618pmd.qat exposes both sets of traces.
619They can be enabled using the log-level option (where 8=maximum log level) on
620the process cmdline, e.g. using any of the following::
621
622    --log-level="pmd.qat_general,8"
623    --log-level="pmd.qat_dp,8"
624    --log-level="pmd.qat,8"
625
626.. Note::
627
628    The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to
629    RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h
630    for meson build and config/common_base for gnu make.
631    Also the dynamic global log level overrides both sets of trace, so e.g. no
632    QAT trace would display in this case::
633
634	--log-level="7" --log-level="pmd.qat_general,8"
635