1.. SPDX-License-Identifier: BSD-3-Clause 2 Copyright(c) 2015-2016 Intel Corporation. 3 4Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver 5================================================== 6 7QAT documentation consists of three parts: 8 9* Details of the symmetric crypto service below. 10* Details of the `compression service <http://doc.dpdk.org/guides/compressdevs/qat_comp.html>`_ 11 in the compressdev drivers section. 12* Details of building the common QAT infrastructure and the PMDs to support the 13 above services. See :ref:`building_qat` below. 14 15 16Symmetric Crypto Service on QAT 17------------------------------- 18 19The QAT crypto PMD provides poll mode crypto driver support for the following 20hardware accelerator devices: 21 22* ``Intel QuickAssist Technology DH895xCC`` 23* ``Intel QuickAssist Technology C62x`` 24* ``Intel QuickAssist Technology C3xxx`` 25* ``Intel QuickAssist Technology D15xx`` 26* ``Intel QuickAssist Technology C4xxx`` 27 28 29Features 30~~~~~~~~ 31 32The QAT PMD has support for: 33 34Cipher algorithms: 35 36* ``RTE_CRYPTO_CIPHER_3DES_CBC`` 37* ``RTE_CRYPTO_CIPHER_3DES_CTR`` 38* ``RTE_CRYPTO_CIPHER_AES128_CBC`` 39* ``RTE_CRYPTO_CIPHER_AES192_CBC`` 40* ``RTE_CRYPTO_CIPHER_AES256_CBC`` 41* ``RTE_CRYPTO_CIPHER_AES128_CTR`` 42* ``RTE_CRYPTO_CIPHER_AES192_CTR`` 43* ``RTE_CRYPTO_CIPHER_AES256_CTR`` 44* ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2`` 45* ``RTE_CRYPTO_CIPHER_NULL`` 46* ``RTE_CRYPTO_CIPHER_KASUMI_F8`` 47* ``RTE_CRYPTO_CIPHER_DES_CBC`` 48* ``RTE_CRYPTO_CIPHER_AES_DOCSISBPI`` 49* ``RTE_CRYPTO_CIPHER_DES_DOCSISBPI`` 50* ``RTE_CRYPTO_CIPHER_ZUC_EEA3`` 51 52Hash algorithms: 53 54* ``RTE_CRYPTO_AUTH_SHA1_HMAC`` 55* ``RTE_CRYPTO_AUTH_SHA224_HMAC`` 56* ``RTE_CRYPTO_AUTH_SHA256_HMAC`` 57* ``RTE_CRYPTO_AUTH_SHA384_HMAC`` 58* ``RTE_CRYPTO_AUTH_SHA512_HMAC`` 59* ``RTE_CRYPTO_AUTH_AES_XCBC_MAC`` 60* ``RTE_CRYPTO_AUTH_SNOW3G_UIA2`` 61* ``RTE_CRYPTO_AUTH_MD5_HMAC`` 62* ``RTE_CRYPTO_AUTH_NULL`` 63* ``RTE_CRYPTO_AUTH_KASUMI_F9`` 64* ``RTE_CRYPTO_AUTH_AES_GMAC`` 65* ``RTE_CRYPTO_AUTH_ZUC_EIA3`` 66* ``RTE_CRYPTO_AUTH_AES_CMAC`` 67 68Supported AEAD algorithms: 69 70* ``RTE_CRYPTO_AEAD_AES_GCM`` 71* ``RTE_CRYPTO_AEAD_AES_CCM`` 72 73 74Limitations 75~~~~~~~~~~~ 76 77* Only supports the session-oriented API implementation (session-less APIs are not supported). 78* SNOW 3G (UEA2), KASUMI (F8) and ZUC (EEA3) supported only if cipher length and offset fields are byte-multiple. 79* SNOW 3G (UIA2) and ZUC (EIA3) supported only if hash length and offset fields are byte-multiple. 80* No BSD support as BSD QAT kernel driver not available. 81* ZUC EEA3/EIA3 is not supported by dh895xcc devices 82* Maximum additional authenticated data (AAD) for GCM is 240 bytes long and must be passed to the device in a buffer rounded up to the nearest block-size multiple (x16) and padded with zeros. 83* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported). 84 85Extra notes on KASUMI F9 86~~~~~~~~~~~~~~~~~~~~~~~~ 87 88When using KASUMI F9 authentication algorithm, the input buffer must be 89constructed according to the 90`3GPP KASUMI specification <http://cryptome.org/3gpp/35201-900.pdf>`_ 91(section 4.4, page 13). The input buffer has to have COUNT (4 bytes), 92FRESH (4 bytes), MESSAGE and DIRECTION (1 bit) concatenated. After the DIRECTION 93bit, a single '1' bit is appended, followed by between 0 and 7 '0' bits, so that 94the total length of the buffer is multiple of 8 bits. Note that the actual 95message can be any length, specified in bits. 96 97Once this buffer is passed this way, when creating the crypto operation, 98length of data to authenticate "op.sym.auth.data.length" must be the length 99of all the items described above, including the padding at the end. 100Also, offset of data to authenticate "op.sym.auth.data.offset" 101must be such that points at the start of the COUNT bytes. 102 103 104 105.. _building_qat: 106 107Building PMDs on QAT 108-------------------- 109 110A QAT device can host multiple acceleration services: 111 112* symmetric cryptography 113* data compression 114 115These services are provided to DPDK applications via PMDs which register to 116implement the corresponding cryptodev and compressdev APIs. The PMDs use 117common QAT driver code which manages the QAT PCI device. They also depend on a 118QAT kernel driver being installed on the platform, see :ref:`qat_kernel` below. 119 120 121Configuring and Building the DPDK QAT PMDs 122~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 123 124 125Further information on configuring, building and installing DPDK is described 126`here <http://doc.dpdk.org/guides/linux_gsg/build_dpdk.html>`_. 127 128 129Quick instructions for QAT cryptodev PMD are as follows: 130 131.. code-block:: console 132 133 cd to the top-level DPDK directory 134 make defconfig 135 sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\)=n,\1=y,' build/.config 136 make 137 138Quick instructions for QAT compressdev PMD are as follows: 139 140.. code-block:: console 141 142 cd to the top-level DPDK directory 143 make defconfig 144 make 145 146 147.. _building_qat_config: 148 149Build Configuration 150~~~~~~~~~~~~~~~~~~~ 151 152These are the build configuration options affecting QAT, and their default values: 153 154.. code-block:: console 155 156 CONFIG_RTE_LIBRTE_PMD_QAT=y 157 CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n 158 CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48 159 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16 160 CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536 161 162CONFIG_RTE_LIBRTE_PMD_QAT must be enabled for any QAT PMD to be built. 163 164The QAT cryptodev PMD has an external dependency on libcrypto, so is not 165built by default. CONFIG_RTE_LIBRTE_PMD_QAT_SYM should be enabled to build it. 166 167The QAT compressdev PMD has no external dependencies, so needs no configuration 168options and is built by default. 169 170The number of VFs per PF varies - see table below. If multiple QAT packages are 171installed on a platform then CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES should be 172adjusted to the number of VFs which the QAT common code will need to handle. 173Note, there are separate config items for max cryptodevs CONFIG_RTE_CRYPTO_MAX_DEVS 174and max compressdevs CONFIG_RTE_COMPRESS_MAX_DEVS, if necessary these should be 175adjusted to handle the total of QAT and other devices which the process will use. 176 177QAT allocates internal structures to handle SGLs. For the compression service 178CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS can be changed if more segments are needed. 179An extra (max_inflight_ops x 16) bytes per queue_pair will be used for every increment. 180 181QAT compression PMD needs intermediate buffers to support Deflate compression 182with Dynamic Huffman encoding. CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE 183specifies the size of a single buffer, the PMD will allocate a multiple of these, 184plus some extra space for associated meta-data. For GEN2 devices, 20 buffers are 185allocated while for GEN1 devices, 12 buffers are allocated, plus 1472 bytes overhead. 186 187.. Note:: 188 189 If the compressed output of a Deflate operation using Dynamic Huffman 190 Encoding is too big to fit in an intermediate buffer, then the 191 operation will fall back to fixed compression rather than failing the operation. 192 To avoid this less performant case, applications should configure 193 the intermediate buffer size to be larger than the expected input data size 194 (compressed output size is usually unknown, so the only option is to make 195 larger than the input size). 196 197 198Device and driver naming 199~~~~~~~~~~~~~~~~~~~~~~~~ 200 201* The qat cryptodev driver name is "crypto_qat". 202 The "rte_cryptodev_devices_get()" returns the devices exposed by this driver. 203 204* Each qat crypto device has a unique name, in format 205 "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_sym". 206 This name can be passed to "rte_cryptodev_get_dev_id()" to get the device_id. 207 208.. Note:: 209 210 The qat crypto driver name is passed to the dpdk-test-crypto-perf tool in the "-devtype" parameter. 211 212 The qat crypto device name is in the format of the slave parameter passed to the crypto scheduler. 213 214* The qat compressdev driver name is "compress_qat". 215 The rte_compressdev_devices_get() returns the devices exposed by this driver. 216 217* Each qat compression device has a unique name, in format 218 <pci bdf>_<service>, e.g. "0000:41:01.0_qat_comp". 219 This name can be passed to rte_compressdev_get_dev_id() to get the device_id. 220 221.. _qat_kernel: 222 223Dependency on the QAT kernel driver 224~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 225 226To use QAT an SRIOV-enabled QAT kernel driver is required. The VF 227devices created and initialised by this driver will be used by the QAT PMDs. 228 229Instructions for installation are below, but first an explanation of the 230relationships between the PF/VF devices and the PMDs visible to 231DPDK applications. 232 233Each QuickAssist PF device exposes a number of VF devices. Each VF device can 234enable one cryptodev PMD and/or one compressdev PMD. 235These QAT PMDs share the same underlying device and pci-mgmt code, but are 236enumerated independently on their respective APIs and appear as independent 237devices to applications. 238 239.. Note:: 240 241 Each VF can only be used by one DPDK process. It is not possible to share 242 the same VF across multiple processes, even if these processes are using 243 different acceleration services. 244 245 Conversely one DPDK process can use one or more QAT VFs and can expose both 246 cryptodev and compressdev instances on each of those VFs. 247 248 249Available kernel drivers 250~~~~~~~~~~~~~~~~~~~~~~~~ 251 252Kernel drivers for each device for each service are listed in the following table. (Scroll right 253to see the full table) 254 255 256.. _table_qat_pmds_drivers: 257 258.. table:: QAT device generations, devices and drivers 259 260 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 261 | S | A | C | Gen | Device | Driver/ver | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF | 262 +=====+=====+=====+=====+==========+===============+===============+============+========+======+========+========+ 263 | Yes | No | No | 1 | DH895xCC | linux/4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 | 264 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 265 | Yes | No | No | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | 266 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 267 | Yes | No | Yes | " | " | 01.org/4.3.0+ | " | " | " | " | " | " | 268 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 269 | Yes | No | No | 2 | C62x | linux/4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 | 270 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 271 | Yes | No | Yes | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | 272 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 273 | Yes | No | No | 2 | C3xxx | linux/4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 | 274 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 275 | Yes | No | Yes | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | 276 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 277 | Yes | No | No | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 | 278 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 279 | Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 | 280 +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ 281 282The first 3 columns indicate the service: 283 284* S = Symmetric crypto service (via cryptodev API) 285* A = Asymmetric crypto service (via cryptodev API) 286* C = Compression service (via compressdev API) 287 288The ``Driver`` column indicates either the Linux kernel version in which 289support for this device was introduced or a driver available on Intel's 01.org 290website. There are both linux in-tree and 01.org kernel drivers available for some 291devices. p = release pending. 292 293If you are running on a kernel which includes a driver for your device, see 294`Installation using kernel.org driver`_ below. Otherwise see 295`Installation using 01.org QAT driver`_. 296 297 298Installation using kernel.org driver 299~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 300 301The examples below are based on the C62x device, if you have a different device 302use the corresponding values in the above table. 303 304In BIOS ensure that SRIOV is enabled and either: 305 306* Disable VT-d or 307* Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file. 308 309Check that the QAT driver is loaded on your system, by executing:: 310 311 lsmod | grep qa 312 313You should see the kernel module for your device listed, e.g.:: 314 315 qat_c62x 5626 0 316 intel_qat 82336 1 qat_c62x 317 318Next, you need to expose the Virtual Functions (VFs) using the sysfs file system. 319 320First find the BDFs (Bus-Device-Function) of the physical functions (PFs) of 321your device, e.g.:: 322 323 lspci -d:37c8 324 325You should see output similar to:: 326 327 1a:00.0 Co-processor: Intel Corporation Device 37c8 328 3d:00.0 Co-processor: Intel Corporation Device 37c8 329 3f:00.0 Co-processor: Intel Corporation Device 37c8 330 331Enable the VFs for each PF by echoing the number of VFs per PF to the pci driver:: 332 333 echo 16 > /sys/bus/pci/drivers/c6xx/0000:1a:00.0/sriov_numvfs 334 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3d:00.0/sriov_numvfs 335 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3f:00.0/sriov_numvfs 336 337Check that the VFs are available for use. For example ``lspci -d:37c9`` should 338list 48 VF devices available for a ``C62x`` device. 339 340To complete the installation follow the instructions in 341`Binding the available VFs to the DPDK UIO driver`_. 342 343.. Note:: 344 345 If the QAT kernel modules are not loaded and you see an error like ``Failed 346 to load MMP firmware qat_895xcc_mmp.bin`` in kernel logs, this may be as a 347 result of not using a distribution, but just updating the kernel directly. 348 349 Download firmware from the `kernel firmware repo 350 <http://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/>`_. 351 352 Copy qat binaries to ``/lib/firmware``:: 353 354 cp qat_895xcc.bin /lib/firmware 355 cp qat_895xcc_mmp.bin /lib/firmware 356 357 Change to your linux source root directory and start the qat kernel modules:: 358 359 insmod ./drivers/crypto/qat/qat_common/intel_qat.ko 360 insmod ./drivers/crypto/qat/qat_dh895xcc/qat_dh895xcc.ko 361 362 363.. Note:: 364 365 If you see the following warning in ``/var/log/messages`` it can be ignored: 366 ``IOMMU should be enabled for SR-IOV to work correctly``. 367 368 369Installation using 01.org QAT driver 370~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 371 372Download the latest QuickAssist Technology Driver from `01.org 373<https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_. 374Consult the *Getting Started Guide* at the same URL for further information. 375 376The steps below assume you are: 377 378* Building on a platform with one ``C62x`` device. 379* Using package ``qat1.7.l.4.2.0-000xx.tar.gz``. 380* On Fedora26 kernel ``4.11.11-300.fc26.x86_64``. 381 382In the BIOS ensure that SRIOV is enabled and VT-d is disabled. 383 384Uninstall any existing QAT driver, for example by running: 385 386* ``./installer.sh uninstall`` in the directory where originally installed. 387 388 389Build and install the SRIOV-enabled QAT driver:: 390 391 mkdir /QAT 392 cd /QAT 393 394 # Copy the package to this location and unpack 395 tar zxof qat1.7.l.4.2.0-000xx.tar.gz 396 397 ./configure --enable-icp-sriov=host 398 make install 399 400You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0. 401You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF. 402 403Confirm the driver is correctly installed and is using firmware version 4.2.0:: 404 405 cat /sys/kernel/debug/qat<your device type and bdf>/version/fw 406 407 408Confirm the presence of 48 VF devices - 16 per PF:: 409 410 lspci -d:37c9 411 412 413To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_. 414 415.. Note:: 416 417 If using a later kernel and the build fails with an error relating to 418 ``strict_stroul`` not being available apply the following patch: 419 420 .. code-block:: diff 421 422 /QAT/QAT1.6/quickassist/utilities/downloader/Target_CoreLibs/uclo/include/linux/uclo_platform.h 423 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,5) 424 + #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (kstrtoul((str), (base), (num))) printk("Error strtoull convert %s\n", str); } 425 + #else 426 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38) 427 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (strict_strtoull((str), (base), (num))) printk("Error strtoull convert %s\n", str); } 428 #else 429 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25) 430 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; strict_strtoll((str), (base), (num));} 431 #else 432 #define STR_TO_64(str, base, num, endPtr) \ 433 do { \ 434 if (str[0] == '-') \ 435 { \ 436 *(num) = -(simple_strtoull((str+1), &(endPtr), (base))); \ 437 }else { \ 438 *(num) = simple_strtoull((str), &(endPtr), (base)); \ 439 } \ 440 } while(0) 441 + #endif 442 #endif 443 #endif 444 445 446.. Note:: 447 448 If the build fails due to missing header files you may need to do following:: 449 450 sudo yum install zlib-devel 451 sudo yum install openssl-devel 452 sudo yum install libudev-devel 453 454.. Note:: 455 456 If the build or install fails due to mismatching kernel sources you may need to do the following:: 457 458 sudo yum install kernel-headers-`uname -r` 459 sudo yum install kernel-src-`uname -r` 460 sudo yum install kernel-devel-`uname -r` 461 462 463Binding the available VFs to the DPDK UIO driver 464~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 465 466Unbind the VFs from the stock driver so they can be bound to the uio driver. 467 468For an Intel(R) QuickAssist Technology DH895xCC device 469^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 470 471The unbind command below assumes ``BDFs`` of ``03:01.00-03:04.07``, if your 472VFs are different adjust the unbind command below:: 473 474 for device in $(seq 1 4); do \ 475 for fn in $(seq 0 7); do \ 476 echo -n 0000:03:0${device}.${fn} > \ 477 /sys/bus/pci/devices/0000\:03\:0${device}.${fn}/driver/unbind; \ 478 done; \ 479 done 480 481For an Intel(R) QuickAssist Technology C62x device 482^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 483 484The unbind command below assumes ``BDFs`` of ``1a:01.00-1a:02.07``, 485``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``, if your VFs are different 486adjust the unbind command below:: 487 488 for device in $(seq 1 2); do \ 489 for fn in $(seq 0 7); do \ 490 echo -n 0000:1a:0${device}.${fn} > \ 491 /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \ 492 493 echo -n 0000:3d:0${device}.${fn} > \ 494 /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \ 495 496 echo -n 0000:3f:0${device}.${fn} > \ 497 /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \ 498 done; \ 499 done 500 501For Intel(R) QuickAssist Technology C3xxx or D15xx device 502^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ 503 504The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your 505VFs are different adjust the unbind command below:: 506 507 for device in $(seq 1 2); do \ 508 for fn in $(seq 0 7); do \ 509 echo -n 0000:01:0${device}.${fn} > \ 510 /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \ 511 done; \ 512 done 513 514Bind to the DPDK uio driver 515^^^^^^^^^^^^^^^^^^^^^^^^^^^ 516 517Install the DPDK igb_uio driver, bind the VF PCI Device id to it and use lspci 518to confirm the VF devices are now in use by igb_uio kernel driver, 519e.g. for the C62x device:: 520 521 cd to the top-level DPDK directory 522 modprobe uio 523 insmod ./build/kmod/igb_uio.ko 524 echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id 525 lspci -vvd:37c9 526 527 528Another way to bind the VFs to the DPDK UIO driver is by using the 529``dpdk-devbind.py`` script:: 530 531 cd to the top-level DPDK directory 532 ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1 533 534Testing 535~~~~~~~ 536 537QAT crypto PMD can be tested by running the test application:: 538 539 make defconfig 540 make -j 541 cd ./build/app 542 ./test -l1 -n1 -w <your qat bdf> 543 RTE>>cryptodev_qat_autotest 544 545QAT compression PMD can be tested by running the test application:: 546 547 make defconfig 548 sed -i 's,\(CONFIG_RTE_COMPRESSDEV_TEST\)=n,\1=y,' build/.config 549 make -j 550 cd ./build/app 551 ./test -l1 -n1 -w <your qat bdf> 552 RTE>>compressdev_autotest 553 554 555Debugging 556~~~~~~~~~ 557 558There are 2 sets of trace available via the dynamic logging feature: 559 560* pmd.qat_dp exposes trace on the data-path. 561* pmd.qat_general exposes all other trace. 562 563pmd.qat exposes both sets of traces. 564They can be enabled using the log-level option (where 8=maximum log level) on 565the process cmdline, e.g. using any of the following:: 566 567 --log-level="pmd.qat_general,8" 568 --log-level="pmd.qat_dp,8" 569 --log-level="pmd.qat,8" 570 571.. Note:: 572 573 The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to 574 RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h 575 for meson build and config/common_base for gnu make. 576 Also the dynamic global log level overrides both sets of trace, so e.g. no 577 QAT trace would display in this case:: 578 579 --log-level="7" --log-level="pmd.qat_general,8" 580