xref: /dpdk/doc/guides/cryptodevs/qat.rst (revision 1cde1b9a9b4dbf31cb5e5ccdfc5da3cb079f43a2)
1..  SPDX-License-Identifier: BSD-3-Clause
2    Copyright(c) 2015-2019 Intel Corporation.
3
4Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
5==================================================
6
7QAT documentation consists of three parts:
8
9* Details of the symmetric and asymmetric crypto services below.
10* Details of the `compression service <http://doc.dpdk.org/guides/compressdevs/qat_comp.html>`_
11  in the compressdev drivers section.
12* Details of building the common QAT infrastructure and the PMDs to support the
13  above services. See :ref:`building_qat` below.
14
15
16Symmetric Crypto Service on QAT
17-------------------------------
18
19The QAT symmetric crypto PMD (hereafter referred to as `QAT SYM [PMD]`) provides
20poll mode crypto driver support for the following hardware accelerator devices:
21
22* ``Intel QuickAssist Technology DH895xCC``
23* ``Intel QuickAssist Technology C62x``
24* ``Intel QuickAssist Technology C3xxx``
25* ``Intel QuickAssist Technology D15xx``
26* ``Intel QuickAssist Technology C4xxx``
27
28
29Features
30~~~~~~~~
31
32The QAT SYM PMD has support for:
33
34Cipher algorithms:
35
36* ``RTE_CRYPTO_CIPHER_3DES_CBC``
37* ``RTE_CRYPTO_CIPHER_3DES_CTR``
38* ``RTE_CRYPTO_CIPHER_AES128_CBC``
39* ``RTE_CRYPTO_CIPHER_AES192_CBC``
40* ``RTE_CRYPTO_CIPHER_AES256_CBC``
41* ``RTE_CRYPTO_CIPHER_AES128_CTR``
42* ``RTE_CRYPTO_CIPHER_AES192_CTR``
43* ``RTE_CRYPTO_CIPHER_AES256_CTR``
44* ``RTE_CRYPTO_CIPHER_AES_XTS``
45* ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
46* ``RTE_CRYPTO_CIPHER_NULL``
47* ``RTE_CRYPTO_CIPHER_KASUMI_F8``
48* ``RTE_CRYPTO_CIPHER_DES_CBC``
49* ``RTE_CRYPTO_CIPHER_AES_DOCSISBPI``
50* ``RTE_CRYPTO_CIPHER_DES_DOCSISBPI``
51* ``RTE_CRYPTO_CIPHER_ZUC_EEA3``
52
53Hash algorithms:
54
55* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
56* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
57* ``RTE_CRYPTO_AUTH_SHA256_HMAC``
58* ``RTE_CRYPTO_AUTH_SHA384_HMAC``
59* ``RTE_CRYPTO_AUTH_SHA512_HMAC``
60* ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
61* ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
62* ``RTE_CRYPTO_AUTH_MD5_HMAC``
63* ``RTE_CRYPTO_AUTH_NULL``
64* ``RTE_CRYPTO_AUTH_KASUMI_F9``
65* ``RTE_CRYPTO_AUTH_AES_GMAC``
66* ``RTE_CRYPTO_AUTH_ZUC_EIA3``
67* ``RTE_CRYPTO_AUTH_AES_CMAC``
68
69Supported AEAD algorithms:
70
71* ``RTE_CRYPTO_AEAD_AES_GCM``
72* ``RTE_CRYPTO_AEAD_AES_CCM``
73
74
75Limitations
76~~~~~~~~~~~
77
78* Only supports the session-oriented API implementation (session-less APIs are not supported).
79* SNOW 3G (UEA2), KASUMI (F8) and ZUC (EEA3) supported only if cipher length and offset fields are byte-multiple.
80* SNOW 3G (UIA2) and ZUC (EIA3) supported only if hash length and offset fields are byte-multiple.
81* No BSD support as BSD QAT kernel driver not available.
82* ZUC EEA3/EIA3 is not supported by dh895xcc devices
83* Maximum additional authenticated data (AAD) for GCM is 240 bytes long and must be passed to the device in a buffer rounded up to the nearest block-size multiple (x16) and padded with zeros.
84* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
85* A GCM limitation exists, but only in the case where there are multiple
86  generations of QAT devices on a single platform.
87  To optimise performance, the GCM crypto session should be initialised for the
88  device generation to which the ops will be enqueued. Specifically if a GCM
89  session is initialised on a GEN2 device, but then attached to an op enqueued
90  to a GEN3 device, it will work but cannot take advantage of hardware
91  optimisations in the GEN3 device. And if a GCM session is initialised on a
92  GEN3 device, then attached to an op sent to a GEN1/GEN2 device, it will not be
93  enqueued to the device and will be marked as failed. The simplest way to
94  mitigate this is to use the bdf whitelist to avoid mixing devices of different
95  generations in the same process if planning to use for GCM.
96
97Extra notes on KASUMI F9
98~~~~~~~~~~~~~~~~~~~~~~~~
99
100When using KASUMI F9 authentication algorithm, the input buffer must be
101constructed according to the
102`3GPP KASUMI specification <http://cryptome.org/3gpp/35201-900.pdf>`_
103(section 4.4, page 13). The input buffer has to have COUNT (4 bytes),
104FRESH (4 bytes), MESSAGE and DIRECTION (1 bit) concatenated. After the DIRECTION
105bit, a single '1' bit is appended, followed by between 0 and 7 '0' bits, so that
106the total length of the buffer is multiple of 8 bits. Note that the actual
107message can be any length, specified in bits.
108
109Once this buffer is passed this way, when creating the crypto operation,
110length of data to authenticate "op.sym.auth.data.length" must be the length
111of all the items described above, including the padding at the end.
112Also, offset of data to authenticate "op.sym.auth.data.offset"
113must be such that points at the start of the COUNT bytes.
114
115Asymmetric Crypto Service on QAT
116--------------------------------
117
118The QAT asymmetric crypto PMD (hereafter referred to as `QAT ASYM [PMD]`) provides
119poll mode crypto driver support for the following hardware accelerator devices:
120
121* ``Intel QuickAssist Technology DH895xCC``
122* ``Intel QuickAssist Technology C62x``
123* ``Intel QuickAssist Technology C3xxx``
124* ``Intel QuickAssist Technology D15xx``
125* ``Intel QuickAssist Technology C4xxx``
126
127The QAT ASYM PMD has support for:
128
129* ``RTE_CRYPTO_ASYM_XFORM_MODEX``
130* ``RTE_CRYPTO_ASYM_XFORM_MODINV``
131
132Limitations
133~~~~~~~~~~~
134
135* Big integers longer than 4096 bits are not supported.
136* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
137
138.. _building_qat:
139
140Building PMDs on QAT
141--------------------
142
143A QAT device can host multiple acceleration services:
144
145* symmetric cryptography
146* data compression
147* asymmetric cryptography
148
149These services are provided to DPDK applications via PMDs which register to
150implement the corresponding cryptodev and compressdev APIs. The PMDs use
151common QAT driver code which manages the QAT PCI device. They also depend on a
152QAT kernel driver being installed on the platform, see :ref:`qat_kernel` below.
153
154
155Configuring and Building the DPDK QAT PMDs
156~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
157
158
159Further information on configuring, building and installing DPDK is described
160`here <http://doc.dpdk.org/guides/linux_gsg/build_dpdk.html>`_.
161
162
163Quick instructions for QAT cryptodev PMD are as follows:
164
165.. code-block:: console
166
167	cd to the top-level DPDK directory
168	make defconfig
169	sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\)=n,\1=y,' build/.config
170	or/and
171	sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_ASYM\)=n,\1=y,' build/.config
172	make
173
174Quick instructions for QAT compressdev PMD are as follows:
175
176.. code-block:: console
177
178	cd to the top-level DPDK directory
179	make defconfig
180	make
181
182
183.. _building_qat_config:
184
185Build Configuration
186~~~~~~~~~~~~~~~~~~~
187
188These are the build configuration options affecting QAT, and their default values:
189
190.. code-block:: console
191
192	CONFIG_RTE_LIBRTE_PMD_QAT=y
193	CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
194	CONFIG_RTE_LIBRTE_PMD_QAT_ASYM=n
195	CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
196	CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
197
198CONFIG_RTE_LIBRTE_PMD_QAT must be enabled for any QAT PMD to be built.
199
200Both QAT SYM PMD and QAT ASYM PMD have an external dependency on libcrypto, so are not
201built by default. CONFIG_RTE_LIBRTE_PMD_QAT_SYM/ASYM should be enabled to build them.
202
203The QAT compressdev PMD has no external dependencies, so needs no configuration
204options and is built by default.
205
206The number of VFs per PF varies - see table below. If multiple QAT packages are
207installed on a platform then CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES should be
208adjusted to the number of VFs which the QAT common code will need to handle.
209
210.. Note::
211
212        There are separate config items (not QAT-specific) for max cryptodevs
213        CONFIG_RTE_CRYPTO_MAX_DEVS and max compressdevs CONFIG_RTE_COMPRESS_MAX_DEVS,
214        if necessary these should be adjusted to handle the total of QAT and other
215        devices which the process will use. In particular for crypto, where each
216        QAT VF may expose two crypto devices, sym and asym, it may happen that the
217        number of devices will be bigger than MAX_DEVS and the process will show an error
218        during PMD initialisation. To avoid this problem CONFIG_RTE_CRYPTO_MAX_DEVS may be
219        increased or -w, pci-whitelist domain:bus:devid:func option may be used.
220
221
222QAT compression PMD needs intermediate buffers to support Deflate compression
223with Dynamic Huffman encoding. CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE
224specifies the size of a single buffer, the PMD will allocate a multiple of these,
225plus some extra space for associated meta-data. For GEN2 devices, 20 buffers are
226allocated while for GEN1 devices, 12 buffers are allocated, plus 1472 bytes overhead.
227
228.. Note::
229
230	If the compressed output of a Deflate operation using Dynamic Huffman
231        Encoding is too big to fit in an intermediate buffer, then the
232	operation will fall back to fixed compression rather than failing the operation.
233	To avoid this less performant case, applications should configure
234	the intermediate buffer size to be larger than the expected input data size
235	(compressed output size is usually unknown, so the only option is to make
236	larger than the input size).
237
238
239Device and driver naming
240~~~~~~~~~~~~~~~~~~~~~~~~
241
242* The qat cryptodev symmetric crypto driver name is "crypto_qat".
243* The qat cryptodev asymmetric crypto driver name is "crypto_qat_asym".
244
245The "rte_cryptodev_devices_get()" returns the devices exposed by either of these drivers.
246
247* Each qat sym crypto device has a unique name, in format
248  "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_sym".
249* Each qat asym crypto device has a unique name, in format
250  "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_asym".
251  This name can be passed to "rte_cryptodev_get_dev_id()" to get the device_id.
252
253.. Note::
254
255	The cryptodev driver name is passed to the dpdk-test-crypto-perf tool in the "-devtype" parameter.
256
257	The qat crypto device name is in the format of the slave parameter passed to the crypto scheduler.
258
259* The qat compressdev driver name is "compress_qat".
260  The rte_compressdev_devices_get() returns the devices exposed by this driver.
261
262* Each qat compression device has a unique name, in format
263  <pci bdf>_<service>, e.g. "0000:41:01.0_qat_comp".
264  This name can be passed to rte_compressdev_get_dev_id() to get the device_id.
265
266.. _qat_kernel:
267
268Dependency on the QAT kernel driver
269~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
270
271To use QAT an SRIOV-enabled QAT kernel driver is required. The VF
272devices created and initialised by this driver will be used by the QAT PMDs.
273
274Instructions for installation are below, but first an explanation of the
275relationships between the PF/VF devices and the PMDs visible to
276DPDK applications.
277
278Each QuickAssist PF device exposes a number of VF devices. Each VF device can
279enable one symmetric cryptodev PMD and/or one asymmetric cryptodev PMD and/or
280one compressdev PMD.
281These QAT PMDs share the same underlying device and pci-mgmt code, but are
282enumerated independently on their respective APIs and appear as independent
283devices to applications.
284
285.. Note::
286
287   Each VF can only be used by one DPDK process. It is not possible to share
288   the same VF across multiple processes, even if these processes are using
289   different acceleration services.
290
291   Conversely one DPDK process can use one or more QAT VFs and can expose both
292   cryptodev and compressdev instances on each of those VFs.
293
294
295Available kernel drivers
296~~~~~~~~~~~~~~~~~~~~~~~~
297
298Kernel drivers for each device for each service are listed in the following table. (Scroll right
299to see the full table)
300
301
302.. _table_qat_pmds_drivers:
303
304.. table:: QAT device generations, devices and drivers
305
306   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
307   | S   | A   | C   | Gen | Device   | Driver/ver    | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF |
308   +=====+=====+=====+=====+==========+===============+===============+============+========+======+========+========+
309   | Yes | No  | No  | 1   | DH895xCC | linux/4.4+    | qat_dh895xcc  | dh895xcc   | 435    | 1    | 443    | 32     |
310   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
311   | Yes | Yes | No  | "   | "        | 01.org/4.2.0+ | "             | "          | "      | "    | "      | "      |
312   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
313   | Yes | Yes | Yes | "   | "        | 01.org/4.3.0+ | "             | "          | "      | "    | "      | "      |
314   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
315   | Yes | No  | No  | 2   | C62x     | linux/4.5+    | qat_c62x      | c6xx       | 37c8   | 3    | 37c9   | 16     |
316   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
317   | Yes | Yes | Yes | "   | "        | 01.org/4.2.0+ | "             | "          | "      | "    | "      | "      |
318   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
319   | Yes | No  | No  | 2   | C3xxx    | linux/4.5+    | qat_c3xxx     | c3xxx      | 19e2   | 1    | 19e3   | 16     |
320   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
321   | Yes | Yes | Yes | "   | "        | 01.org/4.2.0+ | "             | "          | "      | "    | "      | "      |
322   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
323   | Yes | No  | No  | 2   | D15xx    | p             | qat_d15xx     | d15xx      | 6f54   | 1    | 6f55   | 16     |
324   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
325   | Yes | No  | No  | 3   | C4xxx    | p             | qat_c4xxx     | c4xxx      | 18a0   | 1    | 18a1   | 128    |
326   +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
327
328The first 3 columns indicate the service:
329
330* S = Symmetric crypto service (via cryptodev API)
331* A = Asymmetric crypto service  (via cryptodev API)
332* C = Compression service (via compressdev API)
333
334The ``Driver`` column indicates either the Linux kernel version in which
335support for this device was introduced or a driver available on Intel's 01.org
336website. There are both linux in-tree and 01.org kernel drivers available for some
337devices. p = release pending.
338
339If you are running on a kernel which includes a driver for your device, see
340`Installation using kernel.org driver`_ below. Otherwise see
341`Installation using 01.org QAT driver`_.
342
343
344Installation using kernel.org driver
345~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
346
347The examples below are based on the C62x device, if you have a different device
348use the corresponding values in the above table.
349
350In BIOS ensure that SRIOV is enabled and either:
351
352* Disable VT-d or
353* Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
354
355Check that the QAT driver is loaded on your system, by executing::
356
357    lsmod | grep qa
358
359You should see the kernel module for your device listed, e.g.::
360
361    qat_c62x               5626  0
362    intel_qat              82336  1 qat_c62x
363
364Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
365
366First find the BDFs (Bus-Device-Function) of the physical functions (PFs) of
367your device, e.g.::
368
369    lspci -d:37c8
370
371You should see output similar to::
372
373    1a:00.0 Co-processor: Intel Corporation Device 37c8
374    3d:00.0 Co-processor: Intel Corporation Device 37c8
375    3f:00.0 Co-processor: Intel Corporation Device 37c8
376
377Enable the VFs for each PF by echoing the number of VFs per PF to the pci driver::
378
379     echo 16 > /sys/bus/pci/drivers/c6xx/0000:1a:00.0/sriov_numvfs
380     echo 16 > /sys/bus/pci/drivers/c6xx/0000:3d:00.0/sriov_numvfs
381     echo 16 > /sys/bus/pci/drivers/c6xx/0000:3f:00.0/sriov_numvfs
382
383Check that the VFs are available for use. For example ``lspci -d:37c9`` should
384list 48 VF devices available for a ``C62x`` device.
385
386To complete the installation follow the instructions in
387`Binding the available VFs to the DPDK UIO driver`_.
388
389.. Note::
390
391   If the QAT kernel modules are not loaded and you see an error like ``Failed
392   to load MMP firmware qat_895xcc_mmp.bin`` in kernel logs, this may be as a
393   result of not using a distribution, but just updating the kernel directly.
394
395   Download firmware from the `kernel firmware repo
396   <http://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/>`_.
397
398   Copy qat binaries to ``/lib/firmware``::
399
400      cp qat_895xcc.bin /lib/firmware
401      cp qat_895xcc_mmp.bin /lib/firmware
402
403   Change to your linux source root directory and start the qat kernel modules::
404
405      insmod ./drivers/crypto/qat/qat_common/intel_qat.ko
406      insmod ./drivers/crypto/qat/qat_dh895xcc/qat_dh895xcc.ko
407
408
409.. Note::
410
411   If you see the following warning in ``/var/log/messages`` it can be ignored:
412   ``IOMMU should be enabled for SR-IOV to work correctly``.
413
414
415Installation using 01.org QAT driver
416~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
417
418Download the latest QuickAssist Technology Driver from `01.org
419<https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_.
420Consult the *Getting Started Guide* at the same URL for further information.
421
422The steps below assume you are:
423
424* Building on a platform with one ``C62x`` device.
425* Using package ``qat1.7.l.4.2.0-000xx.tar.gz``.
426* On Fedora26 kernel ``4.11.11-300.fc26.x86_64``.
427
428In the BIOS ensure that SRIOV is enabled and VT-d is disabled.
429
430Uninstall any existing QAT driver, for example by running:
431
432* ``./installer.sh uninstall`` in the directory where originally installed.
433
434
435Build and install the SRIOV-enabled QAT driver::
436
437    mkdir /QAT
438    cd /QAT
439
440    # Copy the package to this location and unpack
441    tar zxof qat1.7.l.4.2.0-000xx.tar.gz
442
443    ./configure --enable-icp-sriov=host
444    make install
445
446You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0.
447You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF.
448
449Confirm the driver is correctly installed and is using firmware version 4.2.0::
450
451    cat /sys/kernel/debug/qat<your device type and bdf>/version/fw
452
453
454Confirm the presence of 48 VF devices - 16 per PF::
455
456    lspci -d:37c9
457
458
459To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
460
461.. Note::
462
463   If using a later kernel and the build fails with an error relating to
464   ``strict_stroul`` not being available apply the following patch:
465
466   .. code-block:: diff
467
468      /QAT/QAT1.6/quickassist/utilities/downloader/Target_CoreLibs/uclo/include/linux/uclo_platform.h
469      + #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,5)
470      + #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (kstrtoul((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
471      + #else
472      #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)
473      #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (strict_strtoull((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
474      #else
475      #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
476      #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; strict_strtoll((str), (base), (num));}
477      #else
478      #define STR_TO_64(str, base, num, endPtr)                                 \
479           do {                                                               \
480                 if (str[0] == '-')                                           \
481                 {                                                            \
482                      *(num) = -(simple_strtoull((str+1), &(endPtr), (base))); \
483                 }else {                                                      \
484                      *(num) = simple_strtoull((str), &(endPtr), (base));      \
485                 }                                                            \
486           } while(0)
487      + #endif
488      #endif
489      #endif
490
491
492.. Note::
493
494   If the build fails due to missing header files you may need to do following::
495
496      sudo yum install zlib-devel
497      sudo yum install openssl-devel
498      sudo yum install libudev-devel
499
500.. Note::
501
502   If the build or install fails due to mismatching kernel sources you may need to do the following::
503
504      sudo yum install kernel-headers-`uname -r`
505      sudo yum install kernel-src-`uname -r`
506      sudo yum install kernel-devel-`uname -r`
507
508
509Binding the available VFs to the DPDK UIO driver
510~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
511
512Unbind the VFs from the stock driver so they can be bound to the uio driver.
513
514For an Intel(R) QuickAssist Technology DH895xCC device
515^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
516
517The unbind command below assumes ``BDFs`` of ``03:01.00-03:04.07``, if your
518VFs are different adjust the unbind command below::
519
520    for device in $(seq 1 4); do \
521        for fn in $(seq 0 7); do \
522            echo -n 0000:03:0${device}.${fn} > \
523            /sys/bus/pci/devices/0000\:03\:0${device}.${fn}/driver/unbind; \
524        done; \
525    done
526
527For an Intel(R) QuickAssist Technology C62x device
528^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
529
530The unbind command below assumes ``BDFs`` of ``1a:01.00-1a:02.07``,
531``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``, if your VFs are different
532adjust the unbind command below::
533
534    for device in $(seq 1 2); do \
535        for fn in $(seq 0 7); do \
536            echo -n 0000:1a:0${device}.${fn} > \
537            /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
538
539            echo -n 0000:3d:0${device}.${fn} > \
540            /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
541
542            echo -n 0000:3f:0${device}.${fn} > \
543            /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
544        done; \
545    done
546
547For Intel(R) QuickAssist Technology C3xxx or D15xx device
548^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
549
550The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your
551VFs are different adjust the unbind command below::
552
553    for device in $(seq 1 2); do \
554        for fn in $(seq 0 7); do \
555            echo -n 0000:01:0${device}.${fn} > \
556            /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
557        done; \
558    done
559
560Bind to the DPDK uio driver
561^^^^^^^^^^^^^^^^^^^^^^^^^^^
562
563Install the DPDK igb_uio driver, bind the VF PCI Device id to it and use lspci
564to confirm the VF devices are now in use by igb_uio kernel driver,
565e.g. for the C62x device::
566
567    cd to the top-level DPDK directory
568    modprobe uio
569    insmod ./build/kmod/igb_uio.ko
570    echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
571    lspci -vvd:37c9
572
573
574Another way to bind the VFs to the DPDK UIO driver is by using the
575``dpdk-devbind.py`` script::
576
577    cd to the top-level DPDK directory
578    ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1
579
580Testing
581~~~~~~~
582
583QAT SYM crypto PMD can be tested by running the test application::
584
585    make defconfig
586    make -j
587    cd ./build/app
588    ./test -l1 -n1 -w <your qat bdf>
589    RTE>>cryptodev_qat_autotest
590
591QAT ASYM crypto PMD can be tested by running the test application::
592
593    make defconfig
594    make -j
595    cd ./build/app
596    ./test -l1 -n1 -w <your qat bdf>
597    RTE>>cryptodev_qat_asym_autotest
598
599QAT compression PMD can be tested by running the test application::
600
601    make defconfig
602    sed -i 's,\(CONFIG_RTE_COMPRESSDEV_TEST\)=n,\1=y,' build/.config
603    make -j
604    cd ./build/app
605    ./test -l1 -n1 -w <your qat bdf>
606    RTE>>compressdev_autotest
607
608
609Debugging
610~~~~~~~~~
611
612There are 2 sets of trace available via the dynamic logging feature:
613
614* pmd.qat_dp exposes trace on the data-path.
615* pmd.qat_general exposes all other trace.
616
617pmd.qat exposes both sets of traces.
618They can be enabled using the log-level option (where 8=maximum log level) on
619the process cmdline, e.g. using any of the following::
620
621    --log-level="pmd.qat_general,8"
622    --log-level="pmd.qat_dp,8"
623    --log-level="pmd.qat,8"
624
625.. Note::
626
627    The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to
628    RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h
629    for meson build and config/common_base for gnu make.
630    Also the dynamic global log level overrides both sets of trace, so e.g. no
631    QAT trace would display in this case::
632
633	--log-level="7" --log-level="pmd.qat_general,8"
634