xref: /dpdk/doc/guides/cryptodevs/qat.rst (revision 0a081a5fd26fbdae00a34541924d798b6dd4a63e)
11703e94aSDeclan Doherty..  BSD LICENSE
2a38dfe97SDeepak Kumar Jain    Copyright(c) 2015-2016 Intel Corporation. All rights reserved.
31703e94aSDeclan Doherty
41703e94aSDeclan Doherty    Redistribution and use in source and binary forms, with or without
51703e94aSDeclan Doherty    modification, are permitted provided that the following conditions
61703e94aSDeclan Doherty    are met:
71703e94aSDeclan Doherty
81703e94aSDeclan Doherty    * Redistributions of source code must retain the above copyright
91703e94aSDeclan Doherty    notice, this list of conditions and the following disclaimer.
101703e94aSDeclan Doherty    * Redistributions in binary form must reproduce the above copyright
111703e94aSDeclan Doherty    notice, this list of conditions and the following disclaimer in
121703e94aSDeclan Doherty    the documentation and/or other materials provided with the
131703e94aSDeclan Doherty    distribution.
141703e94aSDeclan Doherty    * Neither the name of Intel Corporation nor the names of its
151703e94aSDeclan Doherty    contributors may be used to endorse or promote products derived
161703e94aSDeclan Doherty    from this software without specific prior written permission.
171703e94aSDeclan Doherty
181703e94aSDeclan Doherty    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
191703e94aSDeclan Doherty    "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
201703e94aSDeclan Doherty    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
211703e94aSDeclan Doherty    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
221703e94aSDeclan Doherty    OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
231703e94aSDeclan Doherty    SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
241703e94aSDeclan Doherty    LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
251703e94aSDeclan Doherty    DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
261703e94aSDeclan Doherty    THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
271703e94aSDeclan Doherty    (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
281703e94aSDeclan Doherty    OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
291703e94aSDeclan Doherty
30ae20c073SDeepak Kumar JainIntel(R) QuickAssist (QAT) Crypto Poll Mode Driver
31ae20c073SDeepak Kumar Jain==================================================
321703e94aSDeclan Doherty
33f546c1edSFiona TraheThe QAT PMD provides poll mode crypto driver support for the following
34f546c1edSFiona Trahehardware accelerator devices:
35f546c1edSFiona Trahe
36f546c1edSFiona Trahe* ``Intel QuickAssist Technology DH895xCC``
37f546c1edSFiona Trahe* ``Intel QuickAssist Technology C62x``
38f546c1edSFiona Trahe* ``Intel QuickAssist Technology C3xxx``
39259310f3SFiona Trahe* ``Intel QuickAssist Technology D15xx``
401703e94aSDeclan Doherty
411703e94aSDeclan Doherty
421703e94aSDeclan DohertyFeatures
431703e94aSDeclan Doherty--------
441703e94aSDeclan Doherty
451703e94aSDeclan DohertyThe QAT PMD has support for:
461703e94aSDeclan Doherty
471703e94aSDeclan DohertyCipher algorithms:
481703e94aSDeclan Doherty
49e1b7f509SFiona Trahe* ``RTE_CRYPTO_CIPHER_3DES_CBC``
50e1b7f509SFiona Trahe* ``RTE_CRYPTO_CIPHER_3DES_CTR``
51fddf3804SDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_AES128_CBC``
52fddf3804SDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_AES192_CBC``
53fddf3804SDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_AES256_CBC``
54fddf3804SDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_AES128_CTR``
55fddf3804SDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_AES192_CTR``
56fddf3804SDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_AES256_CTR``
57fddf3804SDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
58db0e952aSDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_NULL``
59d4f27453SDeepak Kumar Jain* ``RTE_CRYPTO_CIPHER_KASUMI_F8``
606cd8b4d8SArek Kusztal* ``RTE_CRYPTO_CIPHER_DES_CBC``
61d18ab45fSFiona Trahe* ``RTE_CRYPTO_CIPHER_AES_DOCSISBPI``
62d18ab45fSFiona Trahe* ``RTE_CRYPTO_CIPHER_DES_DOCSISBPI``
63d9b7d5bbSArek Kusztal* ``RTE_CRYPTO_CIPHER_ZUC_EEA3``
641703e94aSDeclan Doherty
651703e94aSDeclan DohertyHash algorithms:
661703e94aSDeclan Doherty
671703e94aSDeclan Doherty* ``RTE_CRYPTO_AUTH_SHA1_HMAC``
68ebdbe12fSDeepak Kumar Jain* ``RTE_CRYPTO_AUTH_SHA224_HMAC``
691703e94aSDeclan Doherty* ``RTE_CRYPTO_AUTH_SHA256_HMAC``
70d905ee32SDeepak Kumar Jain* ``RTE_CRYPTO_AUTH_SHA384_HMAC``
711703e94aSDeclan Doherty* ``RTE_CRYPTO_AUTH_SHA512_HMAC``
721703e94aSDeclan Doherty* ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
73a38dfe97SDeepak Kumar Jain* ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
7461ec5181SArek Kusztal* ``RTE_CRYPTO_AUTH_MD5_HMAC``
75db0e952aSDeepak Kumar Jain* ``RTE_CRYPTO_AUTH_NULL``
76d4f27453SDeepak Kumar Jain* ``RTE_CRYPTO_AUTH_KASUMI_F9``
772fa64f84SArek Kusztal* ``RTE_CRYPTO_AUTH_AES_GMAC``
78d9b7d5bbSArek Kusztal* ``RTE_CRYPTO_AUTH_ZUC_EIA3``
791703e94aSDeclan Doherty
80b79e4c00SPablo de LaraSupported AEAD algorithms:
81b79e4c00SPablo de Lara* ``RTE_CRYPTO_AEAD_AES_GCM``
82b79e4c00SPablo de Lara
831703e94aSDeclan Doherty
841703e94aSDeclan DohertyLimitations
851703e94aSDeclan Doherty-----------
861703e94aSDeclan Doherty
871703e94aSDeclan Doherty* Only supports the session-oriented API implementation (session-less APIs are not supported).
882142e6dcSPablo de Lara* SNOW 3G (UEA2), KASUMI (F8) and ZUC (EEA3) supported only if cipher length and offset fields are byte-multiple.
899333cfbaSPablo de Lara* SNOW 3G (UIA2) and ZUC (EIA3) supported only if hash length and offset fields are byte-multiple.
908831895bSFiona Trahe* No BSD support as BSD QAT kernel driver not available.
91d9b7d5bbSArek Kusztal* ZUC EEA3/EIA3 is not supported by dh895xcc devices
92d4f44265SArek Kusztal* Maximum additional authenticated data (AAD) for GCM is 240 bytes long.
93*0a081a5fSAnatoly Burakov* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
941703e94aSDeclan Doherty
951703e94aSDeclan Doherty
961703e94aSDeclan DohertyInstallation
971703e94aSDeclan Doherty------------
981703e94aSDeclan Doherty
99f546c1edSFiona TraheTo enable QAT in DPDK, follow the instructions for modifying the compile-time
100f546c1edSFiona Traheconfiguration file as described `here <http://dpdk.org/doc/guides/linux_gsg/build_dpdk.html>`_.
1011703e94aSDeclan Doherty
102f546c1edSFiona TraheQuick instructions are as follows:
103d6740135SEoin Breen
104d6740135SEoin Breen.. code-block:: console
105d6740135SEoin Breen
106f546c1edSFiona Trahe	cd to the top-level DPDK directory
107d6740135SEoin Breen	make config T=x86_64-native-linuxapp-gcc
108d6740135SEoin Breen	sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT\)=n,\1=y,' build/.config
109d6740135SEoin Breen	make
110d6740135SEoin Breen
111f546c1edSFiona TraheTo use the DPDK QAT PMD an SRIOV-enabled QAT kernel driver is required. The VF
112f546c1edSFiona Trahedevices exposed by this driver will be used by the QAT PMD. The devices and
113f546c1edSFiona Traheavailable kernel drivers and device ids are :
1141703e94aSDeclan Doherty
115f546c1edSFiona Trahe.. _table_qat_pmds_drivers:
116f546c1edSFiona Trahe
117f5160653SArek Kusztal.. table:: QAT device generations, devices and drivers
118f546c1edSFiona Trahe
119f5160653SArek Kusztal   +-----+----------+--------+---------------+------------+--------+------+--------+--------+
120f5160653SArek Kusztal   | Gen | Device   | Driver | Kernel Module | Pci Driver | PF Did | #PFs | Vf Did | VFs/PF |
121f5160653SArek Kusztal   +=====+==========+========+===============+============+========+======+========+========+
122f5160653SArek Kusztal   | 1   | DH895xCC | 01.org | icp_qa_al     | n/a        | 435    | 1    | 443    | 32     |
123f5160653SArek Kusztal   +-----+----------+--------+---------------+------------+--------+------+--------+--------+
124f5160653SArek Kusztal   | 1   | DH895xCC | 4.4+   | qat_dh895xcc  | dh895xcc   | 435    | 1    | 443    | 32     |
125f5160653SArek Kusztal   +-----+----------+--------+---------------+------------+--------+------+--------+--------+
126f5160653SArek Kusztal   | 2   | C62x     | 4.5+   | qat_c62x      | c6xx       | 37c8   | 3    | 37c9   | 16     |
127f5160653SArek Kusztal   +-----+----------+--------+---------------+------------+--------+------+--------+--------+
128f5160653SArek Kusztal   | 2   | C3xxx    | 4.5+   | qat_c3xxx     | c3xxx      | 19e2   | 1    | 19e3   | 16     |
129f5160653SArek Kusztal   +-----+----------+--------+---------------+------------+--------+------+--------+--------+
130f5160653SArek Kusztal   | 2   | D15xx    | p      | qat_d15xx     | d15xx      | 6f54   | 1    | 6f55   | 16     |
131f5160653SArek Kusztal   +-----+----------+--------+---------------+------------+--------+------+--------+--------+
132f546c1edSFiona Trahe
133f546c1edSFiona Trahe
134f546c1edSFiona TraheThe ``Driver`` column indicates either the Linux kernel version in which
135f546c1edSFiona Trahesupport for this device was introduced or a driver available on Intel's 01.org
136f546c1edSFiona Trahewebsite. There are both linux and 01.org kernel drivers available for some
137259310f3SFiona Trahedevices. p = release pending.
138f546c1edSFiona Trahe
139f546c1edSFiona TraheIf you are running on a kernel which includes a driver for your device, see
140f546c1edSFiona Trahe`Installation using kernel.org driver`_ below. Otherwise see
141f546c1edSFiona Trahe`Installation using 01.org QAT driver`_.
142f546c1edSFiona Trahe
143f546c1edSFiona Trahe
144f546c1edSFiona TraheInstallation using kernel.org driver
145f546c1edSFiona Trahe------------------------------------
146f546c1edSFiona Trahe
147f546c1edSFiona TraheThe examples below are based on the C62x device, if you have a different device
148f546c1edSFiona Traheuse the corresponding values in the above table.
149f546c1edSFiona Trahe
150f546c1edSFiona TraheIn BIOS ensure that SRIOV is enabled and either:
151f546c1edSFiona Trahe
152f546c1edSFiona Trahe* Disable VT-d or
153f546c1edSFiona Trahe* Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
154f546c1edSFiona Trahe
155f546c1edSFiona TraheCheck that the QAT driver is loaded on your system, by executing::
156f546c1edSFiona Trahe
157f546c1edSFiona Trahe    lsmod | grep qa
158f546c1edSFiona Trahe
159f546c1edSFiona TraheYou should see the kernel module for your device listed, e.g.::
160f546c1edSFiona Trahe
161f546c1edSFiona Trahe    qat_c62x               5626  0
162f546c1edSFiona Trahe    intel_qat              82336  1 qat_c62x
163f546c1edSFiona Trahe
164f546c1edSFiona TraheNext, you need to expose the Virtual Functions (VFs) using the sysfs file system.
165f546c1edSFiona Trahe
166f546c1edSFiona TraheFirst find the BDFs (Bus-Device-Function) of the physical functions (PFs) of
167f546c1edSFiona Traheyour device, e.g.::
168f546c1edSFiona Trahe
169f546c1edSFiona Trahe    lspci -d : 37c8
170f546c1edSFiona Trahe
171f546c1edSFiona TraheYou should see output similar to::
172f546c1edSFiona Trahe
173f546c1edSFiona Trahe    1a:00.0 Co-processor: Intel Corporation Device 37c8
174f546c1edSFiona Trahe    3d:00.0 Co-processor: Intel Corporation Device 37c8
175f546c1edSFiona Trahe    3f:00.0 Co-processor: Intel Corporation Device 37c8
176f546c1edSFiona Trahe
177f546c1edSFiona TraheEnable the VFs for each PF by echoing the number of VFs per PF to the pci driver::
178f546c1edSFiona Trahe
179f546c1edSFiona Trahe     echo 16 > /sys/bus/pci/drivers/c6xx/0000:1a:00.0/sriov_numvfs
180f546c1edSFiona Trahe     echo 16 > /sys/bus/pci/drivers/c6xx/0000:3d:00.0/sriov_numvfs
181f546c1edSFiona Trahe     echo 16 > /sys/bus/pci/drivers/c6xx/0000:3f:00.0/sriov_numvfs
182f546c1edSFiona Trahe
183f546c1edSFiona TraheCheck that the VFs are available for use. For example ``lspci -d:37c9`` should
184f546c1edSFiona Trahelist 48 VF devices available for a ``C62x`` device.
185f546c1edSFiona Trahe
186f546c1edSFiona TraheTo complete the installation follow the instructions in
187f546c1edSFiona Trahe`Binding the available VFs to the DPDK UIO driver`_.
188f546c1edSFiona Trahe
189f546c1edSFiona Trahe.. Note::
190f546c1edSFiona Trahe
191f546c1edSFiona Trahe   If the QAT kernel modules are not loaded and you see an error like ``Failed
192f546c1edSFiona Trahe   to load MMP firmware qat_895xcc_mmp.bin`` in kernel logs, this may be as a
193f546c1edSFiona Trahe   result of not using a distribution, but just updating the kernel directly.
194f546c1edSFiona Trahe
195f546c1edSFiona Trahe   Download firmware from the `kernel firmware repo
196f546c1edSFiona Trahe   <http://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/>`_.
197f546c1edSFiona Trahe
198f546c1edSFiona Trahe   Copy qat binaries to ``/lib/firmware``::
199f546c1edSFiona Trahe
200f546c1edSFiona Trahe      cp qat_895xcc.bin /lib/firmware
201f546c1edSFiona Trahe      cp qat_895xcc_mmp.bin /lib/firmware
202f546c1edSFiona Trahe
203f546c1edSFiona Trahe   Change to your linux source root directory and start the qat kernel modules::
204f546c1edSFiona Trahe
205f546c1edSFiona Trahe      insmod ./drivers/crypto/qat/qat_common/intel_qat.ko
206f546c1edSFiona Trahe      insmod ./drivers/crypto/qat/qat_dh895xcc/qat_dh895xcc.ko
207f546c1edSFiona Trahe
208f546c1edSFiona Trahe
209f546c1edSFiona Trahe.. Note::
210f546c1edSFiona Trahe
211f546c1edSFiona Trahe   If you see the following warning in ``/var/log/messages`` it can be ignored:
212f546c1edSFiona Trahe   ``IOMMU should be enabled for SR-IOV to work correctly``.
213ae20c073SDeepak Kumar Jain
2141703e94aSDeclan Doherty
2151703e94aSDeclan DohertyInstallation using 01.org QAT driver
2161703e94aSDeclan Doherty------------------------------------
2171703e94aSDeclan Doherty
2181703e94aSDeclan DohertyDownload the latest QuickAssist Technology Driver from `01.org
219f546c1edSFiona Trahe<https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_.
2201703e94aSDeclan DohertyConsult the *Getting Started Guide* at the same URL for further information.
2211703e94aSDeclan Doherty
2221703e94aSDeclan DohertyThe steps below assume you are:
2231703e94aSDeclan Doherty
2241703e94aSDeclan Doherty* Building on a platform with one ``DH895xCC`` device.
2251703e94aSDeclan Doherty* Using package ``qatmux.l.2.3.0-34.tgz``.
2261703e94aSDeclan Doherty* On Fedora21 kernel ``3.17.4-301.fc21.x86_64``.
2271703e94aSDeclan Doherty
2281703e94aSDeclan DohertyIn the BIOS ensure that SRIOV is enabled and VT-d is disabled.
2291703e94aSDeclan Doherty
2301703e94aSDeclan DohertyUninstall any existing QAT driver, for example by running:
2311703e94aSDeclan Doherty
2321703e94aSDeclan Doherty* ``./installer.sh uninstall`` in the directory where originally installed.
2331703e94aSDeclan Doherty
2341703e94aSDeclan Doherty* or ``rmmod qat_dh895xcc; rmmod intel_qat``.
2351703e94aSDeclan Doherty
2361703e94aSDeclan DohertyBuild and install the SRIOV-enabled QAT driver::
2371703e94aSDeclan Doherty
2381703e94aSDeclan Doherty    mkdir /QAT
2391703e94aSDeclan Doherty    cd /QAT
240f546c1edSFiona Trahe
241f546c1edSFiona Trahe    # Copy qatmux.l.2.3.0-34.tgz to this location
2421703e94aSDeclan Doherty    tar zxof qatmux.l.2.3.0-34.tgz
2431703e94aSDeclan Doherty
2441703e94aSDeclan Doherty    export ICP_WITHOUT_IOMMU=1
2451703e94aSDeclan Doherty    ./installer.sh install QAT1.6 host
2461703e94aSDeclan Doherty
2471703e94aSDeclan DohertyYou can use ``cat /proc/icp_dh895xcc_dev0/version`` to confirm the driver is correctly installed.
248f546c1edSFiona TraheYou can use ``lspci -d:443`` to confirm the  of the 32 VF devices available per ``DH895xCC`` device.
2491703e94aSDeclan Doherty
2501703e94aSDeclan DohertyTo complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
2511703e94aSDeclan Doherty
252f546c1edSFiona Trahe.. Note::
253f546c1edSFiona Trahe
254f546c1edSFiona Trahe   If using a later kernel and the build fails with an error relating to
255f546c1edSFiona Trahe   ``strict_stroul`` not being available apply the following patch:
2561703e94aSDeclan Doherty
2571703e94aSDeclan Doherty   .. code-block:: diff
2581703e94aSDeclan Doherty
2591703e94aSDeclan Doherty      /QAT/QAT1.6/quickassist/utilities/downloader/Target_CoreLibs/uclo/include/linux/uclo_platform.h
2601703e94aSDeclan Doherty      + #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,5)
2611703e94aSDeclan Doherty      + #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (kstrtoul((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
2621703e94aSDeclan Doherty      + #else
2631703e94aSDeclan Doherty      #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)
2641703e94aSDeclan Doherty      #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (strict_strtoull((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
2651703e94aSDeclan Doherty      #else
2661703e94aSDeclan Doherty      #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
2671703e94aSDeclan Doherty      #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; strict_strtoll((str), (base), (num));}
2681703e94aSDeclan Doherty      #else
2691703e94aSDeclan Doherty      #define STR_TO_64(str, base, num, endPtr)                                 \
2701703e94aSDeclan Doherty           do {                                                               \
2711703e94aSDeclan Doherty                 if (str[0] == '-')                                           \
2721703e94aSDeclan Doherty                 {                                                            \
2731703e94aSDeclan Doherty                      *(num) = -(simple_strtoull((str+1), &(endPtr), (base))); \
2741703e94aSDeclan Doherty                 }else {                                                      \
2751703e94aSDeclan Doherty                      *(num) = simple_strtoull((str), &(endPtr), (base));      \
2761703e94aSDeclan Doherty                 }                                                            \
2771703e94aSDeclan Doherty           } while(0)
2781703e94aSDeclan Doherty      + #endif
2791703e94aSDeclan Doherty      #endif
2801703e94aSDeclan Doherty      #endif
2811703e94aSDeclan Doherty
2821703e94aSDeclan Doherty
283f546c1edSFiona Trahe.. Note::
2841703e94aSDeclan Doherty
285f546c1edSFiona Trahe   If the build fails due to missing header files you may need to do following::
2861703e94aSDeclan Doherty
287f546c1edSFiona Trahe      sudo yum install zlib-devel
288f546c1edSFiona Trahe      sudo yum install openssl-devel
2891703e94aSDeclan Doherty
290f546c1edSFiona Trahe.. Note::
2911703e94aSDeclan Doherty
292f546c1edSFiona Trahe   If the build or install fails due to mismatching kernel sources you may need to do the following::
2931703e94aSDeclan Doherty
294f546c1edSFiona Trahe      sudo yum install kernel-headers-`uname -r`
295f546c1edSFiona Trahe      sudo yum install kernel-src-`uname -r`
296f546c1edSFiona Trahe      sudo yum install kernel-devel-`uname -r`
2971703e94aSDeclan Doherty
298f2f639c6SDeepak Kumar Jain
2991703e94aSDeclan DohertyBinding the available VFs to the DPDK UIO driver
3001703e94aSDeclan Doherty------------------------------------------------
3011703e94aSDeclan Doherty
302f546c1edSFiona TraheUnbind the VFs from the stock driver so they can be bound to the uio driver.
3031703e94aSDeclan Doherty
304f546c1edSFiona TraheFor an Intel(R) QuickAssist Technology DH895xCC device
305f546c1edSFiona Trahe~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
306f546c1edSFiona Trahe
307f546c1edSFiona TraheThe unbind command below assumes ``BDFs`` of ``03:01.00-03:04.07``, if your
308f546c1edSFiona TraheVFs are different adjust the unbind command below::
3091703e94aSDeclan Doherty
3101703e94aSDeclan Doherty    for device in $(seq 1 4); do \
3111703e94aSDeclan Doherty        for fn in $(seq 0 7); do \
3121703e94aSDeclan Doherty            echo -n 0000:03:0${device}.${fn} > \
3131703e94aSDeclan Doherty            /sys/bus/pci/devices/0000\:03\:0${device}.${fn}/driver/unbind; \
3141703e94aSDeclan Doherty        done; \
3151703e94aSDeclan Doherty    done
3161703e94aSDeclan Doherty
317f546c1edSFiona TraheFor an Intel(R) QuickAssist Technology C62x device
318f546c1edSFiona Trahe~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3191703e94aSDeclan Doherty
320f546c1edSFiona TraheThe unbind command below assumes ``BDFs`` of ``1a:01.00-1a:02.07``,
321f546c1edSFiona Trahe``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``, if your VFs are different
322f546c1edSFiona Traheadjust the unbind command below::
323ae20c073SDeepak Kumar Jain
324ae20c073SDeepak Kumar Jain    for device in $(seq 1 2); do \
325ae20c073SDeepak Kumar Jain        for fn in $(seq 0 7); do \
326ae20c073SDeepak Kumar Jain            echo -n 0000:1a:0${device}.${fn} > \
327ae20c073SDeepak Kumar Jain            /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
328ae20c073SDeepak Kumar Jain
329ae20c073SDeepak Kumar Jain            echo -n 0000:3d:0${device}.${fn} > \
330ae20c073SDeepak Kumar Jain            /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
331ae20c073SDeepak Kumar Jain
332ae20c073SDeepak Kumar Jain            echo -n 0000:3f:0${device}.${fn} > \
333ae20c073SDeepak Kumar Jain            /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
334ae20c073SDeepak Kumar Jain        done; \
335ae20c073SDeepak Kumar Jain    done
336ae20c073SDeepak Kumar Jain
337259310f3SFiona TraheFor Intel(R) QuickAssist Technology C3xxx or D15xx device
338259310f3SFiona Trahe~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
339ae20c073SDeepak Kumar Jain
340f546c1edSFiona TraheThe unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your
341f546c1edSFiona TraheVFs are different adjust the unbind command below::
342f2f639c6SDeepak Kumar Jain
343f2f639c6SDeepak Kumar Jain    for device in $(seq 1 2); do \
344f2f639c6SDeepak Kumar Jain        for fn in $(seq 0 7); do \
345f2f639c6SDeepak Kumar Jain            echo -n 0000:01:0${device}.${fn} > \
346f2f639c6SDeepak Kumar Jain            /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
347f2f639c6SDeepak Kumar Jain        done; \
348f2f639c6SDeepak Kumar Jain    done
349f2f639c6SDeepak Kumar Jain
350f546c1edSFiona TraheBind to the DPDK uio driver
351f546c1edSFiona Trahe~~~~~~~~~~~~~~~~~~~~~~~~~~~
352f2f639c6SDeepak Kumar Jain
353f546c1edSFiona TraheInstall the DPDK igb_uio driver, bind the VF PCI Device id to it and use lspci
354f546c1edSFiona Traheto confirm the VF devices are now in use by igb_uio kernel driver,
355f546c1edSFiona Trahee.g. for the C62x device::
356f546c1edSFiona Trahe
357f546c1edSFiona Trahe    cd to the top-level DPDK directory
358f546c1edSFiona Trahe    modprobe uio
359f546c1edSFiona Trahe    insmod ./build/kmod/igb_uio.ko
360f546c1edSFiona Trahe    echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
361f546c1edSFiona Trahe    lspci -vvd:37c9
362cb4a1d14SEoin Breen
363cb4a1d14SEoin Breen
364f546c1edSFiona TraheAnother way to bind the VFs to the DPDK UIO driver is by using the
365f546c1edSFiona Trahe``dpdk-devbind.py`` script::
366cb4a1d14SEoin Breen
367f546c1edSFiona Trahe    cd to the top-level DPDK directory
368c6dab2a8SThomas Monjalon    ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1
3699333cfbaSPablo de Lara
3709333cfbaSPablo de Lara
3719333cfbaSPablo de LaraExtra notes on KASUMI F9
3729333cfbaSPablo de Lara------------------------
3739333cfbaSPablo de Lara
3749333cfbaSPablo de LaraWhen using KASUMI F9 authentication algorithm, the input buffer must be
3759333cfbaSPablo de Laraconstructed according to the 3GPP KASUMI specifications (section 4.4, page 13):
3769333cfbaSPablo de Lara`<http://cryptome.org/3gpp/35201-900.pdf>`_.
3779333cfbaSPablo de LaraInput buffer has to have COUNT (4 bytes), FRESH (4 bytes), MESSAGE and DIRECTION (1 bit)
3789333cfbaSPablo de Laraconcatenated. After the DIRECTION bit, a single '1' bit is appended, followed by
3799333cfbaSPablo de Larabetween 0 and 7 '0' bits, so that the total length of the buffer is multiple of 8 bits.
3809333cfbaSPablo de LaraNote that the actual message can be any length, specified in bits.
3819333cfbaSPablo de Lara
3829333cfbaSPablo de LaraOnce this buffer is passed this way, when creating the crypto operation,
3839333cfbaSPablo de Laralength of data to authenticate (op.sym.auth.data.length) must be the length
3849333cfbaSPablo de Laraof all the items described above, including the padding at the end.
3859333cfbaSPablo de LaraAlso, offset of data to authenticate (op.sym.auth.data.offset)
3869333cfbaSPablo de Laramust be such that points at the start of the COUNT bytes.
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