1.. SPDX-License-Identifier: BSD-3-Clause 2 Copyright(c) 2015-2018 Intel Corporation. 3 4AESN-NI Multi Buffer Crypto Poll Mode Driver 5============================================ 6 7 8The AESNI MB PMD (**librte_pmd_aesni_mb**) provides poll mode crypto driver 9support for utilizing Intel multi buffer library, see the white paper 10`Fast Multi-buffer IPsec Implementations on Intel® Architecture Processors 11<https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-multi-buffer-ipsec-implementations-ia-processors-paper.pdf>`_. 12 13The AES-NI MB PMD has current only been tested on Fedora 21 64-bit with gcc. 14 15Features 16-------- 17 18AESNI MB PMD has support for: 19 20Cipher algorithms: 21 22* RTE_CRYPTO_CIPHER_AES128_CBC 23* RTE_CRYPTO_CIPHER_AES192_CBC 24* RTE_CRYPTO_CIPHER_AES256_CBC 25* RTE_CRYPTO_CIPHER_AES128_CTR 26* RTE_CRYPTO_CIPHER_AES192_CTR 27* RTE_CRYPTO_CIPHER_AES256_CTR 28* RTE_CRYPTO_CIPHER_AES_DOCSISBPI 29* RTE_CRYPTO_CIPHER_DES_CBC 30* RTE_CRYPTO_CIPHER_3DES_CBC 31* RTE_CRYPTO_CIPHER_DES_DOCSISBPI 32 33Hash algorithms: 34 35* RTE_CRYPTO_HASH_MD5_HMAC 36* RTE_CRYPTO_HASH_SHA1_HMAC 37* RTE_CRYPTO_HASH_SHA224_HMAC 38* RTE_CRYPTO_HASH_SHA256_HMAC 39* RTE_CRYPTO_HASH_SHA384_HMAC 40* RTE_CRYPTO_HASH_SHA512_HMAC 41* RTE_CRYPTO_HASH_AES_XCBC_HMAC 42* RTE_CRYPTO_HASH_AES_CMAC 43* RTE_CRYPTO_HASH_AES_GMAC 44* RTE_CRYPTO_HASH_SHA1 45* RTE_CRYPTO_HASH_SHA224 46* RTE_CRYPTO_HASH_SHA256 47* RTE_CRYPTO_HASH_SHA384 48* RTE_CRYPTO_HASH_SHA512 49 50AEAD algorithms: 51 52* RTE_CRYPTO_AEAD_AES_CCM 53* RTE_CRYPTO_AEAD_AES_GCM 54 55Limitations 56----------- 57 58* Chained mbufs are not supported. 59* RTE_CRYPTO_AEAD_AES_GCM only works properly when the multi-buffer library is 60 0.51.0 or newer. 61* RTE_CRYPTO_HASH_AES_GMAC is supported by library version v0.51 or later. 62* RTE_CRYPTO_HASH_SHA* is supported by library version v0.52 or later. 63 64 65Installation 66------------ 67 68To build DPDK with the AESNI_MB_PMD the user is required to download the multi-buffer 69library from `here <https://github.com/01org/intel-ipsec-mb>`_ 70and compile it on their user system before building DPDK. 71The latest version of the library supported by this PMD is v0.52, which 72can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v0.52.zip>`. 73 74.. code-block:: console 75 76 make 77 make install 78 79As a reference, the following table shows a mapping between the past DPDK versions 80and the Multi-Buffer library version supported by them: 81 82.. _table_aesni_mb_versions: 83 84.. table:: DPDK and Multi-Buffer library version compatibility 85 86 ============== ============================ 87 DPDK version Multi-buffer library version 88 ============== ============================ 89 2.2 - 16.11 0.43 - 0.44 90 17.02 0.44 91 17.05 - 17.08 0.45 - 0.48 92 17.11 0.47 - 0.48 93 18.02 0.48 94 18.05+ 0.49+ 95 ============== ============================ 96 97 98Initialization 99-------------- 100 101In order to enable this virtual crypto PMD, user must: 102 103* Build the multi buffer library (explained in Installation section). 104 105* Set CONFIG_RTE_LIBRTE_PMD_AESNI_MB=y in config/common_base. 106 107To use the PMD in an application, user must: 108 109* Call rte_vdev_init("crypto_aesni_mb") within the application. 110 111* Use --vdev="crypto_aesni_mb" in the EAL options, which will call rte_vdev_init() internally. 112 113The following parameters (all optional) can be provided in the previous two calls: 114 115* socket_id: Specify the socket where the memory for the device is going to be allocated 116 (by default, socket_id will be the socket where the core that is creating the PMD is running on). 117 118* max_nb_queue_pairs: Specify the maximum number of queue pairs in the device (8 by default). 119 120* max_nb_sessions: Specify the maximum number of sessions that can be created (2048 by default). 121 122Example: 123 124.. code-block:: console 125 126 ./l2fwd-crypto -l 1 -n 4 --vdev="crypto_aesni_mb,socket_id=0,max_nb_sessions=128" \ 127 -- -p 1 --cdev SW --chain CIPHER_HASH --cipher_algo "aes-cbc" --auth_algo "sha1-hmac" 128 129Extra notes 130----------- 131 132For AES Counter mode (AES-CTR), the library supports two different sizes for Initialization 133Vector (IV): 134 135* 12 bytes: used mainly for IPSec, as it requires 12 bytes from the user, which internally 136 are appended the counter block (4 bytes), which is set to 1 for the first block 137 (no padding required from the user) 138 139* 16 bytes: when passing 16 bytes, the library will take them and use the last 4 bytes 140 as the initial counter block for the first block. 141