1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2015 Cavium, Inc 3 */ 4 5 #ifndef _TEST_XMMT_OPS_H_ 6 #define _TEST_XMMT_OPS_H_ 7 8 #include <rte_vect.h> 9 10 #if defined(RTE_ARCH_ARM) 11 12 /* vect_* abstraction implementation using NEON */ 13 14 /* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/ 15 #define vect_loadu_sil128(p) vld1q_s32((const int32_t *)p) 16 17 /* sets the 4 signed 32-bit integer values and returns the xmm_t variable */ 18 static __rte_always_inline xmm_t 19 vect_set_epi32(int i3, int i2, int i1, int i0) 20 { 21 int32_t data[4] = {i0, i1, i2, i3}; 22 23 return vld1q_s32(data); 24 } 25 26 #elif defined(RTE_ARCH_X86) 27 28 /* vect_* abstraction implementation using SSE */ 29 30 /* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/ 31 #define vect_loadu_sil128(p) _mm_loadu_si128(p) 32 33 /* sets the 4 signed 32-bit integer values and returns the xmm_t variable */ 34 #define vect_set_epi32(i3, i2, i1, i0) _mm_set_epi32(i3, i2, i1, i0) 35 36 #elif defined(RTE_ARCH_PPC_64) 37 38 /* vect_* abstraction implementation using ALTIVEC */ 39 40 /* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/ 41 #define vect_loadu_sil128(p) vec_ld(0, p) 42 43 /* sets the 4 signed 32-bit integer values and returns the xmm_t variable */ 44 static __rte_always_inline xmm_t 45 vect_set_epi32(int i3, int i2, int i1, int i0) 46 { 47 xmm_t data = (xmm_t){i0, i1, i2, i3}; 48 49 return data; 50 } 51 52 #endif 53 54 #endif /* _TEST_XMMT_OPS_H_ */ 55