1 /*- 2 * BSD LICENSE 3 * 4 * Copyright(c) 2010-2015 Intel Corporation. All rights reserved. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * * Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * * Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * * Neither the name of Intel Corporation nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _TESTPMD_H_ 35 #define _TESTPMD_H_ 36 37 #define RTE_PORT_ALL (~(portid_t)0x0) 38 39 #define RTE_TEST_RX_DESC_MAX 2048 40 #define RTE_TEST_TX_DESC_MAX 2048 41 42 #define RTE_PORT_STOPPED (uint16_t)0 43 #define RTE_PORT_STARTED (uint16_t)1 44 #define RTE_PORT_CLOSED (uint16_t)2 45 #define RTE_PORT_HANDLING (uint16_t)3 46 47 /* 48 * Default size of the mbuf data buffer to receive standard 1518-byte 49 * Ethernet frames in a mono-segment memory buffer. 50 */ 51 #define DEFAULT_MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE 52 /**< Default size of mbuf data buffer. */ 53 54 /* 55 * The maximum number of segments per packet is used when creating 56 * scattered transmit packets composed of a list of mbufs. 57 */ 58 #define RTE_MAX_SEGS_PER_PKT 255 /**< nb_segs is a 8-bit unsigned char. */ 59 60 #define MAX_PKT_BURST 512 61 #define DEF_PKT_BURST 32 62 63 #define DEF_MBUF_CACHE 250 64 65 #define RTE_CACHE_LINE_SIZE_ROUNDUP(size) \ 66 (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE)) 67 68 #define NUMA_NO_CONFIG 0xFF 69 #define UMA_NO_CONFIG 0xFF 70 71 typedef uint8_t lcoreid_t; 72 typedef uint8_t portid_t; 73 typedef uint16_t queueid_t; 74 typedef uint16_t streamid_t; 75 76 #define MAX_QUEUE_ID ((1 << (sizeof(queueid_t) * 8)) - 1) 77 78 enum { 79 PORT_TOPOLOGY_PAIRED, 80 PORT_TOPOLOGY_CHAINED, 81 PORT_TOPOLOGY_LOOP, 82 }; 83 84 #ifdef RTE_TEST_PMD_RECORD_BURST_STATS 85 /** 86 * The data structure associated with RX and TX packet burst statistics 87 * that are recorded for each forwarding stream. 88 */ 89 struct pkt_burst_stats { 90 unsigned int pkt_burst_spread[MAX_PKT_BURST]; 91 }; 92 #endif 93 94 /** 95 * The data structure associated with a forwarding stream between a receive 96 * port/queue and a transmit port/queue. 97 */ 98 struct fwd_stream { 99 /* "read-only" data */ 100 portid_t rx_port; /**< port to poll for received packets */ 101 queueid_t rx_queue; /**< RX queue to poll on "rx_port" */ 102 portid_t tx_port; /**< forwarding port of received packets */ 103 queueid_t tx_queue; /**< TX queue to send forwarded packets */ 104 streamid_t peer_addr; /**< index of peer ethernet address of packets */ 105 106 /* "read-write" results */ 107 unsigned int rx_packets; /**< received packets */ 108 unsigned int tx_packets; /**< received packets transmitted */ 109 unsigned int fwd_dropped; /**< received packets not forwarded */ 110 unsigned int rx_bad_ip_csum ; /**< received packets has bad ip checksum */ 111 unsigned int rx_bad_l4_csum ; /**< received packets has bad l4 checksum */ 112 #ifdef RTE_TEST_PMD_RECORD_CORE_CYCLES 113 uint64_t core_cycles; /**< used for RX and TX processing */ 114 #endif 115 #ifdef RTE_TEST_PMD_RECORD_BURST_STATS 116 struct pkt_burst_stats rx_burst_stats; 117 struct pkt_burst_stats tx_burst_stats; 118 #endif 119 }; 120 121 /** Offload IP checksum in csum forward engine */ 122 #define TESTPMD_TX_OFFLOAD_IP_CKSUM 0x0001 123 /** Offload UDP checksum in csum forward engine */ 124 #define TESTPMD_TX_OFFLOAD_UDP_CKSUM 0x0002 125 /** Offload TCP checksum in csum forward engine */ 126 #define TESTPMD_TX_OFFLOAD_TCP_CKSUM 0x0004 127 /** Offload SCTP checksum in csum forward engine */ 128 #define TESTPMD_TX_OFFLOAD_SCTP_CKSUM 0x0008 129 /** Offload outer IP checksum in csum forward engine for recognized tunnels */ 130 #define TESTPMD_TX_OFFLOAD_OUTER_IP_CKSUM 0x0010 131 /** Parse tunnel in csum forward engine. If set, dissect tunnel headers 132 * of rx packets. If not set, treat inner headers as payload. */ 133 #define TESTPMD_TX_OFFLOAD_PARSE_TUNNEL 0x0020 134 /** Insert VLAN header in forward engine */ 135 #define TESTPMD_TX_OFFLOAD_INSERT_VLAN 0x0040 136 /** Insert double VLAN header in forward engine */ 137 #define TESTPMD_TX_OFFLOAD_INSERT_QINQ 0x0080 138 139 /** 140 * The data structure associated with each port. 141 */ 142 struct rte_port { 143 uint8_t enabled; /**< Port enabled or not */ 144 struct rte_eth_dev_info dev_info; /**< PCI info + driver name */ 145 struct rte_eth_conf dev_conf; /**< Port configuration. */ 146 struct ether_addr eth_addr; /**< Port ethernet address */ 147 struct rte_eth_stats stats; /**< Last port statistics */ 148 uint64_t tx_dropped; /**< If no descriptor in TX ring */ 149 struct fwd_stream *rx_stream; /**< Port RX stream, if unique */ 150 struct fwd_stream *tx_stream; /**< Port TX stream, if unique */ 151 unsigned int socket_id; /**< For NUMA support */ 152 uint16_t tx_ol_flags;/**< TX Offload Flags (TESTPMD_TX_OFFLOAD...). */ 153 uint16_t tso_segsz; /**< MSS for segmentation offload. */ 154 uint16_t tx_vlan_id;/**< The tag ID */ 155 uint16_t tx_vlan_id_outer;/**< The outer tag ID */ 156 void *fwd_ctx; /**< Forwarding mode context */ 157 uint64_t rx_bad_ip_csum; /**< rx pkts with bad ip checksum */ 158 uint64_t rx_bad_l4_csum; /**< rx pkts with bad l4 checksum */ 159 uint8_t tx_queue_stats_mapping_enabled; 160 uint8_t rx_queue_stats_mapping_enabled; 161 volatile uint16_t port_status; /**< port started or not */ 162 uint8_t need_reconfig; /**< need reconfiguring port or not */ 163 uint8_t need_reconfig_queues; /**< need reconfiguring queues or not */ 164 uint8_t rss_flag; /**< enable rss or not */ 165 uint8_t dcb_flag; /**< enable dcb */ 166 struct rte_eth_rxconf rx_conf; /**< rx configuration */ 167 struct rte_eth_txconf tx_conf; /**< tx configuration */ 168 struct ether_addr *mc_addr_pool; /**< pool of multicast addrs */ 169 uint32_t mc_addr_nb; /**< nb. of addr. in mc_addr_pool */ 170 uint8_t slave_flag; /**< bonding slave port */ 171 }; 172 173 extern portid_t __rte_unused 174 find_next_port(portid_t p, struct rte_port *ports, int size); 175 176 #define FOREACH_PORT(p, ports) \ 177 for (p = find_next_port(0, ports, RTE_MAX_ETHPORTS); \ 178 p < RTE_MAX_ETHPORTS; \ 179 p = find_next_port(p + 1, ports, RTE_MAX_ETHPORTS)) 180 181 /** 182 * The data structure associated with each forwarding logical core. 183 * The logical cores are internally numbered by a core index from 0 to 184 * the maximum number of logical cores - 1. 185 * The system CPU identifier of all logical cores are setup in a global 186 * CPU id. configuration table. 187 */ 188 struct fwd_lcore { 189 struct rte_mempool *mbp; /**< The mbuf pool to use by this core */ 190 streamid_t stream_idx; /**< index of 1st stream in "fwd_streams" */ 191 streamid_t stream_nb; /**< number of streams in "fwd_streams" */ 192 lcoreid_t cpuid_idx; /**< index of logical core in CPU id table */ 193 queueid_t tx_queue; /**< TX queue to send forwarded packets */ 194 volatile char stopped; /**< stop forwarding when set */ 195 }; 196 197 /* 198 * Forwarding mode operations: 199 * - IO forwarding mode (default mode) 200 * Forwards packets unchanged. 201 * 202 * - MAC forwarding mode 203 * Set the source and the destination Ethernet addresses of packets 204 * before forwarding them. 205 * 206 * - IEEE1588 forwarding mode 207 * Check that received IEEE1588 Precise Time Protocol (PTP) packets are 208 * filtered and timestamped by the hardware. 209 * Forwards packets unchanged on the same port. 210 * Check that sent IEEE1588 PTP packets are timestamped by the hardware. 211 */ 212 typedef void (*port_fwd_begin_t)(portid_t pi); 213 typedef void (*port_fwd_end_t)(portid_t pi); 214 typedef void (*packet_fwd_t)(struct fwd_stream *fs); 215 216 struct fwd_engine { 217 const char *fwd_mode_name; /**< Forwarding mode name. */ 218 port_fwd_begin_t port_fwd_begin; /**< NULL if nothing special to do. */ 219 port_fwd_end_t port_fwd_end; /**< NULL if nothing special to do. */ 220 packet_fwd_t packet_fwd; /**< Mandatory. */ 221 }; 222 223 extern struct fwd_engine io_fwd_engine; 224 extern struct fwd_engine mac_fwd_engine; 225 extern struct fwd_engine mac_retry_fwd_engine; 226 extern struct fwd_engine mac_swap_engine; 227 extern struct fwd_engine flow_gen_engine; 228 extern struct fwd_engine rx_only_engine; 229 extern struct fwd_engine tx_only_engine; 230 extern struct fwd_engine csum_fwd_engine; 231 extern struct fwd_engine icmp_echo_engine; 232 #ifdef RTE_LIBRTE_IEEE1588 233 extern struct fwd_engine ieee1588_fwd_engine; 234 #endif 235 236 extern struct fwd_engine * fwd_engines[]; /**< NULL terminated array. */ 237 238 /** 239 * Forwarding Configuration 240 * 241 */ 242 struct fwd_config { 243 struct fwd_engine *fwd_eng; /**< Packet forwarding mode. */ 244 streamid_t nb_fwd_streams; /**< Nb. of forward streams to process. */ 245 lcoreid_t nb_fwd_lcores; /**< Nb. of logical cores to launch. */ 246 portid_t nb_fwd_ports; /**< Nb. of ports involved. */ 247 }; 248 249 /** 250 * DCB mode enable 251 */ 252 enum dcb_mode_enable 253 { 254 DCB_VT_ENABLED, 255 DCB_ENABLED 256 }; 257 258 /* 259 * DCB general config info 260 */ 261 struct dcb_config { 262 enum dcb_mode_enable dcb_mode; 263 uint8_t vt_en; 264 enum rte_eth_nb_tcs num_tcs; 265 uint8_t pfc_en; 266 }; 267 268 /* 269 * In DCB io FWD mode, 128 RX queue to 128 TX queue mapping 270 */ 271 enum dcb_queue_mapping_mode { 272 DCB_VT_Q_MAPPING = 0, 273 DCB_4_TCS_Q_MAPPING, 274 DCB_8_TCS_Q_MAPPING 275 }; 276 277 #define MAX_TX_QUEUE_STATS_MAPPINGS 1024 /* MAX_PORT of 32 @ 32 tx_queues/port */ 278 #define MAX_RX_QUEUE_STATS_MAPPINGS 4096 /* MAX_PORT of 32 @ 128 rx_queues/port */ 279 280 struct queue_stats_mappings { 281 uint8_t port_id; 282 uint16_t queue_id; 283 uint8_t stats_counter_id; 284 } __rte_cache_aligned; 285 286 extern struct queue_stats_mappings tx_queue_stats_mappings_array[]; 287 extern struct queue_stats_mappings rx_queue_stats_mappings_array[]; 288 289 /* Assign both tx and rx queue stats mappings to the same default values */ 290 extern struct queue_stats_mappings *tx_queue_stats_mappings; 291 extern struct queue_stats_mappings *rx_queue_stats_mappings; 292 293 extern uint16_t nb_tx_queue_stats_mappings; 294 extern uint16_t nb_rx_queue_stats_mappings; 295 296 /* globals used for configuration */ 297 extern uint16_t verbose_level; /**< Drives messages being displayed, if any. */ 298 extern uint8_t interactive; 299 extern uint8_t auto_start; 300 extern uint8_t numa_support; /**< set by "--numa" parameter */ 301 extern uint16_t port_topology; /**< set by "--port-topology" parameter */ 302 extern uint8_t no_flush_rx; /**<set by "--no-flush-rx" parameter */ 303 extern uint8_t mp_anon; /**< set by "--mp-anon" parameter */ 304 extern uint8_t no_link_check; /**<set by "--disable-link-check" parameter */ 305 extern volatile int test_done; /* stop packet forwarding when set to 1. */ 306 307 #ifdef RTE_NIC_BYPASS 308 extern uint32_t bypass_timeout; /**< Store the NIC bypass watchdog timeout */ 309 #endif 310 311 /* 312 * Store specified sockets on which memory pool to be used by ports 313 * is allocated. 314 */ 315 uint8_t port_numa[RTE_MAX_ETHPORTS]; 316 317 /* 318 * Store specified sockets on which RX ring to be used by ports 319 * is allocated. 320 */ 321 uint8_t rxring_numa[RTE_MAX_ETHPORTS]; 322 323 /* 324 * Store specified sockets on which TX ring to be used by ports 325 * is allocated. 326 */ 327 uint8_t txring_numa[RTE_MAX_ETHPORTS]; 328 329 extern uint8_t socket_num; 330 331 /* 332 * Configuration of logical cores: 333 * nb_fwd_lcores <= nb_cfg_lcores <= nb_lcores 334 */ 335 extern lcoreid_t nb_lcores; /**< Number of logical cores probed at init time. */ 336 extern lcoreid_t nb_cfg_lcores; /**< Number of configured logical cores. */ 337 extern lcoreid_t nb_fwd_lcores; /**< Number of forwarding logical cores. */ 338 extern unsigned int fwd_lcores_cpuids[RTE_MAX_LCORE]; 339 extern unsigned max_socket; 340 341 /* 342 * Configuration of Ethernet ports: 343 * nb_fwd_ports <= nb_cfg_ports <= nb_ports 344 */ 345 extern portid_t nb_ports; /**< Number of ethernet ports probed at init time. */ 346 extern portid_t nb_cfg_ports; /**< Number of configured ports. */ 347 extern portid_t nb_fwd_ports; /**< Number of forwarding ports. */ 348 extern portid_t fwd_ports_ids[RTE_MAX_ETHPORTS]; 349 extern struct rte_port *ports; 350 351 extern struct rte_eth_rxmode rx_mode; 352 extern uint64_t rss_hf; 353 354 extern queueid_t nb_rxq; 355 extern queueid_t nb_txq; 356 357 extern uint16_t nb_rxd; 358 extern uint16_t nb_txd; 359 360 extern int16_t rx_free_thresh; 361 extern int8_t rx_drop_en; 362 extern int16_t tx_free_thresh; 363 extern int16_t tx_rs_thresh; 364 extern int32_t txq_flags; 365 366 extern uint8_t dcb_config; 367 extern uint8_t dcb_test; 368 extern enum dcb_queue_mapping_mode dcb_q_mapping; 369 370 extern uint16_t mbuf_data_size; /**< Mbuf data space size. */ 371 extern uint32_t param_total_num_mbufs; 372 373 extern struct rte_fdir_conf fdir_conf; 374 375 /* 376 * Configuration of packet segments used by the "txonly" processing engine. 377 */ 378 #define TXONLY_DEF_PACKET_LEN 64 379 extern uint16_t tx_pkt_length; /**< Length of TXONLY packet */ 380 extern uint16_t tx_pkt_seg_lengths[RTE_MAX_SEGS_PER_PKT]; /**< Seg. lengths */ 381 extern uint8_t tx_pkt_nb_segs; /**< Number of segments in TX packets */ 382 383 extern uint16_t nb_pkt_per_burst; 384 extern uint16_t mb_mempool_cache; 385 extern int8_t rx_pthresh; 386 extern int8_t rx_hthresh; 387 extern int8_t rx_wthresh; 388 extern int8_t tx_pthresh; 389 extern int8_t tx_hthresh; 390 extern int8_t tx_wthresh; 391 392 extern struct fwd_config cur_fwd_config; 393 extern struct fwd_engine *cur_fwd_eng; 394 extern struct fwd_lcore **fwd_lcores; 395 extern struct fwd_stream **fwd_streams; 396 397 extern portid_t nb_peer_eth_addrs; /**< Number of peer ethernet addresses. */ 398 extern struct ether_addr peer_eth_addrs[RTE_MAX_ETHPORTS]; 399 400 extern uint32_t burst_tx_delay_time; /**< Burst tx delay time(us) for mac-retry. */ 401 extern uint32_t burst_tx_retry_num; /**< Burst tx retry number for mac-retry. */ 402 403 static inline unsigned int 404 lcore_num(void) 405 { 406 unsigned int i; 407 408 for (i = 0; i < RTE_MAX_LCORE; ++i) 409 if (fwd_lcores_cpuids[i] == rte_lcore_id()) 410 return i; 411 412 rte_panic("lcore_id of current thread not found in fwd_lcores_cpuids\n"); 413 } 414 415 static inline struct fwd_lcore * 416 current_fwd_lcore(void) 417 { 418 return fwd_lcores[lcore_num()]; 419 } 420 421 /* Mbuf Pools */ 422 static inline void 423 mbuf_poolname_build(unsigned int sock_id, char* mp_name, int name_size) 424 { 425 snprintf(mp_name, name_size, "mbuf_pool_socket_%u", sock_id); 426 } 427 428 static inline struct rte_mempool * 429 mbuf_pool_find(unsigned int sock_id) 430 { 431 char pool_name[RTE_MEMPOOL_NAMESIZE]; 432 433 mbuf_poolname_build(sock_id, pool_name, sizeof(pool_name)); 434 return (rte_mempool_lookup((const char *)pool_name)); 435 } 436 437 /** 438 * Read/Write operations on a PCI register of a port. 439 */ 440 static inline uint32_t 441 port_pci_reg_read(struct rte_port *port, uint32_t reg_off) 442 { 443 void *reg_addr; 444 uint32_t reg_v; 445 446 reg_addr = (void *) 447 ((char *)port->dev_info.pci_dev->mem_resource[0].addr + 448 reg_off); 449 reg_v = *((volatile uint32_t *)reg_addr); 450 return rte_le_to_cpu_32(reg_v); 451 } 452 453 #define port_id_pci_reg_read(pt_id, reg_off) \ 454 port_pci_reg_read(&ports[(pt_id)], (reg_off)) 455 456 static inline void 457 port_pci_reg_write(struct rte_port *port, uint32_t reg_off, uint32_t reg_v) 458 { 459 void *reg_addr; 460 461 reg_addr = (void *) 462 ((char *)port->dev_info.pci_dev->mem_resource[0].addr + 463 reg_off); 464 *((volatile uint32_t *)reg_addr) = rte_cpu_to_le_32(reg_v); 465 } 466 467 #define port_id_pci_reg_write(pt_id, reg_off, reg_value) \ 468 port_pci_reg_write(&ports[(pt_id)], (reg_off), (reg_value)) 469 470 /* Prototypes */ 471 unsigned int parse_item_list(char* str, const char* item_name, 472 unsigned int max_items, 473 unsigned int *parsed_items, int check_unique_values); 474 void launch_args_parse(int argc, char** argv); 475 void prompt(void); 476 void nic_stats_display(portid_t port_id); 477 void nic_stats_clear(portid_t port_id); 478 void nic_xstats_display(portid_t port_id); 479 void nic_xstats_clear(portid_t port_id); 480 void nic_stats_mapping_display(portid_t port_id); 481 void port_infos_display(portid_t port_id); 482 void fwd_lcores_config_display(void); 483 void fwd_config_display(void); 484 void rxtx_config_display(void); 485 void fwd_config_setup(void); 486 void set_def_fwd_config(void); 487 void reconfig(portid_t new_port_id, unsigned socket_id); 488 int init_fwd_streams(void); 489 490 void port_mtu_set(portid_t port_id, uint16_t mtu); 491 void port_reg_bit_display(portid_t port_id, uint32_t reg_off, uint8_t bit_pos); 492 void port_reg_bit_set(portid_t port_id, uint32_t reg_off, uint8_t bit_pos, 493 uint8_t bit_v); 494 void port_reg_bit_field_display(portid_t port_id, uint32_t reg_off, 495 uint8_t bit1_pos, uint8_t bit2_pos); 496 void port_reg_bit_field_set(portid_t port_id, uint32_t reg_off, 497 uint8_t bit1_pos, uint8_t bit2_pos, uint32_t value); 498 void port_reg_display(portid_t port_id, uint32_t reg_off); 499 void port_reg_set(portid_t port_id, uint32_t reg_off, uint32_t value); 500 501 void rx_ring_desc_display(portid_t port_id, queueid_t rxq_id, uint16_t rxd_id); 502 void tx_ring_desc_display(portid_t port_id, queueid_t txq_id, uint16_t txd_id); 503 504 int set_fwd_lcores_list(unsigned int *lcorelist, unsigned int nb_lc); 505 int set_fwd_lcores_mask(uint64_t lcoremask); 506 void set_fwd_lcores_number(uint16_t nb_lc); 507 508 void set_fwd_ports_list(unsigned int *portlist, unsigned int nb_pt); 509 void set_fwd_ports_mask(uint64_t portmask); 510 void set_fwd_ports_number(uint16_t nb_pt); 511 512 void rx_vlan_strip_set(portid_t port_id, int on); 513 void rx_vlan_strip_set_on_queue(portid_t port_id, uint16_t queue_id, int on); 514 515 void rx_vlan_filter_set(portid_t port_id, int on); 516 void rx_vlan_all_filter_set(portid_t port_id, int on); 517 int rx_vft_set(portid_t port_id, uint16_t vlan_id, int on); 518 void vlan_extend_set(portid_t port_id, int on); 519 void vlan_tpid_set(portid_t port_id, uint16_t tp_id); 520 void tx_vlan_set(portid_t port_id, uint16_t vlan_id); 521 void tx_qinq_set(portid_t port_id, uint16_t vlan_id, uint16_t vlan_id_outer); 522 void tx_vlan_reset(portid_t port_id); 523 void tx_vlan_pvid_set(portid_t port_id, uint16_t vlan_id, int on); 524 525 void set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint8_t map_value); 526 527 void set_verbose_level(uint16_t vb_level); 528 void set_tx_pkt_segments(unsigned *seg_lengths, unsigned nb_segs); 529 void set_nb_pkt_per_burst(uint16_t pkt_burst); 530 char *list_pkt_forwarding_modes(void); 531 void set_pkt_forwarding_mode(const char *fwd_mode); 532 void start_packet_forwarding(int with_tx_first); 533 void stop_packet_forwarding(void); 534 void dev_set_link_up(portid_t pid); 535 void dev_set_link_down(portid_t pid); 536 void init_port_config(void); 537 void set_port_slave_flag(portid_t slave_pid); 538 void clear_port_slave_flag(portid_t slave_pid); 539 int init_port_dcb_config(portid_t pid,struct dcb_config *dcb_conf); 540 int start_port(portid_t pid); 541 void stop_port(portid_t pid); 542 void close_port(portid_t pid); 543 void attach_port(char *identifier); 544 void detach_port(uint8_t port_id); 545 int all_ports_stopped(void); 546 int port_is_started(portid_t port_id); 547 void pmd_test_exit(void); 548 void fdir_get_infos(portid_t port_id); 549 void fdir_set_flex_mask(portid_t port_id, 550 struct rte_eth_fdir_flex_mask *cfg); 551 void fdir_set_flex_payload(portid_t port_id, 552 struct rte_eth_flex_payload_cfg *cfg); 553 void port_rss_reta_info(portid_t port_id, 554 struct rte_eth_rss_reta_entry64 *reta_conf, 555 uint16_t nb_entries); 556 557 void set_vf_traffic(portid_t port_id, uint8_t is_rx, uint16_t vf, uint8_t on); 558 void set_vf_rx_vlan(portid_t port_id, uint16_t vlan_id, 559 uint64_t vf_mask, uint8_t on); 560 561 int set_queue_rate_limit(portid_t port_id, uint16_t queue_idx, uint16_t rate); 562 int set_vf_rate_limit(portid_t port_id, uint16_t vf, uint16_t rate, 563 uint64_t q_msk); 564 565 void port_rss_hash_conf_show(portid_t port_id, char rss_info[], 566 int show_rss_key); 567 void port_rss_hash_key_update(portid_t port_id, char rss_type[], 568 uint8_t *hash_key, uint hash_key_len); 569 void get_syn_filter(uint8_t port_id); 570 void get_ethertype_filter(uint8_t port_id, uint16_t index); 571 void get_2tuple_filter(uint8_t port_id, uint16_t index); 572 void get_5tuple_filter(uint8_t port_id, uint16_t index); 573 int rx_queue_id_is_invalid(queueid_t rxq_id); 574 int tx_queue_id_is_invalid(queueid_t txq_id); 575 576 /* Functions to manage the set of filtered Multicast MAC addresses */ 577 void mcast_addr_add(uint8_t port_id, struct ether_addr *mc_addr); 578 void mcast_addr_remove(uint8_t port_id, struct ether_addr *mc_addr); 579 580 enum print_warning { 581 ENABLED_WARN = 0, 582 DISABLED_WARN 583 }; 584 int port_id_is_invalid(portid_t port_id, enum print_warning warning); 585 586 /* 587 * Work-around of a compilation error with ICC on invocations of the 588 * rte_be_to_cpu_16() function. 589 */ 590 #ifdef __GCC__ 591 #define RTE_BE_TO_CPU_16(be_16_v) rte_be_to_cpu_16((be_16_v)) 592 #define RTE_CPU_TO_BE_16(cpu_16_v) rte_cpu_to_be_16((cpu_16_v)) 593 #else 594 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN 595 #define RTE_BE_TO_CPU_16(be_16_v) (be_16_v) 596 #define RTE_CPU_TO_BE_16(cpu_16_v) (cpu_16_v) 597 #else 598 #define RTE_BE_TO_CPU_16(be_16_v) \ 599 (uint16_t) ((((be_16_v) & 0xFF) << 8) | ((be_16_v) >> 8)) 600 #define RTE_CPU_TO_BE_16(cpu_16_v) \ 601 (uint16_t) ((((cpu_16_v) & 0xFF) << 8) | ((cpu_16_v) >> 8)) 602 #endif 603 #endif /* __GCC__ */ 604 605 #endif /* _TESTPMD_H_ */ 606