xref: /dpdk/app/test-pmd/testpmd.h (revision 966eb55e9a009d7575a75a9e7db8ea9f90a21f13)
1174a1631SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
2174a1631SBruce Richardson  * Copyright(c) 2010-2017 Intel Corporation
3af75078fSIntel  */
4af75078fSIntel 
5af75078fSIntel #ifndef _TESTPMD_H_
6af75078fSIntel #define _TESTPMD_H_
7af75078fSIntel 
84f1ed78eSThomas Monjalon #include <stdbool.h>
94f1ed78eSThomas Monjalon 
106970401eSDavid Marchand #ifdef RTE_LIB_GRO
11b40f8d78SJiayu Hu #include <rte_gro.h>
126970401eSDavid Marchand #endif
136970401eSDavid Marchand #ifdef RTE_LIB_GSO
1452f38a20SJiayu Hu #include <rte_gso.h>
156970401eSDavid Marchand #endif
16761f7ae1SJie Zhou #include <rte_os_shim.h>
17592ab76fSDavid Marchand #include <rte_ethdev.h>
18592ab76fSDavid Marchand #include <rte_flow.h>
19592ab76fSDavid Marchand #include <rte_mbuf_dyn.h>
20592ab76fSDavid Marchand 
2130626defSXiaoyu Min #include <cmdline.h>
22592ab76fSDavid Marchand #include <cmdline_parse.h>
23592ab76fSDavid Marchand 
241b9f2746SGregory Etelson #include <sys/queue.h>
2559f3a8acSGregory Etelson #ifdef RTE_HAS_JANSSON
2659f3a8acSGregory Etelson #include <jansson.h>
2759f3a8acSGregory Etelson #endif
2885c18dcbSGaetan Rivet 
29ce8d5614SIntel #define RTE_PORT_ALL            (~(portid_t)0x0)
30ce8d5614SIntel 
31ce8d5614SIntel #define RTE_PORT_STOPPED        (uint16_t)0
32ce8d5614SIntel #define RTE_PORT_STARTED        (uint16_t)1
33ce8d5614SIntel #define RTE_PORT_CLOSED         (uint16_t)2
34ce8d5614SIntel #define RTE_PORT_HANDLING       (uint16_t)3
35ce8d5614SIntel 
363889a322SHuisong Li extern uint8_t cl_quit;
373889a322SHuisong Li 
38af75078fSIntel /*
390f6f219eSMohammad Abdul Awal  * It is used to allocate the memory for hash key.
400f6f219eSMohammad Abdul Awal  * The hash key size is NIC dependent.
410f6f219eSMohammad Abdul Awal  */
420f6f219eSMohammad Abdul Awal #define RSS_HASH_KEY_LENGTH 64
430f6f219eSMohammad Abdul Awal 
440f6f219eSMohammad Abdul Awal /*
45af75078fSIntel  * Default size of the mbuf data buffer to receive standard 1518-byte
46af75078fSIntel  * Ethernet frames in a mono-segment memory buffer.
47af75078fSIntel  */
48824cb29cSKonstantin Ananyev #define DEFAULT_MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE
49824cb29cSKonstantin Ananyev /**< Default size of mbuf data buffer. */
50af75078fSIntel 
51af75078fSIntel /*
52af75078fSIntel  * The maximum number of segments per packet is used when creating
53af75078fSIntel  * scattered transmit packets composed of a list of mbufs.
54af75078fSIntel  */
55ea672a8bSOlivier Matz #define RTE_MAX_SEGS_PER_PKT 255 /**< nb_segs is a 8-bit unsigned char. */
56af75078fSIntel 
5726cbb419SViacheslav Ovsiienko /*
5826cbb419SViacheslav Ovsiienko  * The maximum number of segments per packet is used to configure
5926cbb419SViacheslav Ovsiienko  * buffer split feature, also specifies the maximum amount of
6026cbb419SViacheslav Ovsiienko  * optional Rx pools to allocate mbufs to split.
6126cbb419SViacheslav Ovsiienko  */
6226cbb419SViacheslav Ovsiienko #define MAX_SEGS_BUFFER_SPLIT 8 /**< nb_segs is a 8-bit unsigned char. */
6326cbb419SViacheslav Ovsiienko 
6426cbb419SViacheslav Ovsiienko /* The prefix of the mbuf pool names created by the application. */
6526cbb419SViacheslav Ovsiienko #define MBUF_POOL_NAME_PFX "mb_pool"
6626cbb419SViacheslav Ovsiienko 
674ed89049SDavid Marchand #define RX_DESC_MAX    2048
684ed89049SDavid Marchand #define TX_DESC_MAX    2048
694ed89049SDavid Marchand 
70af75078fSIntel #define MAX_PKT_BURST 512
71836853d3SCunming Liang #define DEF_PKT_BURST 32
72af75078fSIntel 
73e9378bbcSCunming Liang #define DEF_MBUF_CACHE 250
74e9378bbcSCunming Liang 
75fdf20fa7SSergio Gonzalez Monroy #define RTE_CACHE_LINE_SIZE_ROUNDUP(size) \
76fdf20fa7SSergio Gonzalez Monroy 	(RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
77af75078fSIntel 
78b6ea6408SIntel #define NUMA_NO_CONFIG 0xFF
79b6ea6408SIntel #define UMA_NO_CONFIG  0xFF
80b6ea6408SIntel 
8157d91f5bSMingxia Liu #define MIN_TOTAL_NUM_MBUFS 1024
8257d91f5bSMingxia Liu 
83af75078fSIntel typedef uint8_t  lcoreid_t;
84f8244c63SZhiyong Yang typedef uint16_t portid_t;
85af75078fSIntel typedef uint16_t queueid_t;
86af75078fSIntel typedef uint16_t streamid_t;
87af75078fSIntel 
88af75078fSIntel enum {
89af75078fSIntel 	PORT_TOPOLOGY_PAIRED,
903e2006d6SCyril Chemparathy 	PORT_TOPOLOGY_CHAINED,
913e2006d6SCyril Chemparathy 	PORT_TOPOLOGY_LOOP,
92af75078fSIntel };
93af75078fSIntel 
94c7f5dba7SAnatoly Burakov enum {
95c7f5dba7SAnatoly Burakov 	MP_ALLOC_NATIVE, /**< allocate and populate mempool natively */
96c7f5dba7SAnatoly Burakov 	MP_ALLOC_ANON,
97c7f5dba7SAnatoly Burakov 	/**< allocate mempool natively, but populate using anonymous memory */
98c7f5dba7SAnatoly Burakov 	MP_ALLOC_XMEM,
99c7f5dba7SAnatoly Burakov 	/**< allocate and populate mempool using anonymous memory */
10072512e18SViacheslav Ovsiienko 	MP_ALLOC_XMEM_HUGE,
101c7f5dba7SAnatoly Burakov 	/**< allocate and populate mempool using anonymous hugepage memory */
10272512e18SViacheslav Ovsiienko 	MP_ALLOC_XBUF
10372512e18SViacheslav Ovsiienko 	/**< allocate mempool natively, use rte_pktmbuf_pool_create_extbuf */
104c7f5dba7SAnatoly Burakov };
105c7f5dba7SAnatoly Burakov 
106c9dc0384SSuanming Mou enum {
107c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_FLOW_CREATE,
108c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_FLOW_DESTROY,
109c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_ACTION_CREATE,
110c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_ACTION_DESTROY,
111c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_ACTION_UPDATE,
112c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_ACTION_QUERY,
113c9dc0384SSuanming Mou };
114c9dc0384SSuanming Mou 
115af75078fSIntel /**
116af75078fSIntel  * The data structure associated with RX and TX packet burst statistics
117af75078fSIntel  * that are recorded for each forwarding stream.
118af75078fSIntel  */
119af75078fSIntel struct pkt_burst_stats {
1206a8b64fdSEli Britstein 	unsigned int pkt_burst_spread[MAX_PKT_BURST + 1];
121af75078fSIntel };
122af75078fSIntel 
12344a37f3cSFerruh Yigit 
12444a37f3cSFerruh Yigit #define TESTPMD_RSS_TYPES_CHAR_NUM_PER_LINE 64
125f4d623f9SAdrien Mazarguil /** Information for a given RSS type. */
126f4d623f9SAdrien Mazarguil struct rss_type_info {
127f4d623f9SAdrien Mazarguil 	const char *str; /**< Type name. */
128f4d623f9SAdrien Mazarguil 	uint64_t rss_type; /**< Type value. */
129f4d623f9SAdrien Mazarguil };
130f4d623f9SAdrien Mazarguil 
131f4d623f9SAdrien Mazarguil /**
132f4d623f9SAdrien Mazarguil  * RSS type information table.
133f4d623f9SAdrien Mazarguil  *
134f4d623f9SAdrien Mazarguil  * An entry with a NULL type name terminates the list.
135f4d623f9SAdrien Mazarguil  */
136f4d623f9SAdrien Mazarguil extern const struct rss_type_info rss_type_table[];
137f4d623f9SAdrien Mazarguil 
138af75078fSIntel /**
139b57b66a9SOri Kam  * Dynf name array.
140b57b66a9SOri Kam  *
141b57b66a9SOri Kam  * Array that holds the name for each dynf.
142b57b66a9SOri Kam  */
143b57b66a9SOri Kam extern char dynf_names[64][RTE_MBUF_DYN_NAMESIZE];
144b57b66a9SOri Kam 
145b57b66a9SOri Kam /**
146af75078fSIntel  * The data structure associated with a forwarding stream between a receive
147af75078fSIntel  * port/queue and a transmit port/queue.
148af75078fSIntel  */
149af75078fSIntel struct fwd_stream {
150af75078fSIntel 	/* "read-only" data */
151af75078fSIntel 	portid_t   rx_port;   /**< port to poll for received packets */
152af75078fSIntel 	queueid_t  rx_queue;  /**< RX queue to poll on "rx_port" */
153af75078fSIntel 	portid_t   tx_port;   /**< forwarding port of received packets */
154af75078fSIntel 	queueid_t  tx_queue;  /**< TX queue to send forwarded packets */
155af75078fSIntel 	streamid_t peer_addr; /**< index of peer ethernet address of packets */
1563c4426dbSDmitry Kozlyuk 	bool       disabled;  /**< the stream is disabled and should not run */
157af75078fSIntel 
158bf56fce1SZhihong Wang 	unsigned int retry_enabled;
159bf56fce1SZhihong Wang 
160af75078fSIntel 	/* "read-write" results */
161c185d42cSDavid Marchand 	uint64_t rx_packets;  /**< received packets */
162c185d42cSDavid Marchand 	uint64_t tx_packets;  /**< received packets transmitted */
163c185d42cSDavid Marchand 	uint64_t fwd_dropped; /**< received packets not forwarded */
164c185d42cSDavid Marchand 	uint64_t rx_bad_ip_csum ; /**< received packets has bad ip checksum */
165c185d42cSDavid Marchand 	uint64_t rx_bad_l4_csum ; /**< received packets has bad l4 checksum */
166c185d42cSDavid Marchand 	uint64_t rx_bad_outer_l4_csum;
16758d475b7SJerin Jacob 	/**< received packets has bad outer l4 checksum */
168d139cf23SLance Richardson 	uint64_t rx_bad_outer_ip_csum;
169d139cf23SLance Richardson 	/**< received packets having bad outer ip checksum */
1709fac5ca8SViacheslav Ovsiienko 	uint64_t ts_skew; /**< TX scheduling timestamp */
1716970401eSDavid Marchand #ifdef RTE_LIB_GRO
172b7091f1dSJiayu Hu 	unsigned int gro_times;	/**< GRO operation times */
1736970401eSDavid Marchand #endif
174af75078fSIntel 	uint64_t     core_cycles; /**< used for RX and TX processing */
175af75078fSIntel 	struct pkt_burst_stats rx_burst_stats;
176af75078fSIntel 	struct pkt_burst_stats tx_burst_stats;
17765744833SXueming Li 	struct fwd_lcore *lcore; /**< Lcore being scheduled. */
178af75078fSIntel };
179af75078fSIntel 
180de956d5eSMatan Azrad /**
181de956d5eSMatan Azrad  * Age action context types, must be included inside the age action
182de956d5eSMatan Azrad  * context structure.
183de956d5eSMatan Azrad  */
184de956d5eSMatan Azrad enum age_action_context_type {
185de956d5eSMatan Azrad 	ACTION_AGE_CONTEXT_TYPE_FLOW,
1864b61b877SBing Zhao 	ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION,
187de956d5eSMatan Azrad };
188de956d5eSMatan Azrad 
18904cc665fSAlexander Kozyrev /** Descriptor for a template. */
19004cc665fSAlexander Kozyrev struct port_template {
19104cc665fSAlexander Kozyrev 	struct port_template *next; /**< Next template in list. */
19204cc665fSAlexander Kozyrev 	struct port_template *tmp; /**< Temporary linking. */
19304cc665fSAlexander Kozyrev 	uint32_t id; /**< Template ID. */
19404cc665fSAlexander Kozyrev 	union {
19504cc665fSAlexander Kozyrev 		struct rte_flow_pattern_template *pattern_template;
19604cc665fSAlexander Kozyrev 		struct rte_flow_actions_template *actions_template;
19704cc665fSAlexander Kozyrev 	} template; /**< PMD opaque template object */
19804cc665fSAlexander Kozyrev };
19904cc665fSAlexander Kozyrev 
200c4b38873SAlexander Kozyrev /** Descriptor for a flow table. */
201c4b38873SAlexander Kozyrev struct port_table {
202c4b38873SAlexander Kozyrev 	struct port_table *next; /**< Next table in list. */
203c4b38873SAlexander Kozyrev 	struct port_table *tmp; /**< Temporary linking. */
204c4b38873SAlexander Kozyrev 	uint32_t id; /**< Table ID. */
205c4b38873SAlexander Kozyrev 	uint32_t nb_pattern_templates; /**< Number of pattern templates. */
206c4b38873SAlexander Kozyrev 	uint32_t nb_actions_templates; /**< Number of actions templates. */
207c4b38873SAlexander Kozyrev 	struct rte_flow_template_table *table; /**< PMD opaque template object */
208c4b38873SAlexander Kozyrev };
209c4b38873SAlexander Kozyrev 
210938a184aSAdrien Mazarguil /** Descriptor for a single flow. */
211938a184aSAdrien Mazarguil struct port_flow {
212938a184aSAdrien Mazarguil 	struct port_flow *next; /**< Next flow in list. */
213938a184aSAdrien Mazarguil 	struct port_flow *tmp; /**< Temporary linking. */
214938a184aSAdrien Mazarguil 	uint32_t id; /**< Flow rule ID. */
215938a184aSAdrien Mazarguil 	struct rte_flow *flow; /**< Opaque flow object returned by PMD. */
216de956d5eSMatan Azrad 	struct rte_flow_conv_rule rule; /**< Saved flow rule description. */
217de956d5eSMatan Azrad 	enum age_action_context_type age_type; /**< Age action context type. */
21844b257ffSAdrien Mazarguil 	uint8_t data[]; /**< Storage for flow rule description */
219938a184aSAdrien Mazarguil };
220938a184aSAdrien Mazarguil 
2214b61b877SBing Zhao /* Descriptor for indirect action */
2224b61b877SBing Zhao struct port_indirect_action {
2234b61b877SBing Zhao 	struct port_indirect_action *next; /**< Next flow in list. */
2244b61b877SBing Zhao 	uint32_t id; /**< Indirect action ID. */
22555509e3aSAndrey Vesnovaty 	enum rte_flow_action_type type; /**< Action type. */
2264b61b877SBing Zhao 	struct rte_flow_action_handle *handle;	/**< Indirect action handle. */
227de956d5eSMatan Azrad 	enum age_action_context_type age_type; /**< Age action context type. */
22855509e3aSAndrey Vesnovaty };
22955509e3aSAndrey Vesnovaty 
230c9dc0384SSuanming Mou /* Descriptor for action query data. */
231c9dc0384SSuanming Mou union port_action_query {
232c9dc0384SSuanming Mou 	struct rte_flow_query_count count;
233c9dc0384SSuanming Mou 	struct rte_flow_query_age age;
234c9dc0384SSuanming Mou 	struct rte_flow_action_conntrack ct;
235c9dc0384SSuanming Mou };
236c9dc0384SSuanming Mou 
237c9dc0384SSuanming Mou /* Descriptor for queue job. */
238c9dc0384SSuanming Mou struct queue_job {
239c9dc0384SSuanming Mou 	uint32_t type; /**< Job type. */
240c9dc0384SSuanming Mou 	union {
241c9dc0384SSuanming Mou 		struct port_flow *pf;
242c9dc0384SSuanming Mou 		struct port_indirect_action *pia;
243c9dc0384SSuanming Mou 	};
244c9dc0384SSuanming Mou 	union port_action_query query;
245c9dc0384SSuanming Mou };
246c9dc0384SSuanming Mou 
2471b9f2746SGregory Etelson struct port_flow_tunnel {
2481b9f2746SGregory Etelson 	LIST_ENTRY(port_flow_tunnel) chain;
2491b9f2746SGregory Etelson 	struct rte_flow_action *pmd_actions;
2501b9f2746SGregory Etelson 	struct rte_flow_item   *pmd_items;
2511b9f2746SGregory Etelson 	uint32_t id;
2521b9f2746SGregory Etelson 	uint32_t num_pmd_actions;
2531b9f2746SGregory Etelson 	uint32_t num_pmd_items;
2541b9f2746SGregory Etelson 	struct rte_flow_tunnel tunnel;
2551b9f2746SGregory Etelson 	struct rte_flow_action *actions;
2561b9f2746SGregory Etelson 	struct rte_flow_item *items;
2571b9f2746SGregory Etelson };
2581b9f2746SGregory Etelson 
2591b9f2746SGregory Etelson struct tunnel_ops {
2601b9f2746SGregory Etelson 	uint32_t id;
2611b9f2746SGregory Etelson 	char type[16];
2621b9f2746SGregory Etelson 	uint32_t enabled:1;
2631b9f2746SGregory Etelson 	uint32_t actions:1;
2641b9f2746SGregory Etelson 	uint32_t items:1;
2651b9f2746SGregory Etelson };
2661b9f2746SGregory Etelson 
26763b72657SIvan Ilchenko /** Information for an extended statistics to show. */
26863b72657SIvan Ilchenko struct xstat_display_info {
26963b72657SIvan Ilchenko 	/** Supported xstats IDs in the order of xstats_display */
27063b72657SIvan Ilchenko 	uint64_t *ids_supp;
27163b72657SIvan Ilchenko 	size_t   ids_supp_sz;
27263b72657SIvan Ilchenko 	uint64_t *prev_values;
27363b72657SIvan Ilchenko 	uint64_t *curr_values;
27463b72657SIvan Ilchenko 	uint64_t prev_ns;
27563b72657SIvan Ilchenko 	bool	 allocated;
27663b72657SIvan Ilchenko };
27763b72657SIvan Ilchenko 
2783c4426dbSDmitry Kozlyuk /** RX queue configuration and state. */
2793c4426dbSDmitry Kozlyuk struct port_rxqueue {
2803c4426dbSDmitry Kozlyuk 	struct rte_eth_rxconf conf;
2813c4426dbSDmitry Kozlyuk 	uint8_t state; /**< RTE_ETH_QUEUE_STATE_* value. */
2823c4426dbSDmitry Kozlyuk };
2833c4426dbSDmitry Kozlyuk 
2843c4426dbSDmitry Kozlyuk /** TX queue configuration and state. */
2853c4426dbSDmitry Kozlyuk struct port_txqueue {
2863c4426dbSDmitry Kozlyuk 	struct rte_eth_txconf conf;
2873c4426dbSDmitry Kozlyuk 	uint8_t state; /**< RTE_ETH_QUEUE_STATE_* value. */
2883c4426dbSDmitry Kozlyuk };
2893c4426dbSDmitry Kozlyuk 
290af75078fSIntel /**
291af75078fSIntel  * The data structure associated with each port.
292af75078fSIntel  */
293af75078fSIntel struct rte_port {
2941bcb7ba9SDavid Marchand 	struct rte_eth_dev_info dev_info;   /**< Device info + driver name */
295af75078fSIntel 	struct rte_eth_conf     dev_conf;   /**< Port configuration. */
2966d13ea8eSOlivier Matz 	struct rte_ether_addr       eth_addr;   /**< Port ethernet address */
297af75078fSIntel 	struct rte_eth_stats    stats;      /**< Last port statistics */
298af75078fSIntel 	unsigned int            socket_id;  /**< For NUMA support */
2993eecba26SShahaf Shuler 	uint16_t		parse_tunnel:1; /**< Parse internal headers */
3000f62d635SJianfeng Tan 	uint16_t                tso_segsz;  /**< Segmentation offload MSS for non-tunneled packets. */
3010f62d635SJianfeng Tan 	uint16_t                tunnel_tso_segsz; /**< Segmentation offload MSS for tunneled pkts. */
30292ebda07SHelin Zhang 	uint16_t                tx_vlan_id;/**< The tag ID */
30392ebda07SHelin Zhang 	uint16_t                tx_vlan_id_outer;/**< The outer tag ID */
304ce8d5614SIntel 	volatile uint16_t        port_status;    /**< port started or not */
3054f1ed78eSThomas Monjalon 	uint8_t                 need_setup;     /**< port just attached */
306ce8d5614SIntel 	uint8_t                 need_reconfig;  /**< need reconfiguring port or not */
307ce8d5614SIntel 	uint8_t                 need_reconfig_queues; /**< need reconfiguring queues or not */
308ce8d5614SIntel 	uint8_t                 rss_flag;   /**< enable rss or not */
3097741e4cfSIntel 	uint8_t                 dcb_flag;   /**< enable dcb */
3109e6b36c3SDavid Marchand 	uint16_t                nb_rx_desc[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue rx desc number */
3119e6b36c3SDavid Marchand 	uint16_t                nb_tx_desc[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue tx desc number */
3123c4426dbSDmitry Kozlyuk 	struct port_rxqueue     rxq[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue Rx config and state */
3133c4426dbSDmitry Kozlyuk 	struct port_txqueue     txq[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue Tx config and state */
3146d13ea8eSOlivier Matz 	struct rte_ether_addr   *mc_addr_pool; /**< pool of multicast addrs */
3158fff6675SIvan Boule 	uint32_t                mc_addr_nb; /**< nb. of addr. in mc_addr_pool */
3169ad3a41aSAlexander Kozyrev 	queueid_t               queue_nb; /**< nb. of queues for flow rules */
3179ad3a41aSAlexander Kozyrev 	uint32_t                queue_sz; /**< size of a queue for flow rules */
318e46372d7SHuisong Li 	uint8_t                 slave_flag : 1, /**< bonding slave port */
319e46372d7SHuisong Li 				bond_flag : 1; /**< port is bond device */
32004cc665fSAlexander Kozyrev 	struct port_template    *pattern_templ_list; /**< Pattern templates. */
32104cc665fSAlexander Kozyrev 	struct port_template    *actions_templ_list; /**< Actions templates. */
322c4b38873SAlexander Kozyrev 	struct port_table       *table_list; /**< Flow tables. */
323938a184aSAdrien Mazarguil 	struct port_flow        *flow_list; /**< Associated flows. */
3244b61b877SBing Zhao 	struct port_indirect_action *actions_list;
3254b61b877SBing Zhao 	/**< Associated indirect actions. */
3261b9f2746SGregory Etelson 	LIST_HEAD(, port_flow_tunnel) flow_tunnel_list;
3279e6b36c3SDavid Marchand 	const struct rte_eth_rxtx_callback *rx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
3289e6b36c3SDavid Marchand 	const struct rte_eth_rxtx_callback *tx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
329c18feafaSDekel Peled 	/**< metadata value to insert in Tx packets. */
3309bf26e13SViacheslav Ovsiienko 	uint32_t		tx_metadata;
3319e6b36c3SDavid Marchand 	const struct rte_eth_rxtx_callback *tx_set_md_cb[RTE_MAX_QUEUES_PER_PORT+1];
332b57b66a9SOri Kam 	/**< dynamic flags. */
333b57b66a9SOri Kam 	uint64_t		mbuf_dynf;
334b57b66a9SOri Kam 	const struct rte_eth_rxtx_callback *tx_set_dynf_cb[RTE_MAX_QUEUES_PER_PORT+1];
33563b72657SIvan Ilchenko 	struct xstat_display_info xstats_info;
336af75078fSIntel };
337af75078fSIntel 
338af75078fSIntel /**
339af75078fSIntel  * The data structure associated with each forwarding logical core.
340af75078fSIntel  * The logical cores are internally numbered by a core index from 0 to
341af75078fSIntel  * the maximum number of logical cores - 1.
342af75078fSIntel  * The system CPU identifier of all logical cores are setup in a global
343af75078fSIntel  * CPU id. configuration table.
344af75078fSIntel  */
345af75078fSIntel struct fwd_lcore {
3466970401eSDavid Marchand #ifdef RTE_LIB_GSO
34752f38a20SJiayu Hu 	struct rte_gso_ctx gso_ctx;     /**< GSO context */
3486970401eSDavid Marchand #endif
349af75078fSIntel 	struct rte_mempool *mbp; /**< The mbuf pool to use by this core */
3506970401eSDavid Marchand #ifdef RTE_LIB_GRO
351b7091f1dSJiayu Hu 	void *gro_ctx;		/**< GRO context */
3526970401eSDavid Marchand #endif
353af75078fSIntel 	streamid_t stream_idx;   /**< index of 1st stream in "fwd_streams" */
354af75078fSIntel 	streamid_t stream_nb;    /**< number of streams in "fwd_streams" */
355af75078fSIntel 	lcoreid_t  cpuid_idx;    /**< index of logical core in CPU id table */
356af75078fSIntel 	volatile char stopped;   /**< stop forwarding when set */
357af75078fSIntel };
358af75078fSIntel 
359af75078fSIntel /*
360af75078fSIntel  * Forwarding mode operations:
361af75078fSIntel  *   - IO forwarding mode (default mode)
362af75078fSIntel  *     Forwards packets unchanged.
363af75078fSIntel  *
364af75078fSIntel  *   - MAC forwarding mode
365af75078fSIntel  *     Set the source and the destination Ethernet addresses of packets
366af75078fSIntel  *     before forwarding them.
367af75078fSIntel  *
368af75078fSIntel  *   - IEEE1588 forwarding mode
369af75078fSIntel  *     Check that received IEEE1588 Precise Time Protocol (PTP) packets are
370af75078fSIntel  *     filtered and timestamped by the hardware.
371af75078fSIntel  *     Forwards packets unchanged on the same port.
372af75078fSIntel  *     Check that sent IEEE1588 PTP packets are timestamped by the hardware.
373af75078fSIntel  */
374a78040c9SAlvin Zhang typedef int (*port_fwd_begin_t)(portid_t pi);
375af75078fSIntel typedef void (*port_fwd_end_t)(portid_t pi);
3763c4426dbSDmitry Kozlyuk typedef void (*stream_init_t)(struct fwd_stream *fs);
377af75078fSIntel typedef void (*packet_fwd_t)(struct fwd_stream *fs);
378af75078fSIntel 
379af75078fSIntel struct fwd_engine {
380af75078fSIntel 	const char       *fwd_mode_name; /**< Forwarding mode name. */
381af75078fSIntel 	port_fwd_begin_t port_fwd_begin; /**< NULL if nothing special to do. */
382af75078fSIntel 	port_fwd_end_t   port_fwd_end;   /**< NULL if nothing special to do. */
3833c4426dbSDmitry Kozlyuk 	stream_init_t    stream_init;    /**< NULL if nothing special to do. */
384af75078fSIntel 	packet_fwd_t     packet_fwd;     /**< Mandatory. */
385af75078fSIntel };
386af75078fSIntel 
38759f3a8acSGregory Etelson #define FLEX_ITEM_MAX_SAMPLES_NUM 16
38859f3a8acSGregory Etelson #define FLEX_ITEM_MAX_LINKS_NUM 16
38959f3a8acSGregory Etelson #define FLEX_MAX_FLOW_PATTERN_LENGTH 64
39059f3a8acSGregory Etelson #define FLEX_MAX_PARSERS_NUM 8
39159f3a8acSGregory Etelson #define FLEX_MAX_PATTERNS_NUM 64
39259f3a8acSGregory Etelson #define FLEX_PARSER_ERR ((struct flex_item *)-1)
39359f3a8acSGregory Etelson 
39459f3a8acSGregory Etelson struct flex_item {
39559f3a8acSGregory Etelson 	struct rte_flow_item_flex_conf flex_conf;
39659f3a8acSGregory Etelson 	struct rte_flow_item_flex_handle *flex_handle;
39759f3a8acSGregory Etelson 	uint32_t flex_id;
39859f3a8acSGregory Etelson };
39959f3a8acSGregory Etelson 
40059f3a8acSGregory Etelson struct flex_pattern {
40159f3a8acSGregory Etelson 	struct rte_flow_item_flex spec, mask;
40259f3a8acSGregory Etelson 	uint8_t spec_pattern[FLEX_MAX_FLOW_PATTERN_LENGTH];
40359f3a8acSGregory Etelson 	uint8_t mask_pattern[FLEX_MAX_FLOW_PATTERN_LENGTH];
40459f3a8acSGregory Etelson };
40559f3a8acSGregory Etelson extern struct flex_item *flex_items[RTE_MAX_ETHPORTS][FLEX_MAX_PARSERS_NUM];
40659f3a8acSGregory Etelson extern struct flex_pattern flex_patterns[FLEX_MAX_PATTERNS_NUM];
40759f3a8acSGregory Etelson 
408bf56fce1SZhihong Wang #define BURST_TX_WAIT_US 1
409bf56fce1SZhihong Wang #define BURST_TX_RETRIES 64
410bf56fce1SZhihong Wang 
411bf56fce1SZhihong Wang extern uint32_t burst_tx_delay_time;
412bf56fce1SZhihong Wang extern uint32_t burst_tx_retry_num;
413bf56fce1SZhihong Wang 
414af75078fSIntel extern struct fwd_engine io_fwd_engine;
415af75078fSIntel extern struct fwd_engine mac_fwd_engine;
416d47388f1SCyril Chemparathy extern struct fwd_engine mac_swap_engine;
417e9e23a61SCyril Chemparathy extern struct fwd_engine flow_gen_engine;
418af75078fSIntel extern struct fwd_engine rx_only_engine;
419af75078fSIntel extern struct fwd_engine tx_only_engine;
420af75078fSIntel extern struct fwd_engine csum_fwd_engine;
421168dfa61SIvan Boule extern struct fwd_engine icmp_echo_engine;
4223c156061SJens Freimann extern struct fwd_engine noisy_vnf_engine;
4232564abdaSShiri Kuzin extern struct fwd_engine five_tuple_swap_fwd_engine;
424af75078fSIntel #ifdef RTE_LIBRTE_IEEE1588
425af75078fSIntel extern struct fwd_engine ieee1588_fwd_engine;
426af75078fSIntel #endif
42759840375SXueming Li extern struct fwd_engine shared_rxq_engine;
428af75078fSIntel 
429af75078fSIntel extern struct fwd_engine * fwd_engines[]; /**< NULL terminated array. */
43030626defSXiaoyu Min extern cmdline_parse_inst_t cmd_set_raw;
431739e045bSXiaoyu Min extern cmdline_parse_inst_t cmd_show_set_raw;
432739e045bSXiaoyu Min extern cmdline_parse_inst_t cmd_show_set_raw_all;
43359f3a8acSGregory Etelson extern cmdline_parse_inst_t cmd_set_flex_is_pattern;
43459f3a8acSGregory Etelson extern cmdline_parse_inst_t cmd_set_flex_spec_pattern;
435af75078fSIntel 
43659fcf854SShahaf Shuler extern uint16_t mempool_flags;
43759fcf854SShahaf Shuler 
438af75078fSIntel /**
439af75078fSIntel  * Forwarding Configuration
440af75078fSIntel  *
441af75078fSIntel  */
442af75078fSIntel struct fwd_config {
443af75078fSIntel 	struct fwd_engine *fwd_eng; /**< Packet forwarding mode. */
444af75078fSIntel 	streamid_t nb_fwd_streams;  /**< Nb. of forward streams to process. */
445af75078fSIntel 	lcoreid_t  nb_fwd_lcores;   /**< Nb. of logical cores to launch. */
446af75078fSIntel 	portid_t   nb_fwd_ports;    /**< Nb. of ports involved. */
447af75078fSIntel };
448af75078fSIntel 
449900550deSIntel /**
450900550deSIntel  * DCB mode enable
451900550deSIntel  */
452900550deSIntel enum dcb_mode_enable
453900550deSIntel {
454900550deSIntel 	DCB_VT_ENABLED,
455900550deSIntel 	DCB_ENABLED
456900550deSIntel };
457900550deSIntel 
458a4fd5eeeSElza Mathew extern uint8_t xstats_hide_zero; /**< Hide zero values for xstats display */
459a4fd5eeeSElza Mathew 
460af75078fSIntel /* globals used for configuration */
461bc700b67SDharmik Thakkar extern uint8_t record_core_cycles; /**< Enables measurement of CPU cycles */
4620e4b1963SDharmik Thakkar extern uint8_t record_burst_stats; /**< Enables display of RX and TX bursts */
463af75078fSIntel extern uint16_t verbose_level; /**< Drives messages being displayed, if any. */
464285fd101SOlivier Matz extern int testpmd_logtype; /**< Log type for testpmd logs */
465af75078fSIntel extern uint8_t  interactive;
466ca7feb22SCyril Chemparathy extern uint8_t  auto_start;
46799cabef0SPablo de Lara extern uint8_t  tx_first;
46881ef862bSAllain Legacy extern char cmdline_filename[PATH_MAX]; /**< offline commands file */
469af75078fSIntel extern uint8_t  numa_support; /**< set by "--numa" parameter */
470af75078fSIntel extern uint16_t port_topology; /**< set by "--port-topology" parameter */
4717741e4cfSIntel extern uint8_t no_flush_rx; /**<set by "--no-flush-rx" parameter */
4727ee3e944SVasily Philipov extern uint8_t flow_isolate_all; /**< set by "--flow-isolate-all */
473c7f5dba7SAnatoly Burakov extern uint8_t  mp_alloc_type;
474c7f5dba7SAnatoly Burakov /**< set by "--mp-anon" or "--mp-alloc" parameter */
475b7b78a08SAjit Khaparde extern uint32_t eth_link_speed;
476bc202406SDavid Marchand extern uint8_t no_link_check; /**<set by "--disable-link-check" parameter */
4776937d210SStephen Hemminger extern uint8_t no_device_start; /**<set by "--disable-device-start" parameter */
4782950a769SDeclan Doherty extern volatile int test_done; /* stop packet forwarding when set to 1. */
4798ea656f8SGaetan Rivet extern uint8_t lsc_interrupt; /**< disabled by "--no-lsc-interrupt" parameter */
480284c908cSGaetan Rivet extern uint8_t rmv_interrupt; /**< disabled by "--no-rmv-interrupt" parameter */
4813af72783SGaetan Rivet extern uint32_t event_print_mask;
4823af72783SGaetan Rivet /**< set by "--print-event xxxx" and "--mask-event xxxx parameters */
4834f1ed78eSThomas Monjalon extern bool setup_on_probe_event; /**< disabled by port setup-on iterator */
484e505d84cSAnatoly Burakov extern uint8_t hot_plug; /**< enable by "--hot-plug" parameter */
485e505d84cSAnatoly Burakov extern int do_mlockall; /**< set by "--mlockall" or "--no-mlockall" parameter */
486b0a9354aSPavan Nikhilesh extern uint8_t clear_ptypes; /**< disabled by set ptype cmd */
487af75078fSIntel 
488b6ea6408SIntel /*
489b6ea6408SIntel  * Store specified sockets on which memory pool to be used by ports
490b6ea6408SIntel  * is allocated.
491b6ea6408SIntel  */
49263531389SGeorgios Katsikas extern uint8_t port_numa[RTE_MAX_ETHPORTS];
493b6ea6408SIntel 
494b6ea6408SIntel /*
495b6ea6408SIntel  * Store specified sockets on which RX ring to be used by ports
496b6ea6408SIntel  * is allocated.
497b6ea6408SIntel  */
49863531389SGeorgios Katsikas extern uint8_t rxring_numa[RTE_MAX_ETHPORTS];
499b6ea6408SIntel 
500b6ea6408SIntel /*
501b6ea6408SIntel  * Store specified sockets on which TX ring to be used by ports
502b6ea6408SIntel  * is allocated.
503b6ea6408SIntel  */
50463531389SGeorgios Katsikas extern uint8_t txring_numa[RTE_MAX_ETHPORTS];
505b6ea6408SIntel 
506b6ea6408SIntel extern uint8_t socket_num;
507b6ea6408SIntel 
508af75078fSIntel /*
509af75078fSIntel  * Configuration of logical cores:
510af75078fSIntel  * nb_fwd_lcores <= nb_cfg_lcores <= nb_lcores
511af75078fSIntel  */
512af75078fSIntel extern lcoreid_t nb_lcores; /**< Number of logical cores probed at init time. */
513af75078fSIntel extern lcoreid_t nb_cfg_lcores; /**< Number of configured logical cores. */
514af75078fSIntel extern lcoreid_t nb_fwd_lcores; /**< Number of forwarding logical cores. */
515af75078fSIntel extern unsigned int fwd_lcores_cpuids[RTE_MAX_LCORE];
516c9cafcc8SShahaf Shuler extern unsigned int num_sockets;
517c9cafcc8SShahaf Shuler extern unsigned int socket_ids[RTE_MAX_NUMA_NODES];
518af75078fSIntel 
519af75078fSIntel /*
520af75078fSIntel  * Configuration of Ethernet ports:
521af75078fSIntel  * nb_fwd_ports <= nb_cfg_ports <= nb_ports
522af75078fSIntel  */
523af75078fSIntel extern portid_t nb_ports; /**< Number of ethernet ports probed at init time. */
524af75078fSIntel extern portid_t nb_cfg_ports; /**< Number of configured ports. */
525af75078fSIntel extern portid_t nb_fwd_ports; /**< Number of forwarding ports. */
526af75078fSIntel extern portid_t fwd_ports_ids[RTE_MAX_ETHPORTS];
527af75078fSIntel extern struct rte_port *ports;
528af75078fSIntel 
529af75078fSIntel extern struct rte_eth_rxmode rx_mode;
530fd8c20aaSShahaf Shuler extern struct rte_eth_txmode tx_mode;
531fd8c20aaSShahaf Shuler 
5328a387fa8SHelin Zhang extern uint64_t rss_hf;
533af75078fSIntel 
5341c69df45SOri Kam extern queueid_t nb_hairpinq;
535af75078fSIntel extern queueid_t nb_rxq;
536af75078fSIntel extern queueid_t nb_txq;
537af75078fSIntel 
538af75078fSIntel extern uint16_t nb_rxd;
539af75078fSIntel extern uint16_t nb_txd;
540af75078fSIntel 
541f2c5125aSPablo de Lara extern int16_t rx_free_thresh;
542f2c5125aSPablo de Lara extern int8_t rx_drop_en;
543f2c5125aSPablo de Lara extern int16_t tx_free_thresh;
544f2c5125aSPablo de Lara extern int16_t tx_rs_thresh;
545af75078fSIntel 
5463c156061SJens Freimann extern uint16_t noisy_tx_sw_bufsz;
5473c156061SJens Freimann extern uint16_t noisy_tx_sw_buf_flush_time;
5483c156061SJens Freimann extern uint64_t noisy_lkup_mem_sz;
5493c156061SJens Freimann extern uint64_t noisy_lkup_num_writes;
5503c156061SJens Freimann extern uint64_t noisy_lkup_num_reads;
5513c156061SJens Freimann extern uint64_t noisy_lkup_num_reads_writes;
5523c156061SJens Freimann 
553900550deSIntel extern uint8_t dcb_config;
554900550deSIntel 
55526cbb419SViacheslav Ovsiienko extern uint32_t mbuf_data_size_n;
55626cbb419SViacheslav Ovsiienko extern uint16_t mbuf_data_size[MAX_SEGS_BUFFER_SPLIT];
55726cbb419SViacheslav Ovsiienko /**< Mbuf data space size. */
558c8798818SIntel extern uint32_t param_total_num_mbufs;
559af75078fSIntel 
560cfea1f30SPablo de Lara extern uint16_t stats_period;
56162d3216dSReshma Pattan 
56263b72657SIvan Ilchenko extern struct rte_eth_xstat_name *xstats_display;
56363b72657SIvan Ilchenko extern unsigned int xstats_display_num;
56463b72657SIvan Ilchenko 
56523095155SDariusz Sosnowski extern uint32_t hairpin_mode;
56601817b10SBing Zhao 
567a8d0d473SBruce Richardson #ifdef RTE_LIB_LATENCYSTATS
56862d3216dSReshma Pattan extern uint8_t latencystats_enabled;
56962d3216dSReshma Pattan extern lcoreid_t latencystats_lcore_id;
57062d3216dSReshma Pattan #endif
57162d3216dSReshma Pattan 
572a8d0d473SBruce Richardson #ifdef RTE_LIB_BITRATESTATS
573e25e6c70SRemy Horton extern lcoreid_t bitrate_lcore_id;
574e25e6c70SRemy Horton extern uint8_t bitrate_enabled;
575e25e6c70SRemy Horton #endif
576e25e6c70SRemy Horton 
5771bb4a528SFerruh Yigit extern uint32_t max_rx_pkt_len;
5781bb4a528SFerruh Yigit 
579af75078fSIntel /*
5800f2096d7SViacheslav Ovsiienko  * Configuration of packet segments used to scatter received packets
5810f2096d7SViacheslav Ovsiienko  * if some of split features is configured.
5820f2096d7SViacheslav Ovsiienko  */
58352e2e7edSYuan Wang extern uint32_t rx_pkt_hdr_protos[MAX_SEGS_BUFFER_SPLIT];
5840f2096d7SViacheslav Ovsiienko extern uint16_t rx_pkt_seg_lengths[MAX_SEGS_BUFFER_SPLIT];
5850f2096d7SViacheslav Ovsiienko extern uint8_t  rx_pkt_nb_segs; /**< Number of segments to split */
58691c78e09SViacheslav Ovsiienko extern uint16_t rx_pkt_seg_offsets[MAX_SEGS_BUFFER_SPLIT];
58791c78e09SViacheslav Ovsiienko extern uint8_t  rx_pkt_nb_offs; /**< Number of specified offsets */
5880f2096d7SViacheslav Ovsiienko 
5890f2096d7SViacheslav Ovsiienko /*
590af75078fSIntel  * Configuration of packet segments used by the "txonly" processing engine.
591af75078fSIntel  */
592af75078fSIntel #define TXONLY_DEF_PACKET_LEN 64
593af75078fSIntel extern uint16_t tx_pkt_length; /**< Length of TXONLY packet */
594af75078fSIntel extern uint16_t tx_pkt_seg_lengths[RTE_MAX_SEGS_PER_PKT]; /**< Seg. lengths */
595af75078fSIntel extern uint8_t  tx_pkt_nb_segs; /**< Number of segments in TX packets */
5964940344dSViacheslav Ovsiienko extern uint32_t tx_pkt_times_intra;
5974940344dSViacheslav Ovsiienko extern uint32_t tx_pkt_times_inter;
598af75078fSIntel 
59979bec05bSKonstantin Ananyev enum tx_pkt_split {
60079bec05bSKonstantin Ananyev 	TX_PKT_SPLIT_OFF,
60179bec05bSKonstantin Ananyev 	TX_PKT_SPLIT_ON,
60279bec05bSKonstantin Ananyev 	TX_PKT_SPLIT_RND,
60379bec05bSKonstantin Ananyev };
60479bec05bSKonstantin Ananyev 
60579bec05bSKonstantin Ananyev extern enum tx_pkt_split tx_pkt_split;
60679bec05bSKonstantin Ananyev 
60782010ef5SYongseok Koh extern uint8_t txonly_multi_flow;
60882010ef5SYongseok Koh 
609f4d178c1SXueming Li extern uint32_t rxq_share;
610f4d178c1SXueming Li 
611af75078fSIntel extern uint16_t nb_pkt_per_burst;
6126c02043eSIgor Russkikh extern uint16_t nb_pkt_flowgen_clones;
613861e7684SZhihong Wang extern int nb_flows_flowgen;
614af75078fSIntel extern uint16_t mb_mempool_cache;
615f2c5125aSPablo de Lara extern int8_t rx_pthresh;
616f2c5125aSPablo de Lara extern int8_t rx_hthresh;
617f2c5125aSPablo de Lara extern int8_t rx_wthresh;
618f2c5125aSPablo de Lara extern int8_t tx_pthresh;
619f2c5125aSPablo de Lara extern int8_t tx_hthresh;
620f2c5125aSPablo de Lara extern int8_t tx_wthresh;
621af75078fSIntel 
622bf5b2126SStephen Hemminger extern uint16_t tx_udp_src_port;
623bf5b2126SStephen Hemminger extern uint16_t tx_udp_dst_port;
624bf5b2126SStephen Hemminger 
625bf5b2126SStephen Hemminger extern uint32_t tx_ip_src_addr;
626bf5b2126SStephen Hemminger extern uint32_t tx_ip_dst_addr;
627bf5b2126SStephen Hemminger 
628af75078fSIntel extern struct fwd_config cur_fwd_config;
629af75078fSIntel extern struct fwd_engine *cur_fwd_eng;
630bf56fce1SZhihong Wang extern uint32_t retry_enabled;
631af75078fSIntel extern struct fwd_lcore  **fwd_lcores;
632af75078fSIntel extern struct fwd_stream **fwd_streams;
633af75078fSIntel 
63439e5e20fSXueming Li extern uint16_t vxlan_gpe_udp_port; /**< UDP port of tunnel VXLAN-GPE. */
635ea0e711bSOphir Munk extern uint16_t geneve_udp_port; /**< UDP port of tunnel GENEVE. */
63639e5e20fSXueming Li 
637af75078fSIntel extern portid_t nb_peer_eth_addrs; /**< Number of peer ethernet addresses. */
6386d13ea8eSOlivier Matz extern struct rte_ether_addr peer_eth_addrs[RTE_MAX_ETHPORTS];
639af75078fSIntel 
64057e85242SBruce Richardson extern uint32_t burst_tx_delay_time; /**< Burst tx delay time(us) for mac-retry. */
64157e85242SBruce Richardson extern uint32_t burst_tx_retry_num;  /**< Burst tx retry number for mac-retry. */
64257e85242SBruce Richardson 
6436970401eSDavid Marchand #ifdef RTE_LIB_GRO
644b7091f1dSJiayu Hu #define GRO_DEFAULT_ITEM_NUM_PER_FLOW 32
645b7091f1dSJiayu Hu #define GRO_DEFAULT_FLOW_NUM (RTE_GRO_MAX_BURST_ITEM_NUM / \
646b7091f1dSJiayu Hu 		GRO_DEFAULT_ITEM_NUM_PER_FLOW)
647b7091f1dSJiayu Hu 
648b7091f1dSJiayu Hu #define GRO_DEFAULT_FLUSH_CYCLES 1
649b7091f1dSJiayu Hu #define GRO_MAX_FLUSH_CYCLES 4
650b7091f1dSJiayu Hu 
651b40f8d78SJiayu Hu struct gro_status {
652b40f8d78SJiayu Hu 	struct rte_gro_param param;
653b40f8d78SJiayu Hu 	uint8_t enable;
654b40f8d78SJiayu Hu };
655b40f8d78SJiayu Hu extern struct gro_status gro_ports[RTE_MAX_ETHPORTS];
656b7091f1dSJiayu Hu extern uint8_t gro_flush_cycles;
6576970401eSDavid Marchand #endif /* RTE_LIB_GRO */
658b40f8d78SJiayu Hu 
6596970401eSDavid Marchand #ifdef RTE_LIB_GSO
66052f38a20SJiayu Hu #define GSO_MAX_PKT_BURST 2048
66152f38a20SJiayu Hu struct gso_status {
66252f38a20SJiayu Hu 	uint8_t enable;
66352f38a20SJiayu Hu };
66452f38a20SJiayu Hu extern struct gso_status gso_ports[RTE_MAX_ETHPORTS];
66552f38a20SJiayu Hu extern uint16_t gso_max_segment_size;
6666970401eSDavid Marchand #endif /* RTE_LIB_GSO */
66752f38a20SJiayu Hu 
6681960be7dSNelio Laranjeiro /* VXLAN encap/decap parameters. */
6691960be7dSNelio Laranjeiro struct vxlan_encap_conf {
6701960be7dSNelio Laranjeiro 	uint32_t select_ipv4:1;
6711960be7dSNelio Laranjeiro 	uint32_t select_vlan:1;
67262e8a5a8SViacheslav Ovsiienko 	uint32_t select_tos_ttl:1;
6731960be7dSNelio Laranjeiro 	uint8_t vni[3];
6741960be7dSNelio Laranjeiro 	rte_be16_t udp_src;
6751960be7dSNelio Laranjeiro 	rte_be16_t udp_dst;
6761960be7dSNelio Laranjeiro 	rte_be32_t ipv4_src;
6771960be7dSNelio Laranjeiro 	rte_be32_t ipv4_dst;
6781960be7dSNelio Laranjeiro 	uint8_t ipv6_src[16];
6791960be7dSNelio Laranjeiro 	uint8_t ipv6_dst[16];
6801960be7dSNelio Laranjeiro 	rte_be16_t vlan_tci;
68162e8a5a8SViacheslav Ovsiienko 	uint8_t ip_tos;
68262e8a5a8SViacheslav Ovsiienko 	uint8_t ip_ttl;
68335b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
68435b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
6851960be7dSNelio Laranjeiro };
686f6e63e59SFerruh Yigit 
687f6e63e59SFerruh Yigit extern struct vxlan_encap_conf vxlan_encap_conf;
6881960be7dSNelio Laranjeiro 
689dcd962fcSNelio Laranjeiro /* NVGRE encap/decap parameters. */
690dcd962fcSNelio Laranjeiro struct nvgre_encap_conf {
691dcd962fcSNelio Laranjeiro 	uint32_t select_ipv4:1;
692dcd962fcSNelio Laranjeiro 	uint32_t select_vlan:1;
693dcd962fcSNelio Laranjeiro 	uint8_t tni[3];
694dcd962fcSNelio Laranjeiro 	rte_be32_t ipv4_src;
695dcd962fcSNelio Laranjeiro 	rte_be32_t ipv4_dst;
696dcd962fcSNelio Laranjeiro 	uint8_t ipv6_src[16];
697dcd962fcSNelio Laranjeiro 	uint8_t ipv6_dst[16];
698dcd962fcSNelio Laranjeiro 	rte_be16_t vlan_tci;
69935b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
70035b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
701dcd962fcSNelio Laranjeiro };
702f6e63e59SFerruh Yigit 
703f6e63e59SFerruh Yigit extern struct nvgre_encap_conf nvgre_encap_conf;
704dcd962fcSNelio Laranjeiro 
705a1191d39SOri Kam /* L2 encap parameters. */
706a1191d39SOri Kam struct l2_encap_conf {
707a1191d39SOri Kam 	uint32_t select_ipv4:1;
708a1191d39SOri Kam 	uint32_t select_vlan:1;
709a1191d39SOri Kam 	rte_be16_t vlan_tci;
71035b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
71135b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
712a1191d39SOri Kam };
713f6e63e59SFerruh Yigit extern struct l2_encap_conf l2_encap_conf;
714a1191d39SOri Kam 
715a1191d39SOri Kam /* L2 decap parameters. */
716a1191d39SOri Kam struct l2_decap_conf {
717a1191d39SOri Kam 	uint32_t select_vlan:1;
718a1191d39SOri Kam };
719f6e63e59SFerruh Yigit extern struct l2_decap_conf l2_decap_conf;
720a1191d39SOri Kam 
7213e77031bSOri Kam /* MPLSoGRE encap parameters. */
7223e77031bSOri Kam struct mplsogre_encap_conf {
7233e77031bSOri Kam 	uint32_t select_ipv4:1;
7243e77031bSOri Kam 	uint32_t select_vlan:1;
7253e77031bSOri Kam 	uint8_t label[3];
7263e77031bSOri Kam 	rte_be32_t ipv4_src;
7273e77031bSOri Kam 	rte_be32_t ipv4_dst;
7283e77031bSOri Kam 	uint8_t ipv6_src[16];
7293e77031bSOri Kam 	uint8_t ipv6_dst[16];
7303e77031bSOri Kam 	rte_be16_t vlan_tci;
73135b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
73235b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
7333e77031bSOri Kam };
734f6e63e59SFerruh Yigit extern struct mplsogre_encap_conf mplsogre_encap_conf;
7353e77031bSOri Kam 
7363e77031bSOri Kam /* MPLSoGRE decap parameters. */
7373e77031bSOri Kam struct mplsogre_decap_conf {
7383e77031bSOri Kam 	uint32_t select_ipv4:1;
7393e77031bSOri Kam 	uint32_t select_vlan:1;
7403e77031bSOri Kam };
741f6e63e59SFerruh Yigit extern struct mplsogre_decap_conf mplsogre_decap_conf;
7423e77031bSOri Kam 
743a1191d39SOri Kam /* MPLSoUDP encap parameters. */
744a1191d39SOri Kam struct mplsoudp_encap_conf {
745a1191d39SOri Kam 	uint32_t select_ipv4:1;
746a1191d39SOri Kam 	uint32_t select_vlan:1;
747a1191d39SOri Kam 	uint8_t label[3];
748a1191d39SOri Kam 	rte_be16_t udp_src;
749a1191d39SOri Kam 	rte_be16_t udp_dst;
750a1191d39SOri Kam 	rte_be32_t ipv4_src;
751a1191d39SOri Kam 	rte_be32_t ipv4_dst;
752a1191d39SOri Kam 	uint8_t ipv6_src[16];
753a1191d39SOri Kam 	uint8_t ipv6_dst[16];
754a1191d39SOri Kam 	rte_be16_t vlan_tci;
75535b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
75635b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
757a1191d39SOri Kam };
758f6e63e59SFerruh Yigit extern struct mplsoudp_encap_conf mplsoudp_encap_conf;
759a1191d39SOri Kam 
760a1191d39SOri Kam /* MPLSoUDP decap parameters. */
761a1191d39SOri Kam struct mplsoudp_decap_conf {
762a1191d39SOri Kam 	uint32_t select_ipv4:1;
763a1191d39SOri Kam 	uint32_t select_vlan:1;
764a1191d39SOri Kam };
765f6e63e59SFerruh Yigit extern struct mplsoudp_decap_conf mplsoudp_decap_conf;
766a1191d39SOri Kam 
767f9295aa2SXiaoyu Min extern enum rte_eth_rx_mq_mode rx_mq_mode;
768f9295aa2SXiaoyu Min 
7694d07cbefSBing Zhao extern struct rte_flow_action_conntrack conntrack_context;
7704d07cbefSBing Zhao 
771a550baf2SMin Hu (Connor) extern int proc_id;
772a550baf2SMin Hu (Connor) extern unsigned int num_procs;
773a550baf2SMin Hu (Connor) 
774a550baf2SMin Hu (Connor) static inline bool
775a550baf2SMin Hu (Connor) is_proc_primary(void)
776a550baf2SMin Hu (Connor) {
777a550baf2SMin Hu (Connor) 	return rte_eal_process_type() == RTE_PROC_PRIMARY;
778a550baf2SMin Hu (Connor) }
779a550baf2SMin Hu (Connor) 
780af75078fSIntel static inline unsigned int
781af75078fSIntel lcore_num(void)
782af75078fSIntel {
783af75078fSIntel 	unsigned int i;
784af75078fSIntel 
785af75078fSIntel 	for (i = 0; i < RTE_MAX_LCORE; ++i)
786af75078fSIntel 		if (fwd_lcores_cpuids[i] == rte_lcore_id())
787af75078fSIntel 			return i;
788af75078fSIntel 
789af75078fSIntel 	rte_panic("lcore_id of current thread not found in fwd_lcores_cpuids\n");
790af75078fSIntel }
791af75078fSIntel 
7922df00d56SHariprasad Govindharajan void
7932df00d56SHariprasad Govindharajan parse_fwd_portlist(const char *port);
7942df00d56SHariprasad Govindharajan 
795af75078fSIntel static inline struct fwd_lcore *
796af75078fSIntel current_fwd_lcore(void)
797af75078fSIntel {
798af75078fSIntel 	return fwd_lcores[lcore_num()];
799af75078fSIntel }
800af75078fSIntel 
801af75078fSIntel /* Mbuf Pools */
802af75078fSIntel static inline void
80326cbb419SViacheslav Ovsiienko mbuf_poolname_build(unsigned int sock_id, char *mp_name,
80426cbb419SViacheslav Ovsiienko 		    int name_size, uint16_t idx)
805af75078fSIntel {
80626cbb419SViacheslav Ovsiienko 	if (!idx)
80726cbb419SViacheslav Ovsiienko 		snprintf(mp_name, name_size,
80826cbb419SViacheslav Ovsiienko 			 MBUF_POOL_NAME_PFX "_%u", sock_id);
80926cbb419SViacheslav Ovsiienko 	else
81026cbb419SViacheslav Ovsiienko 		snprintf(mp_name, name_size,
81126cbb419SViacheslav Ovsiienko 			 MBUF_POOL_NAME_PFX "_%hu_%hu", (uint16_t)sock_id, idx);
812af75078fSIntel }
813af75078fSIntel 
814af75078fSIntel static inline struct rte_mempool *
81526cbb419SViacheslav Ovsiienko mbuf_pool_find(unsigned int sock_id, uint16_t idx)
816af75078fSIntel {
817af75078fSIntel 	char pool_name[RTE_MEMPOOL_NAMESIZE];
818af75078fSIntel 
81926cbb419SViacheslav Ovsiienko 	mbuf_poolname_build(sock_id, pool_name, sizeof(pool_name), idx);
820693f715dSHuawei Xie 	return rte_mempool_lookup((const char *)pool_name);
821af75078fSIntel }
822af75078fSIntel 
823bc700b67SDharmik Thakkar static inline void
824bc700b67SDharmik Thakkar get_start_cycles(uint64_t *start_tsc)
825bc700b67SDharmik Thakkar {
826bc700b67SDharmik Thakkar 	if (record_core_cycles)
827bc700b67SDharmik Thakkar 		*start_tsc = rte_rdtsc();
828bc700b67SDharmik Thakkar }
829bc700b67SDharmik Thakkar 
830bc700b67SDharmik Thakkar static inline void
831bc700b67SDharmik Thakkar get_end_cycles(struct fwd_stream *fs, uint64_t start_tsc)
832bc700b67SDharmik Thakkar {
833bc700b67SDharmik Thakkar 	if (record_core_cycles)
834bc700b67SDharmik Thakkar 		fs->core_cycles += rte_rdtsc() - start_tsc;
835bc700b67SDharmik Thakkar }
836bc700b67SDharmik Thakkar 
8370e4b1963SDharmik Thakkar static inline void
8380e4b1963SDharmik Thakkar inc_rx_burst_stats(struct fwd_stream *fs, uint16_t nb_rx)
8390e4b1963SDharmik Thakkar {
8400e4b1963SDharmik Thakkar 	if (record_burst_stats)
8410e4b1963SDharmik Thakkar 		fs->rx_burst_stats.pkt_burst_spread[nb_rx]++;
8420e4b1963SDharmik Thakkar }
8430e4b1963SDharmik Thakkar 
8440e4b1963SDharmik Thakkar static inline void
8450e4b1963SDharmik Thakkar inc_tx_burst_stats(struct fwd_stream *fs, uint16_t nb_tx)
8460e4b1963SDharmik Thakkar {
8470e4b1963SDharmik Thakkar 	if (record_burst_stats)
8480e4b1963SDharmik Thakkar 		fs->tx_burst_stats.pkt_burst_spread[nb_tx]++;
8490e4b1963SDharmik Thakkar }
8500e4b1963SDharmik Thakkar 
851af75078fSIntel /* Prototypes */
852761f7ae1SJie Zhou unsigned int parse_item_list(const char *str, const char *item_name,
853950d1516SBruce Richardson 			unsigned int max_items,
854950d1516SBruce Richardson 			unsigned int *parsed_items, int check_unique_values);
85552e2e7edSYuan Wang unsigned int parse_hdrs_list(const char *str, const char *item_name,
85652e2e7edSYuan Wang 			unsigned int max_item,
85723f2dfd3SYuan Wang 			unsigned int *parsed_items);
858af75078fSIntel void launch_args_parse(int argc, char** argv);
8590100a038SDavid Marchand void cmd_reconfig_device_queue(portid_t id, uint8_t dev, uint8_t queue);
86081ef862bSAllain Legacy void cmdline_read_from_file(const char *filename);
861592ab76fSDavid Marchand int init_cmdline(void);
862af75078fSIntel void prompt(void);
863d3a274ceSZhihong Wang void prompt_exit(void);
864af75078fSIntel void nic_stats_display(portid_t port_id);
865af75078fSIntel void nic_stats_clear(portid_t port_id);
866bfd5051bSOlivier Matz void nic_xstats_display(portid_t port_id);
867bfd5051bSOlivier Matz void nic_xstats_clear(portid_t port_id);
86855e51c96SNithin Dabilpuram void device_infos_display(const char *identifier);
869af75078fSIntel void port_infos_display(portid_t port_id);
8704bfcbcf5SEmma Finn void port_summary_display(portid_t port_id);
8716b67721dSDavid Liu void port_eeprom_display(portid_t port_id);
8726b67721dSDavid Liu void port_module_eeprom_display(portid_t port_id);
8734bfcbcf5SEmma Finn void port_summary_header_display(void);
874ab3257e1SKonstantin Ananyev void rx_queue_infos_display(portid_t port_idi, uint16_t queue_id);
875ab3257e1SKonstantin Ananyev void tx_queue_infos_display(portid_t port_idi, uint16_t queue_id);
876af75078fSIntel void fwd_lcores_config_display(void);
87765744833SXueming Li bool pkt_fwd_shared_rxq_check(void);
8780c0db76fSBernard Iremonger void pkt_fwd_config_display(struct fwd_config *cfg);
879af75078fSIntel void rxtx_config_display(void);
880af75078fSIntel void fwd_config_setup(void);
881af75078fSIntel void set_def_fwd_config(void);
882a21d5a4bSDeclan Doherty void reconfig(portid_t new_port_id, unsigned socket_id);
883013af9b6SIntel int init_fwd_streams(void);
88403ce2c53SMatan Azrad void update_fwd_ports(portid_t new_pid);
885013af9b6SIntel 
886aac6f11fSWisam Jaddo void set_fwd_eth_peer(portid_t port_id, char *peer_addr);
887aac6f11fSWisam Jaddo 
888ae03d0d1SIvan Boule void port_mtu_set(portid_t port_id, uint16_t mtu);
8894b61b877SBing Zhao int port_action_handle_create(portid_t port_id, uint32_t id,
8904b61b877SBing Zhao 			      const struct rte_flow_indir_action_conf *conf,
89155509e3aSAndrey Vesnovaty 			      const struct rte_flow_action *action);
8924b61b877SBing Zhao int port_action_handle_destroy(portid_t port_id,
89355509e3aSAndrey Vesnovaty 			       uint32_t n, const uint32_t *action);
894f7352c17SDmitry Kozlyuk int port_action_handle_flush(portid_t port_id);
8954b61b877SBing Zhao struct rte_flow_action_handle *port_action_handle_get_by_id(portid_t port_id,
89655509e3aSAndrey Vesnovaty 							    uint32_t id);
8974b61b877SBing Zhao int port_action_handle_update(portid_t port_id, uint32_t id,
89855509e3aSAndrey Vesnovaty 			      const struct rte_flow_action *action);
8999ad3a41aSAlexander Kozyrev int port_flow_get_info(portid_t port_id);
9009ad3a41aSAlexander Kozyrev int port_flow_configure(portid_t port_id,
9019ad3a41aSAlexander Kozyrev 			const struct rte_flow_port_attr *port_attr,
9029ad3a41aSAlexander Kozyrev 			uint16_t nb_queue,
9039ad3a41aSAlexander Kozyrev 			const struct rte_flow_queue_attr *queue_attr);
90404cc665fSAlexander Kozyrev int port_flow_pattern_template_create(portid_t port_id, uint32_t id,
90504cc665fSAlexander Kozyrev 				      const struct rte_flow_pattern_template_attr *attr,
90604cc665fSAlexander Kozyrev 				      const struct rte_flow_item *pattern);
90704cc665fSAlexander Kozyrev int port_flow_pattern_template_destroy(portid_t port_id, uint32_t n,
90804cc665fSAlexander Kozyrev 				       const uint32_t *template);
90904cc665fSAlexander Kozyrev int port_flow_actions_template_create(portid_t port_id, uint32_t id,
91004cc665fSAlexander Kozyrev 				      const struct rte_flow_actions_template_attr *attr,
91104cc665fSAlexander Kozyrev 				      const struct rte_flow_action *actions,
91204cc665fSAlexander Kozyrev 				      const struct rte_flow_action *masks);
91304cc665fSAlexander Kozyrev int port_flow_actions_template_destroy(portid_t port_id, uint32_t n,
91404cc665fSAlexander Kozyrev 				       const uint32_t *template);
915c4b38873SAlexander Kozyrev int port_flow_template_table_create(portid_t port_id, uint32_t id,
916c4b38873SAlexander Kozyrev 		   const struct rte_flow_template_table_attr *table_attr,
917c4b38873SAlexander Kozyrev 		   uint32_t nb_pattern_templates, uint32_t *pattern_templates,
918c4b38873SAlexander Kozyrev 		   uint32_t nb_actions_templates, uint32_t *actions_templates);
919c4b38873SAlexander Kozyrev int port_flow_template_table_destroy(portid_t port_id,
920c4b38873SAlexander Kozyrev 			    uint32_t n, const uint32_t *table);
921ecdc927bSAlexander Kozyrev int port_queue_flow_create(portid_t port_id, queueid_t queue_id,
922ecdc927bSAlexander Kozyrev 			   bool postpone, uint32_t table_id,
923ecdc927bSAlexander Kozyrev 			   uint32_t pattern_idx, uint32_t actions_idx,
924ecdc927bSAlexander Kozyrev 			   const struct rte_flow_item *pattern,
925ecdc927bSAlexander Kozyrev 			   const struct rte_flow_action *actions);
926ecdc927bSAlexander Kozyrev int port_queue_flow_destroy(portid_t port_id, queueid_t queue_id,
927ecdc927bSAlexander Kozyrev 			    bool postpone, uint32_t n, const uint32_t *rule);
928d906fff5SAlexander Kozyrev int port_queue_action_handle_create(portid_t port_id, uint32_t queue_id,
929d906fff5SAlexander Kozyrev 			bool postpone, uint32_t id,
930d906fff5SAlexander Kozyrev 			const struct rte_flow_indir_action_conf *conf,
931d906fff5SAlexander Kozyrev 			const struct rte_flow_action *action);
932d906fff5SAlexander Kozyrev int port_queue_action_handle_destroy(portid_t port_id,
933d906fff5SAlexander Kozyrev 				     uint32_t queue_id, bool postpone,
934d906fff5SAlexander Kozyrev 				     uint32_t n, const uint32_t *action);
935d906fff5SAlexander Kozyrev int port_queue_action_handle_update(portid_t port_id, uint32_t queue_id,
936d906fff5SAlexander Kozyrev 				    bool postpone, uint32_t id,
937d906fff5SAlexander Kozyrev 				    const struct rte_flow_action *action);
938c9dc0384SSuanming Mou int port_queue_action_handle_query(portid_t port_id, uint32_t queue_id,
939c9dc0384SSuanming Mou 				   bool postpone, uint32_t id);
9409cbbee14SAlexander Kozyrev int port_queue_flow_push(portid_t port_id, queueid_t queue_id);
941f9bf7dffSAlexander Kozyrev int port_queue_flow_pull(portid_t port_id, queueid_t queue_id);
942*966eb55eSMichael Baum void port_queue_flow_aged(portid_t port_id, uint32_t queue_id, uint8_t destroy);
943938a184aSAdrien Mazarguil int port_flow_validate(portid_t port_id,
944938a184aSAdrien Mazarguil 		       const struct rte_flow_attr *attr,
945938a184aSAdrien Mazarguil 		       const struct rte_flow_item *pattern,
9461b9f2746SGregory Etelson 		       const struct rte_flow_action *actions,
9471b9f2746SGregory Etelson 		       const struct tunnel_ops *tunnel_ops);
948938a184aSAdrien Mazarguil int port_flow_create(portid_t port_id,
949938a184aSAdrien Mazarguil 		     const struct rte_flow_attr *attr,
950938a184aSAdrien Mazarguil 		     const struct rte_flow_item *pattern,
9511b9f2746SGregory Etelson 		     const struct rte_flow_action *actions,
9521b9f2746SGregory Etelson 		     const struct tunnel_ops *tunnel_ops);
9534b61b877SBing Zhao int port_action_handle_query(portid_t port_id, uint32_t id);
9540e459ffaSDong Zhou void update_age_action_context(const struct rte_flow_action *actions,
9550e459ffaSDong Zhou 		     struct port_flow *pf);
95668629be3SKe Zhang int mcast_addr_pool_destroy(portid_t port_id);
957938a184aSAdrien Mazarguil int port_flow_destroy(portid_t port_id, uint32_t n, const uint32_t *rule);
958938a184aSAdrien Mazarguil int port_flow_flush(portid_t port_id);
959bf085dcbSHaifei Luo int port_flow_dump(portid_t port_id, bool dump_all,
960bf085dcbSHaifei Luo 			uint32_t rule, const char *file_name);
961938a184aSAdrien Mazarguil int port_flow_query(portid_t port_id, uint32_t rule,
962fb8fd96dSDeclan Doherty 		    const struct rte_flow_action *action);
963938a184aSAdrien Mazarguil void port_flow_list(portid_t port_id, uint32_t n, const uint32_t *group);
9640e459ffaSDong Zhou void port_flow_aged(portid_t port_id, uint8_t destroy);
9651b9f2746SGregory Etelson const char *port_flow_tunnel_type(struct rte_flow_tunnel *tunnel);
9661b9f2746SGregory Etelson struct port_flow_tunnel *
9671b9f2746SGregory Etelson port_flow_locate_tunnel(uint16_t port_id, struct rte_flow_tunnel *tun);
9681b9f2746SGregory Etelson void port_flow_tunnel_list(portid_t port_id);
9691b9f2746SGregory Etelson void port_flow_tunnel_destroy(portid_t port_id, uint32_t tunnel_id);
9701b9f2746SGregory Etelson void port_flow_tunnel_create(portid_t port_id, const struct tunnel_ops *ops);
971323f811aSAdrien Mazarguil int port_flow_isolate(portid_t port_id, int set);
972f29fa2c5SHaifei Luo int port_meter_policy_add(portid_t port_id, uint32_t policy_id,
973f29fa2c5SHaifei Luo 		const struct rte_flow_action *actions);
9749c4a0c18SAlexander Kozyrev struct rte_flow_meter_profile *port_meter_profile_get_by_id(portid_t port_id,
9759c4a0c18SAlexander Kozyrev 							    uint32_t id);
9769c4a0c18SAlexander Kozyrev struct rte_flow_meter_policy *port_meter_policy_get_by_id(portid_t port_id,
9779c4a0c18SAlexander Kozyrev 							  uint32_t id);
978af75078fSIntel 
979af75078fSIntel void rx_ring_desc_display(portid_t port_id, queueid_t rxq_id, uint16_t rxd_id);
980af75078fSIntel void tx_ring_desc_display(portid_t port_id, queueid_t txq_id, uint16_t txd_id);
981af75078fSIntel 
982013af9b6SIntel int set_fwd_lcores_list(unsigned int *lcorelist, unsigned int nb_lc);
983013af9b6SIntel int set_fwd_lcores_mask(uint64_t lcoremask);
984af75078fSIntel void set_fwd_lcores_number(uint16_t nb_lc);
985af75078fSIntel 
986af75078fSIntel void set_fwd_ports_list(unsigned int *portlist, unsigned int nb_pt);
987af75078fSIntel void set_fwd_ports_mask(uint64_t portmask);
988af75078fSIntel void set_fwd_ports_number(uint16_t nb_pt);
989a8ef3e3aSBernard Iremonger int port_is_forwarding(portid_t port_id);
990af75078fSIntel 
991a47aa8b9SIntel void rx_vlan_strip_set(portid_t port_id, int on);
992a47aa8b9SIntel void rx_vlan_strip_set_on_queue(portid_t port_id, uint16_t queue_id, int on);
993a47aa8b9SIntel 
994a47aa8b9SIntel void rx_vlan_filter_set(portid_t port_id, int on);
995af75078fSIntel void rx_vlan_all_filter_set(portid_t port_id, int on);
9962a0b4198SVivek Sharma void rx_vlan_qinq_strip_set(portid_t port_id, int on);
99764b01ee0SMichal Jastrzebski int rx_vft_set(portid_t port_id, uint16_t vlan_id, int on);
998a47aa8b9SIntel void vlan_extend_set(portid_t port_id, int on);
99919b16e2fSHelin Zhang void vlan_tpid_set(portid_t port_id, enum rte_vlan_type vlan_type,
100019b16e2fSHelin Zhang 		   uint16_t tp_id);
1001af75078fSIntel void tx_vlan_set(portid_t port_id, uint16_t vlan_id);
100292ebda07SHelin Zhang void tx_qinq_set(portid_t port_id, uint16_t vlan_id, uint16_t vlan_id_outer);
1003af75078fSIntel void tx_vlan_reset(portid_t port_id);
1004529ba951SHelin Zhang void tx_vlan_pvid_set(portid_t port_id, uint16_t vlan_id, int on);
1005ed30d9b6SIntel 
1006ed30d9b6SIntel void set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint8_t map_value);
1007ed30d9b6SIntel 
1008a4fd5eeeSElza Mathew void set_xstats_hide_zero(uint8_t on_off);
1009a4fd5eeeSElza Mathew 
1010bc700b67SDharmik Thakkar void set_record_core_cycles(uint8_t on_off);
10110e4b1963SDharmik Thakkar void set_record_burst_stats(uint8_t on_off);
1012af75078fSIntel void set_verbose_level(uint16_t vb_level);
10130f2096d7SViacheslav Ovsiienko void set_rx_pkt_segments(unsigned int *seg_lengths, unsigned int nb_segs);
101452e2e7edSYuan Wang void set_rx_pkt_hdrs(unsigned int *seg_protos, unsigned int nb_segs);
101552e2e7edSYuan Wang void show_rx_pkt_hdrs(void);
10160f2096d7SViacheslav Ovsiienko void show_rx_pkt_segments(void);
101791c78e09SViacheslav Ovsiienko void set_rx_pkt_offsets(unsigned int *seg_offsets, unsigned int nb_offs);
101891c78e09SViacheslav Ovsiienko void show_rx_pkt_offsets(void);
10190f2096d7SViacheslav Ovsiienko void set_tx_pkt_segments(unsigned int *seg_lengths, unsigned int nb_segs);
102079bec05bSKonstantin Ananyev void show_tx_pkt_segments(void);
10214940344dSViacheslav Ovsiienko void set_tx_pkt_times(unsigned int *tx_times);
10224940344dSViacheslav Ovsiienko void show_tx_pkt_times(void);
102379bec05bSKonstantin Ananyev void set_tx_pkt_split(const char *name);
1024ce0a4a1dSJie Zhou int parse_fec_mode(const char *name, uint32_t *fec_capa);
1025b19da32eSMin Hu (Connor) void show_fec_capability(uint32_t num, struct rte_eth_fec_capa *speed_fec_capa);
1026af75078fSIntel void set_nb_pkt_per_burst(uint16_t pkt_burst);
1027769ce6b1SThomas Monjalon char *list_pkt_forwarding_modes(void);
1028bf56fce1SZhihong Wang char *list_pkt_forwarding_retry_modes(void);
1029af75078fSIntel void set_pkt_forwarding_mode(const char *fwd_mode);
1030af75078fSIntel void start_packet_forwarding(int with_tx_first);
103153324971SDavid Marchand void fwd_stats_display(void);
103253324971SDavid Marchand void fwd_stats_reset(void);
1033af75078fSIntel void stop_packet_forwarding(void);
1034cfae07fdSOuyang Changchun void dev_set_link_up(portid_t pid);
1035cfae07fdSOuyang Changchun void dev_set_link_down(portid_t pid);
1036ce8d5614SIntel void init_port_config(void);
103741b05095SBernard Iremonger void set_port_slave_flag(portid_t slave_pid);
103841b05095SBernard Iremonger void clear_port_slave_flag(portid_t slave_pid);
10390e545d30SBernard Iremonger uint8_t port_is_bonding_slave(portid_t slave_pid);
10400e545d30SBernard Iremonger 
10411a572499SJingjing Wu int init_port_dcb_config(portid_t pid, enum dcb_mode_enable dcb_mode,
10421a572499SJingjing Wu 		     enum rte_eth_nb_tcs num_tcs,
10431a572499SJingjing Wu 		     uint8_t pfc_en);
1044148f963fSBruce Richardson int start_port(portid_t pid);
1045ce8d5614SIntel void stop_port(portid_t pid);
1046ce8d5614SIntel void close_port(portid_t pid);
104797f1e196SWei Dai void reset_port(portid_t pid);
1048edab33b1STetsuya Mukawa void attach_port(char *identifier);
10495edee5f6SThomas Monjalon void detach_devargs(char *identifier);
1050f8e5baa2SThomas Monjalon void detach_port_device(portid_t port_id);
1051ce8d5614SIntel int all_ports_stopped(void);
10526018eb8cSShahaf Shuler int port_is_stopped(portid_t port_id);
10535f4ec54fSChen Jing D(Mark) int port_is_started(portid_t port_id);
1054af75078fSIntel void pmd_test_exit(void);
10551be514fbSAndrew Rybchenko #if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE)
1056af75078fSIntel void fdir_get_infos(portid_t port_id);
10571be514fbSAndrew Rybchenko #endif
105866c59490SHelin Zhang void port_rss_reta_info(portid_t port_id,
105966c59490SHelin Zhang 			struct rte_eth_rss_reta_entry64 *reta_conf,
106066c59490SHelin Zhang 			uint16_t nb_entries);
10616a18e1afSOuyang Changchun 
10627741e4cfSIntel void set_vf_traffic(portid_t port_id, uint8_t is_rx, uint16_t vf, uint8_t on);
1063af75078fSIntel 
10642befc67fSViacheslav Ovsiienko int
10652befc67fSViacheslav Ovsiienko rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
10662befc67fSViacheslav Ovsiienko 	       uint16_t nb_rx_desc, unsigned int socket_id,
10672befc67fSViacheslav Ovsiienko 	       struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp);
10682befc67fSViacheslav Ovsiienko 
10693a26e41eSSatha Rao int set_queue_rate_limit(portid_t port_id, uint16_t queue_idx, uint32_t rate);
10703a26e41eSSatha Rao int set_vf_rate_limit(portid_t port_id, uint16_t vf, uint32_t rate,
10716a18e1afSOuyang Changchun 				uint64_t q_msk);
10726a18e1afSOuyang Changchun 
1073bc70e559SSpike Du int set_rxq_avail_thresh(portid_t port_id, uint16_t queue_id,
1074bc70e559SSpike Du 			 uint8_t avail_thresh);
1075bc70e559SSpike Du 
10765b4557ecSFerruh Yigit void port_rss_hash_conf_show(portid_t port_id, int show_rss_key);
10778205e241SNelio Laranjeiro void port_rss_hash_key_update(portid_t port_id, char rss_type[],
10783529e8f3SNatanael Copa 			      uint8_t *hash_key, uint8_t hash_key_len);
10795f4ec54fSChen Jing D(Mark) int rx_queue_id_is_invalid(queueid_t rxq_id);
10805f4ec54fSChen Jing D(Mark) int tx_queue_id_is_invalid(queueid_t txq_id);
10816970401eSDavid Marchand #ifdef RTE_LIB_GRO
1082b7091f1dSJiayu Hu void setup_gro(const char *onoff, portid_t port_id);
1083b7091f1dSJiayu Hu void setup_gro_flush_cycles(uint8_t cycles);
1084b7091f1dSJiayu Hu void show_gro(portid_t port_id);
10856970401eSDavid Marchand #endif
10866970401eSDavid Marchand #ifdef RTE_LIB_GSO
108752f38a20SJiayu Hu void setup_gso(const char *mode, portid_t port_id);
10886970401eSDavid Marchand #endif
10896f51deb9SIvan Ilchenko int eth_dev_info_get_print_err(uint16_t port_id,
10906f51deb9SIvan Ilchenko 			struct rte_eth_dev_info *dev_info);
1091655eae01SJie Wang int eth_dev_conf_get_print_err(uint16_t port_id,
1092655eae01SJie Wang 			struct rte_eth_conf *dev_conf);
109334fc1051SIvan Ilchenko void eth_set_promisc_mode(uint16_t port_id, int enable);
10948835806dSIvan Ilchenko void eth_set_allmulticast_mode(uint16_t port, int enable);
1095e661a08bSIgor Romanov int eth_link_get_nowait_print_err(uint16_t port_id, struct rte_eth_link *link);
1096a5279d25SIgor Romanov int eth_macaddr_get_print_err(uint16_t port_id,
1097a5279d25SIgor Romanov 			struct rte_ether_addr *mac_addr);
10986f51deb9SIvan Ilchenko 
1099e1d44d0aSKalesh AP /* Functions to display the set of MAC addresses added to a port*/
1100e1d44d0aSKalesh AP void show_macs(portid_t port_id);
1101e1d44d0aSKalesh AP void show_mcast_macs(portid_t port_id);
110216321de0SIvan Boule 
11038fff6675SIvan Boule /* Functions to manage the set of filtered Multicast MAC addresses */
11046d13ea8eSOlivier Matz void mcast_addr_add(portid_t port_id, struct rte_ether_addr *mc_addr);
11056d13ea8eSOlivier Matz void mcast_addr_remove(portid_t port_id, struct rte_ether_addr *mc_addr);
110628caa76aSZhiyong Yang void port_dcb_info_display(portid_t port_id);
11078fff6675SIvan Boule 
11089999dc6fSKirill Rybalchenko uint8_t *open_file(const char *file_path, uint32_t *size);
11099999dc6fSKirill Rybalchenko int save_file(const char *file_path, uint8_t *buf, uint32_t size);
11109999dc6fSKirill Rybalchenko int close_file(uint8_t *buf);
1111a92a5a2cSBeilei Xing 
1112edab33b1STetsuya Mukawa enum print_warning {
1113edab33b1STetsuya Mukawa 	ENABLED_WARN = 0,
1114edab33b1STetsuya Mukawa 	DISABLED_WARN
1115edab33b1STetsuya Mukawa };
1116edab33b1STetsuya Mukawa int port_id_is_invalid(portid_t port_id, enum print_warning warning);
11178f3c4176SMatan Azrad void print_valid_ports(void);
1118c9cafcc8SShahaf Shuler int new_socket_id(unsigned int socket_id);
1119edab33b1STetsuya Mukawa 
11203f7311baSWei Dai queueid_t get_allowed_max_nb_rxq(portid_t *pid);
11213f7311baSWei Dai int check_nb_rxq(queueid_t rxq);
112236db4f6cSWei Dai queueid_t get_allowed_max_nb_txq(portid_t *pid);
112336db4f6cSWei Dai int check_nb_txq(queueid_t txq);
112499e040d3SLijun Ou int check_nb_rxd(queueid_t rxd);
112599e040d3SLijun Ou int check_nb_txd(queueid_t txd);
11261c69df45SOri Kam queueid_t get_allowed_max_nb_hairpinq(portid_t *pid);
11271c69df45SOri Kam int check_nb_hairpinq(queueid_t hairpinq);
11283f7311baSWei Dai 
1129c77ad9deSRaslan Darawsheh uint16_t dump_rx_pkts(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[],
1130c77ad9deSRaslan Darawsheh 		      uint16_t nb_pkts, __rte_unused uint16_t max_pkts,
1131c77ad9deSRaslan Darawsheh 		      __rte_unused void *user_param);
1132c77ad9deSRaslan Darawsheh 
1133c77ad9deSRaslan Darawsheh uint16_t dump_tx_pkts(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[],
1134c77ad9deSRaslan Darawsheh 		      uint16_t nb_pkts, __rte_unused void *user_param);
1135c77ad9deSRaslan Darawsheh 
1136c77ad9deSRaslan Darawsheh void add_rx_dump_callbacks(portid_t portid);
1137c77ad9deSRaslan Darawsheh void remove_rx_dump_callbacks(portid_t portid);
1138c77ad9deSRaslan Darawsheh void add_tx_dump_callbacks(portid_t portid);
1139c77ad9deSRaslan Darawsheh void remove_tx_dump_callbacks(portid_t portid);
1140b5b38ed8SRaslan Darawsheh void configure_rxtx_dump_callbacks(uint16_t verbose);
1141d862c45bSRaslan Darawsheh 
11421e45c908SDekel Peled uint16_t tx_pkt_set_md(uint16_t port_id, __rte_unused uint16_t queue,
11431e45c908SDekel Peled 		       struct rte_mbuf *pkts[], uint16_t nb_pkts,
11441e45c908SDekel Peled 		       __rte_unused void *user_param);
11451e45c908SDekel Peled void add_tx_md_callback(portid_t portid);
11461e45c908SDekel Peled void remove_tx_md_callback(portid_t portid);
11471e45c908SDekel Peled 
1148b57b66a9SOri Kam uint16_t tx_pkt_set_dynf(uint16_t port_id, __rte_unused uint16_t queue,
1149b57b66a9SOri Kam 			 struct rte_mbuf *pkts[], uint16_t nb_pkts,
1150b57b66a9SOri Kam 			 __rte_unused void *user_param);
1151b57b66a9SOri Kam void add_tx_dynf_callback(portid_t portid);
1152b57b66a9SOri Kam void remove_tx_dynf_callback(portid_t portid);
1153b563c142SFerruh Yigit int update_mtu_from_frame_size(portid_t portid, uint32_t max_rx_pktlen);
115459f3a8acSGregory Etelson void flex_item_create(portid_t port_id, uint16_t flex_id, const char *filename);
115559f3a8acSGregory Etelson void flex_item_destroy(portid_t port_id, uint16_t flex_id);
115659f3a8acSGregory Etelson void port_flex_item_flush(portid_t port_id);
1157b57b66a9SOri Kam 
11582566c33cSGregory Etelson extern int flow_parse(const char *src, void *result, unsigned int size,
11592566c33cSGregory Etelson 		      struct rte_flow_attr **attr,
11602566c33cSGregory Etelson 		      struct rte_flow_item **pattern,
11612566c33cSGregory Etelson 		      struct rte_flow_action **actions);
11622566c33cSGregory Etelson 
11639ad341b5SHuisong Li uint64_t str_to_rsstypes(const char *str);
11643c23ee6cSHuisong Li const char *rsstypes_to_str(uint64_t rss_type);
11653c23ee6cSHuisong Li 
1166119786aaSFerruh Yigit uint16_t str_to_flowtype(const char *string);
1167119786aaSFerruh Yigit const char *flowtype_to_str(uint16_t flow_type);
1168119786aaSFerruh Yigit 
1169592ab76fSDavid Marchand /* For registering driver specific testpmd commands. */
1170592ab76fSDavid Marchand struct testpmd_driver_commands {
1171592ab76fSDavid Marchand 	TAILQ_ENTRY(testpmd_driver_commands) next;
1172592ab76fSDavid Marchand 	struct {
1173592ab76fSDavid Marchand 		cmdline_parse_inst_t *ctx;
1174592ab76fSDavid Marchand 		const char *help;
1175592ab76fSDavid Marchand 	} commands[];
1176592ab76fSDavid Marchand };
1177592ab76fSDavid Marchand 
1178592ab76fSDavid Marchand void testpmd_add_driver_commands(struct testpmd_driver_commands *c);
1179592ab76fSDavid Marchand #define TESTPMD_ADD_DRIVER_COMMANDS(c) \
1180592ab76fSDavid Marchand RTE_INIT(__##c) \
1181592ab76fSDavid Marchand { \
1182592ab76fSDavid Marchand 	testpmd_add_driver_commands(&c); \
1183592ab76fSDavid Marchand }
1184592ab76fSDavid Marchand 
1185af75078fSIntel /*
1186af75078fSIntel  * Work-around of a compilation error with ICC on invocations of the
1187af75078fSIntel  * rte_be_to_cpu_16() function.
1188af75078fSIntel  */
1189af75078fSIntel #ifdef __GCC__
1190af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v)  rte_be_to_cpu_16((be_16_v))
1191af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) rte_cpu_to_be_16((cpu_16_v))
1192af75078fSIntel #else
119344eb9456SThomas Monjalon #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1194af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v)  (be_16_v)
1195af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) (cpu_16_v)
1196af75078fSIntel #else
1197af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v) \
1198af75078fSIntel 	(uint16_t) ((((be_16_v) & 0xFF) << 8) | ((be_16_v) >> 8))
1199af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) \
1200af75078fSIntel 	(uint16_t) ((((cpu_16_v) & 0xFF) << 8) | ((cpu_16_v) >> 8))
1201af75078fSIntel #endif
1202af75078fSIntel #endif /* __GCC__ */
1203af75078fSIntel 
1204285fd101SOlivier Matz #define TESTPMD_LOG(level, fmt, args...) \
1205285fd101SOlivier Matz 	rte_log(RTE_LOG_ ## level, testpmd_logtype, "testpmd: " fmt, ## args)
1206285fd101SOlivier Matz 
1207af75078fSIntel #endif /* _TESTPMD_H_ */
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