xref: /dpdk/app/test-pmd/testpmd.h (revision 3e3edab530a1feeec1b7a62343b5e1139e0b01ab)
1174a1631SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
2174a1631SBruce Richardson  * Copyright(c) 2010-2017 Intel Corporation
3af75078fSIntel  */
4af75078fSIntel 
5af75078fSIntel #ifndef _TESTPMD_H_
6af75078fSIntel #define _TESTPMD_H_
7af75078fSIntel 
84f1ed78eSThomas Monjalon #include <stdbool.h>
94f1ed78eSThomas Monjalon 
106970401eSDavid Marchand #ifdef RTE_LIB_GRO
11b40f8d78SJiayu Hu #include <rte_gro.h>
126970401eSDavid Marchand #endif
136970401eSDavid Marchand #ifdef RTE_LIB_GSO
1452f38a20SJiayu Hu #include <rte_gso.h>
156970401eSDavid Marchand #endif
16761f7ae1SJie Zhou #include <rte_os_shim.h>
17592ab76fSDavid Marchand #include <rte_ethdev.h>
18592ab76fSDavid Marchand #include <rte_flow.h>
19592ab76fSDavid Marchand #include <rte_mbuf_dyn.h>
20592ab76fSDavid Marchand 
2130626defSXiaoyu Min #include <cmdline.h>
22592ab76fSDavid Marchand #include <cmdline_parse.h>
23592ab76fSDavid Marchand 
241b9f2746SGregory Etelson #include <sys/queue.h>
2559f3a8acSGregory Etelson #ifdef RTE_HAS_JANSSON
2659f3a8acSGregory Etelson #include <jansson.h>
2759f3a8acSGregory Etelson #endif
2885c18dcbSGaetan Rivet 
29ce8d5614SIntel #define RTE_PORT_ALL            (~(portid_t)0x0)
30ce8d5614SIntel 
31ce8d5614SIntel #define RTE_PORT_STOPPED        (uint16_t)0
32ce8d5614SIntel #define RTE_PORT_STARTED        (uint16_t)1
33ce8d5614SIntel #define RTE_PORT_CLOSED         (uint16_t)2
34ce8d5614SIntel #define RTE_PORT_HANDLING       (uint16_t)3
35ce8d5614SIntel 
363889a322SHuisong Li extern uint8_t cl_quit;
373889a322SHuisong Li 
38af75078fSIntel /*
390f6f219eSMohammad Abdul Awal  * It is used to allocate the memory for hash key.
400f6f219eSMohammad Abdul Awal  * The hash key size is NIC dependent.
410f6f219eSMohammad Abdul Awal  */
420f6f219eSMohammad Abdul Awal #define RSS_HASH_KEY_LENGTH 64
430f6f219eSMohammad Abdul Awal 
440f6f219eSMohammad Abdul Awal /*
45af75078fSIntel  * Default size of the mbuf data buffer to receive standard 1518-byte
46af75078fSIntel  * Ethernet frames in a mono-segment memory buffer.
47af75078fSIntel  */
48824cb29cSKonstantin Ananyev #define DEFAULT_MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE
49824cb29cSKonstantin Ananyev /**< Default size of mbuf data buffer. */
50af75078fSIntel 
51af75078fSIntel /*
52af75078fSIntel  * The maximum number of segments per packet is used when creating
53af75078fSIntel  * scattered transmit packets composed of a list of mbufs.
54af75078fSIntel  */
55ea672a8bSOlivier Matz #define RTE_MAX_SEGS_PER_PKT 255 /**< nb_segs is a 8-bit unsigned char. */
56af75078fSIntel 
5726cbb419SViacheslav Ovsiienko /*
5826cbb419SViacheslav Ovsiienko  * The maximum number of segments per packet is used to configure
5926cbb419SViacheslav Ovsiienko  * buffer split feature, also specifies the maximum amount of
6026cbb419SViacheslav Ovsiienko  * optional Rx pools to allocate mbufs to split.
6126cbb419SViacheslav Ovsiienko  */
6226cbb419SViacheslav Ovsiienko #define MAX_SEGS_BUFFER_SPLIT 8 /**< nb_segs is a 8-bit unsigned char. */
6326cbb419SViacheslav Ovsiienko 
6426cbb419SViacheslav Ovsiienko /* The prefix of the mbuf pool names created by the application. */
6526cbb419SViacheslav Ovsiienko #define MBUF_POOL_NAME_PFX "mb_pool"
6626cbb419SViacheslav Ovsiienko 
674ed89049SDavid Marchand #define RX_DESC_MAX    2048
684ed89049SDavid Marchand #define TX_DESC_MAX    2048
694ed89049SDavid Marchand 
70af75078fSIntel #define MAX_PKT_BURST 512
71836853d3SCunming Liang #define DEF_PKT_BURST 32
72af75078fSIntel 
73e9378bbcSCunming Liang #define DEF_MBUF_CACHE 250
74e9378bbcSCunming Liang 
75fdf20fa7SSergio Gonzalez Monroy #define RTE_CACHE_LINE_SIZE_ROUNDUP(size) \
76fdf20fa7SSergio Gonzalez Monroy 	(RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
77af75078fSIntel 
78b6ea6408SIntel #define NUMA_NO_CONFIG 0xFF
79b6ea6408SIntel #define UMA_NO_CONFIG  0xFF
80b6ea6408SIntel 
8157d91f5bSMingxia Liu #define MIN_TOTAL_NUM_MBUFS 1024
8257d91f5bSMingxia Liu 
834f04edcdSHanumanth Pothula /* Maximum number of pools supported per Rx queue */
844f04edcdSHanumanth Pothula #define MAX_MEMPOOL 8
854f04edcdSHanumanth Pothula 
86af75078fSIntel typedef uint8_t  lcoreid_t;
87f8244c63SZhiyong Yang typedef uint16_t portid_t;
88af75078fSIntel typedef uint16_t queueid_t;
89af75078fSIntel typedef uint16_t streamid_t;
90af75078fSIntel 
91af75078fSIntel enum {
92af75078fSIntel 	PORT_TOPOLOGY_PAIRED,
933e2006d6SCyril Chemparathy 	PORT_TOPOLOGY_CHAINED,
943e2006d6SCyril Chemparathy 	PORT_TOPOLOGY_LOOP,
95af75078fSIntel };
96af75078fSIntel 
97c7f5dba7SAnatoly Burakov enum {
98c7f5dba7SAnatoly Burakov 	MP_ALLOC_NATIVE, /**< allocate and populate mempool natively */
99c7f5dba7SAnatoly Burakov 	MP_ALLOC_ANON,
100c7f5dba7SAnatoly Burakov 	/**< allocate mempool natively, but populate using anonymous memory */
101c7f5dba7SAnatoly Burakov 	MP_ALLOC_XMEM,
102c7f5dba7SAnatoly Burakov 	/**< allocate and populate mempool using anonymous memory */
10372512e18SViacheslav Ovsiienko 	MP_ALLOC_XMEM_HUGE,
104c7f5dba7SAnatoly Burakov 	/**< allocate and populate mempool using anonymous hugepage memory */
10572512e18SViacheslav Ovsiienko 	MP_ALLOC_XBUF
10672512e18SViacheslav Ovsiienko 	/**< allocate mempool natively, use rte_pktmbuf_pool_create_extbuf */
107c7f5dba7SAnatoly Burakov };
108c7f5dba7SAnatoly Burakov 
109c9dc0384SSuanming Mou enum {
110c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_FLOW_CREATE,
111c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_FLOW_DESTROY,
112c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_ACTION_CREATE,
113c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_ACTION_DESTROY,
114c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_ACTION_UPDATE,
115c9dc0384SSuanming Mou 	QUEUE_JOB_TYPE_ACTION_QUERY,
116c9dc0384SSuanming Mou };
117c9dc0384SSuanming Mou 
118af75078fSIntel /**
119af75078fSIntel  * The data structure associated with RX and TX packet burst statistics
120af75078fSIntel  * that are recorded for each forwarding stream.
121af75078fSIntel  */
122af75078fSIntel struct pkt_burst_stats {
1236a8b64fdSEli Britstein 	unsigned int pkt_burst_spread[MAX_PKT_BURST + 1];
124af75078fSIntel };
125af75078fSIntel 
12644a37f3cSFerruh Yigit 
12744a37f3cSFerruh Yigit #define TESTPMD_RSS_TYPES_CHAR_NUM_PER_LINE 64
128f4d623f9SAdrien Mazarguil /** Information for a given RSS type. */
129f4d623f9SAdrien Mazarguil struct rss_type_info {
130f4d623f9SAdrien Mazarguil 	const char *str; /**< Type name. */
131f4d623f9SAdrien Mazarguil 	uint64_t rss_type; /**< Type value. */
132f4d623f9SAdrien Mazarguil };
133f4d623f9SAdrien Mazarguil 
134f4d623f9SAdrien Mazarguil /**
135f4d623f9SAdrien Mazarguil  * RSS type information table.
136f4d623f9SAdrien Mazarguil  *
137f4d623f9SAdrien Mazarguil  * An entry with a NULL type name terminates the list.
138f4d623f9SAdrien Mazarguil  */
139f4d623f9SAdrien Mazarguil extern const struct rss_type_info rss_type_table[];
140f4d623f9SAdrien Mazarguil 
141af75078fSIntel /**
142b57b66a9SOri Kam  * Dynf name array.
143b57b66a9SOri Kam  *
144b57b66a9SOri Kam  * Array that holds the name for each dynf.
145b57b66a9SOri Kam  */
146b57b66a9SOri Kam extern char dynf_names[64][RTE_MBUF_DYN_NAMESIZE];
147b57b66a9SOri Kam 
148b57b66a9SOri Kam /**
149af75078fSIntel  * The data structure associated with a forwarding stream between a receive
150af75078fSIntel  * port/queue and a transmit port/queue.
151af75078fSIntel  */
152af75078fSIntel struct fwd_stream {
153af75078fSIntel 	/* "read-only" data */
154af75078fSIntel 	portid_t   rx_port;   /**< port to poll for received packets */
155af75078fSIntel 	queueid_t  rx_queue;  /**< RX queue to poll on "rx_port" */
156af75078fSIntel 	portid_t   tx_port;   /**< forwarding port of received packets */
157af75078fSIntel 	queueid_t  tx_queue;  /**< TX queue to send forwarded packets */
158af75078fSIntel 	streamid_t peer_addr; /**< index of peer ethernet address of packets */
1593c4426dbSDmitry Kozlyuk 	bool       disabled;  /**< the stream is disabled and should not run */
160af75078fSIntel 
161bf56fce1SZhihong Wang 	unsigned int retry_enabled;
162bf56fce1SZhihong Wang 
163af75078fSIntel 	/* "read-write" results */
164c185d42cSDavid Marchand 	uint64_t rx_packets;  /**< received packets */
165c185d42cSDavid Marchand 	uint64_t tx_packets;  /**< received packets transmitted */
166c185d42cSDavid Marchand 	uint64_t fwd_dropped; /**< received packets not forwarded */
167c185d42cSDavid Marchand 	uint64_t rx_bad_ip_csum ; /**< received packets has bad ip checksum */
168c185d42cSDavid Marchand 	uint64_t rx_bad_l4_csum ; /**< received packets has bad l4 checksum */
169c185d42cSDavid Marchand 	uint64_t rx_bad_outer_l4_csum;
17058d475b7SJerin Jacob 	/**< received packets has bad outer l4 checksum */
171d139cf23SLance Richardson 	uint64_t rx_bad_outer_ip_csum;
172d139cf23SLance Richardson 	/**< received packets having bad outer ip checksum */
1739fac5ca8SViacheslav Ovsiienko 	uint64_t ts_skew; /**< TX scheduling timestamp */
1746970401eSDavid Marchand #ifdef RTE_LIB_GRO
175b7091f1dSJiayu Hu 	unsigned int gro_times;	/**< GRO operation times */
1766970401eSDavid Marchand #endif
17799a4974aSRobin Jarry 	uint64_t busy_cycles; /**< used with --record-core-cycles */
178af75078fSIntel 	struct pkt_burst_stats rx_burst_stats;
179af75078fSIntel 	struct pkt_burst_stats tx_burst_stats;
18065744833SXueming Li 	struct fwd_lcore *lcore; /**< Lcore being scheduled. */
181af75078fSIntel };
182af75078fSIntel 
183de956d5eSMatan Azrad /**
184de956d5eSMatan Azrad  * Age action context types, must be included inside the age action
185de956d5eSMatan Azrad  * context structure.
186de956d5eSMatan Azrad  */
187de956d5eSMatan Azrad enum age_action_context_type {
188de956d5eSMatan Azrad 	ACTION_AGE_CONTEXT_TYPE_FLOW,
1894b61b877SBing Zhao 	ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION,
190de956d5eSMatan Azrad };
191de956d5eSMatan Azrad 
19204cc665fSAlexander Kozyrev /** Descriptor for a template. */
19304cc665fSAlexander Kozyrev struct port_template {
19404cc665fSAlexander Kozyrev 	struct port_template *next; /**< Next template in list. */
19504cc665fSAlexander Kozyrev 	struct port_template *tmp; /**< Temporary linking. */
19604cc665fSAlexander Kozyrev 	uint32_t id; /**< Template ID. */
19704cc665fSAlexander Kozyrev 	union {
19804cc665fSAlexander Kozyrev 		struct rte_flow_pattern_template *pattern_template;
19904cc665fSAlexander Kozyrev 		struct rte_flow_actions_template *actions_template;
20004cc665fSAlexander Kozyrev 	} template; /**< PMD opaque template object */
20104cc665fSAlexander Kozyrev };
20204cc665fSAlexander Kozyrev 
203c4b38873SAlexander Kozyrev /** Descriptor for a flow table. */
204c4b38873SAlexander Kozyrev struct port_table {
205c4b38873SAlexander Kozyrev 	struct port_table *next; /**< Next table in list. */
206c4b38873SAlexander Kozyrev 	struct port_table *tmp; /**< Temporary linking. */
207c4b38873SAlexander Kozyrev 	uint32_t id; /**< Table ID. */
208c4b38873SAlexander Kozyrev 	uint32_t nb_pattern_templates; /**< Number of pattern templates. */
209c4b38873SAlexander Kozyrev 	uint32_t nb_actions_templates; /**< Number of actions templates. */
210f4f7ba1aSAlexander Kozyrev 	struct rte_flow_attr flow_attr; /**< Flow attributes. */
211c4b38873SAlexander Kozyrev 	struct rte_flow_template_table *table; /**< PMD opaque template object */
212c4b38873SAlexander Kozyrev };
213c4b38873SAlexander Kozyrev 
214938a184aSAdrien Mazarguil /** Descriptor for a single flow. */
215938a184aSAdrien Mazarguil struct port_flow {
216938a184aSAdrien Mazarguil 	struct port_flow *next; /**< Next flow in list. */
217938a184aSAdrien Mazarguil 	struct port_flow *tmp; /**< Temporary linking. */
218938a184aSAdrien Mazarguil 	uint32_t id; /**< Flow rule ID. */
219938a184aSAdrien Mazarguil 	struct rte_flow *flow; /**< Opaque flow object returned by PMD. */
220de956d5eSMatan Azrad 	struct rte_flow_conv_rule rule; /**< Saved flow rule description. */
221de956d5eSMatan Azrad 	enum age_action_context_type age_type; /**< Age action context type. */
22244b257ffSAdrien Mazarguil 	uint8_t data[]; /**< Storage for flow rule description */
223938a184aSAdrien Mazarguil };
224938a184aSAdrien Mazarguil 
2254b61b877SBing Zhao /* Descriptor for indirect action */
2264b61b877SBing Zhao struct port_indirect_action {
2274b61b877SBing Zhao 	struct port_indirect_action *next; /**< Next flow in list. */
2284b61b877SBing Zhao 	uint32_t id; /**< Indirect action ID. */
22955509e3aSAndrey Vesnovaty 	enum rte_flow_action_type type; /**< Action type. */
2304b61b877SBing Zhao 	struct rte_flow_action_handle *handle;	/**< Indirect action handle. */
231de956d5eSMatan Azrad 	enum age_action_context_type age_type; /**< Age action context type. */
23255509e3aSAndrey Vesnovaty };
23355509e3aSAndrey Vesnovaty 
234c9dc0384SSuanming Mou /* Descriptor for action query data. */
235c9dc0384SSuanming Mou union port_action_query {
236c9dc0384SSuanming Mou 	struct rte_flow_query_count count;
237c9dc0384SSuanming Mou 	struct rte_flow_query_age age;
238c9dc0384SSuanming Mou 	struct rte_flow_action_conntrack ct;
239*3e3edab5SGregory Etelson 	struct rte_flow_query_quota quota;
240c9dc0384SSuanming Mou };
241c9dc0384SSuanming Mou 
242c9dc0384SSuanming Mou /* Descriptor for queue job. */
243c9dc0384SSuanming Mou struct queue_job {
244c9dc0384SSuanming Mou 	uint32_t type; /**< Job type. */
245c9dc0384SSuanming Mou 	union {
246c9dc0384SSuanming Mou 		struct port_flow *pf;
247c9dc0384SSuanming Mou 		struct port_indirect_action *pia;
248c9dc0384SSuanming Mou 	};
249c9dc0384SSuanming Mou 	union port_action_query query;
250c9dc0384SSuanming Mou };
251c9dc0384SSuanming Mou 
2521b9f2746SGregory Etelson struct port_flow_tunnel {
2531b9f2746SGregory Etelson 	LIST_ENTRY(port_flow_tunnel) chain;
2541b9f2746SGregory Etelson 	struct rte_flow_action *pmd_actions;
2551b9f2746SGregory Etelson 	struct rte_flow_item   *pmd_items;
2561b9f2746SGregory Etelson 	uint32_t id;
2571b9f2746SGregory Etelson 	uint32_t num_pmd_actions;
2581b9f2746SGregory Etelson 	uint32_t num_pmd_items;
2591b9f2746SGregory Etelson 	struct rte_flow_tunnel tunnel;
2601b9f2746SGregory Etelson 	struct rte_flow_action *actions;
2611b9f2746SGregory Etelson 	struct rte_flow_item *items;
2621b9f2746SGregory Etelson };
2631b9f2746SGregory Etelson 
2641b9f2746SGregory Etelson struct tunnel_ops {
2651b9f2746SGregory Etelson 	uint32_t id;
2661b9f2746SGregory Etelson 	char type[16];
2671b9f2746SGregory Etelson 	uint32_t enabled:1;
2681b9f2746SGregory Etelson 	uint32_t actions:1;
2691b9f2746SGregory Etelson 	uint32_t items:1;
2701b9f2746SGregory Etelson };
2711b9f2746SGregory Etelson 
27263b72657SIvan Ilchenko /** Information for an extended statistics to show. */
27363b72657SIvan Ilchenko struct xstat_display_info {
27463b72657SIvan Ilchenko 	/** Supported xstats IDs in the order of xstats_display */
27563b72657SIvan Ilchenko 	uint64_t *ids_supp;
27663b72657SIvan Ilchenko 	size_t   ids_supp_sz;
27763b72657SIvan Ilchenko 	uint64_t *prev_values;
27863b72657SIvan Ilchenko 	uint64_t *curr_values;
27963b72657SIvan Ilchenko 	uint64_t prev_ns;
28063b72657SIvan Ilchenko 	bool	 allocated;
28163b72657SIvan Ilchenko };
28263b72657SIvan Ilchenko 
2833c4426dbSDmitry Kozlyuk /** RX queue configuration and state. */
2843c4426dbSDmitry Kozlyuk struct port_rxqueue {
2853c4426dbSDmitry Kozlyuk 	struct rte_eth_rxconf conf;
2863c4426dbSDmitry Kozlyuk 	uint8_t state; /**< RTE_ETH_QUEUE_STATE_* value. */
2873c4426dbSDmitry Kozlyuk };
2883c4426dbSDmitry Kozlyuk 
2893c4426dbSDmitry Kozlyuk /** TX queue configuration and state. */
2903c4426dbSDmitry Kozlyuk struct port_txqueue {
2913c4426dbSDmitry Kozlyuk 	struct rte_eth_txconf conf;
2923c4426dbSDmitry Kozlyuk 	uint8_t state; /**< RTE_ETH_QUEUE_STATE_* value. */
2933c4426dbSDmitry Kozlyuk };
2943c4426dbSDmitry Kozlyuk 
295af75078fSIntel /**
296af75078fSIntel  * The data structure associated with each port.
297af75078fSIntel  */
298af75078fSIntel struct rte_port {
2991bcb7ba9SDavid Marchand 	struct rte_eth_dev_info dev_info;   /**< Device info + driver name */
300af75078fSIntel 	struct rte_eth_conf     dev_conf;   /**< Port configuration. */
3016d13ea8eSOlivier Matz 	struct rte_ether_addr       eth_addr;   /**< Port ethernet address */
302af75078fSIntel 	struct rte_eth_stats    stats;      /**< Last port statistics */
303af75078fSIntel 	unsigned int            socket_id;  /**< For NUMA support */
3043eecba26SShahaf Shuler 	uint16_t		parse_tunnel:1; /**< Parse internal headers */
3050f62d635SJianfeng Tan 	uint16_t                tso_segsz;  /**< Segmentation offload MSS for non-tunneled packets. */
3060f62d635SJianfeng Tan 	uint16_t                tunnel_tso_segsz; /**< Segmentation offload MSS for tunneled pkts. */
30792ebda07SHelin Zhang 	uint16_t                tx_vlan_id;/**< The tag ID */
30892ebda07SHelin Zhang 	uint16_t                tx_vlan_id_outer;/**< The outer tag ID */
309ce8d5614SIntel 	volatile uint16_t        port_status;    /**< port started or not */
3104f1ed78eSThomas Monjalon 	uint8_t                 need_setup;     /**< port just attached */
311ce8d5614SIntel 	uint8_t                 need_reconfig;  /**< need reconfiguring port or not */
312ce8d5614SIntel 	uint8_t                 need_reconfig_queues; /**< need reconfiguring queues or not */
313ce8d5614SIntel 	uint8_t                 rss_flag;   /**< enable rss or not */
3147741e4cfSIntel 	uint8_t                 dcb_flag;   /**< enable dcb */
3159e6b36c3SDavid Marchand 	uint16_t                nb_rx_desc[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue rx desc number */
3169e6b36c3SDavid Marchand 	uint16_t                nb_tx_desc[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue tx desc number */
3173c4426dbSDmitry Kozlyuk 	struct port_rxqueue     rxq[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue Rx config and state */
3183c4426dbSDmitry Kozlyuk 	struct port_txqueue     txq[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue Tx config and state */
3196d13ea8eSOlivier Matz 	struct rte_ether_addr   *mc_addr_pool; /**< pool of multicast addrs */
3208fff6675SIvan Boule 	uint32_t                mc_addr_nb; /**< nb. of addr. in mc_addr_pool */
3219ad3a41aSAlexander Kozyrev 	queueid_t               queue_nb; /**< nb. of queues for flow rules */
3229ad3a41aSAlexander Kozyrev 	uint32_t                queue_sz; /**< size of a queue for flow rules */
323e46372d7SHuisong Li 	uint8_t                 slave_flag : 1, /**< bonding slave port */
324236bc417SGregory Etelson 				bond_flag : 1, /**< port is bond device */
3257c06f1abSHuisong Li 				fwd_mac_swap : 1, /**< swap packet MAC before forward */
3267c06f1abSHuisong Li 				update_conf : 1; /**< need to update bonding device configuration */
32704cc665fSAlexander Kozyrev 	struct port_template    *pattern_templ_list; /**< Pattern templates. */
32804cc665fSAlexander Kozyrev 	struct port_template    *actions_templ_list; /**< Actions templates. */
329c4b38873SAlexander Kozyrev 	struct port_table       *table_list; /**< Flow tables. */
330938a184aSAdrien Mazarguil 	struct port_flow        *flow_list; /**< Associated flows. */
3314b61b877SBing Zhao 	struct port_indirect_action *actions_list;
3324b61b877SBing Zhao 	/**< Associated indirect actions. */
3331b9f2746SGregory Etelson 	LIST_HEAD(, port_flow_tunnel) flow_tunnel_list;
3349e6b36c3SDavid Marchand 	const struct rte_eth_rxtx_callback *rx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
3359e6b36c3SDavid Marchand 	const struct rte_eth_rxtx_callback *tx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1];
336c18feafaSDekel Peled 	/**< metadata value to insert in Tx packets. */
3379bf26e13SViacheslav Ovsiienko 	uint32_t		tx_metadata;
3389e6b36c3SDavid Marchand 	const struct rte_eth_rxtx_callback *tx_set_md_cb[RTE_MAX_QUEUES_PER_PORT+1];
339b57b66a9SOri Kam 	/**< dynamic flags. */
340b57b66a9SOri Kam 	uint64_t		mbuf_dynf;
341b57b66a9SOri Kam 	const struct rte_eth_rxtx_callback *tx_set_dynf_cb[RTE_MAX_QUEUES_PER_PORT+1];
34263b72657SIvan Ilchenko 	struct xstat_display_info xstats_info;
343af75078fSIntel };
344af75078fSIntel 
345af75078fSIntel /**
346af75078fSIntel  * The data structure associated with each forwarding logical core.
347af75078fSIntel  * The logical cores are internally numbered by a core index from 0 to
348af75078fSIntel  * the maximum number of logical cores - 1.
349af75078fSIntel  * The system CPU identifier of all logical cores are setup in a global
350af75078fSIntel  * CPU id. configuration table.
351af75078fSIntel  */
352af75078fSIntel struct fwd_lcore {
3536970401eSDavid Marchand #ifdef RTE_LIB_GSO
35452f38a20SJiayu Hu 	struct rte_gso_ctx gso_ctx;     /**< GSO context */
3556970401eSDavid Marchand #endif
356af75078fSIntel 	struct rte_mempool *mbp; /**< The mbuf pool to use by this core */
3576970401eSDavid Marchand #ifdef RTE_LIB_GRO
358b7091f1dSJiayu Hu 	void *gro_ctx;		/**< GRO context */
3596970401eSDavid Marchand #endif
360af75078fSIntel 	streamid_t stream_idx;   /**< index of 1st stream in "fwd_streams" */
361af75078fSIntel 	streamid_t stream_nb;    /**< number of streams in "fwd_streams" */
362af75078fSIntel 	lcoreid_t  cpuid_idx;    /**< index of logical core in CPU id table */
363af75078fSIntel 	volatile char stopped;   /**< stop forwarding when set */
36499a4974aSRobin Jarry 	uint64_t total_cycles;   /**< used with --record-core-cycles */
365af75078fSIntel };
366af75078fSIntel 
367af75078fSIntel /*
368af75078fSIntel  * Forwarding mode operations:
369af75078fSIntel  *   - IO forwarding mode (default mode)
370af75078fSIntel  *     Forwards packets unchanged.
371af75078fSIntel  *
372af75078fSIntel  *   - MAC forwarding mode
373af75078fSIntel  *     Set the source and the destination Ethernet addresses of packets
374af75078fSIntel  *     before forwarding them.
375af75078fSIntel  *
376af75078fSIntel  *   - IEEE1588 forwarding mode
377af75078fSIntel  *     Check that received IEEE1588 Precise Time Protocol (PTP) packets are
378af75078fSIntel  *     filtered and timestamped by the hardware.
379af75078fSIntel  *     Forwards packets unchanged on the same port.
380af75078fSIntel  *     Check that sent IEEE1588 PTP packets are timestamped by the hardware.
381af75078fSIntel  */
382a78040c9SAlvin Zhang typedef int (*port_fwd_begin_t)(portid_t pi);
383af75078fSIntel typedef void (*port_fwd_end_t)(portid_t pi);
3843c4426dbSDmitry Kozlyuk typedef void (*stream_init_t)(struct fwd_stream *fs);
385af75078fSIntel typedef void (*packet_fwd_t)(struct fwd_stream *fs);
386af75078fSIntel 
387af75078fSIntel struct fwd_engine {
388af75078fSIntel 	const char       *fwd_mode_name; /**< Forwarding mode name. */
389af75078fSIntel 	port_fwd_begin_t port_fwd_begin; /**< NULL if nothing special to do. */
390af75078fSIntel 	port_fwd_end_t   port_fwd_end;   /**< NULL if nothing special to do. */
3913c4426dbSDmitry Kozlyuk 	stream_init_t    stream_init;    /**< NULL if nothing special to do. */
392af75078fSIntel 	packet_fwd_t     packet_fwd;     /**< Mandatory. */
393af75078fSIntel };
394af75078fSIntel 
39559f3a8acSGregory Etelson #define FLEX_ITEM_MAX_SAMPLES_NUM 16
39659f3a8acSGregory Etelson #define FLEX_ITEM_MAX_LINKS_NUM 16
39759f3a8acSGregory Etelson #define FLEX_MAX_FLOW_PATTERN_LENGTH 64
39859f3a8acSGregory Etelson #define FLEX_MAX_PARSERS_NUM 8
39959f3a8acSGregory Etelson #define FLEX_MAX_PATTERNS_NUM 64
40059f3a8acSGregory Etelson #define FLEX_PARSER_ERR ((struct flex_item *)-1)
40159f3a8acSGregory Etelson 
40259f3a8acSGregory Etelson struct flex_item {
40359f3a8acSGregory Etelson 	struct rte_flow_item_flex_conf flex_conf;
40459f3a8acSGregory Etelson 	struct rte_flow_item_flex_handle *flex_handle;
40559f3a8acSGregory Etelson 	uint32_t flex_id;
40659f3a8acSGregory Etelson };
40759f3a8acSGregory Etelson 
40859f3a8acSGregory Etelson struct flex_pattern {
40959f3a8acSGregory Etelson 	struct rte_flow_item_flex spec, mask;
41059f3a8acSGregory Etelson 	uint8_t spec_pattern[FLEX_MAX_FLOW_PATTERN_LENGTH];
41159f3a8acSGregory Etelson 	uint8_t mask_pattern[FLEX_MAX_FLOW_PATTERN_LENGTH];
41259f3a8acSGregory Etelson };
41359f3a8acSGregory Etelson extern struct flex_item *flex_items[RTE_MAX_ETHPORTS][FLEX_MAX_PARSERS_NUM];
41459f3a8acSGregory Etelson extern struct flex_pattern flex_patterns[FLEX_MAX_PATTERNS_NUM];
41559f3a8acSGregory Etelson 
416bf56fce1SZhihong Wang #define BURST_TX_WAIT_US 1
417bf56fce1SZhihong Wang #define BURST_TX_RETRIES 64
418bf56fce1SZhihong Wang 
419bf56fce1SZhihong Wang extern uint32_t burst_tx_delay_time;
420bf56fce1SZhihong Wang extern uint32_t burst_tx_retry_num;
421bf56fce1SZhihong Wang 
422af75078fSIntel extern struct fwd_engine io_fwd_engine;
423af75078fSIntel extern struct fwd_engine mac_fwd_engine;
424d47388f1SCyril Chemparathy extern struct fwd_engine mac_swap_engine;
425e9e23a61SCyril Chemparathy extern struct fwd_engine flow_gen_engine;
426af75078fSIntel extern struct fwd_engine rx_only_engine;
427af75078fSIntel extern struct fwd_engine tx_only_engine;
428af75078fSIntel extern struct fwd_engine csum_fwd_engine;
429168dfa61SIvan Boule extern struct fwd_engine icmp_echo_engine;
4303c156061SJens Freimann extern struct fwd_engine noisy_vnf_engine;
4312564abdaSShiri Kuzin extern struct fwd_engine five_tuple_swap_fwd_engine;
432af75078fSIntel #ifdef RTE_LIBRTE_IEEE1588
433af75078fSIntel extern struct fwd_engine ieee1588_fwd_engine;
434af75078fSIntel #endif
43559840375SXueming Li extern struct fwd_engine shared_rxq_engine;
436af75078fSIntel 
437af75078fSIntel extern struct fwd_engine * fwd_engines[]; /**< NULL terminated array. */
43830626defSXiaoyu Min extern cmdline_parse_inst_t cmd_set_raw;
439739e045bSXiaoyu Min extern cmdline_parse_inst_t cmd_show_set_raw;
440739e045bSXiaoyu Min extern cmdline_parse_inst_t cmd_show_set_raw_all;
44159f3a8acSGregory Etelson extern cmdline_parse_inst_t cmd_set_flex_is_pattern;
44259f3a8acSGregory Etelson extern cmdline_parse_inst_t cmd_set_flex_spec_pattern;
443af75078fSIntel 
44459fcf854SShahaf Shuler extern uint16_t mempool_flags;
44559fcf854SShahaf Shuler 
446af75078fSIntel /**
447af75078fSIntel  * Forwarding Configuration
448af75078fSIntel  *
449af75078fSIntel  */
450af75078fSIntel struct fwd_config {
451af75078fSIntel 	struct fwd_engine *fwd_eng; /**< Packet forwarding mode. */
452af75078fSIntel 	streamid_t nb_fwd_streams;  /**< Nb. of forward streams to process. */
453af75078fSIntel 	lcoreid_t  nb_fwd_lcores;   /**< Nb. of logical cores to launch. */
454af75078fSIntel 	portid_t   nb_fwd_ports;    /**< Nb. of ports involved. */
455af75078fSIntel };
456af75078fSIntel 
457900550deSIntel /**
458900550deSIntel  * DCB mode enable
459900550deSIntel  */
460900550deSIntel enum dcb_mode_enable
461900550deSIntel {
462900550deSIntel 	DCB_VT_ENABLED,
463900550deSIntel 	DCB_ENABLED
464900550deSIntel };
465900550deSIntel 
466a4fd5eeeSElza Mathew extern uint8_t xstats_hide_zero; /**< Hide zero values for xstats display */
467a4fd5eeeSElza Mathew 
468af75078fSIntel /* globals used for configuration */
469bc700b67SDharmik Thakkar extern uint8_t record_core_cycles; /**< Enables measurement of CPU cycles */
4700e4b1963SDharmik Thakkar extern uint8_t record_burst_stats; /**< Enables display of RX and TX bursts */
471af75078fSIntel extern uint16_t verbose_level; /**< Drives messages being displayed, if any. */
472285fd101SOlivier Matz extern int testpmd_logtype; /**< Log type for testpmd logs */
473af75078fSIntel extern uint8_t  interactive;
474ca7feb22SCyril Chemparathy extern uint8_t  auto_start;
47599cabef0SPablo de Lara extern uint8_t  tx_first;
47681ef862bSAllain Legacy extern char cmdline_filename[PATH_MAX]; /**< offline commands file */
477af75078fSIntel extern uint8_t  numa_support; /**< set by "--numa" parameter */
478af75078fSIntel extern uint16_t port_topology; /**< set by "--port-topology" parameter */
4797741e4cfSIntel extern uint8_t no_flush_rx; /**<set by "--no-flush-rx" parameter */
4807ee3e944SVasily Philipov extern uint8_t flow_isolate_all; /**< set by "--flow-isolate-all */
481543df472SChengwen Feng extern uint8_t no_flow_flush; /**< set by "--disable-flow-flush" parameter */
482c7f5dba7SAnatoly Burakov extern uint8_t  mp_alloc_type;
483c7f5dba7SAnatoly Burakov /**< set by "--mp-anon" or "--mp-alloc" parameter */
484b7b78a08SAjit Khaparde extern uint32_t eth_link_speed;
485bc202406SDavid Marchand extern uint8_t no_link_check; /**<set by "--disable-link-check" parameter */
4866937d210SStephen Hemminger extern uint8_t no_device_start; /**<set by "--disable-device-start" parameter */
4872950a769SDeclan Doherty extern volatile int test_done; /* stop packet forwarding when set to 1. */
4888ea656f8SGaetan Rivet extern uint8_t lsc_interrupt; /**< disabled by "--no-lsc-interrupt" parameter */
489284c908cSGaetan Rivet extern uint8_t rmv_interrupt; /**< disabled by "--no-rmv-interrupt" parameter */
4903af72783SGaetan Rivet extern uint32_t event_print_mask;
4913af72783SGaetan Rivet /**< set by "--print-event xxxx" and "--mask-event xxxx parameters */
4924f1ed78eSThomas Monjalon extern bool setup_on_probe_event; /**< disabled by port setup-on iterator */
493e505d84cSAnatoly Burakov extern uint8_t hot_plug; /**< enable by "--hot-plug" parameter */
494e505d84cSAnatoly Burakov extern int do_mlockall; /**< set by "--mlockall" or "--no-mlockall" parameter */
495b0a9354aSPavan Nikhilesh extern uint8_t clear_ptypes; /**< disabled by set ptype cmd */
496af75078fSIntel 
497b6ea6408SIntel /*
498b6ea6408SIntel  * Store specified sockets on which memory pool to be used by ports
499b6ea6408SIntel  * is allocated.
500b6ea6408SIntel  */
50163531389SGeorgios Katsikas extern uint8_t port_numa[RTE_MAX_ETHPORTS];
502b6ea6408SIntel 
503b6ea6408SIntel /*
504b6ea6408SIntel  * Store specified sockets on which RX ring to be used by ports
505b6ea6408SIntel  * is allocated.
506b6ea6408SIntel  */
50763531389SGeorgios Katsikas extern uint8_t rxring_numa[RTE_MAX_ETHPORTS];
508b6ea6408SIntel 
509b6ea6408SIntel /*
510b6ea6408SIntel  * Store specified sockets on which TX ring to be used by ports
511b6ea6408SIntel  * is allocated.
512b6ea6408SIntel  */
51363531389SGeorgios Katsikas extern uint8_t txring_numa[RTE_MAX_ETHPORTS];
514b6ea6408SIntel 
515b6ea6408SIntel extern uint8_t socket_num;
516b6ea6408SIntel 
517af75078fSIntel /*
518af75078fSIntel  * Configuration of logical cores:
519af75078fSIntel  * nb_fwd_lcores <= nb_cfg_lcores <= nb_lcores
520af75078fSIntel  */
521af75078fSIntel extern lcoreid_t nb_lcores; /**< Number of logical cores probed at init time. */
522af75078fSIntel extern lcoreid_t nb_cfg_lcores; /**< Number of configured logical cores. */
523af75078fSIntel extern lcoreid_t nb_fwd_lcores; /**< Number of forwarding logical cores. */
524af75078fSIntel extern unsigned int fwd_lcores_cpuids[RTE_MAX_LCORE];
525c9cafcc8SShahaf Shuler extern unsigned int num_sockets;
526c9cafcc8SShahaf Shuler extern unsigned int socket_ids[RTE_MAX_NUMA_NODES];
527af75078fSIntel 
528af75078fSIntel /*
529af75078fSIntel  * Configuration of Ethernet ports:
530af75078fSIntel  * nb_fwd_ports <= nb_cfg_ports <= nb_ports
531af75078fSIntel  */
532af75078fSIntel extern portid_t nb_ports; /**< Number of ethernet ports probed at init time. */
533af75078fSIntel extern portid_t nb_cfg_ports; /**< Number of configured ports. */
534af75078fSIntel extern portid_t nb_fwd_ports; /**< Number of forwarding ports. */
535af75078fSIntel extern portid_t fwd_ports_ids[RTE_MAX_ETHPORTS];
536af75078fSIntel extern struct rte_port *ports;
537af75078fSIntel 
538af75078fSIntel extern struct rte_eth_rxmode rx_mode;
539fd8c20aaSShahaf Shuler extern struct rte_eth_txmode tx_mode;
540fd8c20aaSShahaf Shuler 
5418a387fa8SHelin Zhang extern uint64_t rss_hf;
542af75078fSIntel 
5431c69df45SOri Kam extern queueid_t nb_hairpinq;
544af75078fSIntel extern queueid_t nb_rxq;
545af75078fSIntel extern queueid_t nb_txq;
546af75078fSIntel 
547af75078fSIntel extern uint16_t nb_rxd;
548af75078fSIntel extern uint16_t nb_txd;
549af75078fSIntel 
550f2c5125aSPablo de Lara extern int16_t rx_free_thresh;
551f2c5125aSPablo de Lara extern int8_t rx_drop_en;
552f2c5125aSPablo de Lara extern int16_t tx_free_thresh;
553f2c5125aSPablo de Lara extern int16_t tx_rs_thresh;
554af75078fSIntel 
5553c156061SJens Freimann extern uint16_t noisy_tx_sw_bufsz;
5563c156061SJens Freimann extern uint16_t noisy_tx_sw_buf_flush_time;
5573c156061SJens Freimann extern uint64_t noisy_lkup_mem_sz;
5583c156061SJens Freimann extern uint64_t noisy_lkup_num_writes;
5593c156061SJens Freimann extern uint64_t noisy_lkup_num_reads;
5603c156061SJens Freimann extern uint64_t noisy_lkup_num_reads_writes;
5613c156061SJens Freimann 
562900550deSIntel extern uint8_t dcb_config;
563900550deSIntel 
56426cbb419SViacheslav Ovsiienko extern uint32_t mbuf_data_size_n;
56526cbb419SViacheslav Ovsiienko extern uint16_t mbuf_data_size[MAX_SEGS_BUFFER_SPLIT];
56626cbb419SViacheslav Ovsiienko /**< Mbuf data space size. */
567c8798818SIntel extern uint32_t param_total_num_mbufs;
568af75078fSIntel 
569cfea1f30SPablo de Lara extern uint16_t stats_period;
57062d3216dSReshma Pattan 
57163b72657SIvan Ilchenko extern struct rte_eth_xstat_name *xstats_display;
57263b72657SIvan Ilchenko extern unsigned int xstats_display_num;
57363b72657SIvan Ilchenko 
57423095155SDariusz Sosnowski extern uint32_t hairpin_mode;
57501817b10SBing Zhao 
576a8d0d473SBruce Richardson #ifdef RTE_LIB_LATENCYSTATS
57762d3216dSReshma Pattan extern uint8_t latencystats_enabled;
57862d3216dSReshma Pattan extern lcoreid_t latencystats_lcore_id;
57962d3216dSReshma Pattan #endif
58062d3216dSReshma Pattan 
581a8d0d473SBruce Richardson #ifdef RTE_LIB_BITRATESTATS
582e25e6c70SRemy Horton extern lcoreid_t bitrate_lcore_id;
583e25e6c70SRemy Horton extern uint8_t bitrate_enabled;
584e25e6c70SRemy Horton #endif
585e25e6c70SRemy Horton 
5861bb4a528SFerruh Yigit extern uint32_t max_rx_pkt_len;
5871bb4a528SFerruh Yigit 
588af75078fSIntel /*
5890f2096d7SViacheslav Ovsiienko  * Configuration of packet segments used to scatter received packets
5900f2096d7SViacheslav Ovsiienko  * if some of split features is configured.
5910f2096d7SViacheslav Ovsiienko  */
59252e2e7edSYuan Wang extern uint32_t rx_pkt_hdr_protos[MAX_SEGS_BUFFER_SPLIT];
5930f2096d7SViacheslav Ovsiienko extern uint16_t rx_pkt_seg_lengths[MAX_SEGS_BUFFER_SPLIT];
5940f2096d7SViacheslav Ovsiienko extern uint8_t  rx_pkt_nb_segs; /**< Number of segments to split */
59591c78e09SViacheslav Ovsiienko extern uint16_t rx_pkt_seg_offsets[MAX_SEGS_BUFFER_SPLIT];
59691c78e09SViacheslav Ovsiienko extern uint8_t  rx_pkt_nb_offs; /**< Number of specified offsets */
5970f2096d7SViacheslav Ovsiienko 
598a4bf5421SHanumanth Pothula extern uint8_t multi_rx_mempool; /**< Enables multi-rx-mempool feature. */
599a4bf5421SHanumanth Pothula 
6000f2096d7SViacheslav Ovsiienko /*
601af75078fSIntel  * Configuration of packet segments used by the "txonly" processing engine.
602af75078fSIntel  */
603af75078fSIntel #define TXONLY_DEF_PACKET_LEN 64
604af75078fSIntel extern uint16_t tx_pkt_length; /**< Length of TXONLY packet */
605af75078fSIntel extern uint16_t tx_pkt_seg_lengths[RTE_MAX_SEGS_PER_PKT]; /**< Seg. lengths */
606af75078fSIntel extern uint8_t  tx_pkt_nb_segs; /**< Number of segments in TX packets */
6074940344dSViacheslav Ovsiienko extern uint32_t tx_pkt_times_intra;
6084940344dSViacheslav Ovsiienko extern uint32_t tx_pkt_times_inter;
609af75078fSIntel 
61079bec05bSKonstantin Ananyev enum tx_pkt_split {
61179bec05bSKonstantin Ananyev 	TX_PKT_SPLIT_OFF,
61279bec05bSKonstantin Ananyev 	TX_PKT_SPLIT_ON,
61379bec05bSKonstantin Ananyev 	TX_PKT_SPLIT_RND,
61479bec05bSKonstantin Ananyev };
61579bec05bSKonstantin Ananyev 
61679bec05bSKonstantin Ananyev extern enum tx_pkt_split tx_pkt_split;
61779bec05bSKonstantin Ananyev 
61882010ef5SYongseok Koh extern uint8_t txonly_multi_flow;
61982010ef5SYongseok Koh 
620f4d178c1SXueming Li extern uint32_t rxq_share;
621f4d178c1SXueming Li 
622af75078fSIntel extern uint16_t nb_pkt_per_burst;
6236c02043eSIgor Russkikh extern uint16_t nb_pkt_flowgen_clones;
624861e7684SZhihong Wang extern int nb_flows_flowgen;
625af75078fSIntel extern uint16_t mb_mempool_cache;
626f2c5125aSPablo de Lara extern int8_t rx_pthresh;
627f2c5125aSPablo de Lara extern int8_t rx_hthresh;
628f2c5125aSPablo de Lara extern int8_t rx_wthresh;
629f2c5125aSPablo de Lara extern int8_t tx_pthresh;
630f2c5125aSPablo de Lara extern int8_t tx_hthresh;
631f2c5125aSPablo de Lara extern int8_t tx_wthresh;
632af75078fSIntel 
633bf5b2126SStephen Hemminger extern uint16_t tx_udp_src_port;
634bf5b2126SStephen Hemminger extern uint16_t tx_udp_dst_port;
635bf5b2126SStephen Hemminger 
636bf5b2126SStephen Hemminger extern uint32_t tx_ip_src_addr;
637bf5b2126SStephen Hemminger extern uint32_t tx_ip_dst_addr;
638bf5b2126SStephen Hemminger 
639af75078fSIntel extern struct fwd_config cur_fwd_config;
640af75078fSIntel extern struct fwd_engine *cur_fwd_eng;
641bf56fce1SZhihong Wang extern uint32_t retry_enabled;
642af75078fSIntel extern struct fwd_lcore  **fwd_lcores;
643af75078fSIntel extern struct fwd_stream **fwd_streams;
644af75078fSIntel 
64539e5e20fSXueming Li extern uint16_t vxlan_gpe_udp_port; /**< UDP port of tunnel VXLAN-GPE. */
646ea0e711bSOphir Munk extern uint16_t geneve_udp_port; /**< UDP port of tunnel GENEVE. */
64739e5e20fSXueming Li 
648af75078fSIntel extern portid_t nb_peer_eth_addrs; /**< Number of peer ethernet addresses. */
6496d13ea8eSOlivier Matz extern struct rte_ether_addr peer_eth_addrs[RTE_MAX_ETHPORTS];
650af75078fSIntel 
65157e85242SBruce Richardson extern uint32_t burst_tx_delay_time; /**< Burst tx delay time(us) for mac-retry. */
65257e85242SBruce Richardson extern uint32_t burst_tx_retry_num;  /**< Burst tx retry number for mac-retry. */
65357e85242SBruce Richardson 
6546970401eSDavid Marchand #ifdef RTE_LIB_GRO
655b7091f1dSJiayu Hu #define GRO_DEFAULT_ITEM_NUM_PER_FLOW 32
656b7091f1dSJiayu Hu #define GRO_DEFAULT_FLOW_NUM (RTE_GRO_MAX_BURST_ITEM_NUM / \
657b7091f1dSJiayu Hu 		GRO_DEFAULT_ITEM_NUM_PER_FLOW)
658b7091f1dSJiayu Hu 
659b7091f1dSJiayu Hu #define GRO_DEFAULT_FLUSH_CYCLES 1
660b7091f1dSJiayu Hu #define GRO_MAX_FLUSH_CYCLES 4
661b7091f1dSJiayu Hu 
662b40f8d78SJiayu Hu struct gro_status {
663b40f8d78SJiayu Hu 	struct rte_gro_param param;
664b40f8d78SJiayu Hu 	uint8_t enable;
665b40f8d78SJiayu Hu };
666b40f8d78SJiayu Hu extern struct gro_status gro_ports[RTE_MAX_ETHPORTS];
667b7091f1dSJiayu Hu extern uint8_t gro_flush_cycles;
6686970401eSDavid Marchand #endif /* RTE_LIB_GRO */
669b40f8d78SJiayu Hu 
6706970401eSDavid Marchand #ifdef RTE_LIB_GSO
67152f38a20SJiayu Hu #define GSO_MAX_PKT_BURST 2048
67252f38a20SJiayu Hu struct gso_status {
67352f38a20SJiayu Hu 	uint8_t enable;
67452f38a20SJiayu Hu };
67552f38a20SJiayu Hu extern struct gso_status gso_ports[RTE_MAX_ETHPORTS];
67652f38a20SJiayu Hu extern uint16_t gso_max_segment_size;
6776970401eSDavid Marchand #endif /* RTE_LIB_GSO */
67852f38a20SJiayu Hu 
6791960be7dSNelio Laranjeiro /* VXLAN encap/decap parameters. */
6801960be7dSNelio Laranjeiro struct vxlan_encap_conf {
6811960be7dSNelio Laranjeiro 	uint32_t select_ipv4:1;
6821960be7dSNelio Laranjeiro 	uint32_t select_vlan:1;
68362e8a5a8SViacheslav Ovsiienko 	uint32_t select_tos_ttl:1;
6841960be7dSNelio Laranjeiro 	uint8_t vni[3];
6851960be7dSNelio Laranjeiro 	rte_be16_t udp_src;
6861960be7dSNelio Laranjeiro 	rte_be16_t udp_dst;
6871960be7dSNelio Laranjeiro 	rte_be32_t ipv4_src;
6881960be7dSNelio Laranjeiro 	rte_be32_t ipv4_dst;
6891960be7dSNelio Laranjeiro 	uint8_t ipv6_src[16];
6901960be7dSNelio Laranjeiro 	uint8_t ipv6_dst[16];
6911960be7dSNelio Laranjeiro 	rte_be16_t vlan_tci;
69262e8a5a8SViacheslav Ovsiienko 	uint8_t ip_tos;
69362e8a5a8SViacheslav Ovsiienko 	uint8_t ip_ttl;
69435b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
69535b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
6961960be7dSNelio Laranjeiro };
697f6e63e59SFerruh Yigit 
698f6e63e59SFerruh Yigit extern struct vxlan_encap_conf vxlan_encap_conf;
6991960be7dSNelio Laranjeiro 
700dcd962fcSNelio Laranjeiro /* NVGRE encap/decap parameters. */
701dcd962fcSNelio Laranjeiro struct nvgre_encap_conf {
702dcd962fcSNelio Laranjeiro 	uint32_t select_ipv4:1;
703dcd962fcSNelio Laranjeiro 	uint32_t select_vlan:1;
704dcd962fcSNelio Laranjeiro 	uint8_t tni[3];
705dcd962fcSNelio Laranjeiro 	rte_be32_t ipv4_src;
706dcd962fcSNelio Laranjeiro 	rte_be32_t ipv4_dst;
707dcd962fcSNelio Laranjeiro 	uint8_t ipv6_src[16];
708dcd962fcSNelio Laranjeiro 	uint8_t ipv6_dst[16];
709dcd962fcSNelio Laranjeiro 	rte_be16_t vlan_tci;
71035b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
71135b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
712dcd962fcSNelio Laranjeiro };
713f6e63e59SFerruh Yigit 
714f6e63e59SFerruh Yigit extern struct nvgre_encap_conf nvgre_encap_conf;
715dcd962fcSNelio Laranjeiro 
716a1191d39SOri Kam /* L2 encap parameters. */
717a1191d39SOri Kam struct l2_encap_conf {
718a1191d39SOri Kam 	uint32_t select_ipv4:1;
719a1191d39SOri Kam 	uint32_t select_vlan:1;
720a1191d39SOri Kam 	rte_be16_t vlan_tci;
72135b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
72235b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
723a1191d39SOri Kam };
724f6e63e59SFerruh Yigit extern struct l2_encap_conf l2_encap_conf;
725a1191d39SOri Kam 
726a1191d39SOri Kam /* L2 decap parameters. */
727a1191d39SOri Kam struct l2_decap_conf {
728a1191d39SOri Kam 	uint32_t select_vlan:1;
729a1191d39SOri Kam };
730f6e63e59SFerruh Yigit extern struct l2_decap_conf l2_decap_conf;
731a1191d39SOri Kam 
7323e77031bSOri Kam /* MPLSoGRE encap parameters. */
7333e77031bSOri Kam struct mplsogre_encap_conf {
7343e77031bSOri Kam 	uint32_t select_ipv4:1;
7353e77031bSOri Kam 	uint32_t select_vlan:1;
7363e77031bSOri Kam 	uint8_t label[3];
7373e77031bSOri Kam 	rte_be32_t ipv4_src;
7383e77031bSOri Kam 	rte_be32_t ipv4_dst;
7393e77031bSOri Kam 	uint8_t ipv6_src[16];
7403e77031bSOri Kam 	uint8_t ipv6_dst[16];
7413e77031bSOri Kam 	rte_be16_t vlan_tci;
74235b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
74335b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
7443e77031bSOri Kam };
745f6e63e59SFerruh Yigit extern struct mplsogre_encap_conf mplsogre_encap_conf;
7463e77031bSOri Kam 
7473e77031bSOri Kam /* MPLSoGRE decap parameters. */
7483e77031bSOri Kam struct mplsogre_decap_conf {
7493e77031bSOri Kam 	uint32_t select_ipv4:1;
7503e77031bSOri Kam 	uint32_t select_vlan:1;
7513e77031bSOri Kam };
752f6e63e59SFerruh Yigit extern struct mplsogre_decap_conf mplsogre_decap_conf;
7533e77031bSOri Kam 
754a1191d39SOri Kam /* MPLSoUDP encap parameters. */
755a1191d39SOri Kam struct mplsoudp_encap_conf {
756a1191d39SOri Kam 	uint32_t select_ipv4:1;
757a1191d39SOri Kam 	uint32_t select_vlan:1;
758a1191d39SOri Kam 	uint8_t label[3];
759a1191d39SOri Kam 	rte_be16_t udp_src;
760a1191d39SOri Kam 	rte_be16_t udp_dst;
761a1191d39SOri Kam 	rte_be32_t ipv4_src;
762a1191d39SOri Kam 	rte_be32_t ipv4_dst;
763a1191d39SOri Kam 	uint8_t ipv6_src[16];
764a1191d39SOri Kam 	uint8_t ipv6_dst[16];
765a1191d39SOri Kam 	rte_be16_t vlan_tci;
76635b2d13fSOlivier Matz 	uint8_t eth_src[RTE_ETHER_ADDR_LEN];
76735b2d13fSOlivier Matz 	uint8_t eth_dst[RTE_ETHER_ADDR_LEN];
768a1191d39SOri Kam };
769f6e63e59SFerruh Yigit extern struct mplsoudp_encap_conf mplsoudp_encap_conf;
770a1191d39SOri Kam 
771a1191d39SOri Kam /* MPLSoUDP decap parameters. */
772a1191d39SOri Kam struct mplsoudp_decap_conf {
773a1191d39SOri Kam 	uint32_t select_ipv4:1;
774a1191d39SOri Kam 	uint32_t select_vlan:1;
775a1191d39SOri Kam };
776f6e63e59SFerruh Yigit extern struct mplsoudp_decap_conf mplsoudp_decap_conf;
777a1191d39SOri Kam 
778f9295aa2SXiaoyu Min extern enum rte_eth_rx_mq_mode rx_mq_mode;
779f9295aa2SXiaoyu Min 
7804d07cbefSBing Zhao extern struct rte_flow_action_conntrack conntrack_context;
7814d07cbefSBing Zhao 
782a550baf2SMin Hu (Connor) extern int proc_id;
783a550baf2SMin Hu (Connor) extern unsigned int num_procs;
784a550baf2SMin Hu (Connor) 
785a550baf2SMin Hu (Connor) static inline bool
786a550baf2SMin Hu (Connor) is_proc_primary(void)
787a550baf2SMin Hu (Connor) {
788a550baf2SMin Hu (Connor) 	return rte_eal_process_type() == RTE_PROC_PRIMARY;
789a550baf2SMin Hu (Connor) }
790a550baf2SMin Hu (Connor) 
79199a4974aSRobin Jarry static inline struct fwd_lcore *
79299a4974aSRobin Jarry lcore_to_fwd_lcore(uint16_t lcore_id)
793af75078fSIntel {
794af75078fSIntel 	unsigned int i;
795af75078fSIntel 
79699a4974aSRobin Jarry 	for (i = 0; i < cur_fwd_config.nb_fwd_lcores; ++i) {
79799a4974aSRobin Jarry 		if (fwd_lcores_cpuids[i] == lcore_id)
79899a4974aSRobin Jarry 			return fwd_lcores[i];
799af75078fSIntel 	}
800af75078fSIntel 
80199a4974aSRobin Jarry 	return NULL;
80299a4974aSRobin Jarry }
8032df00d56SHariprasad Govindharajan 
804af75078fSIntel static inline struct fwd_lcore *
805af75078fSIntel current_fwd_lcore(void)
806af75078fSIntel {
80799a4974aSRobin Jarry 	struct fwd_lcore *fc = lcore_to_fwd_lcore(rte_lcore_id());
80899a4974aSRobin Jarry 
80999a4974aSRobin Jarry 	if (fc == NULL)
81099a4974aSRobin Jarry 		rte_panic("lcore_id of current thread not found in fwd_lcores_cpuids\n");
81199a4974aSRobin Jarry 
81299a4974aSRobin Jarry 	return fc;
813af75078fSIntel }
814af75078fSIntel 
81599a4974aSRobin Jarry void
81699a4974aSRobin Jarry parse_fwd_portlist(const char *port);
81799a4974aSRobin Jarry 
818af75078fSIntel /* Mbuf Pools */
819af75078fSIntel static inline void
82026cbb419SViacheslav Ovsiienko mbuf_poolname_build(unsigned int sock_id, char *mp_name,
82126cbb419SViacheslav Ovsiienko 		    int name_size, uint16_t idx)
822af75078fSIntel {
82326cbb419SViacheslav Ovsiienko 	if (!idx)
82426cbb419SViacheslav Ovsiienko 		snprintf(mp_name, name_size,
82526cbb419SViacheslav Ovsiienko 			 MBUF_POOL_NAME_PFX "_%u", sock_id);
82626cbb419SViacheslav Ovsiienko 	else
82726cbb419SViacheslav Ovsiienko 		snprintf(mp_name, name_size,
82826cbb419SViacheslav Ovsiienko 			 MBUF_POOL_NAME_PFX "_%hu_%hu", (uint16_t)sock_id, idx);
829af75078fSIntel }
830af75078fSIntel 
831af75078fSIntel static inline struct rte_mempool *
83226cbb419SViacheslav Ovsiienko mbuf_pool_find(unsigned int sock_id, uint16_t idx)
833af75078fSIntel {
834af75078fSIntel 	char pool_name[RTE_MEMPOOL_NAMESIZE];
835af75078fSIntel 
83626cbb419SViacheslav Ovsiienko 	mbuf_poolname_build(sock_id, pool_name, sizeof(pool_name), idx);
837693f715dSHuawei Xie 	return rte_mempool_lookup((const char *)pool_name);
838af75078fSIntel }
839af75078fSIntel 
840bc700b67SDharmik Thakkar static inline void
841bc700b67SDharmik Thakkar get_start_cycles(uint64_t *start_tsc)
842bc700b67SDharmik Thakkar {
843bc700b67SDharmik Thakkar 	if (record_core_cycles)
844bc700b67SDharmik Thakkar 		*start_tsc = rte_rdtsc();
845bc700b67SDharmik Thakkar }
846bc700b67SDharmik Thakkar 
847bc700b67SDharmik Thakkar static inline void
848bc700b67SDharmik Thakkar get_end_cycles(struct fwd_stream *fs, uint64_t start_tsc)
849bc700b67SDharmik Thakkar {
850bc700b67SDharmik Thakkar 	if (record_core_cycles)
85199a4974aSRobin Jarry 		fs->busy_cycles += rte_rdtsc() - start_tsc;
852bc700b67SDharmik Thakkar }
853bc700b67SDharmik Thakkar 
8540e4b1963SDharmik Thakkar static inline void
8550e4b1963SDharmik Thakkar inc_rx_burst_stats(struct fwd_stream *fs, uint16_t nb_rx)
8560e4b1963SDharmik Thakkar {
8570e4b1963SDharmik Thakkar 	if (record_burst_stats)
8580e4b1963SDharmik Thakkar 		fs->rx_burst_stats.pkt_burst_spread[nb_rx]++;
8590e4b1963SDharmik Thakkar }
8600e4b1963SDharmik Thakkar 
8610e4b1963SDharmik Thakkar static inline void
8620e4b1963SDharmik Thakkar inc_tx_burst_stats(struct fwd_stream *fs, uint16_t nb_tx)
8630e4b1963SDharmik Thakkar {
8640e4b1963SDharmik Thakkar 	if (record_burst_stats)
8650e4b1963SDharmik Thakkar 		fs->tx_burst_stats.pkt_burst_spread[nb_tx]++;
8660e4b1963SDharmik Thakkar }
8670e4b1963SDharmik Thakkar 
868af75078fSIntel /* Prototypes */
869761f7ae1SJie Zhou unsigned int parse_item_list(const char *str, const char *item_name,
870950d1516SBruce Richardson 			unsigned int max_items,
871950d1516SBruce Richardson 			unsigned int *parsed_items, int check_unique_values);
87252e2e7edSYuan Wang unsigned int parse_hdrs_list(const char *str, const char *item_name,
87352e2e7edSYuan Wang 			unsigned int max_item,
87423f2dfd3SYuan Wang 			unsigned int *parsed_items);
875af75078fSIntel void launch_args_parse(int argc, char** argv);
8760100a038SDavid Marchand void cmd_reconfig_device_queue(portid_t id, uint8_t dev, uint8_t queue);
87781ef862bSAllain Legacy void cmdline_read_from_file(const char *filename);
878592ab76fSDavid Marchand int init_cmdline(void);
879af75078fSIntel void prompt(void);
880d3a274ceSZhihong Wang void prompt_exit(void);
881af75078fSIntel void nic_stats_display(portid_t port_id);
882af75078fSIntel void nic_stats_clear(portid_t port_id);
883bfd5051bSOlivier Matz void nic_xstats_display(portid_t port_id);
884bfd5051bSOlivier Matz void nic_xstats_clear(portid_t port_id);
88555e51c96SNithin Dabilpuram void device_infos_display(const char *identifier);
886af75078fSIntel void port_infos_display(portid_t port_id);
8874bfcbcf5SEmma Finn void port_summary_display(portid_t port_id);
8886b67721dSDavid Liu void port_eeprom_display(portid_t port_id);
8896b67721dSDavid Liu void port_module_eeprom_display(portid_t port_id);
8904bfcbcf5SEmma Finn void port_summary_header_display(void);
891ab3257e1SKonstantin Ananyev void rx_queue_infos_display(portid_t port_idi, uint16_t queue_id);
892ab3257e1SKonstantin Ananyev void tx_queue_infos_display(portid_t port_idi, uint16_t queue_id);
893af75078fSIntel void fwd_lcores_config_display(void);
89465744833SXueming Li bool pkt_fwd_shared_rxq_check(void);
8950c0db76fSBernard Iremonger void pkt_fwd_config_display(struct fwd_config *cfg);
896af75078fSIntel void rxtx_config_display(void);
897af75078fSIntel void fwd_config_setup(void);
898af75078fSIntel void set_def_fwd_config(void);
899a21d5a4bSDeclan Doherty void reconfig(portid_t new_port_id, unsigned socket_id);
900013af9b6SIntel int init_fwd_streams(void);
90103ce2c53SMatan Azrad void update_fwd_ports(portid_t new_pid);
902013af9b6SIntel 
903aac6f11fSWisam Jaddo void set_fwd_eth_peer(portid_t port_id, char *peer_addr);
904aac6f11fSWisam Jaddo 
905ae03d0d1SIvan Boule void port_mtu_set(portid_t port_id, uint16_t mtu);
9064b61b877SBing Zhao int port_action_handle_create(portid_t port_id, uint32_t id,
9074b61b877SBing Zhao 			      const struct rte_flow_indir_action_conf *conf,
90855509e3aSAndrey Vesnovaty 			      const struct rte_flow_action *action);
9094b61b877SBing Zhao int port_action_handle_destroy(portid_t port_id,
91055509e3aSAndrey Vesnovaty 			       uint32_t n, const uint32_t *action);
911f7352c17SDmitry Kozlyuk int port_action_handle_flush(portid_t port_id);
9124b61b877SBing Zhao struct rte_flow_action_handle *port_action_handle_get_by_id(portid_t port_id,
91355509e3aSAndrey Vesnovaty 							    uint32_t id);
9144b61b877SBing Zhao int port_action_handle_update(portid_t port_id, uint32_t id,
91555509e3aSAndrey Vesnovaty 			      const struct rte_flow_action *action);
916*3e3edab5SGregory Etelson void
917*3e3edab5SGregory Etelson port_action_handle_query_update(portid_t port_id, uint32_t id,
918*3e3edab5SGregory Etelson 				enum rte_flow_query_update_mode qu_mode,
919*3e3edab5SGregory Etelson 				const struct rte_flow_action *action);
9209ad3a41aSAlexander Kozyrev int port_flow_get_info(portid_t port_id);
9219ad3a41aSAlexander Kozyrev int port_flow_configure(portid_t port_id,
9229ad3a41aSAlexander Kozyrev 			const struct rte_flow_port_attr *port_attr,
9239ad3a41aSAlexander Kozyrev 			uint16_t nb_queue,
9249ad3a41aSAlexander Kozyrev 			const struct rte_flow_queue_attr *queue_attr);
92504cc665fSAlexander Kozyrev int port_flow_pattern_template_create(portid_t port_id, uint32_t id,
92604cc665fSAlexander Kozyrev 				      const struct rte_flow_pattern_template_attr *attr,
92704cc665fSAlexander Kozyrev 				      const struct rte_flow_item *pattern);
92804cc665fSAlexander Kozyrev int port_flow_pattern_template_destroy(portid_t port_id, uint32_t n,
92904cc665fSAlexander Kozyrev 				       const uint32_t *template);
9306d736e05SSuanming Mou int port_flow_pattern_template_flush(portid_t port_id);
93104cc665fSAlexander Kozyrev int port_flow_actions_template_create(portid_t port_id, uint32_t id,
93204cc665fSAlexander Kozyrev 				      const struct rte_flow_actions_template_attr *attr,
93304cc665fSAlexander Kozyrev 				      const struct rte_flow_action *actions,
93404cc665fSAlexander Kozyrev 				      const struct rte_flow_action *masks);
93504cc665fSAlexander Kozyrev int port_flow_actions_template_destroy(portid_t port_id, uint32_t n,
93604cc665fSAlexander Kozyrev 				       const uint32_t *template);
9376d736e05SSuanming Mou int port_flow_actions_template_flush(portid_t port_id);
938c4b38873SAlexander Kozyrev int port_flow_template_table_create(portid_t port_id, uint32_t id,
939c4b38873SAlexander Kozyrev 		   const struct rte_flow_template_table_attr *table_attr,
940c4b38873SAlexander Kozyrev 		   uint32_t nb_pattern_templates, uint32_t *pattern_templates,
941c4b38873SAlexander Kozyrev 		   uint32_t nb_actions_templates, uint32_t *actions_templates);
942c4b38873SAlexander Kozyrev int port_flow_template_table_destroy(portid_t port_id,
943c4b38873SAlexander Kozyrev 			    uint32_t n, const uint32_t *table);
9446d736e05SSuanming Mou int port_flow_template_table_flush(portid_t port_id);
945ecdc927bSAlexander Kozyrev int port_queue_flow_create(portid_t port_id, queueid_t queue_id,
94660261a00SAlexander Kozyrev 			   bool postpone, uint32_t table_id, uint32_t rule_idx,
947ecdc927bSAlexander Kozyrev 			   uint32_t pattern_idx, uint32_t actions_idx,
948ecdc927bSAlexander Kozyrev 			   const struct rte_flow_item *pattern,
949ecdc927bSAlexander Kozyrev 			   const struct rte_flow_action *actions);
950ecdc927bSAlexander Kozyrev int port_queue_flow_destroy(portid_t port_id, queueid_t queue_id,
951ecdc927bSAlexander Kozyrev 			    bool postpone, uint32_t n, const uint32_t *rule);
952d906fff5SAlexander Kozyrev int port_queue_action_handle_create(portid_t port_id, uint32_t queue_id,
953d906fff5SAlexander Kozyrev 			bool postpone, uint32_t id,
954d906fff5SAlexander Kozyrev 			const struct rte_flow_indir_action_conf *conf,
955d906fff5SAlexander Kozyrev 			const struct rte_flow_action *action);
956d906fff5SAlexander Kozyrev int port_queue_action_handle_destroy(portid_t port_id,
957d906fff5SAlexander Kozyrev 				     uint32_t queue_id, bool postpone,
958d906fff5SAlexander Kozyrev 				     uint32_t n, const uint32_t *action);
959d906fff5SAlexander Kozyrev int port_queue_action_handle_update(portid_t port_id, uint32_t queue_id,
960d906fff5SAlexander Kozyrev 				    bool postpone, uint32_t id,
961d906fff5SAlexander Kozyrev 				    const struct rte_flow_action *action);
962c9dc0384SSuanming Mou int port_queue_action_handle_query(portid_t port_id, uint32_t queue_id,
963c9dc0384SSuanming Mou 				   bool postpone, uint32_t id);
964*3e3edab5SGregory Etelson void
965*3e3edab5SGregory Etelson port_queue_action_handle_query_update(portid_t port_id,
966*3e3edab5SGregory Etelson 				      uint32_t queue_id, bool postpone,
967*3e3edab5SGregory Etelson 				      uint32_t id,
968*3e3edab5SGregory Etelson 				      enum rte_flow_query_update_mode qu_mode,
969*3e3edab5SGregory Etelson 				      const struct rte_flow_action *action);
9709cbbee14SAlexander Kozyrev int port_queue_flow_push(portid_t port_id, queueid_t queue_id);
971f9bf7dffSAlexander Kozyrev int port_queue_flow_pull(portid_t port_id, queueid_t queue_id);
972966eb55eSMichael Baum void port_queue_flow_aged(portid_t port_id, uint32_t queue_id, uint8_t destroy);
973938a184aSAdrien Mazarguil int port_flow_validate(portid_t port_id,
974938a184aSAdrien Mazarguil 		       const struct rte_flow_attr *attr,
975938a184aSAdrien Mazarguil 		       const struct rte_flow_item *pattern,
9761b9f2746SGregory Etelson 		       const struct rte_flow_action *actions,
9771b9f2746SGregory Etelson 		       const struct tunnel_ops *tunnel_ops);
978938a184aSAdrien Mazarguil int port_flow_create(portid_t port_id,
979938a184aSAdrien Mazarguil 		     const struct rte_flow_attr *attr,
980938a184aSAdrien Mazarguil 		     const struct rte_flow_item *pattern,
9811b9f2746SGregory Etelson 		     const struct rte_flow_action *actions,
9821b9f2746SGregory Etelson 		     const struct tunnel_ops *tunnel_ops);
9834b61b877SBing Zhao int port_action_handle_query(portid_t port_id, uint32_t id);
9840e459ffaSDong Zhou void update_age_action_context(const struct rte_flow_action *actions,
9850e459ffaSDong Zhou 		     struct port_flow *pf);
98668629be3SKe Zhang int mcast_addr_pool_destroy(portid_t port_id);
987938a184aSAdrien Mazarguil int port_flow_destroy(portid_t port_id, uint32_t n, const uint32_t *rule);
988938a184aSAdrien Mazarguil int port_flow_flush(portid_t port_id);
989bf085dcbSHaifei Luo int port_flow_dump(portid_t port_id, bool dump_all,
990bf085dcbSHaifei Luo 			uint32_t rule, const char *file_name);
991938a184aSAdrien Mazarguil int port_flow_query(portid_t port_id, uint32_t rule,
992fb8fd96dSDeclan Doherty 		    const struct rte_flow_action *action);
993938a184aSAdrien Mazarguil void port_flow_list(portid_t port_id, uint32_t n, const uint32_t *group);
9940e459ffaSDong Zhou void port_flow_aged(portid_t port_id, uint8_t destroy);
9951b9f2746SGregory Etelson const char *port_flow_tunnel_type(struct rte_flow_tunnel *tunnel);
9961b9f2746SGregory Etelson struct port_flow_tunnel *
9971b9f2746SGregory Etelson port_flow_locate_tunnel(uint16_t port_id, struct rte_flow_tunnel *tun);
9981b9f2746SGregory Etelson void port_flow_tunnel_list(portid_t port_id);
9991b9f2746SGregory Etelson void port_flow_tunnel_destroy(portid_t port_id, uint32_t tunnel_id);
10001b9f2746SGregory Etelson void port_flow_tunnel_create(portid_t port_id, const struct tunnel_ops *ops);
1001323f811aSAdrien Mazarguil int port_flow_isolate(portid_t port_id, int set);
1002f29fa2c5SHaifei Luo int port_meter_policy_add(portid_t port_id, uint32_t policy_id,
1003f29fa2c5SHaifei Luo 		const struct rte_flow_action *actions);
10049c4a0c18SAlexander Kozyrev struct rte_flow_meter_profile *port_meter_profile_get_by_id(portid_t port_id,
10059c4a0c18SAlexander Kozyrev 							    uint32_t id);
10069c4a0c18SAlexander Kozyrev struct rte_flow_meter_policy *port_meter_policy_get_by_id(portid_t port_id,
10079c4a0c18SAlexander Kozyrev 							  uint32_t id);
1008af75078fSIntel 
1009af75078fSIntel void rx_ring_desc_display(portid_t port_id, queueid_t rxq_id, uint16_t rxd_id);
1010af75078fSIntel void tx_ring_desc_display(portid_t port_id, queueid_t txq_id, uint16_t txd_id);
1011af75078fSIntel 
1012013af9b6SIntel int set_fwd_lcores_list(unsigned int *lcorelist, unsigned int nb_lc);
1013013af9b6SIntel int set_fwd_lcores_mask(uint64_t lcoremask);
1014af75078fSIntel void set_fwd_lcores_number(uint16_t nb_lc);
1015af75078fSIntel 
1016af75078fSIntel void set_fwd_ports_list(unsigned int *portlist, unsigned int nb_pt);
1017af75078fSIntel void set_fwd_ports_mask(uint64_t portmask);
1018af75078fSIntel void set_fwd_ports_number(uint16_t nb_pt);
1019a8ef3e3aSBernard Iremonger int port_is_forwarding(portid_t port_id);
1020af75078fSIntel 
1021a47aa8b9SIntel void rx_vlan_strip_set(portid_t port_id, int on);
1022a47aa8b9SIntel void rx_vlan_strip_set_on_queue(portid_t port_id, uint16_t queue_id, int on);
1023a47aa8b9SIntel 
1024a47aa8b9SIntel void rx_vlan_filter_set(portid_t port_id, int on);
1025af75078fSIntel void rx_vlan_all_filter_set(portid_t port_id, int on);
10262a0b4198SVivek Sharma void rx_vlan_qinq_strip_set(portid_t port_id, int on);
102764b01ee0SMichal Jastrzebski int rx_vft_set(portid_t port_id, uint16_t vlan_id, int on);
1028a47aa8b9SIntel void vlan_extend_set(portid_t port_id, int on);
102919b16e2fSHelin Zhang void vlan_tpid_set(portid_t port_id, enum rte_vlan_type vlan_type,
103019b16e2fSHelin Zhang 		   uint16_t tp_id);
1031af75078fSIntel void tx_vlan_set(portid_t port_id, uint16_t vlan_id);
103292ebda07SHelin Zhang void tx_qinq_set(portid_t port_id, uint16_t vlan_id, uint16_t vlan_id_outer);
1033af75078fSIntel void tx_vlan_reset(portid_t port_id);
1034529ba951SHelin Zhang void tx_vlan_pvid_set(portid_t port_id, uint16_t vlan_id, int on);
1035ed30d9b6SIntel 
1036ed30d9b6SIntel void set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint8_t map_value);
1037ed30d9b6SIntel 
1038a4fd5eeeSElza Mathew void set_xstats_hide_zero(uint8_t on_off);
1039a4fd5eeeSElza Mathew 
1040bc700b67SDharmik Thakkar void set_record_core_cycles(uint8_t on_off);
10410e4b1963SDharmik Thakkar void set_record_burst_stats(uint8_t on_off);
1042af75078fSIntel void set_verbose_level(uint16_t vb_level);
10430f2096d7SViacheslav Ovsiienko void set_rx_pkt_segments(unsigned int *seg_lengths, unsigned int nb_segs);
104452e2e7edSYuan Wang void set_rx_pkt_hdrs(unsigned int *seg_protos, unsigned int nb_segs);
104552e2e7edSYuan Wang void show_rx_pkt_hdrs(void);
10460f2096d7SViacheslav Ovsiienko void show_rx_pkt_segments(void);
104791c78e09SViacheslav Ovsiienko void set_rx_pkt_offsets(unsigned int *seg_offsets, unsigned int nb_offs);
104891c78e09SViacheslav Ovsiienko void show_rx_pkt_offsets(void);
10490f2096d7SViacheslav Ovsiienko void set_tx_pkt_segments(unsigned int *seg_lengths, unsigned int nb_segs);
105079bec05bSKonstantin Ananyev void show_tx_pkt_segments(void);
10514940344dSViacheslav Ovsiienko void set_tx_pkt_times(unsigned int *tx_times);
10524940344dSViacheslav Ovsiienko void show_tx_pkt_times(void);
105379bec05bSKonstantin Ananyev void set_tx_pkt_split(const char *name);
1054ce0a4a1dSJie Zhou int parse_fec_mode(const char *name, uint32_t *fec_capa);
1055b19da32eSMin Hu (Connor) void show_fec_capability(uint32_t num, struct rte_eth_fec_capa *speed_fec_capa);
1056af75078fSIntel void set_nb_pkt_per_burst(uint16_t pkt_burst);
1057769ce6b1SThomas Monjalon char *list_pkt_forwarding_modes(void);
1058bf56fce1SZhihong Wang char *list_pkt_forwarding_retry_modes(void);
1059af75078fSIntel void set_pkt_forwarding_mode(const char *fwd_mode);
1060af75078fSIntel void start_packet_forwarding(int with_tx_first);
106153324971SDavid Marchand void fwd_stats_display(void);
106253324971SDavid Marchand void fwd_stats_reset(void);
1063af75078fSIntel void stop_packet_forwarding(void);
1064cfae07fdSOuyang Changchun void dev_set_link_up(portid_t pid);
1065cfae07fdSOuyang Changchun void dev_set_link_down(portid_t pid);
1066ce8d5614SIntel void init_port_config(void);
106741b05095SBernard Iremonger void set_port_slave_flag(portid_t slave_pid);
106841b05095SBernard Iremonger void clear_port_slave_flag(portid_t slave_pid);
10690e545d30SBernard Iremonger uint8_t port_is_bonding_slave(portid_t slave_pid);
10700e545d30SBernard Iremonger 
10711a572499SJingjing Wu int init_port_dcb_config(portid_t pid, enum dcb_mode_enable dcb_mode,
10721a572499SJingjing Wu 		     enum rte_eth_nb_tcs num_tcs,
10731a572499SJingjing Wu 		     uint8_t pfc_en);
1074148f963fSBruce Richardson int start_port(portid_t pid);
1075ce8d5614SIntel void stop_port(portid_t pid);
1076ce8d5614SIntel void close_port(portid_t pid);
107797f1e196SWei Dai void reset_port(portid_t pid);
1078edab33b1STetsuya Mukawa void attach_port(char *identifier);
10795edee5f6SThomas Monjalon void detach_devargs(char *identifier);
1080f8e5baa2SThomas Monjalon void detach_port_device(portid_t port_id);
1081ce8d5614SIntel int all_ports_stopped(void);
10826018eb8cSShahaf Shuler int port_is_stopped(portid_t port_id);
10835f4ec54fSChen Jing D(Mark) int port_is_started(portid_t port_id);
1084af75078fSIntel void pmd_test_exit(void);
10851be514fbSAndrew Rybchenko #if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE)
1086af75078fSIntel void fdir_get_infos(portid_t port_id);
10871be514fbSAndrew Rybchenko #endif
108866c59490SHelin Zhang void port_rss_reta_info(portid_t port_id,
108966c59490SHelin Zhang 			struct rte_eth_rss_reta_entry64 *reta_conf,
109066c59490SHelin Zhang 			uint16_t nb_entries);
10916a18e1afSOuyang Changchun 
10927741e4cfSIntel void set_vf_traffic(portid_t port_id, uint8_t is_rx, uint16_t vf, uint8_t on);
1093af75078fSIntel 
10942befc67fSViacheslav Ovsiienko int
10952befc67fSViacheslav Ovsiienko rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
10962befc67fSViacheslav Ovsiienko 	       uint16_t nb_rx_desc, unsigned int socket_id,
10972befc67fSViacheslav Ovsiienko 	       struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp);
10982befc67fSViacheslav Ovsiienko 
10993a26e41eSSatha Rao int set_queue_rate_limit(portid_t port_id, uint16_t queue_idx, uint32_t rate);
11003a26e41eSSatha Rao int set_vf_rate_limit(portid_t port_id, uint16_t vf, uint32_t rate,
11016a18e1afSOuyang Changchun 				uint64_t q_msk);
11026a18e1afSOuyang Changchun 
1103bc70e559SSpike Du int set_rxq_avail_thresh(portid_t port_id, uint16_t queue_id,
1104bc70e559SSpike Du 			 uint8_t avail_thresh);
1105bc70e559SSpike Du 
11065b4557ecSFerruh Yigit void port_rss_hash_conf_show(portid_t port_id, int show_rss_key);
11078205e241SNelio Laranjeiro void port_rss_hash_key_update(portid_t port_id, char rss_type[],
11083529e8f3SNatanael Copa 			      uint8_t *hash_key, uint8_t hash_key_len);
11095f4ec54fSChen Jing D(Mark) int rx_queue_id_is_invalid(queueid_t rxq_id);
11105f4ec54fSChen Jing D(Mark) int tx_queue_id_is_invalid(queueid_t txq_id);
11116970401eSDavid Marchand #ifdef RTE_LIB_GRO
1112b7091f1dSJiayu Hu void setup_gro(const char *onoff, portid_t port_id);
1113b7091f1dSJiayu Hu void setup_gro_flush_cycles(uint8_t cycles);
1114b7091f1dSJiayu Hu void show_gro(portid_t port_id);
11156970401eSDavid Marchand #endif
11166970401eSDavid Marchand #ifdef RTE_LIB_GSO
111752f38a20SJiayu Hu void setup_gso(const char *mode, portid_t port_id);
11186970401eSDavid Marchand #endif
11196f51deb9SIvan Ilchenko int eth_dev_info_get_print_err(uint16_t port_id,
11206f51deb9SIvan Ilchenko 			struct rte_eth_dev_info *dev_info);
1121655eae01SJie Wang int eth_dev_conf_get_print_err(uint16_t port_id,
1122655eae01SJie Wang 			struct rte_eth_conf *dev_conf);
112334fc1051SIvan Ilchenko void eth_set_promisc_mode(uint16_t port_id, int enable);
11248835806dSIvan Ilchenko void eth_set_allmulticast_mode(uint16_t port, int enable);
1125e661a08bSIgor Romanov int eth_link_get_nowait_print_err(uint16_t port_id, struct rte_eth_link *link);
1126a5279d25SIgor Romanov int eth_macaddr_get_print_err(uint16_t port_id,
1127a5279d25SIgor Romanov 			struct rte_ether_addr *mac_addr);
11286f51deb9SIvan Ilchenko 
1129e1d44d0aSKalesh AP /* Functions to display the set of MAC addresses added to a port*/
1130e1d44d0aSKalesh AP void show_macs(portid_t port_id);
1131e1d44d0aSKalesh AP void show_mcast_macs(portid_t port_id);
113216321de0SIvan Boule 
11338fff6675SIvan Boule /* Functions to manage the set of filtered Multicast MAC addresses */
11346d13ea8eSOlivier Matz void mcast_addr_add(portid_t port_id, struct rte_ether_addr *mc_addr);
11356d13ea8eSOlivier Matz void mcast_addr_remove(portid_t port_id, struct rte_ether_addr *mc_addr);
113628caa76aSZhiyong Yang void port_dcb_info_display(portid_t port_id);
11378fff6675SIvan Boule 
11389999dc6fSKirill Rybalchenko uint8_t *open_file(const char *file_path, uint32_t *size);
11399999dc6fSKirill Rybalchenko int save_file(const char *file_path, uint8_t *buf, uint32_t size);
11409999dc6fSKirill Rybalchenko int close_file(uint8_t *buf);
1141a92a5a2cSBeilei Xing 
1142edab33b1STetsuya Mukawa enum print_warning {
1143edab33b1STetsuya Mukawa 	ENABLED_WARN = 0,
1144edab33b1STetsuya Mukawa 	DISABLED_WARN
1145edab33b1STetsuya Mukawa };
1146edab33b1STetsuya Mukawa int port_id_is_invalid(portid_t port_id, enum print_warning warning);
11478f3c4176SMatan Azrad void print_valid_ports(void);
1148c9cafcc8SShahaf Shuler int new_socket_id(unsigned int socket_id);
1149edab33b1STetsuya Mukawa 
11503f7311baSWei Dai queueid_t get_allowed_max_nb_rxq(portid_t *pid);
11513f7311baSWei Dai int check_nb_rxq(queueid_t rxq);
115236db4f6cSWei Dai queueid_t get_allowed_max_nb_txq(portid_t *pid);
115336db4f6cSWei Dai int check_nb_txq(queueid_t txq);
115499e040d3SLijun Ou int check_nb_rxd(queueid_t rxd);
115599e040d3SLijun Ou int check_nb_txd(queueid_t txd);
11561c69df45SOri Kam queueid_t get_allowed_max_nb_hairpinq(portid_t *pid);
11571c69df45SOri Kam int check_nb_hairpinq(queueid_t hairpinq);
11583f7311baSWei Dai 
1159c77ad9deSRaslan Darawsheh uint16_t dump_rx_pkts(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[],
1160c77ad9deSRaslan Darawsheh 		      uint16_t nb_pkts, __rte_unused uint16_t max_pkts,
1161c77ad9deSRaslan Darawsheh 		      __rte_unused void *user_param);
1162c77ad9deSRaslan Darawsheh 
1163c77ad9deSRaslan Darawsheh uint16_t dump_tx_pkts(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[],
1164c77ad9deSRaslan Darawsheh 		      uint16_t nb_pkts, __rte_unused void *user_param);
1165c77ad9deSRaslan Darawsheh 
1166c77ad9deSRaslan Darawsheh void add_rx_dump_callbacks(portid_t portid);
1167c77ad9deSRaslan Darawsheh void remove_rx_dump_callbacks(portid_t portid);
1168c77ad9deSRaslan Darawsheh void add_tx_dump_callbacks(portid_t portid);
1169c77ad9deSRaslan Darawsheh void remove_tx_dump_callbacks(portid_t portid);
1170b5b38ed8SRaslan Darawsheh void configure_rxtx_dump_callbacks(uint16_t verbose);
1171d862c45bSRaslan Darawsheh 
11721e45c908SDekel Peled uint16_t tx_pkt_set_md(uint16_t port_id, __rte_unused uint16_t queue,
11731e45c908SDekel Peled 		       struct rte_mbuf *pkts[], uint16_t nb_pkts,
11741e45c908SDekel Peled 		       __rte_unused void *user_param);
11751e45c908SDekel Peled void add_tx_md_callback(portid_t portid);
11761e45c908SDekel Peled void remove_tx_md_callback(portid_t portid);
11771e45c908SDekel Peled 
1178b57b66a9SOri Kam uint16_t tx_pkt_set_dynf(uint16_t port_id, __rte_unused uint16_t queue,
1179b57b66a9SOri Kam 			 struct rte_mbuf *pkts[], uint16_t nb_pkts,
1180b57b66a9SOri Kam 			 __rte_unused void *user_param);
1181b57b66a9SOri Kam void add_tx_dynf_callback(portid_t portid);
1182b57b66a9SOri Kam void remove_tx_dynf_callback(portid_t portid);
1183b563c142SFerruh Yigit int update_mtu_from_frame_size(portid_t portid, uint32_t max_rx_pktlen);
118459f3a8acSGregory Etelson void flex_item_create(portid_t port_id, uint16_t flex_id, const char *filename);
118559f3a8acSGregory Etelson void flex_item_destroy(portid_t port_id, uint16_t flex_id);
118659f3a8acSGregory Etelson void port_flex_item_flush(portid_t port_id);
1187b57b66a9SOri Kam 
11882566c33cSGregory Etelson extern int flow_parse(const char *src, void *result, unsigned int size,
11892566c33cSGregory Etelson 		      struct rte_flow_attr **attr,
11902566c33cSGregory Etelson 		      struct rte_flow_item **pattern,
11912566c33cSGregory Etelson 		      struct rte_flow_action **actions);
11922566c33cSGregory Etelson 
11939ad341b5SHuisong Li uint64_t str_to_rsstypes(const char *str);
11943c23ee6cSHuisong Li const char *rsstypes_to_str(uint64_t rss_type);
11953c23ee6cSHuisong Li 
1196119786aaSFerruh Yigit uint16_t str_to_flowtype(const char *string);
1197119786aaSFerruh Yigit const char *flowtype_to_str(uint16_t flow_type);
1198119786aaSFerruh Yigit 
1199592ab76fSDavid Marchand /* For registering driver specific testpmd commands. */
1200592ab76fSDavid Marchand struct testpmd_driver_commands {
1201592ab76fSDavid Marchand 	TAILQ_ENTRY(testpmd_driver_commands) next;
1202592ab76fSDavid Marchand 	struct {
1203592ab76fSDavid Marchand 		cmdline_parse_inst_t *ctx;
1204592ab76fSDavid Marchand 		const char *help;
1205592ab76fSDavid Marchand 	} commands[];
1206592ab76fSDavid Marchand };
1207592ab76fSDavid Marchand 
1208592ab76fSDavid Marchand void testpmd_add_driver_commands(struct testpmd_driver_commands *c);
1209592ab76fSDavid Marchand #define TESTPMD_ADD_DRIVER_COMMANDS(c) \
1210592ab76fSDavid Marchand RTE_INIT(__##c) \
1211592ab76fSDavid Marchand { \
1212592ab76fSDavid Marchand 	testpmd_add_driver_commands(&c); \
1213592ab76fSDavid Marchand }
1214592ab76fSDavid Marchand 
1215af75078fSIntel /*
1216af75078fSIntel  * Work-around of a compilation error with ICC on invocations of the
1217af75078fSIntel  * rte_be_to_cpu_16() function.
1218af75078fSIntel  */
1219af75078fSIntel #ifdef __GCC__
1220af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v)  rte_be_to_cpu_16((be_16_v))
1221af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) rte_cpu_to_be_16((cpu_16_v))
1222af75078fSIntel #else
122344eb9456SThomas Monjalon #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1224af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v)  (be_16_v)
1225af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) (cpu_16_v)
1226af75078fSIntel #else
1227af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v) \
1228af75078fSIntel 	(uint16_t) ((((be_16_v) & 0xFF) << 8) | ((be_16_v) >> 8))
1229af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) \
1230af75078fSIntel 	(uint16_t) ((((cpu_16_v) & 0xFF) << 8) | ((cpu_16_v) >> 8))
1231af75078fSIntel #endif
1232af75078fSIntel #endif /* __GCC__ */
1233af75078fSIntel 
1234285fd101SOlivier Matz #define TESTPMD_LOG(level, fmt, args...) \
1235285fd101SOlivier Matz 	rte_log(RTE_LOG_ ## level, testpmd_logtype, "testpmd: " fmt, ## args)
1236285fd101SOlivier Matz 
1237af75078fSIntel #endif /* _TESTPMD_H_ */
1238