1174a1631SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 2174a1631SBruce Richardson * Copyright(c) 2010-2017 Intel Corporation 3af75078fSIntel */ 4af75078fSIntel 5af75078fSIntel #ifndef _TESTPMD_H_ 6af75078fSIntel #define _TESTPMD_H_ 7af75078fSIntel 84f1ed78eSThomas Monjalon #include <stdbool.h> 94f1ed78eSThomas Monjalon 106970401eSDavid Marchand #ifdef RTE_LIB_GRO 11b40f8d78SJiayu Hu #include <rte_gro.h> 126970401eSDavid Marchand #endif 136970401eSDavid Marchand #ifdef RTE_LIB_GSO 1452f38a20SJiayu Hu #include <rte_gso.h> 156970401eSDavid Marchand #endif 16761f7ae1SJie Zhou #include <rte_os_shim.h> 17592ab76fSDavid Marchand #include <rte_ethdev.h> 18592ab76fSDavid Marchand #include <rte_flow.h> 19592ab76fSDavid Marchand #include <rte_mbuf_dyn.h> 20592ab76fSDavid Marchand 2130626defSXiaoyu Min #include <cmdline.h> 22592ab76fSDavid Marchand #include <cmdline_parse.h> 23592ab76fSDavid Marchand 241b9f2746SGregory Etelson #include <sys/queue.h> 2559f3a8acSGregory Etelson #ifdef RTE_HAS_JANSSON 2659f3a8acSGregory Etelson #include <jansson.h> 2759f3a8acSGregory Etelson #endif 2885c18dcbSGaetan Rivet 29ce8d5614SIntel #define RTE_PORT_ALL (~(portid_t)0x0) 30ce8d5614SIntel 31ce8d5614SIntel #define RTE_PORT_STOPPED (uint16_t)0 32ce8d5614SIntel #define RTE_PORT_STARTED (uint16_t)1 33ce8d5614SIntel #define RTE_PORT_CLOSED (uint16_t)2 34ce8d5614SIntel #define RTE_PORT_HANDLING (uint16_t)3 35ce8d5614SIntel 363889a322SHuisong Li extern uint8_t cl_quit; 370fd1386cSStephen Hemminger extern volatile uint8_t f_quit; 383889a322SHuisong Li 39af75078fSIntel /* 400f6f219eSMohammad Abdul Awal * It is used to allocate the memory for hash key. 410f6f219eSMohammad Abdul Awal * The hash key size is NIC dependent. 420f6f219eSMohammad Abdul Awal */ 430f6f219eSMohammad Abdul Awal #define RSS_HASH_KEY_LENGTH 64 440f6f219eSMohammad Abdul Awal 450f6f219eSMohammad Abdul Awal /* 46af75078fSIntel * Default size of the mbuf data buffer to receive standard 1518-byte 47af75078fSIntel * Ethernet frames in a mono-segment memory buffer. 48af75078fSIntel */ 49824cb29cSKonstantin Ananyev #define DEFAULT_MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE 50824cb29cSKonstantin Ananyev /**< Default size of mbuf data buffer. */ 51af75078fSIntel 52af75078fSIntel /* 53af75078fSIntel * The maximum number of segments per packet is used when creating 54af75078fSIntel * scattered transmit packets composed of a list of mbufs. 55af75078fSIntel */ 56ea672a8bSOlivier Matz #define RTE_MAX_SEGS_PER_PKT 255 /**< nb_segs is a 8-bit unsigned char. */ 57af75078fSIntel 5826cbb419SViacheslav Ovsiienko /* 5926cbb419SViacheslav Ovsiienko * The maximum number of segments per packet is used to configure 6026cbb419SViacheslav Ovsiienko * buffer split feature, also specifies the maximum amount of 6126cbb419SViacheslav Ovsiienko * optional Rx pools to allocate mbufs to split. 6226cbb419SViacheslav Ovsiienko */ 6326cbb419SViacheslav Ovsiienko #define MAX_SEGS_BUFFER_SPLIT 8 /**< nb_segs is a 8-bit unsigned char. */ 6426cbb419SViacheslav Ovsiienko 6526cbb419SViacheslav Ovsiienko /* The prefix of the mbuf pool names created by the application. */ 6626cbb419SViacheslav Ovsiienko #define MBUF_POOL_NAME_PFX "mb_pool" 6726cbb419SViacheslav Ovsiienko 684ed89049SDavid Marchand #define RX_DESC_MAX 2048 694ed89049SDavid Marchand #define TX_DESC_MAX 2048 704ed89049SDavid Marchand 71af75078fSIntel #define MAX_PKT_BURST 512 72836853d3SCunming Liang #define DEF_PKT_BURST 32 73af75078fSIntel 74e9378bbcSCunming Liang #define DEF_MBUF_CACHE 250 75e9378bbcSCunming Liang 76fdf20fa7SSergio Gonzalez Monroy #define RTE_CACHE_LINE_SIZE_ROUNDUP(size) \ 77fdf20fa7SSergio Gonzalez Monroy (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE)) 78af75078fSIntel 79b6ea6408SIntel #define NUMA_NO_CONFIG 0xFF 80b6ea6408SIntel #define UMA_NO_CONFIG 0xFF 81b6ea6408SIntel 8257d91f5bSMingxia Liu #define MIN_TOTAL_NUM_MBUFS 1024 8357d91f5bSMingxia Liu 844f04edcdSHanumanth Pothula /* Maximum number of pools supported per Rx queue */ 854f04edcdSHanumanth Pothula #define MAX_MEMPOOL 8 864f04edcdSHanumanth Pothula 87*2bf44dd1SSivaprasad Tummala typedef uint32_t lcoreid_t; 88f8244c63SZhiyong Yang typedef uint16_t portid_t; 89af75078fSIntel typedef uint16_t queueid_t; 90af75078fSIntel typedef uint16_t streamid_t; 91af75078fSIntel 92af75078fSIntel enum { 93af75078fSIntel PORT_TOPOLOGY_PAIRED, 943e2006d6SCyril Chemparathy PORT_TOPOLOGY_CHAINED, 953e2006d6SCyril Chemparathy PORT_TOPOLOGY_LOOP, 96af75078fSIntel }; 97af75078fSIntel 98c7f5dba7SAnatoly Burakov enum { 99c7f5dba7SAnatoly Burakov MP_ALLOC_NATIVE, /**< allocate and populate mempool natively */ 100c7f5dba7SAnatoly Burakov MP_ALLOC_ANON, 101c7f5dba7SAnatoly Burakov /**< allocate mempool natively, but populate using anonymous memory */ 102c7f5dba7SAnatoly Burakov MP_ALLOC_XMEM, 103c7f5dba7SAnatoly Burakov /**< allocate and populate mempool using anonymous memory */ 10472512e18SViacheslav Ovsiienko MP_ALLOC_XMEM_HUGE, 105c7f5dba7SAnatoly Burakov /**< allocate and populate mempool using anonymous hugepage memory */ 10672512e18SViacheslav Ovsiienko MP_ALLOC_XBUF 10772512e18SViacheslav Ovsiienko /**< allocate mempool natively, use rte_pktmbuf_pool_create_extbuf */ 108c7f5dba7SAnatoly Burakov }; 109c7f5dba7SAnatoly Burakov 110c9dc0384SSuanming Mou enum { 111c9dc0384SSuanming Mou QUEUE_JOB_TYPE_FLOW_CREATE, 112c9dc0384SSuanming Mou QUEUE_JOB_TYPE_FLOW_DESTROY, 11399231e48SGregory Etelson QUEUE_JOB_TYPE_FLOW_TRANSFER, 11477e7939aSAlexander Kozyrev QUEUE_JOB_TYPE_FLOW_UPDATE, 115c9dc0384SSuanming Mou QUEUE_JOB_TYPE_ACTION_CREATE, 116c9dc0384SSuanming Mou QUEUE_JOB_TYPE_ACTION_DESTROY, 117c9dc0384SSuanming Mou QUEUE_JOB_TYPE_ACTION_UPDATE, 118c9dc0384SSuanming Mou QUEUE_JOB_TYPE_ACTION_QUERY, 119c9dc0384SSuanming Mou }; 120c9dc0384SSuanming Mou 1211d343c19SMike Pattrick enum noisy_fwd_mode { 1221d343c19SMike Pattrick NOISY_FWD_MODE_IO, 1231d343c19SMike Pattrick NOISY_FWD_MODE_MAC, 1241d343c19SMike Pattrick NOISY_FWD_MODE_MACSWAP, 1251d343c19SMike Pattrick NOISY_FWD_MODE_5TSWAP, 1261d343c19SMike Pattrick NOISY_FWD_MODE_MAX, 1271d343c19SMike Pattrick }; 1281d343c19SMike Pattrick 129af75078fSIntel /** 130af75078fSIntel * The data structure associated with RX and TX packet burst statistics 131af75078fSIntel * that are recorded for each forwarding stream. 132af75078fSIntel */ 133af75078fSIntel struct pkt_burst_stats { 1346a8b64fdSEli Britstein unsigned int pkt_burst_spread[MAX_PKT_BURST + 1]; 135af75078fSIntel }; 136af75078fSIntel 13744a37f3cSFerruh Yigit 13844a37f3cSFerruh Yigit #define TESTPMD_RSS_TYPES_CHAR_NUM_PER_LINE 64 139f4d623f9SAdrien Mazarguil /** Information for a given RSS type. */ 140f4d623f9SAdrien Mazarguil struct rss_type_info { 141f4d623f9SAdrien Mazarguil const char *str; /**< Type name. */ 142f4d623f9SAdrien Mazarguil uint64_t rss_type; /**< Type value. */ 143f4d623f9SAdrien Mazarguil }; 144f4d623f9SAdrien Mazarguil 145f4d623f9SAdrien Mazarguil /** 146f4d623f9SAdrien Mazarguil * RSS type information table. 147f4d623f9SAdrien Mazarguil * 148f4d623f9SAdrien Mazarguil * An entry with a NULL type name terminates the list. 149f4d623f9SAdrien Mazarguil */ 150f4d623f9SAdrien Mazarguil extern const struct rss_type_info rss_type_table[]; 151f4d623f9SAdrien Mazarguil 152af75078fSIntel /** 153b57b66a9SOri Kam * Dynf name array. 154b57b66a9SOri Kam * 155b57b66a9SOri Kam * Array that holds the name for each dynf. 156b57b66a9SOri Kam */ 157b57b66a9SOri Kam extern char dynf_names[64][RTE_MBUF_DYN_NAMESIZE]; 158b57b66a9SOri Kam 159b57b66a9SOri Kam /** 160af75078fSIntel * The data structure associated with a forwarding stream between a receive 161af75078fSIntel * port/queue and a transmit port/queue. 162af75078fSIntel */ 163af75078fSIntel struct fwd_stream { 164af75078fSIntel /* "read-only" data */ 165af75078fSIntel portid_t rx_port; /**< port to poll for received packets */ 166af75078fSIntel queueid_t rx_queue; /**< RX queue to poll on "rx_port" */ 167af75078fSIntel portid_t tx_port; /**< forwarding port of received packets */ 168af75078fSIntel queueid_t tx_queue; /**< TX queue to send forwarded packets */ 169af75078fSIntel streamid_t peer_addr; /**< index of peer ethernet address of packets */ 1703c4426dbSDmitry Kozlyuk bool disabled; /**< the stream is disabled and should not run */ 171af75078fSIntel 172bf56fce1SZhihong Wang unsigned int retry_enabled; 173bf56fce1SZhihong Wang 174af75078fSIntel /* "read-write" results */ 175c185d42cSDavid Marchand uint64_t rx_packets; /**< received packets */ 176c185d42cSDavid Marchand uint64_t tx_packets; /**< received packets transmitted */ 177c185d42cSDavid Marchand uint64_t fwd_dropped; /**< received packets not forwarded */ 178c185d42cSDavid Marchand uint64_t rx_bad_ip_csum ; /**< received packets has bad ip checksum */ 179c185d42cSDavid Marchand uint64_t rx_bad_l4_csum ; /**< received packets has bad l4 checksum */ 180c185d42cSDavid Marchand uint64_t rx_bad_outer_l4_csum; 18158d475b7SJerin Jacob /**< received packets has bad outer l4 checksum */ 182d139cf23SLance Richardson uint64_t rx_bad_outer_ip_csum; 183d139cf23SLance Richardson /**< received packets having bad outer ip checksum */ 1849fac5ca8SViacheslav Ovsiienko uint64_t ts_skew; /**< TX scheduling timestamp */ 1856970401eSDavid Marchand #ifdef RTE_LIB_GRO 186b7091f1dSJiayu Hu unsigned int gro_times; /**< GRO operation times */ 1876970401eSDavid Marchand #endif 18899a4974aSRobin Jarry uint64_t busy_cycles; /**< used with --record-core-cycles */ 189af75078fSIntel struct pkt_burst_stats rx_burst_stats; 190af75078fSIntel struct pkt_burst_stats tx_burst_stats; 19165744833SXueming Li struct fwd_lcore *lcore; /**< Lcore being scheduled. */ 1925fe42bc6SFeifei Wang /**< Rx queue information for recycling mbufs */ 1935fe42bc6SFeifei Wang struct rte_eth_recycle_rxq_info recycle_rxq_info; 194af75078fSIntel }; 195af75078fSIntel 196de956d5eSMatan Azrad /** 197de956d5eSMatan Azrad * Age action context types, must be included inside the age action 198de956d5eSMatan Azrad * context structure. 199de956d5eSMatan Azrad */ 200de956d5eSMatan Azrad enum age_action_context_type { 201de956d5eSMatan Azrad ACTION_AGE_CONTEXT_TYPE_FLOW, 2024b61b877SBing Zhao ACTION_AGE_CONTEXT_TYPE_INDIRECT_ACTION, 203de956d5eSMatan Azrad }; 204de956d5eSMatan Azrad 20504cc665fSAlexander Kozyrev /** Descriptor for a template. */ 20604cc665fSAlexander Kozyrev struct port_template { 20704cc665fSAlexander Kozyrev struct port_template *next; /**< Next template in list. */ 20804cc665fSAlexander Kozyrev struct port_template *tmp; /**< Temporary linking. */ 20904cc665fSAlexander Kozyrev uint32_t id; /**< Template ID. */ 21004cc665fSAlexander Kozyrev union { 21104cc665fSAlexander Kozyrev struct rte_flow_pattern_template *pattern_template; 21204cc665fSAlexander Kozyrev struct rte_flow_actions_template *actions_template; 21304cc665fSAlexander Kozyrev } template; /**< PMD opaque template object */ 21404cc665fSAlexander Kozyrev }; 21504cc665fSAlexander Kozyrev 216c4b38873SAlexander Kozyrev /** Descriptor for a flow table. */ 217c4b38873SAlexander Kozyrev struct port_table { 218c4b38873SAlexander Kozyrev struct port_table *next; /**< Next table in list. */ 219c4b38873SAlexander Kozyrev struct port_table *tmp; /**< Temporary linking. */ 220c4b38873SAlexander Kozyrev uint32_t id; /**< Table ID. */ 221c4b38873SAlexander Kozyrev uint32_t nb_pattern_templates; /**< Number of pattern templates. */ 222c4b38873SAlexander Kozyrev uint32_t nb_actions_templates; /**< Number of actions templates. */ 223f4f7ba1aSAlexander Kozyrev struct rte_flow_attr flow_attr; /**< Flow attributes. */ 224c4b38873SAlexander Kozyrev struct rte_flow_template_table *table; /**< PMD opaque template object */ 225c4b38873SAlexander Kozyrev }; 226c4b38873SAlexander Kozyrev 227938a184aSAdrien Mazarguil /** Descriptor for a single flow. */ 228938a184aSAdrien Mazarguil struct port_flow { 229938a184aSAdrien Mazarguil struct port_flow *next; /**< Next flow in list. */ 230938a184aSAdrien Mazarguil struct port_flow *tmp; /**< Temporary linking. */ 231fd5392d8SEli Britstein uint64_t id; /**< Flow rule ID. */ 2328ac3a1cdSEli Britstein uint64_t user_id; /**< User rule ID. */ 23377e7939aSAlexander Kozyrev struct port_table *table; /**< Flow table. */ 234938a184aSAdrien Mazarguil struct rte_flow *flow; /**< Opaque flow object returned by PMD. */ 235de956d5eSMatan Azrad struct rte_flow_conv_rule rule; /**< Saved flow rule description. */ 236de956d5eSMatan Azrad enum age_action_context_type age_type; /**< Age action context type. */ 23744b257ffSAdrien Mazarguil uint8_t data[]; /**< Storage for flow rule description */ 238938a184aSAdrien Mazarguil }; 239938a184aSAdrien Mazarguil 2404b61b877SBing Zhao /* Descriptor for indirect action */ 2414b61b877SBing Zhao struct port_indirect_action { 2424b61b877SBing Zhao struct port_indirect_action *next; /**< Next flow in list. */ 2434b61b877SBing Zhao uint32_t id; /**< Indirect action ID. */ 24455509e3aSAndrey Vesnovaty enum rte_flow_action_type type; /**< Action type. */ 24572a3dec7SGregory Etelson union { 24672a3dec7SGregory Etelson struct rte_flow_action_handle *handle; 24772a3dec7SGregory Etelson /**< Indirect action handle. */ 24872a3dec7SGregory Etelson struct rte_flow_action_list_handle *list_handle; 24972a3dec7SGregory Etelson /**< Indirect action list handle*/ 25072a3dec7SGregory Etelson }; 251de956d5eSMatan Azrad enum age_action_context_type age_type; /**< Age action context type. */ 25255509e3aSAndrey Vesnovaty }; 25355509e3aSAndrey Vesnovaty 254c9dc0384SSuanming Mou /* Descriptor for action query data. */ 255c9dc0384SSuanming Mou union port_action_query { 256c9dc0384SSuanming Mou struct rte_flow_query_count count; 257c9dc0384SSuanming Mou struct rte_flow_query_age age; 258c9dc0384SSuanming Mou struct rte_flow_action_conntrack ct; 2593e3edab5SGregory Etelson struct rte_flow_query_quota quota; 260c9dc0384SSuanming Mou }; 261c9dc0384SSuanming Mou 262c9dc0384SSuanming Mou /* Descriptor for queue job. */ 263c9dc0384SSuanming Mou struct queue_job { 264c9dc0384SSuanming Mou uint32_t type; /**< Job type. */ 265c9dc0384SSuanming Mou union { 266c9dc0384SSuanming Mou struct port_flow *pf; 267c9dc0384SSuanming Mou struct port_indirect_action *pia; 268c9dc0384SSuanming Mou }; 269c9dc0384SSuanming Mou union port_action_query query; 270c9dc0384SSuanming Mou }; 271c9dc0384SSuanming Mou 2721b9f2746SGregory Etelson struct port_flow_tunnel { 2731b9f2746SGregory Etelson LIST_ENTRY(port_flow_tunnel) chain; 2741b9f2746SGregory Etelson struct rte_flow_action *pmd_actions; 2751b9f2746SGregory Etelson struct rte_flow_item *pmd_items; 2761b9f2746SGregory Etelson uint32_t id; 2771b9f2746SGregory Etelson uint32_t num_pmd_actions; 2781b9f2746SGregory Etelson uint32_t num_pmd_items; 2791b9f2746SGregory Etelson struct rte_flow_tunnel tunnel; 2801b9f2746SGregory Etelson struct rte_flow_action *actions; 2811b9f2746SGregory Etelson struct rte_flow_item *items; 2821b9f2746SGregory Etelson }; 2831b9f2746SGregory Etelson 2841b9f2746SGregory Etelson struct tunnel_ops { 2851b9f2746SGregory Etelson uint32_t id; 2861b9f2746SGregory Etelson char type[16]; 2871b9f2746SGregory Etelson uint32_t enabled:1; 2881b9f2746SGregory Etelson uint32_t actions:1; 2891b9f2746SGregory Etelson uint32_t items:1; 2901b9f2746SGregory Etelson }; 2911b9f2746SGregory Etelson 29263b72657SIvan Ilchenko /** Information for an extended statistics to show. */ 29363b72657SIvan Ilchenko struct xstat_display_info { 29463b72657SIvan Ilchenko /** Supported xstats IDs in the order of xstats_display */ 29563b72657SIvan Ilchenko uint64_t *ids_supp; 29663b72657SIvan Ilchenko size_t ids_supp_sz; 29763b72657SIvan Ilchenko uint64_t *prev_values; 29863b72657SIvan Ilchenko uint64_t *curr_values; 29963b72657SIvan Ilchenko uint64_t prev_ns; 30063b72657SIvan Ilchenko bool allocated; 30163b72657SIvan Ilchenko }; 30263b72657SIvan Ilchenko 3033c4426dbSDmitry Kozlyuk /** RX queue configuration and state. */ 3043c4426dbSDmitry Kozlyuk struct port_rxqueue { 3053c4426dbSDmitry Kozlyuk struct rte_eth_rxconf conf; 3063c4426dbSDmitry Kozlyuk uint8_t state; /**< RTE_ETH_QUEUE_STATE_* value. */ 3073c4426dbSDmitry Kozlyuk }; 3083c4426dbSDmitry Kozlyuk 3093c4426dbSDmitry Kozlyuk /** TX queue configuration and state. */ 3103c4426dbSDmitry Kozlyuk struct port_txqueue { 3113c4426dbSDmitry Kozlyuk struct rte_eth_txconf conf; 3123c4426dbSDmitry Kozlyuk uint8_t state; /**< RTE_ETH_QUEUE_STATE_* value. */ 3133c4426dbSDmitry Kozlyuk }; 3143c4426dbSDmitry Kozlyuk 315af75078fSIntel /** 316af75078fSIntel * The data structure associated with each port. 317af75078fSIntel */ 318af75078fSIntel struct rte_port { 3191bcb7ba9SDavid Marchand struct rte_eth_dev_info dev_info; /**< Device info + driver name */ 320af75078fSIntel struct rte_eth_conf dev_conf; /**< Port configuration. */ 3216d13ea8eSOlivier Matz struct rte_ether_addr eth_addr; /**< Port ethernet address */ 322af75078fSIntel struct rte_eth_stats stats; /**< Last port statistics */ 323af75078fSIntel unsigned int socket_id; /**< For NUMA support */ 3243eecba26SShahaf Shuler uint16_t parse_tunnel:1; /**< Parse internal headers */ 3250f62d635SJianfeng Tan uint16_t tso_segsz; /**< Segmentation offload MSS for non-tunneled packets. */ 3260f62d635SJianfeng Tan uint16_t tunnel_tso_segsz; /**< Segmentation offload MSS for tunneled pkts. */ 32792ebda07SHelin Zhang uint16_t tx_vlan_id;/**< The tag ID */ 32892ebda07SHelin Zhang uint16_t tx_vlan_id_outer;/**< The outer tag ID */ 329ce8d5614SIntel volatile uint16_t port_status; /**< port started or not */ 3304f1ed78eSThomas Monjalon uint8_t need_setup; /**< port just attached */ 331ce8d5614SIntel uint8_t need_reconfig; /**< need reconfiguring port or not */ 332ce8d5614SIntel uint8_t need_reconfig_queues; /**< need reconfiguring queues or not */ 333ce8d5614SIntel uint8_t rss_flag; /**< enable rss or not */ 3347741e4cfSIntel uint8_t dcb_flag; /**< enable dcb */ 3359e6b36c3SDavid Marchand uint16_t nb_rx_desc[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue rx desc number */ 3369e6b36c3SDavid Marchand uint16_t nb_tx_desc[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue tx desc number */ 3373c4426dbSDmitry Kozlyuk struct port_rxqueue rxq[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue Rx config and state */ 3383c4426dbSDmitry Kozlyuk struct port_txqueue txq[RTE_MAX_QUEUES_PER_PORT+1]; /**< per queue Tx config and state */ 3396d13ea8eSOlivier Matz struct rte_ether_addr *mc_addr_pool; /**< pool of multicast addrs */ 3408fff6675SIvan Boule uint32_t mc_addr_nb; /**< nb. of addr. in mc_addr_pool */ 3419ad3a41aSAlexander Kozyrev queueid_t queue_nb; /**< nb. of queues for flow rules */ 3429ad3a41aSAlexander Kozyrev uint32_t queue_sz; /**< size of a queue for flow rules */ 34315e34522SLong Wu uint8_t member_flag : 1, /**< bonding member port */ 344236bc417SGregory Etelson bond_flag : 1, /**< port is bond device */ 3457c06f1abSHuisong Li fwd_mac_swap : 1, /**< swap packet MAC before forward */ 3467c06f1abSHuisong Li update_conf : 1; /**< need to update bonding device configuration */ 34704cc665fSAlexander Kozyrev struct port_template *pattern_templ_list; /**< Pattern templates. */ 34804cc665fSAlexander Kozyrev struct port_template *actions_templ_list; /**< Actions templates. */ 349c4b38873SAlexander Kozyrev struct port_table *table_list; /**< Flow tables. */ 350938a184aSAdrien Mazarguil struct port_flow *flow_list; /**< Associated flows. */ 3514b61b877SBing Zhao struct port_indirect_action *actions_list; 3524b61b877SBing Zhao /**< Associated indirect actions. */ 3531b9f2746SGregory Etelson LIST_HEAD(, port_flow_tunnel) flow_tunnel_list; 3549e6b36c3SDavid Marchand const struct rte_eth_rxtx_callback *rx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1]; 3559e6b36c3SDavid Marchand const struct rte_eth_rxtx_callback *tx_dump_cb[RTE_MAX_QUEUES_PER_PORT+1]; 356c18feafaSDekel Peled /**< metadata value to insert in Tx packets. */ 3579bf26e13SViacheslav Ovsiienko uint32_t tx_metadata; 3589e6b36c3SDavid Marchand const struct rte_eth_rxtx_callback *tx_set_md_cb[RTE_MAX_QUEUES_PER_PORT+1]; 359b57b66a9SOri Kam /**< dynamic flags. */ 360b57b66a9SOri Kam uint64_t mbuf_dynf; 361b57b66a9SOri Kam const struct rte_eth_rxtx_callback *tx_set_dynf_cb[RTE_MAX_QUEUES_PER_PORT+1]; 36263b72657SIvan Ilchenko struct xstat_display_info xstats_info; 363af75078fSIntel }; 364af75078fSIntel 365af75078fSIntel /** 366af75078fSIntel * The data structure associated with each forwarding logical core. 367af75078fSIntel * The logical cores are internally numbered by a core index from 0 to 368af75078fSIntel * the maximum number of logical cores - 1. 369af75078fSIntel * The system CPU identifier of all logical cores are setup in a global 370af75078fSIntel * CPU id. configuration table. 371af75078fSIntel */ 372af75078fSIntel struct fwd_lcore { 3736970401eSDavid Marchand #ifdef RTE_LIB_GSO 37452f38a20SJiayu Hu struct rte_gso_ctx gso_ctx; /**< GSO context */ 3756970401eSDavid Marchand #endif 376af75078fSIntel struct rte_mempool *mbp; /**< The mbuf pool to use by this core */ 3776970401eSDavid Marchand #ifdef RTE_LIB_GRO 378b7091f1dSJiayu Hu void *gro_ctx; /**< GRO context */ 3796970401eSDavid Marchand #endif 380af75078fSIntel streamid_t stream_idx; /**< index of 1st stream in "fwd_streams" */ 381af75078fSIntel streamid_t stream_nb; /**< number of streams in "fwd_streams" */ 382af75078fSIntel lcoreid_t cpuid_idx; /**< index of logical core in CPU id table */ 383af75078fSIntel volatile char stopped; /**< stop forwarding when set */ 38499a4974aSRobin Jarry uint64_t total_cycles; /**< used with --record-core-cycles */ 385af75078fSIntel }; 386af75078fSIntel 387af75078fSIntel /* 388af75078fSIntel * Forwarding mode operations: 389af75078fSIntel * - IO forwarding mode (default mode) 390af75078fSIntel * Forwards packets unchanged. 391af75078fSIntel * 392af75078fSIntel * - MAC forwarding mode 393af75078fSIntel * Set the source and the destination Ethernet addresses of packets 394af75078fSIntel * before forwarding them. 395af75078fSIntel * 396af75078fSIntel * - IEEE1588 forwarding mode 397af75078fSIntel * Check that received IEEE1588 Precise Time Protocol (PTP) packets are 398af75078fSIntel * filtered and timestamped by the hardware. 399af75078fSIntel * Forwards packets unchanged on the same port. 400af75078fSIntel * Check that sent IEEE1588 PTP packets are timestamped by the hardware. 401af75078fSIntel */ 402a78040c9SAlvin Zhang typedef int (*port_fwd_begin_t)(portid_t pi); 403af75078fSIntel typedef void (*port_fwd_end_t)(portid_t pi); 4043c4426dbSDmitry Kozlyuk typedef void (*stream_init_t)(struct fwd_stream *fs); 40506c20561SDavid Marchand typedef bool (*packet_fwd_t)(struct fwd_stream *fs); 406af75078fSIntel 407af75078fSIntel struct fwd_engine { 408af75078fSIntel const char *fwd_mode_name; /**< Forwarding mode name. */ 409af75078fSIntel port_fwd_begin_t port_fwd_begin; /**< NULL if nothing special to do. */ 410af75078fSIntel port_fwd_end_t port_fwd_end; /**< NULL if nothing special to do. */ 4113c4426dbSDmitry Kozlyuk stream_init_t stream_init; /**< NULL if nothing special to do. */ 412af75078fSIntel packet_fwd_t packet_fwd; /**< Mandatory. */ 4131d343c19SMike Pattrick const char *status; /**< NULL if nothing to display. */ 414af75078fSIntel }; 415af75078fSIntel 416180ba023SDavid Marchand void common_fwd_stream_init(struct fwd_stream *fs); 417180ba023SDavid Marchand 41859f3a8acSGregory Etelson #define FLEX_ITEM_MAX_SAMPLES_NUM 16 41959f3a8acSGregory Etelson #define FLEX_ITEM_MAX_LINKS_NUM 16 42059f3a8acSGregory Etelson #define FLEX_MAX_FLOW_PATTERN_LENGTH 64 42159f3a8acSGregory Etelson #define FLEX_MAX_PARSERS_NUM 8 42259f3a8acSGregory Etelson #define FLEX_MAX_PATTERNS_NUM 64 42359f3a8acSGregory Etelson #define FLEX_PARSER_ERR ((struct flex_item *)-1) 42459f3a8acSGregory Etelson 42559f3a8acSGregory Etelson struct flex_item { 42659f3a8acSGregory Etelson struct rte_flow_item_flex_conf flex_conf; 42759f3a8acSGregory Etelson struct rte_flow_item_flex_handle *flex_handle; 42859f3a8acSGregory Etelson uint32_t flex_id; 42959f3a8acSGregory Etelson }; 43059f3a8acSGregory Etelson 43159f3a8acSGregory Etelson struct flex_pattern { 43259f3a8acSGregory Etelson struct rte_flow_item_flex spec, mask; 43359f3a8acSGregory Etelson uint8_t spec_pattern[FLEX_MAX_FLOW_PATTERN_LENGTH]; 43459f3a8acSGregory Etelson uint8_t mask_pattern[FLEX_MAX_FLOW_PATTERN_LENGTH]; 43559f3a8acSGregory Etelson }; 43659f3a8acSGregory Etelson extern struct flex_item *flex_items[RTE_MAX_ETHPORTS][FLEX_MAX_PARSERS_NUM]; 43759f3a8acSGregory Etelson extern struct flex_pattern flex_patterns[FLEX_MAX_PATTERNS_NUM]; 43859f3a8acSGregory Etelson 439bf56fce1SZhihong Wang #define BURST_TX_WAIT_US 1 440bf56fce1SZhihong Wang #define BURST_TX_RETRIES 64 441bf56fce1SZhihong Wang 442bf56fce1SZhihong Wang extern uint32_t burst_tx_delay_time; 443bf56fce1SZhihong Wang extern uint32_t burst_tx_retry_num; 444bf56fce1SZhihong Wang 445af75078fSIntel extern struct fwd_engine io_fwd_engine; 446af75078fSIntel extern struct fwd_engine mac_fwd_engine; 447d47388f1SCyril Chemparathy extern struct fwd_engine mac_swap_engine; 448e9e23a61SCyril Chemparathy extern struct fwd_engine flow_gen_engine; 449af75078fSIntel extern struct fwd_engine rx_only_engine; 450af75078fSIntel extern struct fwd_engine tx_only_engine; 451af75078fSIntel extern struct fwd_engine csum_fwd_engine; 452168dfa61SIvan Boule extern struct fwd_engine icmp_echo_engine; 4533c156061SJens Freimann extern struct fwd_engine noisy_vnf_engine; 4542564abdaSShiri Kuzin extern struct fwd_engine five_tuple_swap_fwd_engine; 4555fe42bc6SFeifei Wang extern struct fwd_engine recycle_mbufs_engine; 456af75078fSIntel #ifdef RTE_LIBRTE_IEEE1588 457af75078fSIntel extern struct fwd_engine ieee1588_fwd_engine; 458af75078fSIntel #endif 45959840375SXueming Li extern struct fwd_engine shared_rxq_engine; 460af75078fSIntel 461af75078fSIntel extern struct fwd_engine * fwd_engines[]; /**< NULL terminated array. */ 46230626defSXiaoyu Min extern cmdline_parse_inst_t cmd_set_raw; 463739e045bSXiaoyu Min extern cmdline_parse_inst_t cmd_show_set_raw; 464739e045bSXiaoyu Min extern cmdline_parse_inst_t cmd_show_set_raw_all; 46559f3a8acSGregory Etelson extern cmdline_parse_inst_t cmd_set_flex_is_pattern; 46659f3a8acSGregory Etelson extern cmdline_parse_inst_t cmd_set_flex_spec_pattern; 467af75078fSIntel 46859fcf854SShahaf Shuler extern uint16_t mempool_flags; 46959fcf854SShahaf Shuler 470af75078fSIntel /** 471af75078fSIntel * Forwarding Configuration 472af75078fSIntel * 473af75078fSIntel */ 474af75078fSIntel struct fwd_config { 475af75078fSIntel struct fwd_engine *fwd_eng; /**< Packet forwarding mode. */ 476af75078fSIntel streamid_t nb_fwd_streams; /**< Nb. of forward streams to process. */ 477af75078fSIntel lcoreid_t nb_fwd_lcores; /**< Nb. of logical cores to launch. */ 478af75078fSIntel portid_t nb_fwd_ports; /**< Nb. of ports involved. */ 479af75078fSIntel }; 480af75078fSIntel 481900550deSIntel /** 482900550deSIntel * DCB mode enable 483900550deSIntel */ 484900550deSIntel enum dcb_mode_enable 485900550deSIntel { 486900550deSIntel DCB_VT_ENABLED, 487900550deSIntel DCB_ENABLED 488900550deSIntel }; 489900550deSIntel 490a4fd5eeeSElza Mathew extern uint8_t xstats_hide_zero; /**< Hide zero values for xstats display */ 491a4fd5eeeSElza Mathew 492af75078fSIntel /* globals used for configuration */ 493bc700b67SDharmik Thakkar extern uint8_t record_core_cycles; /**< Enables measurement of CPU cycles */ 4940e4b1963SDharmik Thakkar extern uint8_t record_burst_stats; /**< Enables display of RX and TX bursts */ 495af75078fSIntel extern uint16_t verbose_level; /**< Drives messages being displayed, if any. */ 496285fd101SOlivier Matz extern int testpmd_logtype; /**< Log type for testpmd logs */ 497af75078fSIntel extern uint8_t interactive; 498ca7feb22SCyril Chemparathy extern uint8_t auto_start; 49999cabef0SPablo de Lara extern uint8_t tx_first; 50081ef862bSAllain Legacy extern char cmdline_filename[PATH_MAX]; /**< offline commands file */ 501af75078fSIntel extern uint8_t numa_support; /**< set by "--numa" parameter */ 502af75078fSIntel extern uint16_t port_topology; /**< set by "--port-topology" parameter */ 5037741e4cfSIntel extern uint8_t no_flush_rx; /**<set by "--no-flush-rx" parameter */ 5047ee3e944SVasily Philipov extern uint8_t flow_isolate_all; /**< set by "--flow-isolate-all */ 505543df472SChengwen Feng extern uint8_t no_flow_flush; /**< set by "--disable-flow-flush" parameter */ 506c7f5dba7SAnatoly Burakov extern uint8_t mp_alloc_type; 507c7f5dba7SAnatoly Burakov /**< set by "--mp-anon" or "--mp-alloc" parameter */ 508b7b78a08SAjit Khaparde extern uint32_t eth_link_speed; 509bc202406SDavid Marchand extern uint8_t no_link_check; /**<set by "--disable-link-check" parameter */ 5106937d210SStephen Hemminger extern uint8_t no_device_start; /**<set by "--disable-device-start" parameter */ 5112950a769SDeclan Doherty extern volatile int test_done; /* stop packet forwarding when set to 1. */ 5128ea656f8SGaetan Rivet extern uint8_t lsc_interrupt; /**< disabled by "--no-lsc-interrupt" parameter */ 513284c908cSGaetan Rivet extern uint8_t rmv_interrupt; /**< disabled by "--no-rmv-interrupt" parameter */ 5143af72783SGaetan Rivet extern uint32_t event_print_mask; 5153af72783SGaetan Rivet /**< set by "--print-event xxxx" and "--mask-event xxxx parameters */ 5164f1ed78eSThomas Monjalon extern bool setup_on_probe_event; /**< disabled by port setup-on iterator */ 517e505d84cSAnatoly Burakov extern uint8_t hot_plug; /**< enable by "--hot-plug" parameter */ 518e505d84cSAnatoly Burakov extern int do_mlockall; /**< set by "--mlockall" or "--no-mlockall" parameter */ 519b0a9354aSPavan Nikhilesh extern uint8_t clear_ptypes; /**< disabled by set ptype cmd */ 520af75078fSIntel 521b6ea6408SIntel /* 522b6ea6408SIntel * Store specified sockets on which memory pool to be used by ports 523b6ea6408SIntel * is allocated. 524b6ea6408SIntel */ 52563531389SGeorgios Katsikas extern uint8_t port_numa[RTE_MAX_ETHPORTS]; 526b6ea6408SIntel 527b6ea6408SIntel /* 528b6ea6408SIntel * Store specified sockets on which RX ring to be used by ports 529b6ea6408SIntel * is allocated. 530b6ea6408SIntel */ 53163531389SGeorgios Katsikas extern uint8_t rxring_numa[RTE_MAX_ETHPORTS]; 532b6ea6408SIntel 533b6ea6408SIntel /* 534b6ea6408SIntel * Store specified sockets on which TX ring to be used by ports 535b6ea6408SIntel * is allocated. 536b6ea6408SIntel */ 53763531389SGeorgios Katsikas extern uint8_t txring_numa[RTE_MAX_ETHPORTS]; 538b6ea6408SIntel 539b6ea6408SIntel extern uint8_t socket_num; 540b6ea6408SIntel 541af75078fSIntel /* 542af75078fSIntel * Configuration of logical cores: 543af75078fSIntel * nb_fwd_lcores <= nb_cfg_lcores <= nb_lcores 544af75078fSIntel */ 545af75078fSIntel extern lcoreid_t nb_lcores; /**< Number of logical cores probed at init time. */ 546af75078fSIntel extern lcoreid_t nb_cfg_lcores; /**< Number of configured logical cores. */ 547af75078fSIntel extern lcoreid_t nb_fwd_lcores; /**< Number of forwarding logical cores. */ 548af75078fSIntel extern unsigned int fwd_lcores_cpuids[RTE_MAX_LCORE]; 549c9cafcc8SShahaf Shuler extern unsigned int num_sockets; 550c9cafcc8SShahaf Shuler extern unsigned int socket_ids[RTE_MAX_NUMA_NODES]; 551af75078fSIntel 552af75078fSIntel /* 553af75078fSIntel * Configuration of Ethernet ports: 554af75078fSIntel * nb_fwd_ports <= nb_cfg_ports <= nb_ports 555af75078fSIntel */ 556af75078fSIntel extern portid_t nb_ports; /**< Number of ethernet ports probed at init time. */ 557af75078fSIntel extern portid_t nb_cfg_ports; /**< Number of configured ports. */ 558af75078fSIntel extern portid_t nb_fwd_ports; /**< Number of forwarding ports. */ 559af75078fSIntel extern portid_t fwd_ports_ids[RTE_MAX_ETHPORTS]; 560af75078fSIntel extern struct rte_port *ports; 561af75078fSIntel 562af75078fSIntel extern struct rte_eth_rxmode rx_mode; 563fd8c20aaSShahaf Shuler extern struct rte_eth_txmode tx_mode; 564fd8c20aaSShahaf Shuler 5658a387fa8SHelin Zhang extern uint64_t rss_hf; 566af75078fSIntel 5671c69df45SOri Kam extern queueid_t nb_hairpinq; 568af75078fSIntel extern queueid_t nb_rxq; 569af75078fSIntel extern queueid_t nb_txq; 570af75078fSIntel 571af75078fSIntel extern uint16_t nb_rxd; 572af75078fSIntel extern uint16_t nb_txd; 573af75078fSIntel 574f2c5125aSPablo de Lara extern int16_t rx_free_thresh; 575f2c5125aSPablo de Lara extern int8_t rx_drop_en; 576f2c5125aSPablo de Lara extern int16_t tx_free_thresh; 577f2c5125aSPablo de Lara extern int16_t tx_rs_thresh; 578af75078fSIntel 5791d343c19SMike Pattrick extern enum noisy_fwd_mode noisy_fwd_mode; 5801d343c19SMike Pattrick extern const char * const noisy_fwd_mode_desc[]; 5813c156061SJens Freimann extern uint16_t noisy_tx_sw_bufsz; 5823c156061SJens Freimann extern uint16_t noisy_tx_sw_buf_flush_time; 5833c156061SJens Freimann extern uint64_t noisy_lkup_mem_sz; 5843c156061SJens Freimann extern uint64_t noisy_lkup_num_writes; 5853c156061SJens Freimann extern uint64_t noisy_lkup_num_reads; 5863c156061SJens Freimann extern uint64_t noisy_lkup_num_reads_writes; 5873c156061SJens Freimann 588900550deSIntel extern uint8_t dcb_config; 589900550deSIntel 59026cbb419SViacheslav Ovsiienko extern uint32_t mbuf_data_size_n; 59126cbb419SViacheslav Ovsiienko extern uint16_t mbuf_data_size[MAX_SEGS_BUFFER_SPLIT]; 59226cbb419SViacheslav Ovsiienko /**< Mbuf data space size. */ 593c8798818SIntel extern uint32_t param_total_num_mbufs; 594af75078fSIntel 595cfea1f30SPablo de Lara extern uint16_t stats_period; 59662d3216dSReshma Pattan 59763b72657SIvan Ilchenko extern struct rte_eth_xstat_name *xstats_display; 59863b72657SIvan Ilchenko extern unsigned int xstats_display_num; 59963b72657SIvan Ilchenko 60023095155SDariusz Sosnowski extern uint32_t hairpin_mode; 60101817b10SBing Zhao 602a8d0d473SBruce Richardson #ifdef RTE_LIB_LATENCYSTATS 60362d3216dSReshma Pattan extern uint8_t latencystats_enabled; 60462d3216dSReshma Pattan extern lcoreid_t latencystats_lcore_id; 60562d3216dSReshma Pattan #endif 60662d3216dSReshma Pattan 607a8d0d473SBruce Richardson #ifdef RTE_LIB_BITRATESTATS 608e25e6c70SRemy Horton extern lcoreid_t bitrate_lcore_id; 609e25e6c70SRemy Horton extern uint8_t bitrate_enabled; 610e25e6c70SRemy Horton #endif 611e25e6c70SRemy Horton 6121bb4a528SFerruh Yigit extern uint32_t max_rx_pkt_len; 6131bb4a528SFerruh Yigit 614af75078fSIntel /* 6150f2096d7SViacheslav Ovsiienko * Configuration of packet segments used to scatter received packets 6160f2096d7SViacheslav Ovsiienko * if some of split features is configured. 6170f2096d7SViacheslav Ovsiienko */ 61852e2e7edSYuan Wang extern uint32_t rx_pkt_hdr_protos[MAX_SEGS_BUFFER_SPLIT]; 6190f2096d7SViacheslav Ovsiienko extern uint16_t rx_pkt_seg_lengths[MAX_SEGS_BUFFER_SPLIT]; 6200f2096d7SViacheslav Ovsiienko extern uint8_t rx_pkt_nb_segs; /**< Number of segments to split */ 62191c78e09SViacheslav Ovsiienko extern uint16_t rx_pkt_seg_offsets[MAX_SEGS_BUFFER_SPLIT]; 62291c78e09SViacheslav Ovsiienko extern uint8_t rx_pkt_nb_offs; /**< Number of specified offsets */ 6230f2096d7SViacheslav Ovsiienko 624a4bf5421SHanumanth Pothula extern uint8_t multi_rx_mempool; /**< Enables multi-rx-mempool feature. */ 625a4bf5421SHanumanth Pothula 6260f2096d7SViacheslav Ovsiienko /* 627af75078fSIntel * Configuration of packet segments used by the "txonly" processing engine. 628af75078fSIntel */ 629af75078fSIntel #define TXONLY_DEF_PACKET_LEN 64 630af75078fSIntel extern uint16_t tx_pkt_length; /**< Length of TXONLY packet */ 631af75078fSIntel extern uint16_t tx_pkt_seg_lengths[RTE_MAX_SEGS_PER_PKT]; /**< Seg. lengths */ 632af75078fSIntel extern uint8_t tx_pkt_nb_segs; /**< Number of segments in TX packets */ 6334940344dSViacheslav Ovsiienko extern uint32_t tx_pkt_times_intra; 6344940344dSViacheslav Ovsiienko extern uint32_t tx_pkt_times_inter; 635af75078fSIntel 63679bec05bSKonstantin Ananyev enum tx_pkt_split { 63779bec05bSKonstantin Ananyev TX_PKT_SPLIT_OFF, 63879bec05bSKonstantin Ananyev TX_PKT_SPLIT_ON, 63979bec05bSKonstantin Ananyev TX_PKT_SPLIT_RND, 64079bec05bSKonstantin Ananyev }; 64179bec05bSKonstantin Ananyev 64279bec05bSKonstantin Ananyev extern enum tx_pkt_split tx_pkt_split; 64379bec05bSKonstantin Ananyev 64482010ef5SYongseok Koh extern uint8_t txonly_multi_flow; 64582010ef5SYongseok Koh 646f4d178c1SXueming Li extern uint32_t rxq_share; 647f4d178c1SXueming Li 648af75078fSIntel extern uint16_t nb_pkt_per_burst; 6496c02043eSIgor Russkikh extern uint16_t nb_pkt_flowgen_clones; 650861e7684SZhihong Wang extern int nb_flows_flowgen; 651af75078fSIntel extern uint16_t mb_mempool_cache; 652f2c5125aSPablo de Lara extern int8_t rx_pthresh; 653f2c5125aSPablo de Lara extern int8_t rx_hthresh; 654f2c5125aSPablo de Lara extern int8_t rx_wthresh; 655f2c5125aSPablo de Lara extern int8_t tx_pthresh; 656f2c5125aSPablo de Lara extern int8_t tx_hthresh; 657f2c5125aSPablo de Lara extern int8_t tx_wthresh; 658af75078fSIntel 659bf5b2126SStephen Hemminger extern uint16_t tx_udp_src_port; 660bf5b2126SStephen Hemminger extern uint16_t tx_udp_dst_port; 661bf5b2126SStephen Hemminger 662bf5b2126SStephen Hemminger extern uint32_t tx_ip_src_addr; 663bf5b2126SStephen Hemminger extern uint32_t tx_ip_dst_addr; 664bf5b2126SStephen Hemminger 665af75078fSIntel extern struct fwd_config cur_fwd_config; 666af75078fSIntel extern struct fwd_engine *cur_fwd_eng; 667bf56fce1SZhihong Wang extern uint32_t retry_enabled; 668af75078fSIntel extern struct fwd_lcore **fwd_lcores; 669af75078fSIntel extern struct fwd_stream **fwd_streams; 670af75078fSIntel 67139e5e20fSXueming Li extern uint16_t vxlan_gpe_udp_port; /**< UDP port of tunnel VXLAN-GPE. */ 672ea0e711bSOphir Munk extern uint16_t geneve_udp_port; /**< UDP port of tunnel GENEVE. */ 67339e5e20fSXueming Li 674af75078fSIntel extern portid_t nb_peer_eth_addrs; /**< Number of peer ethernet addresses. */ 6756d13ea8eSOlivier Matz extern struct rte_ether_addr peer_eth_addrs[RTE_MAX_ETHPORTS]; 676af75078fSIntel 67757e85242SBruce Richardson extern uint32_t burst_tx_delay_time; /**< Burst tx delay time(us) for mac-retry. */ 67857e85242SBruce Richardson extern uint32_t burst_tx_retry_num; /**< Burst tx retry number for mac-retry. */ 67957e85242SBruce Richardson 6806970401eSDavid Marchand #ifdef RTE_LIB_GRO 681b7091f1dSJiayu Hu #define GRO_DEFAULT_ITEM_NUM_PER_FLOW 32 682b7091f1dSJiayu Hu #define GRO_DEFAULT_FLOW_NUM (RTE_GRO_MAX_BURST_ITEM_NUM / \ 683b7091f1dSJiayu Hu GRO_DEFAULT_ITEM_NUM_PER_FLOW) 684b7091f1dSJiayu Hu 685b7091f1dSJiayu Hu #define GRO_DEFAULT_FLUSH_CYCLES 1 686b7091f1dSJiayu Hu #define GRO_MAX_FLUSH_CYCLES 4 687b7091f1dSJiayu Hu 688b40f8d78SJiayu Hu struct gro_status { 689b40f8d78SJiayu Hu struct rte_gro_param param; 690b40f8d78SJiayu Hu uint8_t enable; 691b40f8d78SJiayu Hu }; 692b40f8d78SJiayu Hu extern struct gro_status gro_ports[RTE_MAX_ETHPORTS]; 693b7091f1dSJiayu Hu extern uint8_t gro_flush_cycles; 6946970401eSDavid Marchand #endif /* RTE_LIB_GRO */ 695b40f8d78SJiayu Hu 6966970401eSDavid Marchand #ifdef RTE_LIB_GSO 69752f38a20SJiayu Hu #define GSO_MAX_PKT_BURST 2048 69852f38a20SJiayu Hu struct gso_status { 69952f38a20SJiayu Hu uint8_t enable; 70052f38a20SJiayu Hu }; 70152f38a20SJiayu Hu extern struct gso_status gso_ports[RTE_MAX_ETHPORTS]; 70252f38a20SJiayu Hu extern uint16_t gso_max_segment_size; 7036970401eSDavid Marchand #endif /* RTE_LIB_GSO */ 70452f38a20SJiayu Hu 7051960be7dSNelio Laranjeiro /* VXLAN encap/decap parameters. */ 7061960be7dSNelio Laranjeiro struct vxlan_encap_conf { 7071960be7dSNelio Laranjeiro uint32_t select_ipv4:1; 7081960be7dSNelio Laranjeiro uint32_t select_vlan:1; 70962e8a5a8SViacheslav Ovsiienko uint32_t select_tos_ttl:1; 7101960be7dSNelio Laranjeiro uint8_t vni[3]; 7111960be7dSNelio Laranjeiro rte_be16_t udp_src; 7121960be7dSNelio Laranjeiro rte_be16_t udp_dst; 7131960be7dSNelio Laranjeiro rte_be32_t ipv4_src; 7141960be7dSNelio Laranjeiro rte_be32_t ipv4_dst; 7151960be7dSNelio Laranjeiro uint8_t ipv6_src[16]; 7161960be7dSNelio Laranjeiro uint8_t ipv6_dst[16]; 7171960be7dSNelio Laranjeiro rte_be16_t vlan_tci; 71862e8a5a8SViacheslav Ovsiienko uint8_t ip_tos; 71962e8a5a8SViacheslav Ovsiienko uint8_t ip_ttl; 72035b2d13fSOlivier Matz uint8_t eth_src[RTE_ETHER_ADDR_LEN]; 72135b2d13fSOlivier Matz uint8_t eth_dst[RTE_ETHER_ADDR_LEN]; 7221960be7dSNelio Laranjeiro }; 723f6e63e59SFerruh Yigit 724f6e63e59SFerruh Yigit extern struct vxlan_encap_conf vxlan_encap_conf; 7251960be7dSNelio Laranjeiro 726dcd962fcSNelio Laranjeiro /* NVGRE encap/decap parameters. */ 727dcd962fcSNelio Laranjeiro struct nvgre_encap_conf { 728dcd962fcSNelio Laranjeiro uint32_t select_ipv4:1; 729dcd962fcSNelio Laranjeiro uint32_t select_vlan:1; 730dcd962fcSNelio Laranjeiro uint8_t tni[3]; 731dcd962fcSNelio Laranjeiro rte_be32_t ipv4_src; 732dcd962fcSNelio Laranjeiro rte_be32_t ipv4_dst; 733dcd962fcSNelio Laranjeiro uint8_t ipv6_src[16]; 734dcd962fcSNelio Laranjeiro uint8_t ipv6_dst[16]; 735dcd962fcSNelio Laranjeiro rte_be16_t vlan_tci; 73635b2d13fSOlivier Matz uint8_t eth_src[RTE_ETHER_ADDR_LEN]; 73735b2d13fSOlivier Matz uint8_t eth_dst[RTE_ETHER_ADDR_LEN]; 738dcd962fcSNelio Laranjeiro }; 739f6e63e59SFerruh Yigit 740f6e63e59SFerruh Yigit extern struct nvgre_encap_conf nvgre_encap_conf; 741dcd962fcSNelio Laranjeiro 742a1191d39SOri Kam /* L2 encap parameters. */ 743a1191d39SOri Kam struct l2_encap_conf { 744a1191d39SOri Kam uint32_t select_ipv4:1; 745a1191d39SOri Kam uint32_t select_vlan:1; 746a1191d39SOri Kam rte_be16_t vlan_tci; 74735b2d13fSOlivier Matz uint8_t eth_src[RTE_ETHER_ADDR_LEN]; 74835b2d13fSOlivier Matz uint8_t eth_dst[RTE_ETHER_ADDR_LEN]; 749a1191d39SOri Kam }; 750f6e63e59SFerruh Yigit extern struct l2_encap_conf l2_encap_conf; 751a1191d39SOri Kam 752a1191d39SOri Kam /* L2 decap parameters. */ 753a1191d39SOri Kam struct l2_decap_conf { 754a1191d39SOri Kam uint32_t select_vlan:1; 755a1191d39SOri Kam }; 756f6e63e59SFerruh Yigit extern struct l2_decap_conf l2_decap_conf; 757a1191d39SOri Kam 7583e77031bSOri Kam /* MPLSoGRE encap parameters. */ 7593e77031bSOri Kam struct mplsogre_encap_conf { 7603e77031bSOri Kam uint32_t select_ipv4:1; 7613e77031bSOri Kam uint32_t select_vlan:1; 7623e77031bSOri Kam uint8_t label[3]; 7633e77031bSOri Kam rte_be32_t ipv4_src; 7643e77031bSOri Kam rte_be32_t ipv4_dst; 7653e77031bSOri Kam uint8_t ipv6_src[16]; 7663e77031bSOri Kam uint8_t ipv6_dst[16]; 7673e77031bSOri Kam rte_be16_t vlan_tci; 76835b2d13fSOlivier Matz uint8_t eth_src[RTE_ETHER_ADDR_LEN]; 76935b2d13fSOlivier Matz uint8_t eth_dst[RTE_ETHER_ADDR_LEN]; 7703e77031bSOri Kam }; 771f6e63e59SFerruh Yigit extern struct mplsogre_encap_conf mplsogre_encap_conf; 7723e77031bSOri Kam 7733e77031bSOri Kam /* MPLSoGRE decap parameters. */ 7743e77031bSOri Kam struct mplsogre_decap_conf { 7753e77031bSOri Kam uint32_t select_ipv4:1; 7763e77031bSOri Kam uint32_t select_vlan:1; 7773e77031bSOri Kam }; 778f6e63e59SFerruh Yigit extern struct mplsogre_decap_conf mplsogre_decap_conf; 7793e77031bSOri Kam 780a1191d39SOri Kam /* MPLSoUDP encap parameters. */ 781a1191d39SOri Kam struct mplsoudp_encap_conf { 782a1191d39SOri Kam uint32_t select_ipv4:1; 783a1191d39SOri Kam uint32_t select_vlan:1; 784a1191d39SOri Kam uint8_t label[3]; 785a1191d39SOri Kam rte_be16_t udp_src; 786a1191d39SOri Kam rte_be16_t udp_dst; 787a1191d39SOri Kam rte_be32_t ipv4_src; 788a1191d39SOri Kam rte_be32_t ipv4_dst; 789a1191d39SOri Kam uint8_t ipv6_src[16]; 790a1191d39SOri Kam uint8_t ipv6_dst[16]; 791a1191d39SOri Kam rte_be16_t vlan_tci; 79235b2d13fSOlivier Matz uint8_t eth_src[RTE_ETHER_ADDR_LEN]; 79335b2d13fSOlivier Matz uint8_t eth_dst[RTE_ETHER_ADDR_LEN]; 794a1191d39SOri Kam }; 795f6e63e59SFerruh Yigit extern struct mplsoudp_encap_conf mplsoudp_encap_conf; 796a1191d39SOri Kam 797a1191d39SOri Kam /* MPLSoUDP decap parameters. */ 798a1191d39SOri Kam struct mplsoudp_decap_conf { 799a1191d39SOri Kam uint32_t select_ipv4:1; 800a1191d39SOri Kam uint32_t select_vlan:1; 801a1191d39SOri Kam }; 802f6e63e59SFerruh Yigit extern struct mplsoudp_decap_conf mplsoudp_decap_conf; 803a1191d39SOri Kam 804f9295aa2SXiaoyu Min extern enum rte_eth_rx_mq_mode rx_mq_mode; 805f9295aa2SXiaoyu Min 8064d07cbefSBing Zhao extern struct rte_flow_action_conntrack conntrack_context; 8074d07cbefSBing Zhao 808a550baf2SMin Hu (Connor) extern int proc_id; 809a550baf2SMin Hu (Connor) extern unsigned int num_procs; 810a550baf2SMin Hu (Connor) 811a550baf2SMin Hu (Connor) static inline bool 812a550baf2SMin Hu (Connor) is_proc_primary(void) 813a550baf2SMin Hu (Connor) { 814a550baf2SMin Hu (Connor) return rte_eal_process_type() == RTE_PROC_PRIMARY; 815a550baf2SMin Hu (Connor) } 816a550baf2SMin Hu (Connor) 81799a4974aSRobin Jarry static inline struct fwd_lcore * 81899a4974aSRobin Jarry lcore_to_fwd_lcore(uint16_t lcore_id) 819af75078fSIntel { 820af75078fSIntel unsigned int i; 821af75078fSIntel 82299a4974aSRobin Jarry for (i = 0; i < cur_fwd_config.nb_fwd_lcores; ++i) { 82399a4974aSRobin Jarry if (fwd_lcores_cpuids[i] == lcore_id) 82499a4974aSRobin Jarry return fwd_lcores[i]; 825af75078fSIntel } 826af75078fSIntel 82799a4974aSRobin Jarry return NULL; 82899a4974aSRobin Jarry } 8292df00d56SHariprasad Govindharajan 830af75078fSIntel static inline struct fwd_lcore * 831af75078fSIntel current_fwd_lcore(void) 832af75078fSIntel { 83399a4974aSRobin Jarry struct fwd_lcore *fc = lcore_to_fwd_lcore(rte_lcore_id()); 83499a4974aSRobin Jarry 83599a4974aSRobin Jarry if (fc == NULL) 83699a4974aSRobin Jarry rte_panic("lcore_id of current thread not found in fwd_lcores_cpuids\n"); 83799a4974aSRobin Jarry 83899a4974aSRobin Jarry return fc; 839af75078fSIntel } 840af75078fSIntel 84199a4974aSRobin Jarry void 84299a4974aSRobin Jarry parse_fwd_portlist(const char *port); 84399a4974aSRobin Jarry 844af75078fSIntel /* Mbuf Pools */ 845af75078fSIntel static inline void 84626cbb419SViacheslav Ovsiienko mbuf_poolname_build(unsigned int sock_id, char *mp_name, 84726cbb419SViacheslav Ovsiienko int name_size, uint16_t idx) 848af75078fSIntel { 84926cbb419SViacheslav Ovsiienko if (!idx) 85026cbb419SViacheslav Ovsiienko snprintf(mp_name, name_size, 85126cbb419SViacheslav Ovsiienko MBUF_POOL_NAME_PFX "_%u", sock_id); 85226cbb419SViacheslav Ovsiienko else 85326cbb419SViacheslav Ovsiienko snprintf(mp_name, name_size, 85426cbb419SViacheslav Ovsiienko MBUF_POOL_NAME_PFX "_%hu_%hu", (uint16_t)sock_id, idx); 855af75078fSIntel } 856af75078fSIntel 857af75078fSIntel static inline struct rte_mempool * 85826cbb419SViacheslav Ovsiienko mbuf_pool_find(unsigned int sock_id, uint16_t idx) 859af75078fSIntel { 860af75078fSIntel char pool_name[RTE_MEMPOOL_NAMESIZE]; 861af75078fSIntel 86226cbb419SViacheslav Ovsiienko mbuf_poolname_build(sock_id, pool_name, sizeof(pool_name), idx); 863693f715dSHuawei Xie return rte_mempool_lookup((const char *)pool_name); 864af75078fSIntel } 865af75078fSIntel 866d3dae396SDavid Marchand static inline uint16_t 867d3dae396SDavid Marchand common_fwd_stream_receive(struct fwd_stream *fs, struct rte_mbuf **burst, 868d3dae396SDavid Marchand unsigned int nb_pkts) 8690e4b1963SDharmik Thakkar { 870d3dae396SDavid Marchand uint16_t nb_rx; 871d3dae396SDavid Marchand 872d3dae396SDavid Marchand nb_rx = rte_eth_rx_burst(fs->rx_port, fs->rx_queue, burst, nb_pkts); 8730e4b1963SDharmik Thakkar if (record_burst_stats) 8740e4b1963SDharmik Thakkar fs->rx_burst_stats.pkt_burst_spread[nb_rx]++; 875d3dae396SDavid Marchand fs->rx_packets += nb_rx; 876d3dae396SDavid Marchand return nb_rx; 8770e4b1963SDharmik Thakkar } 8780e4b1963SDharmik Thakkar 879655131ccSDavid Marchand static inline uint16_t 880655131ccSDavid Marchand common_fwd_stream_transmit(struct fwd_stream *fs, struct rte_mbuf **burst, 881655131ccSDavid Marchand unsigned int nb_pkts) 8820e4b1963SDharmik Thakkar { 883655131ccSDavid Marchand uint16_t nb_tx; 884655131ccSDavid Marchand uint32_t retry; 885655131ccSDavid Marchand 886655131ccSDavid Marchand nb_tx = rte_eth_tx_burst(fs->tx_port, fs->tx_queue, burst, nb_pkts); 887655131ccSDavid Marchand /* 888655131ccSDavid Marchand * Retry if necessary 889655131ccSDavid Marchand */ 890655131ccSDavid Marchand if (unlikely(nb_tx < nb_pkts) && fs->retry_enabled) { 891655131ccSDavid Marchand retry = 0; 892655131ccSDavid Marchand while (nb_tx < nb_pkts && retry++ < burst_tx_retry_num) { 893655131ccSDavid Marchand rte_delay_us(burst_tx_delay_time); 894655131ccSDavid Marchand nb_tx += rte_eth_tx_burst(fs->tx_port, fs->tx_queue, 895655131ccSDavid Marchand &burst[nb_tx], nb_pkts - nb_tx); 896655131ccSDavid Marchand } 897655131ccSDavid Marchand } 898655131ccSDavid Marchand fs->tx_packets += nb_tx; 8990e4b1963SDharmik Thakkar if (record_burst_stats) 9000e4b1963SDharmik Thakkar fs->tx_burst_stats.pkt_burst_spread[nb_tx]++; 901655131ccSDavid Marchand if (unlikely(nb_tx < nb_pkts)) { 902655131ccSDavid Marchand fs->fwd_dropped += (nb_pkts - nb_tx); 903655131ccSDavid Marchand rte_pktmbuf_free_bulk(&burst[nb_tx], nb_pkts - nb_tx); 904655131ccSDavid Marchand } 905655131ccSDavid Marchand 906655131ccSDavid Marchand return nb_tx; 9070e4b1963SDharmik Thakkar } 9080e4b1963SDharmik Thakkar 909af75078fSIntel /* Prototypes */ 910761f7ae1SJie Zhou unsigned int parse_item_list(const char *str, const char *item_name, 911950d1516SBruce Richardson unsigned int max_items, 912950d1516SBruce Richardson unsigned int *parsed_items, int check_unique_values); 91352e2e7edSYuan Wang unsigned int parse_hdrs_list(const char *str, const char *item_name, 91452e2e7edSYuan Wang unsigned int max_item, 91523f2dfd3SYuan Wang unsigned int *parsed_items); 916af75078fSIntel void launch_args_parse(int argc, char** argv); 9170100a038SDavid Marchand void cmd_reconfig_device_queue(portid_t id, uint8_t dev, uint8_t queue); 91881ef862bSAllain Legacy void cmdline_read_from_file(const char *filename); 919592ab76fSDavid Marchand int init_cmdline(void); 920af75078fSIntel void prompt(void); 921d3a274ceSZhihong Wang void prompt_exit(void); 922af75078fSIntel void nic_stats_display(portid_t port_id); 923af75078fSIntel void nic_stats_clear(portid_t port_id); 924bfd5051bSOlivier Matz void nic_xstats_display(portid_t port_id); 925bfd5051bSOlivier Matz void nic_xstats_clear(portid_t port_id); 92655e51c96SNithin Dabilpuram void device_infos_display(const char *identifier); 927af75078fSIntel void port_infos_display(portid_t port_id); 9284bfcbcf5SEmma Finn void port_summary_display(portid_t port_id); 9296b67721dSDavid Liu void port_eeprom_display(portid_t port_id); 9306b67721dSDavid Liu void port_module_eeprom_display(portid_t port_id); 9314bfcbcf5SEmma Finn void port_summary_header_display(void); 932ab3257e1SKonstantin Ananyev void rx_queue_infos_display(portid_t port_idi, uint16_t queue_id); 933ab3257e1SKonstantin Ananyev void tx_queue_infos_display(portid_t port_idi, uint16_t queue_id); 934af75078fSIntel void fwd_lcores_config_display(void); 93565744833SXueming Li bool pkt_fwd_shared_rxq_check(void); 9360c0db76fSBernard Iremonger void pkt_fwd_config_display(struct fwd_config *cfg); 937af75078fSIntel void rxtx_config_display(void); 938af75078fSIntel void fwd_config_setup(void); 939af75078fSIntel void set_def_fwd_config(void); 940a21d5a4bSDeclan Doherty void reconfig(portid_t new_port_id, unsigned socket_id); 941013af9b6SIntel int init_fwd_streams(void); 94203ce2c53SMatan Azrad void update_fwd_ports(portid_t new_pid); 943013af9b6SIntel 944aac6f11fSWisam Jaddo void set_fwd_eth_peer(portid_t port_id, char *peer_addr); 945aac6f11fSWisam Jaddo 946ae03d0d1SIvan Boule void port_mtu_set(portid_t port_id, uint16_t mtu); 94772a3dec7SGregory Etelson int port_action_handle_create(portid_t port_id, uint32_t id, bool indirect_list, 9484b61b877SBing Zhao const struct rte_flow_indir_action_conf *conf, 94955509e3aSAndrey Vesnovaty const struct rte_flow_action *action); 9504b61b877SBing Zhao int port_action_handle_destroy(portid_t port_id, 95155509e3aSAndrey Vesnovaty uint32_t n, const uint32_t *action); 952f7352c17SDmitry Kozlyuk int port_action_handle_flush(portid_t port_id); 9534b61b877SBing Zhao struct rte_flow_action_handle *port_action_handle_get_by_id(portid_t port_id, 95455509e3aSAndrey Vesnovaty uint32_t id); 9554b61b877SBing Zhao int port_action_handle_update(portid_t port_id, uint32_t id, 95655509e3aSAndrey Vesnovaty const struct rte_flow_action *action); 9573e3edab5SGregory Etelson void 9583e3edab5SGregory Etelson port_action_handle_query_update(portid_t port_id, uint32_t id, 9593e3edab5SGregory Etelson enum rte_flow_query_update_mode qu_mode, 9603e3edab5SGregory Etelson const struct rte_flow_action *action); 9619ad3a41aSAlexander Kozyrev int port_flow_get_info(portid_t port_id); 9629ad3a41aSAlexander Kozyrev int port_flow_configure(portid_t port_id, 9639ad3a41aSAlexander Kozyrev const struct rte_flow_port_attr *port_attr, 9649ad3a41aSAlexander Kozyrev uint16_t nb_queue, 9659ad3a41aSAlexander Kozyrev const struct rte_flow_queue_attr *queue_attr); 96604cc665fSAlexander Kozyrev int port_flow_pattern_template_create(portid_t port_id, uint32_t id, 96704cc665fSAlexander Kozyrev const struct rte_flow_pattern_template_attr *attr, 96804cc665fSAlexander Kozyrev const struct rte_flow_item *pattern); 96904cc665fSAlexander Kozyrev int port_flow_pattern_template_destroy(portid_t port_id, uint32_t n, 97004cc665fSAlexander Kozyrev const uint32_t *template); 9716d736e05SSuanming Mou int port_flow_pattern_template_flush(portid_t port_id); 97204cc665fSAlexander Kozyrev int port_flow_actions_template_create(portid_t port_id, uint32_t id, 97304cc665fSAlexander Kozyrev const struct rte_flow_actions_template_attr *attr, 97404cc665fSAlexander Kozyrev const struct rte_flow_action *actions, 97504cc665fSAlexander Kozyrev const struct rte_flow_action *masks); 97604cc665fSAlexander Kozyrev int port_flow_actions_template_destroy(portid_t port_id, uint32_t n, 97704cc665fSAlexander Kozyrev const uint32_t *template); 9786d736e05SSuanming Mou int port_flow_actions_template_flush(portid_t port_id); 979c4b38873SAlexander Kozyrev int port_flow_template_table_create(portid_t port_id, uint32_t id, 980c4b38873SAlexander Kozyrev const struct rte_flow_template_table_attr *table_attr, 981c4b38873SAlexander Kozyrev uint32_t nb_pattern_templates, uint32_t *pattern_templates, 982c4b38873SAlexander Kozyrev uint32_t nb_actions_templates, uint32_t *actions_templates); 983c4b38873SAlexander Kozyrev int port_flow_template_table_destroy(portid_t port_id, 984c4b38873SAlexander Kozyrev uint32_t n, const uint32_t *table); 98599231e48SGregory Etelson int port_queue_flow_update_resized(portid_t port_id, queueid_t queue_id, 98699231e48SGregory Etelson bool postpone, uint32_t flow_id); 9876d736e05SSuanming Mou int port_flow_template_table_flush(portid_t port_id); 98899231e48SGregory Etelson int port_flow_template_table_resize_complete(portid_t port_id, uint32_t table_id); 98999231e48SGregory Etelson int port_flow_template_table_resize(portid_t port_id, 99099231e48SGregory Etelson uint32_t table_id, uint32_t flows_num); 9918a26a658STomer Shmilovich int port_queue_group_set_miss_actions(portid_t port_id, const struct rte_flow_attr *attr, 9928a26a658STomer Shmilovich const struct rte_flow_action *actions); 993ecdc927bSAlexander Kozyrev int port_queue_flow_create(portid_t port_id, queueid_t queue_id, 99460261a00SAlexander Kozyrev bool postpone, uint32_t table_id, uint32_t rule_idx, 995ecdc927bSAlexander Kozyrev uint32_t pattern_idx, uint32_t actions_idx, 996ecdc927bSAlexander Kozyrev const struct rte_flow_item *pattern, 997ecdc927bSAlexander Kozyrev const struct rte_flow_action *actions); 998ecdc927bSAlexander Kozyrev int port_queue_flow_destroy(portid_t port_id, queueid_t queue_id, 999fd5392d8SEli Britstein bool postpone, uint32_t n, const uint64_t *rule); 100077e7939aSAlexander Kozyrev int port_queue_flow_update(portid_t port_id, queueid_t queue_id, 100177e7939aSAlexander Kozyrev bool postpone, uint32_t rule_idx, uint32_t actions_idx, 100277e7939aSAlexander Kozyrev const struct rte_flow_action *actions); 1003d906fff5SAlexander Kozyrev int port_queue_action_handle_create(portid_t port_id, uint32_t queue_id, 1004d906fff5SAlexander Kozyrev bool postpone, uint32_t id, 1005c1496cb6SGregory Etelson bool indirect_list, 1006d906fff5SAlexander Kozyrev const struct rte_flow_indir_action_conf *conf, 1007d906fff5SAlexander Kozyrev const struct rte_flow_action *action); 1008d906fff5SAlexander Kozyrev int port_queue_action_handle_destroy(portid_t port_id, 1009d906fff5SAlexander Kozyrev uint32_t queue_id, bool postpone, 1010d906fff5SAlexander Kozyrev uint32_t n, const uint32_t *action); 1011d906fff5SAlexander Kozyrev int port_queue_action_handle_update(portid_t port_id, uint32_t queue_id, 1012d906fff5SAlexander Kozyrev bool postpone, uint32_t id, 1013d906fff5SAlexander Kozyrev const struct rte_flow_action *action); 1014c9dc0384SSuanming Mou int port_queue_action_handle_query(portid_t port_id, uint32_t queue_id, 1015c9dc0384SSuanming Mou bool postpone, uint32_t id); 10163e3edab5SGregory Etelson void 10173e3edab5SGregory Etelson port_queue_action_handle_query_update(portid_t port_id, 10183e3edab5SGregory Etelson uint32_t queue_id, bool postpone, 10193e3edab5SGregory Etelson uint32_t id, 10203e3edab5SGregory Etelson enum rte_flow_query_update_mode qu_mode, 10213e3edab5SGregory Etelson const struct rte_flow_action *action); 10229cbbee14SAlexander Kozyrev int port_queue_flow_push(portid_t port_id, queueid_t queue_id); 1023f9bf7dffSAlexander Kozyrev int port_queue_flow_pull(portid_t port_id, queueid_t queue_id); 1024ffe18b05SOri Kam int port_flow_hash_calc(portid_t port_id, uint32_t table_id, 1025ffe18b05SOri Kam uint8_t pattern_template_index, const struct rte_flow_item pattern[]); 10269733f099SOri Kam int port_flow_hash_calc_encap(portid_t port_id, 10279733f099SOri Kam enum rte_flow_encap_hash_field encap_hash_field, 10289733f099SOri Kam const struct rte_flow_item pattern[]); 1029966eb55eSMichael Baum void port_queue_flow_aged(portid_t port_id, uint32_t queue_id, uint8_t destroy); 1030938a184aSAdrien Mazarguil int port_flow_validate(portid_t port_id, 1031938a184aSAdrien Mazarguil const struct rte_flow_attr *attr, 1032938a184aSAdrien Mazarguil const struct rte_flow_item *pattern, 10331b9f2746SGregory Etelson const struct rte_flow_action *actions, 10341b9f2746SGregory Etelson const struct tunnel_ops *tunnel_ops); 1035938a184aSAdrien Mazarguil int port_flow_create(portid_t port_id, 1036938a184aSAdrien Mazarguil const struct rte_flow_attr *attr, 1037938a184aSAdrien Mazarguil const struct rte_flow_item *pattern, 10381b9f2746SGregory Etelson const struct rte_flow_action *actions, 10398ac3a1cdSEli Britstein const struct tunnel_ops *tunnel_ops, 10408ac3a1cdSEli Britstein uintptr_t user_id); 10414b61b877SBing Zhao int port_action_handle_query(portid_t port_id, uint32_t id); 10420e459ffaSDong Zhou void update_age_action_context(const struct rte_flow_action *actions, 10430e459ffaSDong Zhou struct port_flow *pf); 104468629be3SKe Zhang int mcast_addr_pool_destroy(portid_t port_id); 10458ac3a1cdSEli Britstein int port_flow_destroy(portid_t port_id, uint32_t n, const uint64_t *rule, 10468ac3a1cdSEli Britstein bool is_user_id); 10472d9c7e56SOleksandr Kolomeiets int port_flow_update(portid_t port_id, uint32_t rule, 10482d9c7e56SOleksandr Kolomeiets const struct rte_flow_action *actions, bool is_user_id); 1049938a184aSAdrien Mazarguil int port_flow_flush(portid_t port_id); 1050bf085dcbSHaifei Luo int port_flow_dump(portid_t port_id, bool dump_all, 10518ac3a1cdSEli Britstein uint64_t rule, const char *file_name, 10528ac3a1cdSEli Britstein bool is_user_id); 1053fd5392d8SEli Britstein int port_flow_query(portid_t port_id, uint64_t rule, 10548ac3a1cdSEli Britstein const struct rte_flow_action *action, bool is_user_id); 1055938a184aSAdrien Mazarguil void port_flow_list(portid_t port_id, uint32_t n, const uint32_t *group); 10560e459ffaSDong Zhou void port_flow_aged(portid_t port_id, uint8_t destroy); 10571b9f2746SGregory Etelson const char *port_flow_tunnel_type(struct rte_flow_tunnel *tunnel); 10581b9f2746SGregory Etelson struct port_flow_tunnel * 10591b9f2746SGregory Etelson port_flow_locate_tunnel(uint16_t port_id, struct rte_flow_tunnel *tun); 10601b9f2746SGregory Etelson void port_flow_tunnel_list(portid_t port_id); 10611b9f2746SGregory Etelson void port_flow_tunnel_destroy(portid_t port_id, uint32_t tunnel_id); 10621b9f2746SGregory Etelson void port_flow_tunnel_create(portid_t port_id, const struct tunnel_ops *ops); 1063323f811aSAdrien Mazarguil int port_flow_isolate(portid_t port_id, int set); 1064f29fa2c5SHaifei Luo int port_meter_policy_add(portid_t port_id, uint32_t policy_id, 1065f29fa2c5SHaifei Luo const struct rte_flow_action *actions); 10669c4a0c18SAlexander Kozyrev struct rte_flow_meter_profile *port_meter_profile_get_by_id(portid_t port_id, 10679c4a0c18SAlexander Kozyrev uint32_t id); 10689c4a0c18SAlexander Kozyrev struct rte_flow_meter_policy *port_meter_policy_get_by_id(portid_t port_id, 10699c4a0c18SAlexander Kozyrev uint32_t id); 1070af75078fSIntel 1071af75078fSIntel void rx_ring_desc_display(portid_t port_id, queueid_t rxq_id, uint16_t rxd_id); 1072af75078fSIntel void tx_ring_desc_display(portid_t port_id, queueid_t txq_id, uint16_t txd_id); 1073af75078fSIntel 1074013af9b6SIntel int set_fwd_lcores_list(unsigned int *lcorelist, unsigned int nb_lc); 1075013af9b6SIntel int set_fwd_lcores_mask(uint64_t lcoremask); 1076af75078fSIntel void set_fwd_lcores_number(uint16_t nb_lc); 1077af75078fSIntel 1078af75078fSIntel void set_fwd_ports_list(unsigned int *portlist, unsigned int nb_pt); 1079af75078fSIntel void set_fwd_ports_mask(uint64_t portmask); 1080af75078fSIntel void set_fwd_ports_number(uint16_t nb_pt); 1081a8ef3e3aSBernard Iremonger int port_is_forwarding(portid_t port_id); 1082af75078fSIntel 1083a47aa8b9SIntel void rx_vlan_strip_set(portid_t port_id, int on); 1084a47aa8b9SIntel void rx_vlan_strip_set_on_queue(portid_t port_id, uint16_t queue_id, int on); 1085a47aa8b9SIntel 1086a47aa8b9SIntel void rx_vlan_filter_set(portid_t port_id, int on); 1087af75078fSIntel void rx_vlan_all_filter_set(portid_t port_id, int on); 10882a0b4198SVivek Sharma void rx_vlan_qinq_strip_set(portid_t port_id, int on); 108964b01ee0SMichal Jastrzebski int rx_vft_set(portid_t port_id, uint16_t vlan_id, int on); 1090a47aa8b9SIntel void vlan_extend_set(portid_t port_id, int on); 109119b16e2fSHelin Zhang void vlan_tpid_set(portid_t port_id, enum rte_vlan_type vlan_type, 109219b16e2fSHelin Zhang uint16_t tp_id); 1093af75078fSIntel void tx_vlan_set(portid_t port_id, uint16_t vlan_id); 109492ebda07SHelin Zhang void tx_qinq_set(portid_t port_id, uint16_t vlan_id, uint16_t vlan_id_outer); 1095af75078fSIntel void tx_vlan_reset(portid_t port_id); 1096529ba951SHelin Zhang void tx_vlan_pvid_set(portid_t port_id, uint16_t vlan_id, int on); 1097ed30d9b6SIntel 1098ed30d9b6SIntel void set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint8_t map_value); 1099ed30d9b6SIntel 1100a4fd5eeeSElza Mathew void set_xstats_hide_zero(uint8_t on_off); 1101a4fd5eeeSElza Mathew 1102bc700b67SDharmik Thakkar void set_record_core_cycles(uint8_t on_off); 11030e4b1963SDharmik Thakkar void set_record_burst_stats(uint8_t on_off); 1104af75078fSIntel void set_verbose_level(uint16_t vb_level); 11050f2096d7SViacheslav Ovsiienko void set_rx_pkt_segments(unsigned int *seg_lengths, unsigned int nb_segs); 110652e2e7edSYuan Wang void set_rx_pkt_hdrs(unsigned int *seg_protos, unsigned int nb_segs); 110752e2e7edSYuan Wang void show_rx_pkt_hdrs(void); 11080f2096d7SViacheslav Ovsiienko void show_rx_pkt_segments(void); 110991c78e09SViacheslav Ovsiienko void set_rx_pkt_offsets(unsigned int *seg_offsets, unsigned int nb_offs); 111091c78e09SViacheslav Ovsiienko void show_rx_pkt_offsets(void); 11110f2096d7SViacheslav Ovsiienko void set_tx_pkt_segments(unsigned int *seg_lengths, unsigned int nb_segs); 111279bec05bSKonstantin Ananyev void show_tx_pkt_segments(void); 11134940344dSViacheslav Ovsiienko void set_tx_pkt_times(unsigned int *tx_times); 11144940344dSViacheslav Ovsiienko void show_tx_pkt_times(void); 111579bec05bSKonstantin Ananyev void set_tx_pkt_split(const char *name); 1116ce0a4a1dSJie Zhou int parse_fec_mode(const char *name, uint32_t *fec_capa); 1117b19da32eSMin Hu (Connor) void show_fec_capability(uint32_t num, struct rte_eth_fec_capa *speed_fec_capa); 1118af75078fSIntel void set_nb_pkt_per_burst(uint16_t pkt_burst); 1119769ce6b1SThomas Monjalon char *list_pkt_forwarding_modes(void); 1120bf56fce1SZhihong Wang char *list_pkt_forwarding_retry_modes(void); 1121af75078fSIntel void set_pkt_forwarding_mode(const char *fwd_mode); 1122af75078fSIntel void start_packet_forwarding(int with_tx_first); 112353324971SDavid Marchand void fwd_stats_display(void); 112453324971SDavid Marchand void fwd_stats_reset(void); 1125af75078fSIntel void stop_packet_forwarding(void); 1126cfae07fdSOuyang Changchun void dev_set_link_up(portid_t pid); 1127cfae07fdSOuyang Changchun void dev_set_link_down(portid_t pid); 1128ce8d5614SIntel void init_port_config(void); 112915e34522SLong Wu void set_port_member_flag(portid_t member_pid); 113015e34522SLong Wu void clear_port_member_flag(portid_t member_pid); 113115e34522SLong Wu uint8_t port_is_bonding_member(portid_t member_pid); 11320e545d30SBernard Iremonger 11331a572499SJingjing Wu int init_port_dcb_config(portid_t pid, enum dcb_mode_enable dcb_mode, 11341a572499SJingjing Wu enum rte_eth_nb_tcs num_tcs, 11351a572499SJingjing Wu uint8_t pfc_en); 1136148f963fSBruce Richardson int start_port(portid_t pid); 1137ce8d5614SIntel void stop_port(portid_t pid); 1138ce8d5614SIntel void close_port(portid_t pid); 113997f1e196SWei Dai void reset_port(portid_t pid); 1140edab33b1STetsuya Mukawa void attach_port(char *identifier); 11415edee5f6SThomas Monjalon void detach_devargs(char *identifier); 1142f8e5baa2SThomas Monjalon void detach_port_device(portid_t port_id); 1143ce8d5614SIntel int all_ports_stopped(void); 11446018eb8cSShahaf Shuler int port_is_stopped(portid_t port_id); 11455f4ec54fSChen Jing D(Mark) int port_is_started(portid_t port_id); 1146af75078fSIntel void pmd_test_exit(void); 11471be514fbSAndrew Rybchenko #if defined(RTE_NET_I40E) || defined(RTE_NET_IXGBE) 1148af75078fSIntel void fdir_get_infos(portid_t port_id); 11491be514fbSAndrew Rybchenko #endif 115066c59490SHelin Zhang void port_rss_reta_info(portid_t port_id, 115166c59490SHelin Zhang struct rte_eth_rss_reta_entry64 *reta_conf, 115266c59490SHelin Zhang uint16_t nb_entries); 11536a18e1afSOuyang Changchun 11547741e4cfSIntel void set_vf_traffic(portid_t port_id, uint8_t is_rx, uint16_t vf, uint8_t on); 1155af75078fSIntel 11562befc67fSViacheslav Ovsiienko int 11572befc67fSViacheslav Ovsiienko rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, 11582befc67fSViacheslav Ovsiienko uint16_t nb_rx_desc, unsigned int socket_id, 11592befc67fSViacheslav Ovsiienko struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp); 11602befc67fSViacheslav Ovsiienko 11613a26e41eSSatha Rao int set_queue_rate_limit(portid_t port_id, uint16_t queue_idx, uint32_t rate); 11623a26e41eSSatha Rao int set_vf_rate_limit(portid_t port_id, uint16_t vf, uint32_t rate, 11636a18e1afSOuyang Changchun uint64_t q_msk); 11646a18e1afSOuyang Changchun 1165bc70e559SSpike Du int set_rxq_avail_thresh(portid_t port_id, uint16_t queue_id, 1166bc70e559SSpike Du uint8_t avail_thresh); 1167bc70e559SSpike Du 116892628e2bSJie Hai void port_rss_hash_conf_show(portid_t port_id, int show_rss_key, int show_rss_algo); 11698205e241SNelio Laranjeiro void port_rss_hash_key_update(portid_t port_id, char rss_type[], 11703529e8f3SNatanael Copa uint8_t *hash_key, uint8_t hash_key_len); 11715f4ec54fSChen Jing D(Mark) int rx_queue_id_is_invalid(queueid_t rxq_id); 11725f4ec54fSChen Jing D(Mark) int tx_queue_id_is_invalid(queueid_t txq_id); 11736970401eSDavid Marchand #ifdef RTE_LIB_GRO 1174b7091f1dSJiayu Hu void setup_gro(const char *onoff, portid_t port_id); 1175b7091f1dSJiayu Hu void setup_gro_flush_cycles(uint8_t cycles); 1176b7091f1dSJiayu Hu void show_gro(portid_t port_id); 11776970401eSDavid Marchand #endif 11786970401eSDavid Marchand #ifdef RTE_LIB_GSO 117952f38a20SJiayu Hu void setup_gso(const char *mode, portid_t port_id); 11806970401eSDavid Marchand #endif 11816f51deb9SIvan Ilchenko int eth_dev_info_get_print_err(uint16_t port_id, 11826f51deb9SIvan Ilchenko struct rte_eth_dev_info *dev_info); 1183655eae01SJie Wang int eth_dev_conf_get_print_err(uint16_t port_id, 1184655eae01SJie Wang struct rte_eth_conf *dev_conf); 118534fc1051SIvan Ilchenko void eth_set_promisc_mode(uint16_t port_id, int enable); 11868835806dSIvan Ilchenko void eth_set_allmulticast_mode(uint16_t port, int enable); 1187e661a08bSIgor Romanov int eth_link_get_nowait_print_err(uint16_t port_id, struct rte_eth_link *link); 1188a5279d25SIgor Romanov int eth_macaddr_get_print_err(uint16_t port_id, 1189a5279d25SIgor Romanov struct rte_ether_addr *mac_addr); 11906f51deb9SIvan Ilchenko 1191e1d44d0aSKalesh AP /* Functions to display the set of MAC addresses added to a port*/ 1192e1d44d0aSKalesh AP void show_macs(portid_t port_id); 1193e1d44d0aSKalesh AP void show_mcast_macs(portid_t port_id); 119416321de0SIvan Boule 11958fff6675SIvan Boule /* Functions to manage the set of filtered Multicast MAC addresses */ 11966d13ea8eSOlivier Matz void mcast_addr_add(portid_t port_id, struct rte_ether_addr *mc_addr); 11976d13ea8eSOlivier Matz void mcast_addr_remove(portid_t port_id, struct rte_ether_addr *mc_addr); 1198ef8bd7d0SDengdui Huang void mcast_addr_flush(portid_t port_id); 119928caa76aSZhiyong Yang void port_dcb_info_display(portid_t port_id); 12008fff6675SIvan Boule 12019999dc6fSKirill Rybalchenko uint8_t *open_file(const char *file_path, uint32_t *size); 12029999dc6fSKirill Rybalchenko int save_file(const char *file_path, uint8_t *buf, uint32_t size); 12039999dc6fSKirill Rybalchenko int close_file(uint8_t *buf); 1204a92a5a2cSBeilei Xing 1205edab33b1STetsuya Mukawa enum print_warning { 1206edab33b1STetsuya Mukawa ENABLED_WARN = 0, 1207edab33b1STetsuya Mukawa DISABLED_WARN 1208edab33b1STetsuya Mukawa }; 1209edab33b1STetsuya Mukawa int port_id_is_invalid(portid_t port_id, enum print_warning warning); 12108f3c4176SMatan Azrad void print_valid_ports(void); 1211c9cafcc8SShahaf Shuler int new_socket_id(unsigned int socket_id); 1212edab33b1STetsuya Mukawa 12133f7311baSWei Dai queueid_t get_allowed_max_nb_rxq(portid_t *pid); 12143f7311baSWei Dai int check_nb_rxq(queueid_t rxq); 121536db4f6cSWei Dai queueid_t get_allowed_max_nb_txq(portid_t *pid); 121636db4f6cSWei Dai int check_nb_txq(queueid_t txq); 121799e040d3SLijun Ou int check_nb_rxd(queueid_t rxd); 121899e040d3SLijun Ou int check_nb_txd(queueid_t txd); 12191c69df45SOri Kam queueid_t get_allowed_max_nb_hairpinq(portid_t *pid); 12201c69df45SOri Kam int check_nb_hairpinq(queueid_t hairpinq); 12213f7311baSWei Dai 1222c77ad9deSRaslan Darawsheh uint16_t dump_rx_pkts(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], 1223c77ad9deSRaslan Darawsheh uint16_t nb_pkts, __rte_unused uint16_t max_pkts, 1224c77ad9deSRaslan Darawsheh __rte_unused void *user_param); 1225c77ad9deSRaslan Darawsheh 1226c77ad9deSRaslan Darawsheh uint16_t dump_tx_pkts(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], 1227c77ad9deSRaslan Darawsheh uint16_t nb_pkts, __rte_unused void *user_param); 1228c77ad9deSRaslan Darawsheh 1229c77ad9deSRaslan Darawsheh void add_rx_dump_callbacks(portid_t portid); 1230c77ad9deSRaslan Darawsheh void remove_rx_dump_callbacks(portid_t portid); 1231c77ad9deSRaslan Darawsheh void add_tx_dump_callbacks(portid_t portid); 1232c77ad9deSRaslan Darawsheh void remove_tx_dump_callbacks(portid_t portid); 1233b5b38ed8SRaslan Darawsheh void configure_rxtx_dump_callbacks(uint16_t verbose); 1234d862c45bSRaslan Darawsheh 12351e45c908SDekel Peled uint16_t tx_pkt_set_md(uint16_t port_id, __rte_unused uint16_t queue, 12361e45c908SDekel Peled struct rte_mbuf *pkts[], uint16_t nb_pkts, 12371e45c908SDekel Peled __rte_unused void *user_param); 12381e45c908SDekel Peled void add_tx_md_callback(portid_t portid); 12391e45c908SDekel Peled void remove_tx_md_callback(portid_t portid); 12401e45c908SDekel Peled 1241b57b66a9SOri Kam uint16_t tx_pkt_set_dynf(uint16_t port_id, __rte_unused uint16_t queue, 1242b57b66a9SOri Kam struct rte_mbuf *pkts[], uint16_t nb_pkts, 1243b57b66a9SOri Kam __rte_unused void *user_param); 1244b57b66a9SOri Kam void add_tx_dynf_callback(portid_t portid); 1245b57b66a9SOri Kam void remove_tx_dynf_callback(portid_t portid); 1246b563c142SFerruh Yigit int update_mtu_from_frame_size(portid_t portid, uint32_t max_rx_pktlen); 124759f3a8acSGregory Etelson void flex_item_create(portid_t port_id, uint16_t flex_id, const char *filename); 124859f3a8acSGregory Etelson void flex_item_destroy(portid_t port_id, uint16_t flex_id); 124959f3a8acSGregory Etelson void port_flex_item_flush(portid_t port_id); 1250b57b66a9SOri Kam 12512566c33cSGregory Etelson extern int flow_parse(const char *src, void *result, unsigned int size, 12522566c33cSGregory Etelson struct rte_flow_attr **attr, 12532566c33cSGregory Etelson struct rte_flow_item **pattern, 12542566c33cSGregory Etelson struct rte_flow_action **actions); 12552566c33cSGregory Etelson 12569ad341b5SHuisong Li uint64_t str_to_rsstypes(const char *str); 12573c23ee6cSHuisong Li const char *rsstypes_to_str(uint64_t rss_type); 12583c23ee6cSHuisong Li 1259119786aaSFerruh Yigit uint16_t str_to_flowtype(const char *string); 1260119786aaSFerruh Yigit const char *flowtype_to_str(uint16_t flow_type); 1261119786aaSFerruh Yigit 1262592ab76fSDavid Marchand /* For registering driver specific testpmd commands. */ 1263592ab76fSDavid Marchand struct testpmd_driver_commands { 1264592ab76fSDavid Marchand TAILQ_ENTRY(testpmd_driver_commands) next; 1265592ab76fSDavid Marchand struct { 1266592ab76fSDavid Marchand cmdline_parse_inst_t *ctx; 1267592ab76fSDavid Marchand const char *help; 1268592ab76fSDavid Marchand } commands[]; 1269592ab76fSDavid Marchand }; 1270592ab76fSDavid Marchand 1271592ab76fSDavid Marchand void testpmd_add_driver_commands(struct testpmd_driver_commands *c); 1272592ab76fSDavid Marchand #define TESTPMD_ADD_DRIVER_COMMANDS(c) \ 1273592ab76fSDavid Marchand RTE_INIT(__##c) \ 1274592ab76fSDavid Marchand { \ 1275592ab76fSDavid Marchand testpmd_add_driver_commands(&c); \ 1276592ab76fSDavid Marchand } 1277592ab76fSDavid Marchand 1278af75078fSIntel /* 1279af75078fSIntel * Work-around of a compilation error with ICC on invocations of the 1280af75078fSIntel * rte_be_to_cpu_16() function. 1281af75078fSIntel */ 1282af75078fSIntel #ifdef __GCC__ 1283af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v) rte_be_to_cpu_16((be_16_v)) 1284af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) rte_cpu_to_be_16((cpu_16_v)) 1285af75078fSIntel #else 128644eb9456SThomas Monjalon #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN 1287af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v) (be_16_v) 1288af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) (cpu_16_v) 1289af75078fSIntel #else 1290af75078fSIntel #define RTE_BE_TO_CPU_16(be_16_v) \ 1291af75078fSIntel (uint16_t) ((((be_16_v) & 0xFF) << 8) | ((be_16_v) >> 8)) 1292af75078fSIntel #define RTE_CPU_TO_BE_16(cpu_16_v) \ 1293af75078fSIntel (uint16_t) ((((cpu_16_v) & 0xFF) << 8) | ((cpu_16_v) >> 8)) 1294af75078fSIntel #endif 1295af75078fSIntel #endif /* __GCC__ */ 1296af75078fSIntel 1297285fd101SOlivier Matz #define TESTPMD_LOG(level, fmt, args...) \ 1298285fd101SOlivier Matz rte_log(RTE_LOG_ ## level, testpmd_logtype, "testpmd: " fmt, ## args) 1299285fd101SOlivier Matz 1300af75078fSIntel #endif /* _TESTPMD_H_ */ 1301