1174a1631SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 2174a1631SBruce Richardson * Copyright(c) 2010-2017 Intel Corporation 3af75078fSIntel */ 4af75078fSIntel 5af75078fSIntel #include <errno.h> 6af75078fSIntel #include <getopt.h> 7af75078fSIntel #include <stdarg.h> 8af75078fSIntel #include <stdio.h> 9af75078fSIntel #include <stdlib.h> 10af75078fSIntel #include <signal.h> 11af75078fSIntel #include <string.h> 12af75078fSIntel #include <time.h> 13af75078fSIntel #include <fcntl.h> 14af75078fSIntel #include <sys/types.h> 15af75078fSIntel 16af75078fSIntel #include <sys/queue.h> 17af75078fSIntel #include <sys/stat.h> 18af75078fSIntel 19af75078fSIntel #include <stdint.h> 20af75078fSIntel #include <unistd.h> 21af75078fSIntel #include <inttypes.h> 22af75078fSIntel 23af75078fSIntel #include <rte_common.h> 24af75078fSIntel #include <rte_byteorder.h> 25af75078fSIntel #include <rte_log.h> 26af75078fSIntel #include <rte_debug.h> 27af75078fSIntel #include <rte_cycles.h> 28af75078fSIntel #include <rte_memory.h> 29af75078fSIntel #include <rte_launch.h> 30af75078fSIntel #include <rte_eal.h> 31af75078fSIntel #include <rte_per_lcore.h> 32af75078fSIntel #include <rte_lcore.h> 33af75078fSIntel #include <rte_atomic.h> 34af75078fSIntel #include <rte_branch_prediction.h> 35af75078fSIntel #include <rte_mempool.h> 36af75078fSIntel #include <rte_interrupts.h> 37af75078fSIntel #include <rte_pci.h> 38af75078fSIntel #include <rte_ether.h> 39af75078fSIntel #include <rte_ethdev.h> 40af75078fSIntel #include <rte_string_fns.h> 410d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 42af75078fSIntel #include <cmdline_parse.h> 43af75078fSIntel #include <cmdline_parse_etheraddr.h> 440d56cb81SThomas Monjalon #endif 452950a769SDeclan Doherty #ifdef RTE_LIBRTE_PMD_BOND 462950a769SDeclan Doherty #include <rte_eth_bond.h> 472950a769SDeclan Doherty #endif 48938a184aSAdrien Mazarguil #include <rte_flow.h> 49af75078fSIntel 50af75078fSIntel #include "testpmd.h" 51af75078fSIntel 52af75078fSIntel static void 53af75078fSIntel usage(char* progname) 54af75078fSIntel { 550d56cb81SThomas Monjalon printf("usage: %s " 560d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 570d56cb81SThomas Monjalon "[--interactive|-i] " 5881ef862bSAllain Legacy "[--cmdline-file=FILENAME] " 590d56cb81SThomas Monjalon #endif 60ca7feb22SCyril Chemparathy "[--help|-h] | [--auto-start|-a] | [" 61cfea1f30SPablo de Lara "--tx-first | --stats-period=PERIOD | " 62af75078fSIntel "--coremask=COREMASK --portmask=PORTMASK --numa " 63c8798818SIntel "--mbuf-size= | --total-num-mbufs= | " 643be52ffcSIntel "--nb-cores= | --nb-ports= | " 650d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 66af75078fSIntel "--eth-peers-configfile= | " 673be52ffcSIntel "--eth-peer=X,M:M:M:M:M:M | " 680d56cb81SThomas Monjalon #endif 69af75078fSIntel "--pkt-filter-mode= |" 70af75078fSIntel "--rss-ip | --rss-udp | " 71af75078fSIntel "--rxpt= | --rxht= | --rxwt= | --rxfreet= | " 72af75078fSIntel "--txpt= | --txht= | --txwt= | --txfreet= | " 73*fd8c20aaSShahaf Shuler "--txrst= | --txqflags= | --tx-offloads ]\n", 74af75078fSIntel progname); 750d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 763be52ffcSIntel printf(" --interactive: run in interactive mode.\n"); 7781ef862bSAllain Legacy printf(" --cmdline-file: execute cli commands before startup.\n"); 780d56cb81SThomas Monjalon #endif 79ca7feb22SCyril Chemparathy printf(" --auto-start: start forwarding on init " 80ca7feb22SCyril Chemparathy "[always when non-interactive].\n"); 813be52ffcSIntel printf(" --help: display this message and quit.\n"); 8299cabef0SPablo de Lara printf(" --tx-first: start forwarding sending a burst first " 8399cabef0SPablo de Lara "(only if interactive is disabled).\n"); 84cfea1f30SPablo de Lara printf(" --stats-period=PERIOD: statistics will be shown " 85cfea1f30SPablo de Lara "every PERIOD seconds (only if interactive is disabled).\n"); 863be52ffcSIntel printf(" --nb-cores=N: set the number of forwarding cores " 873be52ffcSIntel "(1 <= N <= %d).\n", nb_lcores); 883be52ffcSIntel printf(" --nb-ports=N: set the number of forwarding ports " 893be52ffcSIntel "(1 <= N <= %d).\n", nb_ports); 90af75078fSIntel printf(" --coremask=COREMASK: hexadecimal bitmask of cores running " 91013af9b6SIntel "the packet forwarding test. The master lcore is reserved for " 923be52ffcSIntel "command line parsing only, and cannot be masked on for " 933be52ffcSIntel "packet forwarding.\n"); 94af75078fSIntel printf(" --portmask=PORTMASK: hexadecimal bitmask of ports used " 953be52ffcSIntel "by the packet forwarding test.\n"); 96af75078fSIntel printf(" --numa: enable NUMA-aware allocation of RX/TX rings and of " 973be52ffcSIntel "RX memory buffers (mbufs).\n"); 98b6ea6408SIntel printf(" --port-numa-config=(port,socket)[,(port,socket)]: " 99b6ea6408SIntel "specify the socket on which the memory pool " 100b6ea6408SIntel "used by the port will be allocated.\n"); 101b6ea6408SIntel printf(" --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: " 102b6ea6408SIntel "specify the socket on which the TX/RX rings for " 103b6ea6408SIntel "the port will be allocated " 104b6ea6408SIntel "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n"); 105b6ea6408SIntel printf(" --socket-num=N: set socket from which all memory is allocated " 106b6ea6408SIntel "in NUMA mode.\n"); 1073be52ffcSIntel printf(" --mbuf-size=N: set the data size of mbuf to N bytes.\n"); 1083be52ffcSIntel printf(" --total-num-mbufs=N: set the number of mbufs to be allocated " 1093be52ffcSIntel "in mbuf pools.\n"); 1103be52ffcSIntel printf(" --max-pkt-len=N: set the maximum size of packet to N bytes.\n"); 1110d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1123be52ffcSIntel printf(" --eth-peers-configfile=name: config file with ethernet addresses " 1133be52ffcSIntel "of peer ports.\n"); 1143be52ffcSIntel printf(" --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer " 1153be52ffcSIntel "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS); 1160d56cb81SThomas Monjalon #endif 1173be52ffcSIntel printf(" --pkt-filter-mode=N: set Flow Director mode " 1183be52ffcSIntel "(N: none (default mode) or signature or perfect).\n"); 1193be52ffcSIntel printf(" --pkt-filter-report-hash=N: set Flow Director report mode " 1203be52ffcSIntel "(N: none or match (default) or always).\n"); 1213be52ffcSIntel printf(" --pkt-filter-size=N: set Flow Director mode " 1223be52ffcSIntel "(N: 64K (default mode) or 128K or 256K).\n"); 123af75078fSIntel printf(" --pkt-filter-drop-queue=N: set drop-queue. " 1243be52ffcSIntel "In perfect mode, when you add a rule with queue = -1 " 125af75078fSIntel "the packet will be enqueued into the rx drop-queue. " 126af75078fSIntel "If the drop-queue doesn't exist, the packet is dropped. " 1273be52ffcSIntel "By default drop-queue=127.\n"); 12862d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 12962d3216dSReshma Pattan printf(" --latencystats=N: enable latency and jitter statistcs " 13062d3216dSReshma Pattan "monitoring on forwarding lcore id N.\n"); 13162d3216dSReshma Pattan #endif 13279dd163fSJeff Guo printf(" --disable-crc-strip: disable CRC stripping by hardware.\n"); 1334c3ea508SOlivier Matz printf(" --enable-lro: enable large receive offload.\n"); 1343be52ffcSIntel printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n"); 135912267a3SRaslan Darawsheh printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n"); 1363be52ffcSIntel printf(" --disable-hw-vlan: disable hardware vlan.\n"); 137c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n"); 138c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n"); 139c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-extend: disable hardware vlan extend.\n"); 1403be52ffcSIntel printf(" --enable-drop-en: enable per queue packet drop.\n"); 1413be52ffcSIntel printf(" --disable-rss: disable rss.\n"); 142af75078fSIntel printf(" --port-topology=N: set port topology (N: paired (default) or " 1433be52ffcSIntel "chained).\n"); 144769ce6b1SThomas Monjalon printf(" --forward-mode=N: set forwarding mode (N: %s).\n", 145769ce6b1SThomas Monjalon list_pkt_forwarding_modes()); 1463be52ffcSIntel printf(" --rss-ip: set RSS functions to IPv4/IPv6 only .\n"); 1473be52ffcSIntel printf(" --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n"); 1483be52ffcSIntel printf(" --rxq=N: set the number of RX queues per port to N.\n"); 1493be52ffcSIntel printf(" --rxd=N: set the number of descriptors in RX rings to N.\n"); 1503be52ffcSIntel printf(" --txq=N: set the number of TX queues per port to N.\n"); 1513be52ffcSIntel printf(" --txd=N: set the number of descriptors in TX rings to N.\n"); 1523be52ffcSIntel printf(" --burst=N: set the number of packets per burst to N.\n"); 1533be52ffcSIntel printf(" --mbcache=N: set the cache of mbuf memory pool to N.\n"); 15457af3415SPablo de Lara printf(" --rxpt=N: set prefetch threshold register of RX rings to N.\n"); 15557af3415SPablo de Lara printf(" --rxht=N: set the host threshold register of RX rings to N.\n"); 1563be52ffcSIntel printf(" --rxfreet=N: set the free threshold of RX descriptors to N " 1573be52ffcSIntel "(0 <= N < value of rxd).\n"); 15857af3415SPablo de Lara printf(" --rxwt=N: set the write-back threshold register of RX rings to N.\n"); 15957af3415SPablo de Lara printf(" --txpt=N: set the prefetch threshold register of TX rings to N.\n"); 16057af3415SPablo de Lara printf(" --txht=N: set the nhost threshold register of TX rings to N.\n"); 16157af3415SPablo de Lara printf(" --txwt=N: set the write-back threshold register of TX rings to N.\n"); 1623be52ffcSIntel printf(" --txfreet=N: set the transmit free threshold of TX rings to N " 1633be52ffcSIntel "(0 <= N <= value of txd).\n"); 1643be52ffcSIntel printf(" --txrst=N: set the transmit RS bit threshold of TX rings to N " 1653be52ffcSIntel "(0 <= N <= value of txd).\n"); 1663be52ffcSIntel printf(" --txqflags=0xXXXXXXXX: hexadecimal bitmask of TX queue flags " 1673be52ffcSIntel "(0 <= N <= 0x7FFFFFFF).\n"); 1683be52ffcSIntel printf(" --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 169ed30d9b6SIntel "tx queues statistics counters mapping " 1703be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1713be52ffcSIntel printf(" --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 172ed30d9b6SIntel "rx queues statistics counters mapping " 1733be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1745e2ee196SIntel printf(" --no-flush-rx: Don't flush RX streams before forwarding." 1755e2ee196SIntel " Used mainly with PCAP drivers.\n"); 1762ebacaa7SMaciej Czekaj printf(" --txpkts=X[,Y]*: set TX segment sizes" 1772ebacaa7SMaciej Czekaj " or total packet length.\n"); 178bc202406SDavid Marchand printf(" --disable-link-check: disable check on link status when " 179bc202406SDavid Marchand "starting/stopping ports.\n"); 1808ea656f8SGaetan Rivet printf(" --no-lsc-interrupt: disable link status change interrupt.\n"); 181e25e6c70SRemy Horton printf(" --no-rmv-interrupt: disable device removal interrupt.\n"); 182e25e6c70SRemy Horton printf(" --bitrate-stats=N: set the logical core N to perform " 183e25e6c70SRemy Horton "bit-rate calculation.\n"); 184b6b63dfdSGaetan Rivet printf(" --print-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: " 185776ecd42SWenzhuo Lu "enable print of designated event or all of them.\n"); 186b6b63dfdSGaetan Rivet printf(" --mask-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: " 187776ecd42SWenzhuo Lu "disable print of designated event or all of them.\n"); 1887ee3e944SVasily Philipov printf(" --flow-isolate-all: " 189776ecd42SWenzhuo Lu "requests flow API isolated mode on all ports at initialization time.\n"); 190*fd8c20aaSShahaf Shuler printf(" --tx-offloads=0xXXXXXXXX: hexadecimal bitmask of TX queue offloads\n"); 191af75078fSIntel } 192af75078fSIntel 1930d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 194af75078fSIntel static int 195af75078fSIntel init_peer_eth_addrs(char *config_filename) 196af75078fSIntel { 197af75078fSIntel FILE *config_file; 198af75078fSIntel portid_t i; 199af75078fSIntel char buf[50]; 200af75078fSIntel 201af75078fSIntel config_file = fopen(config_filename, "r"); 202af75078fSIntel if (config_file == NULL) { 2033be52ffcSIntel perror("Failed to open eth config file\n"); 204af75078fSIntel return -1; 205af75078fSIntel } 206af75078fSIntel 207af75078fSIntel for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 208af75078fSIntel 209af75078fSIntel if (fgets(buf, sizeof(buf), config_file) == NULL) 210af75078fSIntel break; 211af75078fSIntel 212aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i], 213aaa662e7SAlan Carew sizeof(peer_eth_addrs[i])) < 0) { 2143be52ffcSIntel printf("Bad MAC address format on line %d\n", i+1); 215af75078fSIntel fclose(config_file); 216af75078fSIntel return -1; 217af75078fSIntel } 218af75078fSIntel } 219af75078fSIntel fclose(config_file); 220af75078fSIntel nb_peer_eth_addrs = (portid_t) i; 221af75078fSIntel return 0; 222af75078fSIntel } 2230d56cb81SThomas Monjalon #endif 224af75078fSIntel 225af75078fSIntel /* 226af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 227af75078fSIntel * the global configuration of forwarding cores. 228af75078fSIntel */ 229af75078fSIntel static void 230af75078fSIntel parse_fwd_coremask(const char *coremask) 231af75078fSIntel { 232af75078fSIntel char *end; 233af75078fSIntel unsigned long long int cm; 234af75078fSIntel 235af75078fSIntel /* parse hexadecimal string */ 236af75078fSIntel end = NULL; 237af75078fSIntel cm = strtoull(coremask, &end, 16); 238af75078fSIntel if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0')) 239af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n"); 240013af9b6SIntel else if (set_fwd_lcores_mask((uint64_t) cm) < 0) 241013af9b6SIntel rte_exit(EXIT_FAILURE, "coremask is not valid\n"); 242af75078fSIntel } 243af75078fSIntel 244af75078fSIntel /* 245af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 246af75078fSIntel * the global configuration of forwarding cores. 247af75078fSIntel */ 248af75078fSIntel static void 249af75078fSIntel parse_fwd_portmask(const char *portmask) 250af75078fSIntel { 251af75078fSIntel char *end; 252af75078fSIntel unsigned long long int pm; 253af75078fSIntel 254af75078fSIntel /* parse hexadecimal string */ 255af75078fSIntel end = NULL; 256af75078fSIntel pm = strtoull(portmask, &end, 16); 257af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 258af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n"); 259af75078fSIntel else 260af75078fSIntel set_fwd_ports_mask((uint64_t) pm); 261af75078fSIntel } 262af75078fSIntel 263ed30d9b6SIntel 264ed30d9b6SIntel static int 265ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx) 266ed30d9b6SIntel { 267ed30d9b6SIntel char s[256]; 268ed30d9b6SIntel const char *p, *p0 = q_arg; 269ed30d9b6SIntel char *end; 270ed30d9b6SIntel enum fieldnames { 271ed30d9b6SIntel FLD_PORT = 0, 272ed30d9b6SIntel FLD_QUEUE, 273ed30d9b6SIntel FLD_STATS_COUNTER, 274ed30d9b6SIntel _NUM_FLD 275ed30d9b6SIntel }; 276ed30d9b6SIntel unsigned long int_fld[_NUM_FLD]; 277ed30d9b6SIntel char *str_fld[_NUM_FLD]; 278ed30d9b6SIntel int i; 279ed30d9b6SIntel unsigned size; 280ed30d9b6SIntel 281ed30d9b6SIntel /* reset from value set at definition */ 282ed30d9b6SIntel is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0); 283ed30d9b6SIntel 284ed30d9b6SIntel while ((p = strchr(p0,'(')) != NULL) { 285ed30d9b6SIntel ++p; 286ed30d9b6SIntel if((p0 = strchr(p,')')) == NULL) 287ed30d9b6SIntel return -1; 288ed30d9b6SIntel 289ed30d9b6SIntel size = p0 - p; 290ed30d9b6SIntel if(size >= sizeof(s)) 291ed30d9b6SIntel return -1; 292ed30d9b6SIntel 2936f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 294ed30d9b6SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 295ed30d9b6SIntel return -1; 296ed30d9b6SIntel for (i = 0; i < _NUM_FLD; i++){ 297ed30d9b6SIntel errno = 0; 298ed30d9b6SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 299ed30d9b6SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 300ed30d9b6SIntel return -1; 301ed30d9b6SIntel } 302ed30d9b6SIntel /* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */ 303ed30d9b6SIntel if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) { 304ed30d9b6SIntel printf("Stats counter not in the correct range 0..%d\n", 305ed30d9b6SIntel RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 306ed30d9b6SIntel return -1; 307ed30d9b6SIntel } 308ed30d9b6SIntel 3094dccdc78SBruce Richardson if (!is_rx) { 3104dccdc78SBruce Richardson if ((nb_tx_queue_stats_mappings >= 3114dccdc78SBruce Richardson MAX_TX_QUEUE_STATS_MAPPINGS)) { 3124dccdc78SBruce Richardson printf("exceeded max number of TX queue " 3134dccdc78SBruce Richardson "statistics mappings: %hu\n", 3144dccdc78SBruce Richardson nb_tx_queue_stats_mappings); 315ed30d9b6SIntel return -1; 316ed30d9b6SIntel } 317ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id = 318ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 319ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id = 320ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 321ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id = 322ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 323ed30d9b6SIntel ++nb_tx_queue_stats_mappings; 324ed30d9b6SIntel } 325ed30d9b6SIntel else { 3264dccdc78SBruce Richardson if ((nb_rx_queue_stats_mappings >= 3274dccdc78SBruce Richardson MAX_RX_QUEUE_STATS_MAPPINGS)) { 3284dccdc78SBruce Richardson printf("exceeded max number of RX queue " 3294dccdc78SBruce Richardson "statistics mappings: %hu\n", 3304dccdc78SBruce Richardson nb_rx_queue_stats_mappings); 3314dccdc78SBruce Richardson return -1; 3324dccdc78SBruce Richardson } 333ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id = 334ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 335ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id = 336ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 337ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id = 338ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 339ed30d9b6SIntel ++nb_rx_queue_stats_mappings; 340ed30d9b6SIntel } 341ed30d9b6SIntel 342ed30d9b6SIntel } 343ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */ 344ed30d9b6SIntel /* than to the default array (that was set at its definition) */ 345ed30d9b6SIntel is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) : 346ed30d9b6SIntel (tx_queue_stats_mappings = tx_queue_stats_mappings_array); 347ed30d9b6SIntel return 0; 348ed30d9b6SIntel } 349ed30d9b6SIntel 350c9cafcc8SShahaf Shuler static void 351c9cafcc8SShahaf Shuler print_invalid_socket_id_error(void) 352c9cafcc8SShahaf Shuler { 353c9cafcc8SShahaf Shuler unsigned int i = 0; 354c9cafcc8SShahaf Shuler 355c9cafcc8SShahaf Shuler printf("Invalid socket id, options are: "); 356c9cafcc8SShahaf Shuler for (i = 0; i < num_sockets; i++) { 357c9cafcc8SShahaf Shuler printf("%u%s", socket_ids[i], 358c9cafcc8SShahaf Shuler (i == num_sockets - 1) ? "\n" : ","); 359c9cafcc8SShahaf Shuler } 360c9cafcc8SShahaf Shuler } 361c9cafcc8SShahaf Shuler 362b6ea6408SIntel static int 363b6ea6408SIntel parse_portnuma_config(const char *q_arg) 364b6ea6408SIntel { 365b6ea6408SIntel char s[256]; 366b6ea6408SIntel const char *p, *p0 = q_arg; 367b6ea6408SIntel char *end; 368d1f1a0fdSLi Han uint8_t i, socket_id; 369d1f1a0fdSLi Han portid_t port_id; 370b6ea6408SIntel unsigned size; 371b6ea6408SIntel enum fieldnames { 372b6ea6408SIntel FLD_PORT = 0, 373b6ea6408SIntel FLD_SOCKET, 374b6ea6408SIntel _NUM_FLD 375b6ea6408SIntel }; 376b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 377b6ea6408SIntel char *str_fld[_NUM_FLD]; 378edab33b1STetsuya Mukawa portid_t pid; 379b6ea6408SIntel 380b6ea6408SIntel /* reset from value set at definition */ 381b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 382b6ea6408SIntel ++p; 383b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 384b6ea6408SIntel return -1; 385b6ea6408SIntel 386b6ea6408SIntel size = p0 - p; 387b6ea6408SIntel if(size >= sizeof(s)) 388b6ea6408SIntel return -1; 389b6ea6408SIntel 3906f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 391b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 392b6ea6408SIntel return -1; 393b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 394b6ea6408SIntel errno = 0; 395b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 396b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 397b6ea6408SIntel return -1; 398b6ea6408SIntel } 399d1f1a0fdSLi Han port_id = (portid_t)int_fld[FLD_PORT]; 400d1f1a0fdSLi Han if (port_id_is_invalid(port_id, ENABLED_WARN) || 401d1f1a0fdSLi Han port_id == (portid_t)RTE_PORT_ALL) { 402edab33b1STetsuya Mukawa printf("Valid port range is [0"); 4037d89b261SGaetan Rivet RTE_ETH_FOREACH_DEV(pid) 404edab33b1STetsuya Mukawa printf(", %d", pid); 405edab33b1STetsuya Mukawa printf("]\n"); 406b6ea6408SIntel return -1; 407b6ea6408SIntel } 408b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 409c9cafcc8SShahaf Shuler if (new_socket_id(socket_id)) { 410c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 411b6ea6408SIntel return -1; 412b6ea6408SIntel } 413b6ea6408SIntel port_numa[port_id] = socket_id; 414b6ea6408SIntel } 415b6ea6408SIntel 416b6ea6408SIntel return 0; 417b6ea6408SIntel } 418b6ea6408SIntel 419b6ea6408SIntel static int 420b6ea6408SIntel parse_ringnuma_config(const char *q_arg) 421b6ea6408SIntel { 422b6ea6408SIntel char s[256]; 423b6ea6408SIntel const char *p, *p0 = q_arg; 424b6ea6408SIntel char *end; 425d1f1a0fdSLi Han uint8_t i, ring_flag, socket_id; 426d1f1a0fdSLi Han portid_t port_id; 427b6ea6408SIntel unsigned size; 428b6ea6408SIntel enum fieldnames { 429b6ea6408SIntel FLD_PORT = 0, 430b6ea6408SIntel FLD_FLAG, 431b6ea6408SIntel FLD_SOCKET, 432b6ea6408SIntel _NUM_FLD 433b6ea6408SIntel }; 434b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 435b6ea6408SIntel char *str_fld[_NUM_FLD]; 436edab33b1STetsuya Mukawa portid_t pid; 437b6ea6408SIntel #define RX_RING_ONLY 0x1 438b6ea6408SIntel #define TX_RING_ONLY 0x2 439b6ea6408SIntel #define RXTX_RING 0x3 440b6ea6408SIntel 441b6ea6408SIntel /* reset from value set at definition */ 442b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 443b6ea6408SIntel ++p; 444b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 445b6ea6408SIntel return -1; 446b6ea6408SIntel 447b6ea6408SIntel size = p0 - p; 448b6ea6408SIntel if(size >= sizeof(s)) 449b6ea6408SIntel return -1; 450b6ea6408SIntel 4516f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 452b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 453b6ea6408SIntel return -1; 454b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 455b6ea6408SIntel errno = 0; 456b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 457b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 458b6ea6408SIntel return -1; 459b6ea6408SIntel } 460d1f1a0fdSLi Han port_id = (portid_t)int_fld[FLD_PORT]; 461d1f1a0fdSLi Han if (port_id_is_invalid(port_id, ENABLED_WARN) || 462d1f1a0fdSLi Han port_id == (portid_t)RTE_PORT_ALL) { 463edab33b1STetsuya Mukawa printf("Valid port range is [0"); 4647d89b261SGaetan Rivet RTE_ETH_FOREACH_DEV(pid) 465edab33b1STetsuya Mukawa printf(", %d", pid); 466edab33b1STetsuya Mukawa printf("]\n"); 467b6ea6408SIntel return -1; 468b6ea6408SIntel } 469b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 470c9cafcc8SShahaf Shuler if (new_socket_id(socket_id)) { 471c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 472b6ea6408SIntel return -1; 473b6ea6408SIntel } 474b6ea6408SIntel ring_flag = (uint8_t)int_fld[FLD_FLAG]; 475b6ea6408SIntel if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) { 476b6ea6408SIntel printf("Invalid ring-flag=%d config for port =%d\n", 477b6ea6408SIntel ring_flag,port_id); 478b6ea6408SIntel return -1; 479b6ea6408SIntel } 480b6ea6408SIntel 481b6ea6408SIntel switch (ring_flag & RXTX_RING) { 482b6ea6408SIntel case RX_RING_ONLY: 483b6ea6408SIntel rxring_numa[port_id] = socket_id; 484b6ea6408SIntel break; 485b6ea6408SIntel case TX_RING_ONLY: 486b6ea6408SIntel txring_numa[port_id] = socket_id; 487b6ea6408SIntel break; 488b6ea6408SIntel case RXTX_RING: 489b6ea6408SIntel rxring_numa[port_id] = socket_id; 490b6ea6408SIntel txring_numa[port_id] = socket_id; 491b6ea6408SIntel break; 492b6ea6408SIntel default: 493b6ea6408SIntel printf("Invalid ring-flag=%d config for port=%d\n", 494b6ea6408SIntel ring_flag,port_id); 495b6ea6408SIntel break; 496b6ea6408SIntel } 497b6ea6408SIntel } 498b6ea6408SIntel 499b6ea6408SIntel return 0; 500b6ea6408SIntel } 501ed30d9b6SIntel 5023af72783SGaetan Rivet static int 5033af72783SGaetan Rivet parse_event_printing_config(const char *optarg, int enable) 5043af72783SGaetan Rivet { 5053af72783SGaetan Rivet uint32_t mask = 0; 5063af72783SGaetan Rivet 5073af72783SGaetan Rivet if (!strcmp(optarg, "unknown")) 5083af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_UNKNOWN; 5093af72783SGaetan Rivet else if (!strcmp(optarg, "intr_lsc")) 5103af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_LSC; 5113af72783SGaetan Rivet else if (!strcmp(optarg, "queue_state")) 5123af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_QUEUE_STATE; 5133af72783SGaetan Rivet else if (!strcmp(optarg, "intr_reset")) 5143af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RESET; 5153af72783SGaetan Rivet else if (!strcmp(optarg, "vf_mbox")) 5163af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_VF_MBOX; 5173af72783SGaetan Rivet else if (!strcmp(optarg, "macsec")) 5183af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_MACSEC; 5193af72783SGaetan Rivet else if (!strcmp(optarg, "intr_rmv")) 5203af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RMV; 521b6b63dfdSGaetan Rivet else if (!strcmp(optarg, "all")) 522b6b63dfdSGaetan Rivet mask = ~UINT32_C(0); 5233af72783SGaetan Rivet else { 5243af72783SGaetan Rivet fprintf(stderr, "Invalid event: %s\n", optarg); 5253af72783SGaetan Rivet return -1; 5263af72783SGaetan Rivet } 5273af72783SGaetan Rivet if (enable) 5283af72783SGaetan Rivet event_print_mask |= mask; 5293af72783SGaetan Rivet else 5303af72783SGaetan Rivet event_print_mask &= ~mask; 5313af72783SGaetan Rivet return 0; 5323af72783SGaetan Rivet } 5333af72783SGaetan Rivet 534af75078fSIntel void 535af75078fSIntel launch_args_parse(int argc, char** argv) 536af75078fSIntel { 537af75078fSIntel int n, opt; 538af75078fSIntel char **argvopt; 539af75078fSIntel int opt_idx; 540013af9b6SIntel enum { TX, RX }; 541*fd8c20aaSShahaf Shuler /* Default offloads for all ports. */ 5420074d02fSShahaf Shuler uint64_t rx_offloads = rx_mode.offloads; 543*fd8c20aaSShahaf Shuler uint64_t tx_offloads = tx_mode.offloads; 544013af9b6SIntel 545af75078fSIntel static struct option lgopts[] = { 546af75078fSIntel { "help", 0, 0, 0 }, 5470d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 548af75078fSIntel { "interactive", 0, 0, 0 }, 54981ef862bSAllain Legacy { "cmdline-file", 1, 0, 0 }, 550ca7feb22SCyril Chemparathy { "auto-start", 0, 0, 0 }, 551af75078fSIntel { "eth-peers-configfile", 1, 0, 0 }, 552af75078fSIntel { "eth-peer", 1, 0, 0 }, 5530d56cb81SThomas Monjalon #endif 55499cabef0SPablo de Lara { "tx-first", 0, 0, 0 }, 555cfea1f30SPablo de Lara { "stats-period", 1, 0, 0 }, 556af75078fSIntel { "ports", 1, 0, 0 }, 557af75078fSIntel { "nb-cores", 1, 0, 0 }, 558af75078fSIntel { "nb-ports", 1, 0, 0 }, 559af75078fSIntel { "coremask", 1, 0, 0 }, 560af75078fSIntel { "portmask", 1, 0, 0 }, 561af75078fSIntel { "numa", 0, 0, 0 }, 562999b2ee0SBruce Richardson { "no-numa", 0, 0, 0 }, 563148f963fSBruce Richardson { "mp-anon", 0, 0, 0 }, 564b6ea6408SIntel { "port-numa-config", 1, 0, 0 }, 565b6ea6408SIntel { "ring-numa-config", 1, 0, 0 }, 566b6ea6408SIntel { "socket-num", 1, 0, 0 }, 567af75078fSIntel { "mbuf-size", 1, 0, 0 }, 568c8798818SIntel { "total-num-mbufs", 1, 0, 0 }, 569af75078fSIntel { "max-pkt-len", 1, 0, 0 }, 570af75078fSIntel { "pkt-filter-mode", 1, 0, 0 }, 571af75078fSIntel { "pkt-filter-report-hash", 1, 0, 0 }, 572af75078fSIntel { "pkt-filter-size", 1, 0, 0 }, 573af75078fSIntel { "pkt-filter-drop-queue", 1, 0, 0 }, 57462d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 57562d3216dSReshma Pattan { "latencystats", 1, 0, 0 }, 57662d3216dSReshma Pattan #endif 577e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE 578e25e6c70SRemy Horton { "bitrate-stats", 1, 0, 0 }, 579e25e6c70SRemy Horton #endif 58079dd163fSJeff Guo { "disable-crc-strip", 0, 0, 0 }, 5814c3ea508SOlivier Matz { "enable-lro", 0, 0, 0 }, 582013af9b6SIntel { "enable-rx-cksum", 0, 0, 0 }, 583912267a3SRaslan Darawsheh { "enable-rx-timestamp", 0, 0, 0 }, 58404997938SMaciej Czekaj { "enable-scatter", 0, 0, 0 }, 585af75078fSIntel { "disable-hw-vlan", 0, 0, 0 }, 586c9dd4aadSOuyang Changchun { "disable-hw-vlan-filter", 0, 0, 0 }, 587c9dd4aadSOuyang Changchun { "disable-hw-vlan-strip", 0, 0, 0 }, 588c9dd4aadSOuyang Changchun { "disable-hw-vlan-extend", 0, 0, 0 }, 589013af9b6SIntel { "enable-drop-en", 0, 0, 0 }, 590af75078fSIntel { "disable-rss", 0, 0, 0 }, 591af75078fSIntel { "port-topology", 1, 0, 0 }, 592ce9b9fb0SCyril Chemparathy { "forward-mode", 1, 0, 0 }, 593af75078fSIntel { "rss-ip", 0, 0, 0 }, 594af75078fSIntel { "rss-udp", 0, 0, 0 }, 595af75078fSIntel { "rxq", 1, 0, 0 }, 596af75078fSIntel { "txq", 1, 0, 0 }, 597af75078fSIntel { "rxd", 1, 0, 0 }, 598af75078fSIntel { "txd", 1, 0, 0 }, 599af75078fSIntel { "burst", 1, 0, 0 }, 600af75078fSIntel { "mbcache", 1, 0, 0 }, 601af75078fSIntel { "txpt", 1, 0, 0 }, 602af75078fSIntel { "txht", 1, 0, 0 }, 603af75078fSIntel { "txwt", 1, 0, 0 }, 604af75078fSIntel { "txfreet", 1, 0, 0 }, 605af75078fSIntel { "txrst", 1, 0, 0 }, 606ce8d5614SIntel { "txqflags", 1, 0, 0 }, 607af75078fSIntel { "rxpt", 1, 0, 0 }, 608af75078fSIntel { "rxht", 1, 0, 0 }, 609af75078fSIntel { "rxwt", 1, 0, 0 }, 610af75078fSIntel { "rxfreet", 1, 0, 0 }, 611ed30d9b6SIntel { "tx-queue-stats-mapping", 1, 0, 0 }, 612ed30d9b6SIntel { "rx-queue-stats-mapping", 1, 0, 0 }, 6137741e4cfSIntel { "no-flush-rx", 0, 0, 0 }, 6147ee3e944SVasily Philipov { "flow-isolate-all", 0, 0, 0 }, 615a7e7bb4eSCyril Chemparathy { "txpkts", 1, 0, 0 }, 616bc202406SDavid Marchand { "disable-link-check", 0, 0, 0 }, 6178ea656f8SGaetan Rivet { "no-lsc-interrupt", 0, 0, 0 }, 618284c908cSGaetan Rivet { "no-rmv-interrupt", 0, 0, 0 }, 6193af72783SGaetan Rivet { "print-event", 1, 0, 0 }, 6203af72783SGaetan Rivet { "mask-event", 1, 0, 0 }, 621*fd8c20aaSShahaf Shuler { "tx-offloads", 1, 0, 0 }, 622af75078fSIntel { 0, 0, 0, 0 }, 623af75078fSIntel }; 624af75078fSIntel 625af75078fSIntel argvopt = argv; 626af75078fSIntel 6270d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 628ca7feb22SCyril Chemparathy #define SHORTOPTS "i" 6290d56cb81SThomas Monjalon #else 630ca7feb22SCyril Chemparathy #define SHORTOPTS "" 6310d56cb81SThomas Monjalon #endif 632ca7feb22SCyril Chemparathy while ((opt = getopt_long(argc, argvopt, SHORTOPTS "ah", 633af75078fSIntel lgopts, &opt_idx)) != EOF) { 634af75078fSIntel switch (opt) { 6350d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 636af75078fSIntel case 'i': 637af75078fSIntel printf("Interactive-mode selected\n"); 638af75078fSIntel interactive = 1; 639af75078fSIntel break; 6400d56cb81SThomas Monjalon #endif 641ca7feb22SCyril Chemparathy case 'a': 642ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 643ca7feb22SCyril Chemparathy auto_start = 1; 644ca7feb22SCyril Chemparathy break; 645ca7feb22SCyril Chemparathy 646af75078fSIntel case 0: /*long options */ 647af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "help")) { 648af75078fSIntel usage(argv[0]); 649af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 650af75078fSIntel } 6510d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 652af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "interactive")) { 653af75078fSIntel printf("Interactive-mode selected\n"); 654af75078fSIntel interactive = 1; 655af75078fSIntel } 65681ef862bSAllain Legacy if (!strcmp(lgopts[opt_idx].name, "cmdline-file")) { 65781ef862bSAllain Legacy printf("CLI commands to be read from %s\n", 65881ef862bSAllain Legacy optarg); 65981ef862bSAllain Legacy snprintf(cmdline_filename, 66081ef862bSAllain Legacy sizeof(cmdline_filename), "%s", 66181ef862bSAllain Legacy optarg); 66281ef862bSAllain Legacy } 663ca7feb22SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "auto-start")) { 664ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 665ca7feb22SCyril Chemparathy auto_start = 1; 666ca7feb22SCyril Chemparathy } 66799cabef0SPablo de Lara if (!strcmp(lgopts[opt_idx].name, "tx-first")) { 66899cabef0SPablo de Lara printf("Ports to start sending a burst of " 66999cabef0SPablo de Lara "packets first\n"); 67099cabef0SPablo de Lara tx_first = 1; 67199cabef0SPablo de Lara } 672cfea1f30SPablo de Lara if (!strcmp(lgopts[opt_idx].name, "stats-period")) { 673cfea1f30SPablo de Lara char *end = NULL; 674cfea1f30SPablo de Lara unsigned int n; 675cfea1f30SPablo de Lara 676cfea1f30SPablo de Lara n = strtoul(optarg, &end, 10); 677cfea1f30SPablo de Lara if ((optarg[0] == '\0') || (end == NULL) || 678cfea1f30SPablo de Lara (*end != '\0')) 679cfea1f30SPablo de Lara break; 680cfea1f30SPablo de Lara 681cfea1f30SPablo de Lara stats_period = n; 682cfea1f30SPablo de Lara break; 683cfea1f30SPablo de Lara } 684af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 685af75078fSIntel "eth-peers-configfile")) { 686af75078fSIntel if (init_peer_eth_addrs(optarg) != 0) 687af75078fSIntel rte_exit(EXIT_FAILURE, 688af75078fSIntel "Cannot open logfile\n"); 689af75078fSIntel } 690af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "eth-peer")) { 691af75078fSIntel char *port_end; 692af75078fSIntel uint8_t c, peer_addr[6]; 693af75078fSIntel 694af75078fSIntel errno = 0; 695af75078fSIntel n = strtoul(optarg, &port_end, 10); 696af75078fSIntel if (errno != 0 || port_end == optarg || *port_end++ != ',') 697af75078fSIntel rte_exit(EXIT_FAILURE, 698af75078fSIntel "Invalid eth-peer: %s", optarg); 699af75078fSIntel if (n >= RTE_MAX_ETHPORTS) 700af75078fSIntel rte_exit(EXIT_FAILURE, 701af75078fSIntel "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n", 702af75078fSIntel n, RTE_MAX_ETHPORTS); 703af75078fSIntel 704aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, port_end, 705aaa662e7SAlan Carew &peer_addr, sizeof(peer_addr)) < 0) 706af75078fSIntel rte_exit(EXIT_FAILURE, 707af75078fSIntel "Invalid ethernet address: %s\n", 708af75078fSIntel port_end); 709af75078fSIntel for (c = 0; c < 6; c++) 710af75078fSIntel peer_eth_addrs[n].addr_bytes[c] = 711af75078fSIntel peer_addr[c]; 712af75078fSIntel nb_peer_eth_addrs++; 713af75078fSIntel } 7140d56cb81SThomas Monjalon #endif 715af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-ports")) { 716af75078fSIntel n = atoi(optarg); 7170a530f0dSYong Liu if (n > 0 && n <= nb_ports) 718f8244c63SZhiyong Yang nb_fwd_ports = n; 719af75078fSIntel else 720af75078fSIntel rte_exit(EXIT_FAILURE, 721edab33b1STetsuya Mukawa "Invalid port %d\n", n); 722af75078fSIntel } 723af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-cores")) { 724af75078fSIntel n = atoi(optarg); 725af75078fSIntel if (n > 0 && n <= nb_lcores) 726af75078fSIntel nb_fwd_lcores = (uint8_t) n; 727af75078fSIntel else 728af75078fSIntel rte_exit(EXIT_FAILURE, 729af75078fSIntel "nb-cores should be > 0 and <= %d\n", 730af75078fSIntel nb_lcores); 731af75078fSIntel } 732af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "coremask")) 733af75078fSIntel parse_fwd_coremask(optarg); 734af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "portmask")) 735af75078fSIntel parse_fwd_portmask(optarg); 736999b2ee0SBruce Richardson if (!strcmp(lgopts[opt_idx].name, "no-numa")) 737999b2ee0SBruce Richardson numa_support = 0; 738487f9a59SYulong Pei if (!strcmp(lgopts[opt_idx].name, "numa")) 739af75078fSIntel numa_support = 1; 740148f963fSBruce Richardson if (!strcmp(lgopts[opt_idx].name, "mp-anon")) { 741148f963fSBruce Richardson mp_anon = 1; 742148f963fSBruce Richardson } 743b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) { 744b6ea6408SIntel if (parse_portnuma_config(optarg)) 745b6ea6408SIntel rte_exit(EXIT_FAILURE, 746b6ea6408SIntel "invalid port-numa configuration\n"); 747b6ea6408SIntel } 748b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "ring-numa-config")) 749b6ea6408SIntel if (parse_ringnuma_config(optarg)) 750b6ea6408SIntel rte_exit(EXIT_FAILURE, 751b6ea6408SIntel "invalid ring-numa configuration\n"); 752b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "socket-num")) { 753b6ea6408SIntel n = atoi(optarg); 754c9cafcc8SShahaf Shuler if (!new_socket_id((uint8_t)n)) { 755b6ea6408SIntel socket_num = (uint8_t)n; 756c9cafcc8SShahaf Shuler } else { 757c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 758b6ea6408SIntel rte_exit(EXIT_FAILURE, 759c9cafcc8SShahaf Shuler "Invalid socket id"); 760c9cafcc8SShahaf Shuler } 761b6ea6408SIntel } 762af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) { 763af75078fSIntel n = atoi(optarg); 764af75078fSIntel if (n > 0 && n <= 0xFFFF) 765af75078fSIntel mbuf_data_size = (uint16_t) n; 766af75078fSIntel else 767af75078fSIntel rte_exit(EXIT_FAILURE, 768af75078fSIntel "mbuf-size should be > 0 and < 65536\n"); 769af75078fSIntel } 770c8798818SIntel if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) { 771c8798818SIntel n = atoi(optarg); 772c8798818SIntel if (n > 1024) 773c8798818SIntel param_total_num_mbufs = (unsigned)n; 774c8798818SIntel else 775c8798818SIntel rte_exit(EXIT_FAILURE, 776c8798818SIntel "total-num-mbufs should be > 1024\n"); 777c8798818SIntel } 778af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) { 779af75078fSIntel n = atoi(optarg); 780af75078fSIntel if (n >= ETHER_MIN_LEN) { 781af75078fSIntel rx_mode.max_rx_pkt_len = (uint32_t) n; 782af75078fSIntel if (n > ETHER_MAX_LEN) 7830074d02fSShahaf Shuler rx_offloads |= 7840074d02fSShahaf Shuler DEV_RX_OFFLOAD_JUMBO_FRAME; 785af75078fSIntel } else 786af75078fSIntel rte_exit(EXIT_FAILURE, 787af75078fSIntel "Invalid max-pkt-len=%d - should be > %d\n", 788af75078fSIntel n, ETHER_MIN_LEN); 789af75078fSIntel } 790af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) { 791af75078fSIntel if (!strcmp(optarg, "signature")) 792af75078fSIntel fdir_conf.mode = 793af75078fSIntel RTE_FDIR_MODE_SIGNATURE; 794af75078fSIntel else if (!strcmp(optarg, "perfect")) 795af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_PERFECT; 7969276b982SWenzhuo Lu else if (!strcmp(optarg, "perfect-mac-vlan")) 7979276b982SWenzhuo Lu fdir_conf.mode = RTE_FDIR_MODE_PERFECT_MAC_VLAN; 7989276b982SWenzhuo Lu else if (!strcmp(optarg, "perfect-tunnel")) 7999276b982SWenzhuo Lu fdir_conf.mode = RTE_FDIR_MODE_PERFECT_TUNNEL; 800af75078fSIntel else if (!strcmp(optarg, "none")) 801af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_NONE; 802af75078fSIntel else 803af75078fSIntel rte_exit(EXIT_FAILURE, 804af75078fSIntel "pkt-mode-invalid %s invalid - must be: " 8059276b982SWenzhuo Lu "none, signature, perfect, perfect-mac-vlan" 8069276b982SWenzhuo Lu " or perfect-tunnel\n", 807af75078fSIntel optarg); 808af75078fSIntel } 809af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 810af75078fSIntel "pkt-filter-report-hash")) { 811af75078fSIntel if (!strcmp(optarg, "none")) 812af75078fSIntel fdir_conf.status = 813af75078fSIntel RTE_FDIR_NO_REPORT_STATUS; 814af75078fSIntel else if (!strcmp(optarg, "match")) 815af75078fSIntel fdir_conf.status = 816af75078fSIntel RTE_FDIR_REPORT_STATUS; 817af75078fSIntel else if (!strcmp(optarg, "always")) 818af75078fSIntel fdir_conf.status = 819af75078fSIntel RTE_FDIR_REPORT_STATUS_ALWAYS; 820af75078fSIntel else 821af75078fSIntel rte_exit(EXIT_FAILURE, 822af75078fSIntel "pkt-filter-report-hash %s invalid " 823af75078fSIntel "- must be: none or match or always\n", 824af75078fSIntel optarg); 825af75078fSIntel } 826af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) { 827af75078fSIntel if (!strcmp(optarg, "64K")) 828af75078fSIntel fdir_conf.pballoc = 829af75078fSIntel RTE_FDIR_PBALLOC_64K; 830af75078fSIntel else if (!strcmp(optarg, "128K")) 831af75078fSIntel fdir_conf.pballoc = 832af75078fSIntel RTE_FDIR_PBALLOC_128K; 833af75078fSIntel else if (!strcmp(optarg, "256K")) 834af75078fSIntel fdir_conf.pballoc = 835af75078fSIntel RTE_FDIR_PBALLOC_256K; 836af75078fSIntel else 837af75078fSIntel rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -" 838af75078fSIntel " must be: 64K or 128K or 256K\n", 839af75078fSIntel optarg); 840af75078fSIntel } 841af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 842af75078fSIntel "pkt-filter-drop-queue")) { 843af75078fSIntel n = atoi(optarg); 844af75078fSIntel if (n >= 0) 845af75078fSIntel fdir_conf.drop_queue = (uint8_t) n; 846af75078fSIntel else 847af75078fSIntel rte_exit(EXIT_FAILURE, 848af75078fSIntel "drop queue %d invalid - must" 849af75078fSIntel "be >= 0 \n", n); 850af75078fSIntel } 85162d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 85262d3216dSReshma Pattan if (!strcmp(lgopts[opt_idx].name, 85362d3216dSReshma Pattan "latencystats")) { 85462d3216dSReshma Pattan n = atoi(optarg); 85562d3216dSReshma Pattan if (n >= 0) { 85662d3216dSReshma Pattan latencystats_lcore_id = (lcoreid_t) n; 85762d3216dSReshma Pattan latencystats_enabled = 1; 85862d3216dSReshma Pattan } else 85962d3216dSReshma Pattan rte_exit(EXIT_FAILURE, 86062d3216dSReshma Pattan "invalid lcore id %d for latencystats" 86162d3216dSReshma Pattan " must be >= 0\n", n); 86262d3216dSReshma Pattan } 86362d3216dSReshma Pattan #endif 864e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE 865e25e6c70SRemy Horton if (!strcmp(lgopts[opt_idx].name, "bitrate-stats")) { 866e25e6c70SRemy Horton n = atoi(optarg); 867e25e6c70SRemy Horton if (n >= 0) { 868e25e6c70SRemy Horton bitrate_lcore_id = (lcoreid_t) n; 869e25e6c70SRemy Horton bitrate_enabled = 1; 870e25e6c70SRemy Horton } else 871e25e6c70SRemy Horton rte_exit(EXIT_FAILURE, 872e25e6c70SRemy Horton "invalid lcore id %d for bitrate stats" 873e25e6c70SRemy Horton " must be >= 0\n", n); 874e25e6c70SRemy Horton } 875e25e6c70SRemy Horton #endif 87679dd163fSJeff Guo if (!strcmp(lgopts[opt_idx].name, "disable-crc-strip")) 8770074d02fSShahaf Shuler rx_offloads &= ~DEV_RX_OFFLOAD_CRC_STRIP; 8784c3ea508SOlivier Matz if (!strcmp(lgopts[opt_idx].name, "enable-lro")) 8790074d02fSShahaf Shuler rx_offloads |= DEV_RX_OFFLOAD_TCP_LRO; 88004997938SMaciej Czekaj if (!strcmp(lgopts[opt_idx].name, "enable-scatter")) 8810074d02fSShahaf Shuler rx_offloads |= DEV_RX_OFFLOAD_SCATTER; 882af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum")) 8830074d02fSShahaf Shuler rx_offloads |= DEV_RX_OFFLOAD_CHECKSUM; 884912267a3SRaslan Darawsheh if (!strcmp(lgopts[opt_idx].name, 885912267a3SRaslan Darawsheh "enable-rx-timestamp")) 8860074d02fSShahaf Shuler rx_offloads |= DEV_RX_OFFLOAD_TIMESTAMP; 8870074d02fSShahaf Shuler if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) 8880074d02fSShahaf Shuler rx_offloads &= ~DEV_RX_OFFLOAD_VLAN; 889a47aa8b9SIntel 890c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 891c9dd4aadSOuyang Changchun "disable-hw-vlan-filter")) 8920074d02fSShahaf Shuler rx_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER; 893c9dd4aadSOuyang Changchun 894c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 895c9dd4aadSOuyang Changchun "disable-hw-vlan-strip")) 8960074d02fSShahaf Shuler rx_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP; 897c9dd4aadSOuyang Changchun 898c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 899c9dd4aadSOuyang Changchun "disable-hw-vlan-extend")) 9000074d02fSShahaf Shuler rx_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND; 901c9dd4aadSOuyang Changchun 902ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "enable-drop-en")) 903ce8d5614SIntel rx_drop_en = 1; 904ce8d5614SIntel 905af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "disable-rss")) 906af75078fSIntel rss_hf = 0; 907af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "port-topology")) { 908af75078fSIntel if (!strcmp(optarg, "paired")) 909af75078fSIntel port_topology = PORT_TOPOLOGY_PAIRED; 910af75078fSIntel else if (!strcmp(optarg, "chained")) 911af75078fSIntel port_topology = PORT_TOPOLOGY_CHAINED; 9123e2006d6SCyril Chemparathy else if (!strcmp(optarg, "loop")) 9133e2006d6SCyril Chemparathy port_topology = PORT_TOPOLOGY_LOOP; 914af75078fSIntel else 915af75078fSIntel rte_exit(EXIT_FAILURE, "port-topology %s invalid -" 91675358833SPablo de Lara " must be: paired, chained or loop\n", 917af75078fSIntel optarg); 918af75078fSIntel } 919ce9b9fb0SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "forward-mode")) 920ce9b9fb0SCyril Chemparathy set_pkt_forwarding_mode(optarg); 921af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-ip")) 9228a387fa8SHelin Zhang rss_hf = ETH_RSS_IP; 923af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-udp")) 9248a387fa8SHelin Zhang rss_hf = ETH_RSS_UDP; 925af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxq")) { 926af75078fSIntel n = atoi(optarg); 9275a8fb55cSReshma Pattan if (n >= 0 && n <= (int) MAX_QUEUE_ID) 928af75078fSIntel nb_rxq = (queueid_t) n; 929af75078fSIntel else 930af75078fSIntel rte_exit(EXIT_FAILURE, "rxq %d invalid - must be" 9315a8fb55cSReshma Pattan " >= 0 && <= %d\n", n, 932af75078fSIntel (int) MAX_QUEUE_ID); 933af75078fSIntel } 934af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txq")) { 935af75078fSIntel n = atoi(optarg); 9365a8fb55cSReshma Pattan if (n >= 0 && n <= (int) MAX_QUEUE_ID) 937af75078fSIntel nb_txq = (queueid_t) n; 938af75078fSIntel else 939af75078fSIntel rte_exit(EXIT_FAILURE, "txq %d invalid - must be" 9405a8fb55cSReshma Pattan " >= 0 && <= %d\n", n, 941af75078fSIntel (int) MAX_QUEUE_ID); 942af75078fSIntel } 9435a8fb55cSReshma Pattan if (!nb_rxq && !nb_txq) { 9445a8fb55cSReshma Pattan rte_exit(EXIT_FAILURE, "Either rx or tx queues should " 9455a8fb55cSReshma Pattan "be non-zero\n"); 9465a8fb55cSReshma Pattan } 947af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "burst")) { 948af75078fSIntel n = atoi(optarg); 949af75078fSIntel if ((n >= 1) && (n <= MAX_PKT_BURST)) 950af75078fSIntel nb_pkt_per_burst = (uint16_t) n; 951af75078fSIntel else 952af75078fSIntel rte_exit(EXIT_FAILURE, 953af75078fSIntel "burst must >= 1 and <= %d]", 954af75078fSIntel MAX_PKT_BURST); 955af75078fSIntel } 956af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbcache")) { 957af75078fSIntel n = atoi(optarg); 958af75078fSIntel if ((n >= 0) && 959af75078fSIntel (n <= RTE_MEMPOOL_CACHE_MAX_SIZE)) 960af75078fSIntel mb_mempool_cache = (uint16_t) n; 961af75078fSIntel else 962af75078fSIntel rte_exit(EXIT_FAILURE, 963af75078fSIntel "mbcache must be >= 0 and <= %d\n", 964af75078fSIntel RTE_MEMPOOL_CACHE_MAX_SIZE); 965af75078fSIntel } 966af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txfreet")) { 967af75078fSIntel n = atoi(optarg); 968af75078fSIntel if (n >= 0) 969f2c5125aSPablo de Lara tx_free_thresh = (int16_t)n; 970af75078fSIntel else 971af75078fSIntel rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n"); 972af75078fSIntel } 973af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txrst")) { 974af75078fSIntel n = atoi(optarg); 975af75078fSIntel if (n >= 0) 976f2c5125aSPablo de Lara tx_rs_thresh = (int16_t)n; 977af75078fSIntel else 978af75078fSIntel rte_exit(EXIT_FAILURE, "txrst must be >= 0\n"); 979af75078fSIntel } 980ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "txqflags")) { 981ce8d5614SIntel char *end = NULL; 982ce8d5614SIntel n = strtoul(optarg, &end, 16); 983ce8d5614SIntel if (n >= 0) 984f2c5125aSPablo de Lara txq_flags = (int32_t)n; 985ce8d5614SIntel else 986ce8d5614SIntel rte_exit(EXIT_FAILURE, 987ce8d5614SIntel "txqflags must be >= 0\n"); 988ce8d5614SIntel } 989af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 990af75078fSIntel n = atoi(optarg); 991af75078fSIntel if (n > 0) { 992af75078fSIntel if (rx_free_thresh >= n) 993af75078fSIntel rte_exit(EXIT_FAILURE, 994af75078fSIntel "rxd must be > " 995af75078fSIntel "rx_free_thresh(%d)\n", 996af75078fSIntel (int)rx_free_thresh); 997af75078fSIntel else 998af75078fSIntel nb_rxd = (uint16_t) n; 999af75078fSIntel } else 1000af75078fSIntel rte_exit(EXIT_FAILURE, 1001af75078fSIntel "rxd(%d) invalid - must be > 0\n", 1002af75078fSIntel n); 1003af75078fSIntel } 1004af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 1005af75078fSIntel n = atoi(optarg); 1006af75078fSIntel if (n > 0) 1007af75078fSIntel nb_txd = (uint16_t) n; 1008af75078fSIntel else 1009af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 1010af75078fSIntel } 1011af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 1012af75078fSIntel n = atoi(optarg); 1013af75078fSIntel if (n >= 0) 1014f2c5125aSPablo de Lara tx_pthresh = (int8_t)n; 1015af75078fSIntel else 1016af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 1017af75078fSIntel } 1018af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 1019af75078fSIntel n = atoi(optarg); 1020af75078fSIntel if (n >= 0) 1021f2c5125aSPablo de Lara tx_hthresh = (int8_t)n; 1022af75078fSIntel else 1023af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 1024af75078fSIntel } 1025af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 1026af75078fSIntel n = atoi(optarg); 1027af75078fSIntel if (n >= 0) 1028f2c5125aSPablo de Lara tx_wthresh = (int8_t)n; 1029af75078fSIntel else 1030af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 1031af75078fSIntel } 1032af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 1033af75078fSIntel n = atoi(optarg); 1034af75078fSIntel if (n >= 0) 1035f2c5125aSPablo de Lara rx_pthresh = (int8_t)n; 1036af75078fSIntel else 1037af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 1038af75078fSIntel } 1039af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 1040af75078fSIntel n = atoi(optarg); 1041af75078fSIntel if (n >= 0) 1042f2c5125aSPablo de Lara rx_hthresh = (int8_t)n; 1043af75078fSIntel else 1044af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 1045af75078fSIntel } 1046af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 1047af75078fSIntel n = atoi(optarg); 1048af75078fSIntel if (n >= 0) 1049f2c5125aSPablo de Lara rx_wthresh = (int8_t)n; 1050af75078fSIntel else 1051af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 1052af75078fSIntel } 1053af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxfreet")) { 1054af75078fSIntel n = atoi(optarg); 1055af75078fSIntel if (n >= 0) 1056f2c5125aSPablo de Lara rx_free_thresh = (int16_t)n; 1057af75078fSIntel else 1058af75078fSIntel rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n"); 1059af75078fSIntel } 1060ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) { 1061ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, TX)) { 1062ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1063ed30d9b6SIntel "invalid TX queue statistics mapping config entered\n"); 1064ed30d9b6SIntel } 1065ed30d9b6SIntel } 1066ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) { 1067ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, RX)) { 1068ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1069ed30d9b6SIntel "invalid RX queue statistics mapping config entered\n"); 1070ed30d9b6SIntel } 1071ed30d9b6SIntel } 1072a7e7bb4eSCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "txpkts")) { 1073a7e7bb4eSCyril Chemparathy unsigned seg_lengths[RTE_MAX_SEGS_PER_PKT]; 1074a7e7bb4eSCyril Chemparathy unsigned int nb_segs; 1075a7e7bb4eSCyril Chemparathy 1076950d1516SBruce Richardson nb_segs = parse_item_list(optarg, "txpkt segments", 1077950d1516SBruce Richardson RTE_MAX_SEGS_PER_PKT, seg_lengths, 0); 1078a7e7bb4eSCyril Chemparathy if (nb_segs > 0) 1079a7e7bb4eSCyril Chemparathy set_tx_pkt_segments(seg_lengths, nb_segs); 1080a7e7bb4eSCyril Chemparathy else 1081a7e7bb4eSCyril Chemparathy rte_exit(EXIT_FAILURE, "bad txpkts\n"); 1082a7e7bb4eSCyril Chemparathy } 10837741e4cfSIntel if (!strcmp(lgopts[opt_idx].name, "no-flush-rx")) 10847741e4cfSIntel no_flush_rx = 1; 1085bc202406SDavid Marchand if (!strcmp(lgopts[opt_idx].name, "disable-link-check")) 1086bc202406SDavid Marchand no_link_check = 1; 10878ea656f8SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "no-lsc-interrupt")) 10888ea656f8SGaetan Rivet lsc_interrupt = 0; 1089284c908cSGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "no-rmv-interrupt")) 1090284c908cSGaetan Rivet rmv_interrupt = 0; 10917ee3e944SVasily Philipov if (!strcmp(lgopts[opt_idx].name, "flow-isolate-all")) 10927ee3e944SVasily Philipov flow_isolate_all = 1; 1093*fd8c20aaSShahaf Shuler if (!strcmp(lgopts[opt_idx].name, "tx-offloads")) { 1094*fd8c20aaSShahaf Shuler char *end = NULL; 1095*fd8c20aaSShahaf Shuler n = strtoull(optarg, &end, 16); 1096*fd8c20aaSShahaf Shuler if (n >= 0) 1097*fd8c20aaSShahaf Shuler tx_offloads = (uint64_t)n; 1098*fd8c20aaSShahaf Shuler else 1099*fd8c20aaSShahaf Shuler rte_exit(EXIT_FAILURE, 1100*fd8c20aaSShahaf Shuler "tx-offloads must be >= 0\n"); 1101*fd8c20aaSShahaf Shuler } 11023af72783SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "print-event")) 11033af72783SGaetan Rivet if (parse_event_printing_config(optarg, 1)) { 11043af72783SGaetan Rivet rte_exit(EXIT_FAILURE, 11053af72783SGaetan Rivet "invalid print-event argument\n"); 11063af72783SGaetan Rivet } 11073af72783SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "mask-event")) 11083af72783SGaetan Rivet if (parse_event_printing_config(optarg, 0)) { 11093af72783SGaetan Rivet rte_exit(EXIT_FAILURE, 11103af72783SGaetan Rivet "invalid mask-event argument\n"); 11113af72783SGaetan Rivet } 11127741e4cfSIntel 1113af75078fSIntel break; 1114af75078fSIntel case 'h': 1115af75078fSIntel usage(argv[0]); 1116af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 1117af75078fSIntel break; 1118af75078fSIntel default: 1119af75078fSIntel usage(argv[0]); 1120af75078fSIntel rte_exit(EXIT_FAILURE, 1121af75078fSIntel "Command line is incomplete or incorrect\n"); 1122af75078fSIntel break; 1123af75078fSIntel } 1124af75078fSIntel } 11250074d02fSShahaf Shuler 11260074d02fSShahaf Shuler /* Set offload configuration from command line parameters. */ 11270074d02fSShahaf Shuler rx_mode.offloads = rx_offloads; 1128*fd8c20aaSShahaf Shuler tx_mode.offloads = tx_offloads; 1129af75078fSIntel } 1130