1af75078fSIntel /*- 2af75078fSIntel * BSD LICENSE 3af75078fSIntel * 462d3216dSReshma Pattan * Copyright(c) 2010-2017 Intel Corporation. All rights reserved. 5af75078fSIntel * All rights reserved. 6af75078fSIntel * 7af75078fSIntel * Redistribution and use in source and binary forms, with or without 8af75078fSIntel * modification, are permitted provided that the following conditions 9af75078fSIntel * are met: 10af75078fSIntel * 11af75078fSIntel * * Redistributions of source code must retain the above copyright 12af75078fSIntel * notice, this list of conditions and the following disclaimer. 13af75078fSIntel * * Redistributions in binary form must reproduce the above copyright 14af75078fSIntel * notice, this list of conditions and the following disclaimer in 15af75078fSIntel * the documentation and/or other materials provided with the 16af75078fSIntel * distribution. 17af75078fSIntel * * Neither the name of Intel Corporation nor the names of its 18af75078fSIntel * contributors may be used to endorse or promote products derived 19af75078fSIntel * from this software without specific prior written permission. 20af75078fSIntel * 21af75078fSIntel * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22af75078fSIntel * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23af75078fSIntel * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24af75078fSIntel * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25af75078fSIntel * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26af75078fSIntel * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27af75078fSIntel * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28af75078fSIntel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29af75078fSIntel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30af75078fSIntel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31af75078fSIntel * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32af75078fSIntel */ 33af75078fSIntel 34af75078fSIntel #include <errno.h> 35af75078fSIntel #include <getopt.h> 36af75078fSIntel #include <stdarg.h> 37af75078fSIntel #include <stdio.h> 38af75078fSIntel #include <stdlib.h> 39af75078fSIntel #include <signal.h> 40af75078fSIntel #include <string.h> 41af75078fSIntel #include <time.h> 42af75078fSIntel #include <fcntl.h> 43af75078fSIntel #include <sys/types.h> 44af75078fSIntel #include <errno.h> 45af75078fSIntel 46af75078fSIntel #include <sys/queue.h> 47af75078fSIntel #include <sys/stat.h> 48af75078fSIntel 49af75078fSIntel #include <stdint.h> 50af75078fSIntel #include <unistd.h> 51af75078fSIntel #include <inttypes.h> 52af75078fSIntel 53af75078fSIntel #include <rte_common.h> 54af75078fSIntel #include <rte_byteorder.h> 55af75078fSIntel #include <rte_log.h> 56af75078fSIntel #include <rte_debug.h> 57af75078fSIntel #include <rte_cycles.h> 58af75078fSIntel #include <rte_memory.h> 59af75078fSIntel #include <rte_memzone.h> 60af75078fSIntel #include <rte_launch.h> 61af75078fSIntel #include <rte_eal.h> 62af75078fSIntel #include <rte_per_lcore.h> 63af75078fSIntel #include <rte_lcore.h> 64af75078fSIntel #include <rte_atomic.h> 65af75078fSIntel #include <rte_branch_prediction.h> 66af75078fSIntel #include <rte_mempool.h> 67af75078fSIntel #include <rte_interrupts.h> 68af75078fSIntel #include <rte_pci.h> 69af75078fSIntel #include <rte_ether.h> 70af75078fSIntel #include <rte_ethdev.h> 71af75078fSIntel #include <rte_string_fns.h> 720d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 73af75078fSIntel #include <cmdline_parse.h> 74af75078fSIntel #include <cmdline_parse_etheraddr.h> 750d56cb81SThomas Monjalon #endif 762950a769SDeclan Doherty #ifdef RTE_LIBRTE_PMD_BOND 772950a769SDeclan Doherty #include <rte_eth_bond.h> 782950a769SDeclan Doherty #endif 79938a184aSAdrien Mazarguil #include <rte_flow.h> 80af75078fSIntel 81af75078fSIntel #include "testpmd.h" 82af75078fSIntel 83af75078fSIntel static void 84af75078fSIntel usage(char* progname) 85af75078fSIntel { 860d56cb81SThomas Monjalon printf("usage: %s " 870d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 880d56cb81SThomas Monjalon "[--interactive|-i] " 8981ef862bSAllain Legacy "[--cmdline-file=FILENAME] " 900d56cb81SThomas Monjalon #endif 91ca7feb22SCyril Chemparathy "[--help|-h] | [--auto-start|-a] | [" 92*cfea1f30SPablo de Lara "--tx-first | --stats-period=PERIOD | " 93af75078fSIntel "--coremask=COREMASK --portmask=PORTMASK --numa " 94c8798818SIntel "--mbuf-size= | --total-num-mbufs= | " 953be52ffcSIntel "--nb-cores= | --nb-ports= | " 960d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 97af75078fSIntel "--eth-peers-configfile= | " 983be52ffcSIntel "--eth-peer=X,M:M:M:M:M:M | " 990d56cb81SThomas Monjalon #endif 100af75078fSIntel "--pkt-filter-mode= |" 101af75078fSIntel "--rss-ip | --rss-udp | " 102af75078fSIntel "--rxpt= | --rxht= | --rxwt= | --rxfreet= | " 103af75078fSIntel "--txpt= | --txht= | --txwt= | --txfreet= | " 104ce8d5614SIntel "--txrst= | --txqflags= ]\n", 105af75078fSIntel progname); 1060d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1073be52ffcSIntel printf(" --interactive: run in interactive mode.\n"); 10881ef862bSAllain Legacy printf(" --cmdline-file: execute cli commands before startup.\n"); 1090d56cb81SThomas Monjalon #endif 110ca7feb22SCyril Chemparathy printf(" --auto-start: start forwarding on init " 111ca7feb22SCyril Chemparathy "[always when non-interactive].\n"); 1123be52ffcSIntel printf(" --help: display this message and quit.\n"); 11399cabef0SPablo de Lara printf(" --tx-first: start forwarding sending a burst first " 11499cabef0SPablo de Lara "(only if interactive is disabled).\n"); 115*cfea1f30SPablo de Lara printf(" --stats-period=PERIOD: statistics will be shown " 116*cfea1f30SPablo de Lara "every PERIOD seconds (only if interactive is disabled).\n"); 1173be52ffcSIntel printf(" --nb-cores=N: set the number of forwarding cores " 1183be52ffcSIntel "(1 <= N <= %d).\n", nb_lcores); 1193be52ffcSIntel printf(" --nb-ports=N: set the number of forwarding ports " 1203be52ffcSIntel "(1 <= N <= %d).\n", nb_ports); 121af75078fSIntel printf(" --coremask=COREMASK: hexadecimal bitmask of cores running " 122013af9b6SIntel "the packet forwarding test. The master lcore is reserved for " 1233be52ffcSIntel "command line parsing only, and cannot be masked on for " 1243be52ffcSIntel "packet forwarding.\n"); 125af75078fSIntel printf(" --portmask=PORTMASK: hexadecimal bitmask of ports used " 1263be52ffcSIntel "by the packet forwarding test.\n"); 127af75078fSIntel printf(" --numa: enable NUMA-aware allocation of RX/TX rings and of " 1283be52ffcSIntel "RX memory buffers (mbufs).\n"); 129b6ea6408SIntel printf(" --port-numa-config=(port,socket)[,(port,socket)]: " 130b6ea6408SIntel "specify the socket on which the memory pool " 131b6ea6408SIntel "used by the port will be allocated.\n"); 132b6ea6408SIntel printf(" --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: " 133b6ea6408SIntel "specify the socket on which the TX/RX rings for " 134b6ea6408SIntel "the port will be allocated " 135b6ea6408SIntel "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n"); 136b6ea6408SIntel printf(" --socket-num=N: set socket from which all memory is allocated " 137b6ea6408SIntel "in NUMA mode.\n"); 1383be52ffcSIntel printf(" --mbuf-size=N: set the data size of mbuf to N bytes.\n"); 1393be52ffcSIntel printf(" --total-num-mbufs=N: set the number of mbufs to be allocated " 1403be52ffcSIntel "in mbuf pools.\n"); 1413be52ffcSIntel printf(" --max-pkt-len=N: set the maximum size of packet to N bytes.\n"); 1420d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1433be52ffcSIntel printf(" --eth-peers-configfile=name: config file with ethernet addresses " 1443be52ffcSIntel "of peer ports.\n"); 1453be52ffcSIntel printf(" --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer " 1463be52ffcSIntel "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS); 1470d56cb81SThomas Monjalon #endif 1483be52ffcSIntel printf(" --pkt-filter-mode=N: set Flow Director mode " 1493be52ffcSIntel "(N: none (default mode) or signature or perfect).\n"); 1503be52ffcSIntel printf(" --pkt-filter-report-hash=N: set Flow Director report mode " 1513be52ffcSIntel "(N: none or match (default) or always).\n"); 1523be52ffcSIntel printf(" --pkt-filter-size=N: set Flow Director mode " 1533be52ffcSIntel "(N: 64K (default mode) or 128K or 256K).\n"); 154af75078fSIntel printf(" --pkt-filter-drop-queue=N: set drop-queue. " 1553be52ffcSIntel "In perfect mode, when you add a rule with queue = -1 " 156af75078fSIntel "the packet will be enqueued into the rx drop-queue. " 157af75078fSIntel "If the drop-queue doesn't exist, the packet is dropped. " 1583be52ffcSIntel "By default drop-queue=127.\n"); 15962d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 16062d3216dSReshma Pattan printf(" --latencystats=N: enable latency and jitter statistcs " 16162d3216dSReshma Pattan "monitoring on forwarding lcore id N.\n"); 16262d3216dSReshma Pattan #endif 16379dd163fSJeff Guo printf(" --disable-crc-strip: disable CRC stripping by hardware.\n"); 1644c3ea508SOlivier Matz printf(" --enable-lro: enable large receive offload.\n"); 1653be52ffcSIntel printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n"); 1663be52ffcSIntel printf(" --disable-hw-vlan: disable hardware vlan.\n"); 167c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n"); 168c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n"); 169c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-extend: disable hardware vlan extend.\n"); 1703be52ffcSIntel printf(" --enable-drop-en: enable per queue packet drop.\n"); 1713be52ffcSIntel printf(" --disable-rss: disable rss.\n"); 172af75078fSIntel printf(" --port-topology=N: set port topology (N: paired (default) or " 1733be52ffcSIntel "chained).\n"); 174769ce6b1SThomas Monjalon printf(" --forward-mode=N: set forwarding mode (N: %s).\n", 175769ce6b1SThomas Monjalon list_pkt_forwarding_modes()); 1763be52ffcSIntel printf(" --rss-ip: set RSS functions to IPv4/IPv6 only .\n"); 1773be52ffcSIntel printf(" --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n"); 1783be52ffcSIntel printf(" --rxq=N: set the number of RX queues per port to N.\n"); 1793be52ffcSIntel printf(" --rxd=N: set the number of descriptors in RX rings to N.\n"); 1803be52ffcSIntel printf(" --txq=N: set the number of TX queues per port to N.\n"); 1813be52ffcSIntel printf(" --txd=N: set the number of descriptors in TX rings to N.\n"); 1823be52ffcSIntel printf(" --burst=N: set the number of packets per burst to N.\n"); 1833be52ffcSIntel printf(" --mbcache=N: set the cache of mbuf memory pool to N.\n"); 18457af3415SPablo de Lara printf(" --rxpt=N: set prefetch threshold register of RX rings to N.\n"); 18557af3415SPablo de Lara printf(" --rxht=N: set the host threshold register of RX rings to N.\n"); 1863be52ffcSIntel printf(" --rxfreet=N: set the free threshold of RX descriptors to N " 1873be52ffcSIntel "(0 <= N < value of rxd).\n"); 18857af3415SPablo de Lara printf(" --rxwt=N: set the write-back threshold register of RX rings to N.\n"); 18957af3415SPablo de Lara printf(" --txpt=N: set the prefetch threshold register of TX rings to N.\n"); 19057af3415SPablo de Lara printf(" --txht=N: set the nhost threshold register of TX rings to N.\n"); 19157af3415SPablo de Lara printf(" --txwt=N: set the write-back threshold register of TX rings to N.\n"); 1923be52ffcSIntel printf(" --txfreet=N: set the transmit free threshold of TX rings to N " 1933be52ffcSIntel "(0 <= N <= value of txd).\n"); 1943be52ffcSIntel printf(" --txrst=N: set the transmit RS bit threshold of TX rings to N " 1953be52ffcSIntel "(0 <= N <= value of txd).\n"); 1963be52ffcSIntel printf(" --txqflags=0xXXXXXXXX: hexadecimal bitmask of TX queue flags " 1973be52ffcSIntel "(0 <= N <= 0x7FFFFFFF).\n"); 1983be52ffcSIntel printf(" --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 199ed30d9b6SIntel "tx queues statistics counters mapping " 2003be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 2013be52ffcSIntel printf(" --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 202ed30d9b6SIntel "rx queues statistics counters mapping " 2033be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 2045e2ee196SIntel printf(" --no-flush-rx: Don't flush RX streams before forwarding." 2055e2ee196SIntel " Used mainly with PCAP drivers.\n"); 2062ebacaa7SMaciej Czekaj printf(" --txpkts=X[,Y]*: set TX segment sizes" 2072ebacaa7SMaciej Czekaj " or total packet length.\n"); 208bc202406SDavid Marchand printf(" --disable-link-check: disable check on link status when " 209bc202406SDavid Marchand "starting/stopping ports.\n"); 2108ea656f8SGaetan Rivet printf(" --no-lsc-interrupt: disable link status change interrupt.\n"); 211e25e6c70SRemy Horton printf(" --no-rmv-interrupt: disable device removal interrupt.\n"); 212e25e6c70SRemy Horton printf(" --bitrate-stats=N: set the logical core N to perform " 213e25e6c70SRemy Horton "bit-rate calculation.\n"); 214b6b63dfdSGaetan Rivet printf(" --print-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: " 215b6b63dfdSGaetan Rivet "enable print of designated event or all of them."); 216b6b63dfdSGaetan Rivet printf(" --mask-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: " 217b6b63dfdSGaetan Rivet "disable print of designated event or all of them."); 218af75078fSIntel } 219af75078fSIntel 2200d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 221af75078fSIntel static int 222af75078fSIntel init_peer_eth_addrs(char *config_filename) 223af75078fSIntel { 224af75078fSIntel FILE *config_file; 225af75078fSIntel portid_t i; 226af75078fSIntel char buf[50]; 227af75078fSIntel 228af75078fSIntel config_file = fopen(config_filename, "r"); 229af75078fSIntel if (config_file == NULL) { 2303be52ffcSIntel perror("Failed to open eth config file\n"); 231af75078fSIntel return -1; 232af75078fSIntel } 233af75078fSIntel 234af75078fSIntel for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 235af75078fSIntel 236af75078fSIntel if (fgets(buf, sizeof(buf), config_file) == NULL) 237af75078fSIntel break; 238af75078fSIntel 239aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i], 240aaa662e7SAlan Carew sizeof(peer_eth_addrs[i])) < 0) { 2413be52ffcSIntel printf("Bad MAC address format on line %d\n", i+1); 242af75078fSIntel fclose(config_file); 243af75078fSIntel return -1; 244af75078fSIntel } 245af75078fSIntel } 246af75078fSIntel fclose(config_file); 247af75078fSIntel nb_peer_eth_addrs = (portid_t) i; 248af75078fSIntel return 0; 249af75078fSIntel } 2500d56cb81SThomas Monjalon #endif 251af75078fSIntel 252af75078fSIntel /* 253af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 254af75078fSIntel * the global configuration of forwarding cores. 255af75078fSIntel */ 256af75078fSIntel static void 257af75078fSIntel parse_fwd_coremask(const char *coremask) 258af75078fSIntel { 259af75078fSIntel char *end; 260af75078fSIntel unsigned long long int cm; 261af75078fSIntel 262af75078fSIntel /* parse hexadecimal string */ 263af75078fSIntel end = NULL; 264af75078fSIntel cm = strtoull(coremask, &end, 16); 265af75078fSIntel if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0')) 266af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n"); 267013af9b6SIntel else if (set_fwd_lcores_mask((uint64_t) cm) < 0) 268013af9b6SIntel rte_exit(EXIT_FAILURE, "coremask is not valid\n"); 269af75078fSIntel } 270af75078fSIntel 271af75078fSIntel /* 272af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 273af75078fSIntel * the global configuration of forwarding cores. 274af75078fSIntel */ 275af75078fSIntel static void 276af75078fSIntel parse_fwd_portmask(const char *portmask) 277af75078fSIntel { 278af75078fSIntel char *end; 279af75078fSIntel unsigned long long int pm; 280af75078fSIntel 281af75078fSIntel /* parse hexadecimal string */ 282af75078fSIntel end = NULL; 283af75078fSIntel pm = strtoull(portmask, &end, 16); 284af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 285af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n"); 286af75078fSIntel else 287af75078fSIntel set_fwd_ports_mask((uint64_t) pm); 288af75078fSIntel } 289af75078fSIntel 290ed30d9b6SIntel 291ed30d9b6SIntel static int 292ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx) 293ed30d9b6SIntel { 294ed30d9b6SIntel char s[256]; 295ed30d9b6SIntel const char *p, *p0 = q_arg; 296ed30d9b6SIntel char *end; 297ed30d9b6SIntel enum fieldnames { 298ed30d9b6SIntel FLD_PORT = 0, 299ed30d9b6SIntel FLD_QUEUE, 300ed30d9b6SIntel FLD_STATS_COUNTER, 301ed30d9b6SIntel _NUM_FLD 302ed30d9b6SIntel }; 303ed30d9b6SIntel unsigned long int_fld[_NUM_FLD]; 304ed30d9b6SIntel char *str_fld[_NUM_FLD]; 305ed30d9b6SIntel int i; 306ed30d9b6SIntel unsigned size; 307ed30d9b6SIntel 308ed30d9b6SIntel /* reset from value set at definition */ 309ed30d9b6SIntel is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0); 310ed30d9b6SIntel 311ed30d9b6SIntel while ((p = strchr(p0,'(')) != NULL) { 312ed30d9b6SIntel ++p; 313ed30d9b6SIntel if((p0 = strchr(p,')')) == NULL) 314ed30d9b6SIntel return -1; 315ed30d9b6SIntel 316ed30d9b6SIntel size = p0 - p; 317ed30d9b6SIntel if(size >= sizeof(s)) 318ed30d9b6SIntel return -1; 319ed30d9b6SIntel 3206f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 321ed30d9b6SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 322ed30d9b6SIntel return -1; 323ed30d9b6SIntel for (i = 0; i < _NUM_FLD; i++){ 324ed30d9b6SIntel errno = 0; 325ed30d9b6SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 326ed30d9b6SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 327ed30d9b6SIntel return -1; 328ed30d9b6SIntel } 329ed30d9b6SIntel /* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */ 330ed30d9b6SIntel if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) { 331ed30d9b6SIntel printf("Stats counter not in the correct range 0..%d\n", 332ed30d9b6SIntel RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 333ed30d9b6SIntel return -1; 334ed30d9b6SIntel } 335ed30d9b6SIntel 3364dccdc78SBruce Richardson if (!is_rx) { 3374dccdc78SBruce Richardson if ((nb_tx_queue_stats_mappings >= 3384dccdc78SBruce Richardson MAX_TX_QUEUE_STATS_MAPPINGS)) { 3394dccdc78SBruce Richardson printf("exceeded max number of TX queue " 3404dccdc78SBruce Richardson "statistics mappings: %hu\n", 3414dccdc78SBruce Richardson nb_tx_queue_stats_mappings); 342ed30d9b6SIntel return -1; 343ed30d9b6SIntel } 344ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id = 345ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 346ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id = 347ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 348ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id = 349ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 350ed30d9b6SIntel ++nb_tx_queue_stats_mappings; 351ed30d9b6SIntel } 352ed30d9b6SIntel else { 3534dccdc78SBruce Richardson if ((nb_rx_queue_stats_mappings >= 3544dccdc78SBruce Richardson MAX_RX_QUEUE_STATS_MAPPINGS)) { 3554dccdc78SBruce Richardson printf("exceeded max number of RX queue " 3564dccdc78SBruce Richardson "statistics mappings: %hu\n", 3574dccdc78SBruce Richardson nb_rx_queue_stats_mappings); 3584dccdc78SBruce Richardson return -1; 3594dccdc78SBruce Richardson } 360ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id = 361ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 362ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id = 363ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 364ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id = 365ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 366ed30d9b6SIntel ++nb_rx_queue_stats_mappings; 367ed30d9b6SIntel } 368ed30d9b6SIntel 369ed30d9b6SIntel } 370ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */ 371ed30d9b6SIntel /* than to the default array (that was set at its definition) */ 372ed30d9b6SIntel is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) : 373ed30d9b6SIntel (tx_queue_stats_mappings = tx_queue_stats_mappings_array); 374ed30d9b6SIntel return 0; 375ed30d9b6SIntel } 376ed30d9b6SIntel 377c9cafcc8SShahaf Shuler static void 378c9cafcc8SShahaf Shuler print_invalid_socket_id_error(void) 379c9cafcc8SShahaf Shuler { 380c9cafcc8SShahaf Shuler unsigned int i = 0; 381c9cafcc8SShahaf Shuler 382c9cafcc8SShahaf Shuler printf("Invalid socket id, options are: "); 383c9cafcc8SShahaf Shuler for (i = 0; i < num_sockets; i++) { 384c9cafcc8SShahaf Shuler printf("%u%s", socket_ids[i], 385c9cafcc8SShahaf Shuler (i == num_sockets - 1) ? "\n" : ","); 386c9cafcc8SShahaf Shuler } 387c9cafcc8SShahaf Shuler } 388c9cafcc8SShahaf Shuler 389b6ea6408SIntel static int 390b6ea6408SIntel parse_portnuma_config(const char *q_arg) 391b6ea6408SIntel { 392b6ea6408SIntel char s[256]; 393b6ea6408SIntel const char *p, *p0 = q_arg; 394b6ea6408SIntel char *end; 395b6ea6408SIntel uint8_t i,port_id,socket_id; 396b6ea6408SIntel unsigned size; 397b6ea6408SIntel enum fieldnames { 398b6ea6408SIntel FLD_PORT = 0, 399b6ea6408SIntel FLD_SOCKET, 400b6ea6408SIntel _NUM_FLD 401b6ea6408SIntel }; 402b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 403b6ea6408SIntel char *str_fld[_NUM_FLD]; 404edab33b1STetsuya Mukawa portid_t pid; 405b6ea6408SIntel 406b6ea6408SIntel /* reset from value set at definition */ 407b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 408b6ea6408SIntel ++p; 409b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 410b6ea6408SIntel return -1; 411b6ea6408SIntel 412b6ea6408SIntel size = p0 - p; 413b6ea6408SIntel if(size >= sizeof(s)) 414b6ea6408SIntel return -1; 415b6ea6408SIntel 4166f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 417b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 418b6ea6408SIntel return -1; 419b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 420b6ea6408SIntel errno = 0; 421b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 422b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 423b6ea6408SIntel return -1; 424b6ea6408SIntel } 425b6ea6408SIntel port_id = (uint8_t)int_fld[FLD_PORT]; 426edab33b1STetsuya Mukawa if (port_id_is_invalid(port_id, ENABLED_WARN)) { 427edab33b1STetsuya Mukawa printf("Valid port range is [0"); 4287d89b261SGaetan Rivet RTE_ETH_FOREACH_DEV(pid) 429edab33b1STetsuya Mukawa printf(", %d", pid); 430edab33b1STetsuya Mukawa printf("]\n"); 431b6ea6408SIntel return -1; 432b6ea6408SIntel } 433b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 434c9cafcc8SShahaf Shuler if (new_socket_id(socket_id)) { 435c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 436b6ea6408SIntel return -1; 437b6ea6408SIntel } 438b6ea6408SIntel port_numa[port_id] = socket_id; 439b6ea6408SIntel } 440b6ea6408SIntel 441b6ea6408SIntel return 0; 442b6ea6408SIntel } 443b6ea6408SIntel 444b6ea6408SIntel static int 445b6ea6408SIntel parse_ringnuma_config(const char *q_arg) 446b6ea6408SIntel { 447b6ea6408SIntel char s[256]; 448b6ea6408SIntel const char *p, *p0 = q_arg; 449b6ea6408SIntel char *end; 450b6ea6408SIntel uint8_t i,port_id,ring_flag,socket_id; 451b6ea6408SIntel unsigned size; 452b6ea6408SIntel enum fieldnames { 453b6ea6408SIntel FLD_PORT = 0, 454b6ea6408SIntel FLD_FLAG, 455b6ea6408SIntel FLD_SOCKET, 456b6ea6408SIntel _NUM_FLD 457b6ea6408SIntel }; 458b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 459b6ea6408SIntel char *str_fld[_NUM_FLD]; 460edab33b1STetsuya Mukawa portid_t pid; 461b6ea6408SIntel #define RX_RING_ONLY 0x1 462b6ea6408SIntel #define TX_RING_ONLY 0x2 463b6ea6408SIntel #define RXTX_RING 0x3 464b6ea6408SIntel 465b6ea6408SIntel /* reset from value set at definition */ 466b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 467b6ea6408SIntel ++p; 468b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 469b6ea6408SIntel return -1; 470b6ea6408SIntel 471b6ea6408SIntel size = p0 - p; 472b6ea6408SIntel if(size >= sizeof(s)) 473b6ea6408SIntel return -1; 474b6ea6408SIntel 4756f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 476b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 477b6ea6408SIntel return -1; 478b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 479b6ea6408SIntel errno = 0; 480b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 481b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 482b6ea6408SIntel return -1; 483b6ea6408SIntel } 484b6ea6408SIntel port_id = (uint8_t)int_fld[FLD_PORT]; 485edab33b1STetsuya Mukawa if (port_id_is_invalid(port_id, ENABLED_WARN)) { 486edab33b1STetsuya Mukawa printf("Valid port range is [0"); 4877d89b261SGaetan Rivet RTE_ETH_FOREACH_DEV(pid) 488edab33b1STetsuya Mukawa printf(", %d", pid); 489edab33b1STetsuya Mukawa printf("]\n"); 490b6ea6408SIntel return -1; 491b6ea6408SIntel } 492b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 493c9cafcc8SShahaf Shuler if (new_socket_id(socket_id)) { 494c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 495b6ea6408SIntel return -1; 496b6ea6408SIntel } 497b6ea6408SIntel ring_flag = (uint8_t)int_fld[FLD_FLAG]; 498b6ea6408SIntel if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) { 499b6ea6408SIntel printf("Invalid ring-flag=%d config for port =%d\n", 500b6ea6408SIntel ring_flag,port_id); 501b6ea6408SIntel return -1; 502b6ea6408SIntel } 503b6ea6408SIntel 504b6ea6408SIntel switch (ring_flag & RXTX_RING) { 505b6ea6408SIntel case RX_RING_ONLY: 506b6ea6408SIntel rxring_numa[port_id] = socket_id; 507b6ea6408SIntel break; 508b6ea6408SIntel case TX_RING_ONLY: 509b6ea6408SIntel txring_numa[port_id] = socket_id; 510b6ea6408SIntel break; 511b6ea6408SIntel case RXTX_RING: 512b6ea6408SIntel rxring_numa[port_id] = socket_id; 513b6ea6408SIntel txring_numa[port_id] = socket_id; 514b6ea6408SIntel break; 515b6ea6408SIntel default: 516b6ea6408SIntel printf("Invalid ring-flag=%d config for port=%d\n", 517b6ea6408SIntel ring_flag,port_id); 518b6ea6408SIntel break; 519b6ea6408SIntel } 520b6ea6408SIntel } 521b6ea6408SIntel 522b6ea6408SIntel return 0; 523b6ea6408SIntel } 524ed30d9b6SIntel 5253af72783SGaetan Rivet static int 5263af72783SGaetan Rivet parse_event_printing_config(const char *optarg, int enable) 5273af72783SGaetan Rivet { 5283af72783SGaetan Rivet uint32_t mask = 0; 5293af72783SGaetan Rivet 5303af72783SGaetan Rivet if (!strcmp(optarg, "unknown")) 5313af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_UNKNOWN; 5323af72783SGaetan Rivet else if (!strcmp(optarg, "intr_lsc")) 5333af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_LSC; 5343af72783SGaetan Rivet else if (!strcmp(optarg, "queue_state")) 5353af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_QUEUE_STATE; 5363af72783SGaetan Rivet else if (!strcmp(optarg, "intr_reset")) 5373af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RESET; 5383af72783SGaetan Rivet else if (!strcmp(optarg, "vf_mbox")) 5393af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_VF_MBOX; 5403af72783SGaetan Rivet else if (!strcmp(optarg, "macsec")) 5413af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_MACSEC; 5423af72783SGaetan Rivet else if (!strcmp(optarg, "intr_rmv")) 5433af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RMV; 544b6b63dfdSGaetan Rivet else if (!strcmp(optarg, "all")) 545b6b63dfdSGaetan Rivet mask = ~UINT32_C(0); 5463af72783SGaetan Rivet else { 5473af72783SGaetan Rivet fprintf(stderr, "Invalid event: %s\n", optarg); 5483af72783SGaetan Rivet return -1; 5493af72783SGaetan Rivet } 5503af72783SGaetan Rivet if (enable) 5513af72783SGaetan Rivet event_print_mask |= mask; 5523af72783SGaetan Rivet else 5533af72783SGaetan Rivet event_print_mask &= ~mask; 5543af72783SGaetan Rivet return 0; 5553af72783SGaetan Rivet } 5563af72783SGaetan Rivet 557af75078fSIntel void 558af75078fSIntel launch_args_parse(int argc, char** argv) 559af75078fSIntel { 560af75078fSIntel int n, opt; 561af75078fSIntel char **argvopt; 562af75078fSIntel int opt_idx; 563013af9b6SIntel enum { TX, RX }; 564013af9b6SIntel 565af75078fSIntel static struct option lgopts[] = { 566af75078fSIntel { "help", 0, 0, 0 }, 5670d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 568af75078fSIntel { "interactive", 0, 0, 0 }, 56981ef862bSAllain Legacy { "cmdline-file", 1, 0, 0 }, 570ca7feb22SCyril Chemparathy { "auto-start", 0, 0, 0 }, 571af75078fSIntel { "eth-peers-configfile", 1, 0, 0 }, 572af75078fSIntel { "eth-peer", 1, 0, 0 }, 5730d56cb81SThomas Monjalon #endif 57499cabef0SPablo de Lara { "tx-first", 0, 0, 0 }, 575*cfea1f30SPablo de Lara { "stats-period", 1, 0, 0 }, 576af75078fSIntel { "ports", 1, 0, 0 }, 577af75078fSIntel { "nb-cores", 1, 0, 0 }, 578af75078fSIntel { "nb-ports", 1, 0, 0 }, 579af75078fSIntel { "coremask", 1, 0, 0 }, 580af75078fSIntel { "portmask", 1, 0, 0 }, 581af75078fSIntel { "numa", 0, 0, 0 }, 582999b2ee0SBruce Richardson { "no-numa", 0, 0, 0 }, 583148f963fSBruce Richardson { "mp-anon", 0, 0, 0 }, 584b6ea6408SIntel { "port-numa-config", 1, 0, 0 }, 585b6ea6408SIntel { "ring-numa-config", 1, 0, 0 }, 586b6ea6408SIntel { "socket-num", 1, 0, 0 }, 587af75078fSIntel { "mbuf-size", 1, 0, 0 }, 588c8798818SIntel { "total-num-mbufs", 1, 0, 0 }, 589af75078fSIntel { "max-pkt-len", 1, 0, 0 }, 590af75078fSIntel { "pkt-filter-mode", 1, 0, 0 }, 591af75078fSIntel { "pkt-filter-report-hash", 1, 0, 0 }, 592af75078fSIntel { "pkt-filter-size", 1, 0, 0 }, 593af75078fSIntel { "pkt-filter-drop-queue", 1, 0, 0 }, 59462d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 59562d3216dSReshma Pattan { "latencystats", 1, 0, 0 }, 59662d3216dSReshma Pattan #endif 597e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE 598e25e6c70SRemy Horton { "bitrate-stats", 1, 0, 0 }, 599e25e6c70SRemy Horton #endif 60079dd163fSJeff Guo { "disable-crc-strip", 0, 0, 0 }, 6014c3ea508SOlivier Matz { "enable-lro", 0, 0, 0 }, 602013af9b6SIntel { "enable-rx-cksum", 0, 0, 0 }, 60304997938SMaciej Czekaj { "enable-scatter", 0, 0, 0 }, 604af75078fSIntel { "disable-hw-vlan", 0, 0, 0 }, 605c9dd4aadSOuyang Changchun { "disable-hw-vlan-filter", 0, 0, 0 }, 606c9dd4aadSOuyang Changchun { "disable-hw-vlan-strip", 0, 0, 0 }, 607c9dd4aadSOuyang Changchun { "disable-hw-vlan-extend", 0, 0, 0 }, 608013af9b6SIntel { "enable-drop-en", 0, 0, 0 }, 609af75078fSIntel { "disable-rss", 0, 0, 0 }, 610af75078fSIntel { "port-topology", 1, 0, 0 }, 611ce9b9fb0SCyril Chemparathy { "forward-mode", 1, 0, 0 }, 612af75078fSIntel { "rss-ip", 0, 0, 0 }, 613af75078fSIntel { "rss-udp", 0, 0, 0 }, 614af75078fSIntel { "rxq", 1, 0, 0 }, 615af75078fSIntel { "txq", 1, 0, 0 }, 616af75078fSIntel { "rxd", 1, 0, 0 }, 617af75078fSIntel { "txd", 1, 0, 0 }, 618af75078fSIntel { "burst", 1, 0, 0 }, 619af75078fSIntel { "mbcache", 1, 0, 0 }, 620af75078fSIntel { "txpt", 1, 0, 0 }, 621af75078fSIntel { "txht", 1, 0, 0 }, 622af75078fSIntel { "txwt", 1, 0, 0 }, 623af75078fSIntel { "txfreet", 1, 0, 0 }, 624af75078fSIntel { "txrst", 1, 0, 0 }, 625ce8d5614SIntel { "txqflags", 1, 0, 0 }, 626af75078fSIntel { "rxpt", 1, 0, 0 }, 627af75078fSIntel { "rxht", 1, 0, 0 }, 628af75078fSIntel { "rxwt", 1, 0, 0 }, 629af75078fSIntel { "rxfreet", 1, 0, 0 }, 630ed30d9b6SIntel { "tx-queue-stats-mapping", 1, 0, 0 }, 631ed30d9b6SIntel { "rx-queue-stats-mapping", 1, 0, 0 }, 6327741e4cfSIntel { "no-flush-rx", 0, 0, 0 }, 633a7e7bb4eSCyril Chemparathy { "txpkts", 1, 0, 0 }, 634bc202406SDavid Marchand { "disable-link-check", 0, 0, 0 }, 6358ea656f8SGaetan Rivet { "no-lsc-interrupt", 0, 0, 0 }, 636284c908cSGaetan Rivet { "no-rmv-interrupt", 0, 0, 0 }, 6373af72783SGaetan Rivet { "print-event", 1, 0, 0 }, 6383af72783SGaetan Rivet { "mask-event", 1, 0, 0 }, 639af75078fSIntel { 0, 0, 0, 0 }, 640af75078fSIntel }; 641af75078fSIntel 642af75078fSIntel argvopt = argv; 643af75078fSIntel 6440d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 645ca7feb22SCyril Chemparathy #define SHORTOPTS "i" 6460d56cb81SThomas Monjalon #else 647ca7feb22SCyril Chemparathy #define SHORTOPTS "" 6480d56cb81SThomas Monjalon #endif 649ca7feb22SCyril Chemparathy while ((opt = getopt_long(argc, argvopt, SHORTOPTS "ah", 650af75078fSIntel lgopts, &opt_idx)) != EOF) { 651af75078fSIntel switch (opt) { 6520d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 653af75078fSIntel case 'i': 654af75078fSIntel printf("Interactive-mode selected\n"); 655af75078fSIntel interactive = 1; 656af75078fSIntel break; 6570d56cb81SThomas Monjalon #endif 658ca7feb22SCyril Chemparathy case 'a': 659ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 660ca7feb22SCyril Chemparathy auto_start = 1; 661ca7feb22SCyril Chemparathy break; 662ca7feb22SCyril Chemparathy 663af75078fSIntel case 0: /*long options */ 664af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "help")) { 665af75078fSIntel usage(argv[0]); 666af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 667af75078fSIntel } 6680d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 669af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "interactive")) { 670af75078fSIntel printf("Interactive-mode selected\n"); 671af75078fSIntel interactive = 1; 672af75078fSIntel } 67381ef862bSAllain Legacy if (!strcmp(lgopts[opt_idx].name, "cmdline-file")) { 67481ef862bSAllain Legacy printf("CLI commands to be read from %s\n", 67581ef862bSAllain Legacy optarg); 67681ef862bSAllain Legacy snprintf(cmdline_filename, 67781ef862bSAllain Legacy sizeof(cmdline_filename), "%s", 67881ef862bSAllain Legacy optarg); 67981ef862bSAllain Legacy } 680ca7feb22SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "auto-start")) { 681ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 682ca7feb22SCyril Chemparathy auto_start = 1; 683ca7feb22SCyril Chemparathy } 68499cabef0SPablo de Lara if (!strcmp(lgopts[opt_idx].name, "tx-first")) { 68599cabef0SPablo de Lara printf("Ports to start sending a burst of " 68699cabef0SPablo de Lara "packets first\n"); 68799cabef0SPablo de Lara tx_first = 1; 68899cabef0SPablo de Lara } 689*cfea1f30SPablo de Lara if (!strcmp(lgopts[opt_idx].name, "stats-period")) { 690*cfea1f30SPablo de Lara char *end = NULL; 691*cfea1f30SPablo de Lara unsigned int n; 692*cfea1f30SPablo de Lara 693*cfea1f30SPablo de Lara n = strtoul(optarg, &end, 10); 694*cfea1f30SPablo de Lara if ((optarg[0] == '\0') || (end == NULL) || 695*cfea1f30SPablo de Lara (*end != '\0')) 696*cfea1f30SPablo de Lara break; 697*cfea1f30SPablo de Lara 698*cfea1f30SPablo de Lara stats_period = n; 699*cfea1f30SPablo de Lara break; 700*cfea1f30SPablo de Lara } 701af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 702af75078fSIntel "eth-peers-configfile")) { 703af75078fSIntel if (init_peer_eth_addrs(optarg) != 0) 704af75078fSIntel rte_exit(EXIT_FAILURE, 705af75078fSIntel "Cannot open logfile\n"); 706af75078fSIntel } 707af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "eth-peer")) { 708af75078fSIntel char *port_end; 709af75078fSIntel uint8_t c, peer_addr[6]; 710af75078fSIntel 711af75078fSIntel errno = 0; 712af75078fSIntel n = strtoul(optarg, &port_end, 10); 713af75078fSIntel if (errno != 0 || port_end == optarg || *port_end++ != ',') 714af75078fSIntel rte_exit(EXIT_FAILURE, 715af75078fSIntel "Invalid eth-peer: %s", optarg); 716af75078fSIntel if (n >= RTE_MAX_ETHPORTS) 717af75078fSIntel rte_exit(EXIT_FAILURE, 718af75078fSIntel "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n", 719af75078fSIntel n, RTE_MAX_ETHPORTS); 720af75078fSIntel 721aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, port_end, 722aaa662e7SAlan Carew &peer_addr, sizeof(peer_addr)) < 0) 723af75078fSIntel rte_exit(EXIT_FAILURE, 724af75078fSIntel "Invalid ethernet address: %s\n", 725af75078fSIntel port_end); 726af75078fSIntel for (c = 0; c < 6; c++) 727af75078fSIntel peer_eth_addrs[n].addr_bytes[c] = 728af75078fSIntel peer_addr[c]; 729af75078fSIntel nb_peer_eth_addrs++; 730af75078fSIntel } 7310d56cb81SThomas Monjalon #endif 732af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-ports")) { 733af75078fSIntel n = atoi(optarg); 7340a530f0dSYong Liu if (n > 0 && n <= nb_ports) 735af75078fSIntel nb_fwd_ports = (uint8_t) n; 736af75078fSIntel else 737af75078fSIntel rte_exit(EXIT_FAILURE, 738edab33b1STetsuya Mukawa "Invalid port %d\n", n); 739af75078fSIntel } 740af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-cores")) { 741af75078fSIntel n = atoi(optarg); 742af75078fSIntel if (n > 0 && n <= nb_lcores) 743af75078fSIntel nb_fwd_lcores = (uint8_t) n; 744af75078fSIntel else 745af75078fSIntel rte_exit(EXIT_FAILURE, 746af75078fSIntel "nb-cores should be > 0 and <= %d\n", 747af75078fSIntel nb_lcores); 748af75078fSIntel } 749af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "coremask")) 750af75078fSIntel parse_fwd_coremask(optarg); 751af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "portmask")) 752af75078fSIntel parse_fwd_portmask(optarg); 753999b2ee0SBruce Richardson if (!strcmp(lgopts[opt_idx].name, "no-numa")) 754999b2ee0SBruce Richardson numa_support = 0; 755487f9a59SYulong Pei if (!strcmp(lgopts[opt_idx].name, "numa")) 756af75078fSIntel numa_support = 1; 757148f963fSBruce Richardson if (!strcmp(lgopts[opt_idx].name, "mp-anon")) { 758148f963fSBruce Richardson mp_anon = 1; 759148f963fSBruce Richardson } 760b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) { 761b6ea6408SIntel if (parse_portnuma_config(optarg)) 762b6ea6408SIntel rte_exit(EXIT_FAILURE, 763b6ea6408SIntel "invalid port-numa configuration\n"); 764b6ea6408SIntel } 765b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "ring-numa-config")) 766b6ea6408SIntel if (parse_ringnuma_config(optarg)) 767b6ea6408SIntel rte_exit(EXIT_FAILURE, 768b6ea6408SIntel "invalid ring-numa configuration\n"); 769b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "socket-num")) { 770b6ea6408SIntel n = atoi(optarg); 771c9cafcc8SShahaf Shuler if (!new_socket_id((uint8_t)n)) { 772b6ea6408SIntel socket_num = (uint8_t)n; 773c9cafcc8SShahaf Shuler } else { 774c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 775b6ea6408SIntel rte_exit(EXIT_FAILURE, 776c9cafcc8SShahaf Shuler "Invalid socket id"); 777c9cafcc8SShahaf Shuler } 778b6ea6408SIntel } 779af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) { 780af75078fSIntel n = atoi(optarg); 781af75078fSIntel if (n > 0 && n <= 0xFFFF) 782af75078fSIntel mbuf_data_size = (uint16_t) n; 783af75078fSIntel else 784af75078fSIntel rte_exit(EXIT_FAILURE, 785af75078fSIntel "mbuf-size should be > 0 and < 65536\n"); 786af75078fSIntel } 787c8798818SIntel if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) { 788c8798818SIntel n = atoi(optarg); 789c8798818SIntel if (n > 1024) 790c8798818SIntel param_total_num_mbufs = (unsigned)n; 791c8798818SIntel else 792c8798818SIntel rte_exit(EXIT_FAILURE, 793c8798818SIntel "total-num-mbufs should be > 1024\n"); 794c8798818SIntel } 795af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) { 796af75078fSIntel n = atoi(optarg); 797af75078fSIntel if (n >= ETHER_MIN_LEN) { 798af75078fSIntel rx_mode.max_rx_pkt_len = (uint32_t) n; 799af75078fSIntel if (n > ETHER_MAX_LEN) 800af75078fSIntel rx_mode.jumbo_frame = 1; 801af75078fSIntel } else 802af75078fSIntel rte_exit(EXIT_FAILURE, 803af75078fSIntel "Invalid max-pkt-len=%d - should be > %d\n", 804af75078fSIntel n, ETHER_MIN_LEN); 805af75078fSIntel } 806af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) { 807af75078fSIntel if (!strcmp(optarg, "signature")) 808af75078fSIntel fdir_conf.mode = 809af75078fSIntel RTE_FDIR_MODE_SIGNATURE; 810af75078fSIntel else if (!strcmp(optarg, "perfect")) 811af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_PERFECT; 8129276b982SWenzhuo Lu else if (!strcmp(optarg, "perfect-mac-vlan")) 8139276b982SWenzhuo Lu fdir_conf.mode = RTE_FDIR_MODE_PERFECT_MAC_VLAN; 8149276b982SWenzhuo Lu else if (!strcmp(optarg, "perfect-tunnel")) 8159276b982SWenzhuo Lu fdir_conf.mode = RTE_FDIR_MODE_PERFECT_TUNNEL; 816af75078fSIntel else if (!strcmp(optarg, "none")) 817af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_NONE; 818af75078fSIntel else 819af75078fSIntel rte_exit(EXIT_FAILURE, 820af75078fSIntel "pkt-mode-invalid %s invalid - must be: " 8219276b982SWenzhuo Lu "none, signature, perfect, perfect-mac-vlan" 8229276b982SWenzhuo Lu " or perfect-tunnel\n", 823af75078fSIntel optarg); 824af75078fSIntel } 825af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 826af75078fSIntel "pkt-filter-report-hash")) { 827af75078fSIntel if (!strcmp(optarg, "none")) 828af75078fSIntel fdir_conf.status = 829af75078fSIntel RTE_FDIR_NO_REPORT_STATUS; 830af75078fSIntel else if (!strcmp(optarg, "match")) 831af75078fSIntel fdir_conf.status = 832af75078fSIntel RTE_FDIR_REPORT_STATUS; 833af75078fSIntel else if (!strcmp(optarg, "always")) 834af75078fSIntel fdir_conf.status = 835af75078fSIntel RTE_FDIR_REPORT_STATUS_ALWAYS; 836af75078fSIntel else 837af75078fSIntel rte_exit(EXIT_FAILURE, 838af75078fSIntel "pkt-filter-report-hash %s invalid " 839af75078fSIntel "- must be: none or match or always\n", 840af75078fSIntel optarg); 841af75078fSIntel } 842af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) { 843af75078fSIntel if (!strcmp(optarg, "64K")) 844af75078fSIntel fdir_conf.pballoc = 845af75078fSIntel RTE_FDIR_PBALLOC_64K; 846af75078fSIntel else if (!strcmp(optarg, "128K")) 847af75078fSIntel fdir_conf.pballoc = 848af75078fSIntel RTE_FDIR_PBALLOC_128K; 849af75078fSIntel else if (!strcmp(optarg, "256K")) 850af75078fSIntel fdir_conf.pballoc = 851af75078fSIntel RTE_FDIR_PBALLOC_256K; 852af75078fSIntel else 853af75078fSIntel rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -" 854af75078fSIntel " must be: 64K or 128K or 256K\n", 855af75078fSIntel optarg); 856af75078fSIntel } 857af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 858af75078fSIntel "pkt-filter-drop-queue")) { 859af75078fSIntel n = atoi(optarg); 860af75078fSIntel if (n >= 0) 861af75078fSIntel fdir_conf.drop_queue = (uint8_t) n; 862af75078fSIntel else 863af75078fSIntel rte_exit(EXIT_FAILURE, 864af75078fSIntel "drop queue %d invalid - must" 865af75078fSIntel "be >= 0 \n", n); 866af75078fSIntel } 86762d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 86862d3216dSReshma Pattan if (!strcmp(lgopts[opt_idx].name, 86962d3216dSReshma Pattan "latencystats")) { 87062d3216dSReshma Pattan n = atoi(optarg); 87162d3216dSReshma Pattan if (n >= 0) { 87262d3216dSReshma Pattan latencystats_lcore_id = (lcoreid_t) n; 87362d3216dSReshma Pattan latencystats_enabled = 1; 87462d3216dSReshma Pattan } else 87562d3216dSReshma Pattan rte_exit(EXIT_FAILURE, 87662d3216dSReshma Pattan "invalid lcore id %d for latencystats" 87762d3216dSReshma Pattan " must be >= 0\n", n); 87862d3216dSReshma Pattan } 87962d3216dSReshma Pattan #endif 880e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE 881e25e6c70SRemy Horton if (!strcmp(lgopts[opt_idx].name, "bitrate-stats")) { 882e25e6c70SRemy Horton n = atoi(optarg); 883e25e6c70SRemy Horton if (n >= 0) { 884e25e6c70SRemy Horton bitrate_lcore_id = (lcoreid_t) n; 885e25e6c70SRemy Horton bitrate_enabled = 1; 886e25e6c70SRemy Horton } else 887e25e6c70SRemy Horton rte_exit(EXIT_FAILURE, 888e25e6c70SRemy Horton "invalid lcore id %d for bitrate stats" 889e25e6c70SRemy Horton " must be >= 0\n", n); 890e25e6c70SRemy Horton } 891e25e6c70SRemy Horton #endif 89279dd163fSJeff Guo if (!strcmp(lgopts[opt_idx].name, "disable-crc-strip")) 89379dd163fSJeff Guo rx_mode.hw_strip_crc = 0; 8944c3ea508SOlivier Matz if (!strcmp(lgopts[opt_idx].name, "enable-lro")) 8954c3ea508SOlivier Matz rx_mode.enable_lro = 1; 89604997938SMaciej Czekaj if (!strcmp(lgopts[opt_idx].name, "enable-scatter")) 89704997938SMaciej Czekaj rx_mode.enable_scatter = 1; 898af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum")) 899af75078fSIntel rx_mode.hw_ip_checksum = 1; 900a47aa8b9SIntel 901a47aa8b9SIntel if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) { 902af75078fSIntel rx_mode.hw_vlan_filter = 0; 903a47aa8b9SIntel rx_mode.hw_vlan_strip = 0; 904a47aa8b9SIntel rx_mode.hw_vlan_extend = 0; 905a47aa8b9SIntel } 906a47aa8b9SIntel 907c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 908c9dd4aadSOuyang Changchun "disable-hw-vlan-filter")) 909c9dd4aadSOuyang Changchun rx_mode.hw_vlan_filter = 0; 910c9dd4aadSOuyang Changchun 911c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 912c9dd4aadSOuyang Changchun "disable-hw-vlan-strip")) 913c9dd4aadSOuyang Changchun rx_mode.hw_vlan_strip = 0; 914c9dd4aadSOuyang Changchun 915c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 916c9dd4aadSOuyang Changchun "disable-hw-vlan-extend")) 917c9dd4aadSOuyang Changchun rx_mode.hw_vlan_extend = 0; 918c9dd4aadSOuyang Changchun 919ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "enable-drop-en")) 920ce8d5614SIntel rx_drop_en = 1; 921ce8d5614SIntel 922af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "disable-rss")) 923af75078fSIntel rss_hf = 0; 924af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "port-topology")) { 925af75078fSIntel if (!strcmp(optarg, "paired")) 926af75078fSIntel port_topology = PORT_TOPOLOGY_PAIRED; 927af75078fSIntel else if (!strcmp(optarg, "chained")) 928af75078fSIntel port_topology = PORT_TOPOLOGY_CHAINED; 9293e2006d6SCyril Chemparathy else if (!strcmp(optarg, "loop")) 9303e2006d6SCyril Chemparathy port_topology = PORT_TOPOLOGY_LOOP; 931af75078fSIntel else 932af75078fSIntel rte_exit(EXIT_FAILURE, "port-topology %s invalid -" 933af75078fSIntel " must be: paired or chained \n", 934af75078fSIntel optarg); 935af75078fSIntel } 936ce9b9fb0SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "forward-mode")) 937ce9b9fb0SCyril Chemparathy set_pkt_forwarding_mode(optarg); 938af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-ip")) 9398a387fa8SHelin Zhang rss_hf = ETH_RSS_IP; 940af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-udp")) 9418a387fa8SHelin Zhang rss_hf = ETH_RSS_UDP; 942af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxq")) { 943af75078fSIntel n = atoi(optarg); 9445a8fb55cSReshma Pattan if (n >= 0 && n <= (int) MAX_QUEUE_ID) 945af75078fSIntel nb_rxq = (queueid_t) n; 946af75078fSIntel else 947af75078fSIntel rte_exit(EXIT_FAILURE, "rxq %d invalid - must be" 9485a8fb55cSReshma Pattan " >= 0 && <= %d\n", n, 949af75078fSIntel (int) MAX_QUEUE_ID); 950af75078fSIntel } 951af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txq")) { 952af75078fSIntel n = atoi(optarg); 9535a8fb55cSReshma Pattan if (n >= 0 && n <= (int) MAX_QUEUE_ID) 954af75078fSIntel nb_txq = (queueid_t) n; 955af75078fSIntel else 956af75078fSIntel rte_exit(EXIT_FAILURE, "txq %d invalid - must be" 9575a8fb55cSReshma Pattan " >= 0 && <= %d\n", n, 958af75078fSIntel (int) MAX_QUEUE_ID); 959af75078fSIntel } 9605a8fb55cSReshma Pattan if (!nb_rxq && !nb_txq) { 9615a8fb55cSReshma Pattan rte_exit(EXIT_FAILURE, "Either rx or tx queues should " 9625a8fb55cSReshma Pattan "be non-zero\n"); 9635a8fb55cSReshma Pattan } 964af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "burst")) { 965af75078fSIntel n = atoi(optarg); 966af75078fSIntel if ((n >= 1) && (n <= MAX_PKT_BURST)) 967af75078fSIntel nb_pkt_per_burst = (uint16_t) n; 968af75078fSIntel else 969af75078fSIntel rte_exit(EXIT_FAILURE, 970af75078fSIntel "burst must >= 1 and <= %d]", 971af75078fSIntel MAX_PKT_BURST); 972af75078fSIntel } 973af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbcache")) { 974af75078fSIntel n = atoi(optarg); 975af75078fSIntel if ((n >= 0) && 976af75078fSIntel (n <= RTE_MEMPOOL_CACHE_MAX_SIZE)) 977af75078fSIntel mb_mempool_cache = (uint16_t) n; 978af75078fSIntel else 979af75078fSIntel rte_exit(EXIT_FAILURE, 980af75078fSIntel "mbcache must be >= 0 and <= %d\n", 981af75078fSIntel RTE_MEMPOOL_CACHE_MAX_SIZE); 982af75078fSIntel } 983af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txfreet")) { 984af75078fSIntel n = atoi(optarg); 985af75078fSIntel if (n >= 0) 986f2c5125aSPablo de Lara tx_free_thresh = (int16_t)n; 987af75078fSIntel else 988af75078fSIntel rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n"); 989af75078fSIntel } 990af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txrst")) { 991af75078fSIntel n = atoi(optarg); 992af75078fSIntel if (n >= 0) 993f2c5125aSPablo de Lara tx_rs_thresh = (int16_t)n; 994af75078fSIntel else 995af75078fSIntel rte_exit(EXIT_FAILURE, "txrst must be >= 0\n"); 996af75078fSIntel } 997ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "txqflags")) { 998ce8d5614SIntel char *end = NULL; 999ce8d5614SIntel n = strtoul(optarg, &end, 16); 1000ce8d5614SIntel if (n >= 0) 1001f2c5125aSPablo de Lara txq_flags = (int32_t)n; 1002ce8d5614SIntel else 1003ce8d5614SIntel rte_exit(EXIT_FAILURE, 1004ce8d5614SIntel "txqflags must be >= 0\n"); 1005ce8d5614SIntel } 1006af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 1007af75078fSIntel n = atoi(optarg); 1008af75078fSIntel if (n > 0) { 1009af75078fSIntel if (rx_free_thresh >= n) 1010af75078fSIntel rte_exit(EXIT_FAILURE, 1011af75078fSIntel "rxd must be > " 1012af75078fSIntel "rx_free_thresh(%d)\n", 1013af75078fSIntel (int)rx_free_thresh); 1014af75078fSIntel else 1015af75078fSIntel nb_rxd = (uint16_t) n; 1016af75078fSIntel } else 1017af75078fSIntel rte_exit(EXIT_FAILURE, 1018af75078fSIntel "rxd(%d) invalid - must be > 0\n", 1019af75078fSIntel n); 1020af75078fSIntel } 1021af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 1022af75078fSIntel n = atoi(optarg); 1023af75078fSIntel if (n > 0) 1024af75078fSIntel nb_txd = (uint16_t) n; 1025af75078fSIntel else 1026af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 1027af75078fSIntel } 1028af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 1029af75078fSIntel n = atoi(optarg); 1030af75078fSIntel if (n >= 0) 1031f2c5125aSPablo de Lara tx_pthresh = (int8_t)n; 1032af75078fSIntel else 1033af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 1034af75078fSIntel } 1035af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 1036af75078fSIntel n = atoi(optarg); 1037af75078fSIntel if (n >= 0) 1038f2c5125aSPablo de Lara tx_hthresh = (int8_t)n; 1039af75078fSIntel else 1040af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 1041af75078fSIntel } 1042af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 1043af75078fSIntel n = atoi(optarg); 1044af75078fSIntel if (n >= 0) 1045f2c5125aSPablo de Lara tx_wthresh = (int8_t)n; 1046af75078fSIntel else 1047af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 1048af75078fSIntel } 1049af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 1050af75078fSIntel n = atoi(optarg); 1051af75078fSIntel if (n >= 0) 1052f2c5125aSPablo de Lara rx_pthresh = (int8_t)n; 1053af75078fSIntel else 1054af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 1055af75078fSIntel } 1056af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 1057af75078fSIntel n = atoi(optarg); 1058af75078fSIntel if (n >= 0) 1059f2c5125aSPablo de Lara rx_hthresh = (int8_t)n; 1060af75078fSIntel else 1061af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 1062af75078fSIntel } 1063af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 1064af75078fSIntel n = atoi(optarg); 1065af75078fSIntel if (n >= 0) 1066f2c5125aSPablo de Lara rx_wthresh = (int8_t)n; 1067af75078fSIntel else 1068af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 1069af75078fSIntel } 1070af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxfreet")) { 1071af75078fSIntel n = atoi(optarg); 1072af75078fSIntel if (n >= 0) 1073f2c5125aSPablo de Lara rx_free_thresh = (int16_t)n; 1074af75078fSIntel else 1075af75078fSIntel rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n"); 1076af75078fSIntel } 1077ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) { 1078ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, TX)) { 1079ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1080ed30d9b6SIntel "invalid TX queue statistics mapping config entered\n"); 1081ed30d9b6SIntel } 1082ed30d9b6SIntel } 1083ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) { 1084ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, RX)) { 1085ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1086ed30d9b6SIntel "invalid RX queue statistics mapping config entered\n"); 1087ed30d9b6SIntel } 1088ed30d9b6SIntel } 1089a7e7bb4eSCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "txpkts")) { 1090a7e7bb4eSCyril Chemparathy unsigned seg_lengths[RTE_MAX_SEGS_PER_PKT]; 1091a7e7bb4eSCyril Chemparathy unsigned int nb_segs; 1092a7e7bb4eSCyril Chemparathy 1093950d1516SBruce Richardson nb_segs = parse_item_list(optarg, "txpkt segments", 1094950d1516SBruce Richardson RTE_MAX_SEGS_PER_PKT, seg_lengths, 0); 1095a7e7bb4eSCyril Chemparathy if (nb_segs > 0) 1096a7e7bb4eSCyril Chemparathy set_tx_pkt_segments(seg_lengths, nb_segs); 1097a7e7bb4eSCyril Chemparathy else 1098a7e7bb4eSCyril Chemparathy rte_exit(EXIT_FAILURE, "bad txpkts\n"); 1099a7e7bb4eSCyril Chemparathy } 11007741e4cfSIntel if (!strcmp(lgopts[opt_idx].name, "no-flush-rx")) 11017741e4cfSIntel no_flush_rx = 1; 1102bc202406SDavid Marchand if (!strcmp(lgopts[opt_idx].name, "disable-link-check")) 1103bc202406SDavid Marchand no_link_check = 1; 11048ea656f8SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "no-lsc-interrupt")) 11058ea656f8SGaetan Rivet lsc_interrupt = 0; 1106284c908cSGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "no-rmv-interrupt")) 1107284c908cSGaetan Rivet rmv_interrupt = 0; 11083af72783SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "print-event")) 11093af72783SGaetan Rivet if (parse_event_printing_config(optarg, 1)) { 11103af72783SGaetan Rivet rte_exit(EXIT_FAILURE, 11113af72783SGaetan Rivet "invalid print-event argument\n"); 11123af72783SGaetan Rivet } 11133af72783SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "mask-event")) 11143af72783SGaetan Rivet if (parse_event_printing_config(optarg, 0)) { 11153af72783SGaetan Rivet rte_exit(EXIT_FAILURE, 11163af72783SGaetan Rivet "invalid mask-event argument\n"); 11173af72783SGaetan Rivet } 11187741e4cfSIntel 1119af75078fSIntel break; 1120af75078fSIntel case 'h': 1121af75078fSIntel usage(argv[0]); 1122af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 1123af75078fSIntel break; 1124af75078fSIntel default: 1125af75078fSIntel usage(argv[0]); 1126af75078fSIntel rte_exit(EXIT_FAILURE, 1127af75078fSIntel "Command line is incomplete or incorrect\n"); 1128af75078fSIntel break; 1129af75078fSIntel } 1130af75078fSIntel } 1131af75078fSIntel } 1132