1af75078fSIntel /*- 2af75078fSIntel * BSD LICENSE 3af75078fSIntel * 4af75078fSIntel * Copyright(c) 2010-2012 Intel Corporation. All rights reserved. 5af75078fSIntel * All rights reserved. 6af75078fSIntel * 7af75078fSIntel * Redistribution and use in source and binary forms, with or without 8af75078fSIntel * modification, are permitted provided that the following conditions 9af75078fSIntel * are met: 10af75078fSIntel * 11af75078fSIntel * * Redistributions of source code must retain the above copyright 12af75078fSIntel * notice, this list of conditions and the following disclaimer. 13af75078fSIntel * * Redistributions in binary form must reproduce the above copyright 14af75078fSIntel * notice, this list of conditions and the following disclaimer in 15af75078fSIntel * the documentation and/or other materials provided with the 16af75078fSIntel * distribution. 17af75078fSIntel * * Neither the name of Intel Corporation nor the names of its 18af75078fSIntel * contributors may be used to endorse or promote products derived 19af75078fSIntel * from this software without specific prior written permission. 20af75078fSIntel * 21af75078fSIntel * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22af75078fSIntel * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23af75078fSIntel * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24af75078fSIntel * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25af75078fSIntel * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26af75078fSIntel * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27af75078fSIntel * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28af75078fSIntel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29af75078fSIntel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30af75078fSIntel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31af75078fSIntel * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32af75078fSIntel * 33af75078fSIntel */ 34af75078fSIntel 35af75078fSIntel #include <errno.h> 36af75078fSIntel #include <getopt.h> 37af75078fSIntel #include <stdarg.h> 38af75078fSIntel #include <stdio.h> 39af75078fSIntel #include <stdlib.h> 40af75078fSIntel #include <signal.h> 41af75078fSIntel #include <string.h> 42af75078fSIntel #include <time.h> 43af75078fSIntel #include <fcntl.h> 44af75078fSIntel #include <sys/types.h> 45af75078fSIntel #include <errno.h> 46af75078fSIntel 47af75078fSIntel #include <sys/queue.h> 48af75078fSIntel #include <sys/stat.h> 49af75078fSIntel 50af75078fSIntel #include <stdint.h> 51af75078fSIntel #include <unistd.h> 52af75078fSIntel #include <inttypes.h> 53af75078fSIntel 54af75078fSIntel #include <rte_common.h> 55af75078fSIntel #include <rte_byteorder.h> 56af75078fSIntel #include <rte_log.h> 57af75078fSIntel #include <rte_debug.h> 58af75078fSIntel #include <rte_cycles.h> 59af75078fSIntel #include <rte_memory.h> 60af75078fSIntel #include <rte_memzone.h> 61af75078fSIntel #include <rte_launch.h> 62af75078fSIntel #include <rte_tailq.h> 63af75078fSIntel #include <rte_eal.h> 64af75078fSIntel #include <rte_per_lcore.h> 65af75078fSIntel #include <rte_lcore.h> 66af75078fSIntel #include <rte_atomic.h> 67af75078fSIntel #include <rte_branch_prediction.h> 68af75078fSIntel #include <rte_ring.h> 69af75078fSIntel #include <rte_mempool.h> 70af75078fSIntel #include <rte_interrupts.h> 71af75078fSIntel #include <rte_pci.h> 72af75078fSIntel #include <rte_ether.h> 73af75078fSIntel #include <rte_ethdev.h> 74af75078fSIntel #include <rte_string_fns.h> 75af75078fSIntel #include <cmdline_parse.h> 76af75078fSIntel #include <cmdline_parse_etheraddr.h> 77af75078fSIntel 78af75078fSIntel #include "testpmd.h" 79af75078fSIntel 80af75078fSIntel static void 81af75078fSIntel usage(char* progname) 82af75078fSIntel { 83af75078fSIntel printf("usage: %s [--interactive|-i] [--help|-h] | [" 84af75078fSIntel "--coremask=COREMASK --portmask=PORTMASK --numa " 85c8798818SIntel "--mbuf-size= | --total-num-mbufs= | " 86af75078fSIntel "--eth-peers-configfile= | " 87af75078fSIntel "--eth-peer=X,M:M:M:M:M:M | --nb-cores= | --nb-ports= | " 88af75078fSIntel "--pkt-filter-mode= |" 89af75078fSIntel "--rss-ip | --rss-udp | " 90af75078fSIntel "--rxpt= | --rxht= | --rxwt= | --rxfreet= | " 91af75078fSIntel "--txpt= | --txht= | --txwt= | --txfreet= | " 92*ce8d5614SIntel "--txrst= | --txqflags= ]\n", 93af75078fSIntel progname); 94af75078fSIntel printf(" --interactive: run in interactive mode\n"); 95af75078fSIntel printf(" --help: display this message and quit\n"); 96af75078fSIntel printf(" --eth-peers-configfile=name of file with ethernet addresses " 97af75078fSIntel "of peer ports\n"); 98af75078fSIntel printf(" --eth-peer=X,M:M:M:M:M:M set the mac address of the X peer " 99af75078fSIntel "port (0 <= X < %d)\n", RTE_MAX_ETHPORTS); 100af75078fSIntel printf(" --nb-cores=N set the number of forwarding cores" 101af75078fSIntel " (1 <= N <= %d)\n", nb_lcores); 102af75078fSIntel printf(" --nb-ports=N set the number of forwarding ports" 103af75078fSIntel " (1 <= N <= %d)\n", nb_ports); 104af75078fSIntel printf(" --coremask=COREMASK: hexadecimal bitmask of cores running " 105af75078fSIntel "the packet forwarding test\n"); 106af75078fSIntel printf(" --portmask=PORTMASK: hexadecimal bitmask of ports used " 107af75078fSIntel "by the packet forwarding test\n"); 108af75078fSIntel printf(" --numa: enable NUMA-aware allocation of RX/TX rings and of " 109af75078fSIntel " RX memory buffers (mbufs)\n"); 110af75078fSIntel printf(" --mbuf-size=N set the data size of mbuf to N bytes\n"); 111c8798818SIntel printf(" --total-num-mbufs=N set the number of mbufs to be allocated " 112c8798818SIntel "in mbuf pools\n"); 113af75078fSIntel printf(" --max-pkt-len=N set the maximum size of packet to N bytes\n"); 114af75078fSIntel printf(" --pkt-filter-mode=N: set Flow director mode " 115af75078fSIntel "( N: none (default mode) or signature or perfect)\n"); 116af75078fSIntel printf(" --pkt-filter-report-hash=N: set Flow director report mode " 117af75078fSIntel "( N: none or match (default) or always)\n"); 118af75078fSIntel printf(" --pkt-filter-size=N: set Flow director mode " 119af75078fSIntel "( N: 64K (default mode) or 128K or 256K)\n"); 120af75078fSIntel printf(" --pkt-filter-flexbytes-offset=N: set flexbytes-offset." 121af75078fSIntel " The offset is defined in word units counted from the" 122af75078fSIntel " first byte of the destination Ethernet MAC address." 123af75078fSIntel " 0 <= N <= 32\n"); 124af75078fSIntel printf(" --pkt-filter-drop-queue=N: set drop-queue." 125af75078fSIntel " In perfect mode, when you add a rule with queue -1" 126af75078fSIntel " the packet will be enqueued into the rx drop-queue." 127af75078fSIntel " If the drop-queue doesn't exist, the packet is dropped." 128af75078fSIntel " By default drop-queue=127\n"); 129af75078fSIntel printf(" --crc-strip: enable CRC stripping by hardware\n"); 130af75078fSIntel printf(" --enable-rx-cksum: enable rx hardware checksum offload\n"); 131af75078fSIntel printf(" --disable-hw-vlan: disable hardware vlan\n"); 132af75078fSIntel printf(" --disable-rss: disable rss\n"); 133af75078fSIntel printf(" --port-topology=N: set port topology (N: paired (default) or " 134af75078fSIntel "chained)\n"); 135af75078fSIntel printf(" --rss-ip: set RSS functions to IPv4/IPv6 only \n"); 136af75078fSIntel printf(" --rss-udp: set RSS functions to IPv4/IPv6 + UDP\n"); 137af75078fSIntel printf(" --rxq=N set the number of RX queues per port to N\n"); 138af75078fSIntel printf(" --rxd=N set the number of descriptors in RX rings to N\n"); 139af75078fSIntel printf(" --txq=N set the number of TX queues per port to N\n"); 140af75078fSIntel printf(" --txd=N set the number of descriptors in TX rings to N\n"); 141af75078fSIntel printf(" --burst=N set the number of packets per burst to N\n"); 142af75078fSIntel printf(" --mbcache=N set the cache of mbuf memory pool to N\n"); 143af75078fSIntel printf(" --rxpt=N set prefetch threshold register of RX rings to N" 144af75078fSIntel " (0 <= N <= 16)\n"); 145af75078fSIntel printf(" --rxht=N set the host threshold register of RX rings to N" 146af75078fSIntel " (0 <= N <= 16)\n"); 147af75078fSIntel printf(" --rxfreet=N set the free threshold of RX descriptors to N" 148af75078fSIntel " (0 <= N < value of rxd)\n"); 149af75078fSIntel printf(" --rxwt=N set the write-back threshold register of RX rings" 150af75078fSIntel " to N (0 <= N <= 16)\n"); 151af75078fSIntel printf(" --txpt=N set the prefetch threshold register of TX rings" 152af75078fSIntel " to N (0 <= N <= 16)\n"); 153af75078fSIntel printf(" --txht=N set the nhost threshold register of TX rings to N" 154af75078fSIntel " (0 <= N <= 16)\n"); 155af75078fSIntel printf(" --txwt=N set the write-back threshold register of TX rings" 156af75078fSIntel " to N (0 <= N <= 16)\n"); 157af75078fSIntel printf(" --txfreet=N set the transmit free threshold of TX rings to N" 158af75078fSIntel " (0 <= N <= value of txd)\n"); 159af75078fSIntel printf(" --txrst=N set the transmit RS bit threshold of TX rings to N" 160af75078fSIntel " (0 <= N <= value of txd)\n"); 161*ce8d5614SIntel printf(" --txqflags=0xXXXXXXXX hexidecimal bitmask of TX queue flags" 162*ce8d5614SIntel " (0 <= N <= 0x7FFFFFFF)\n"); 163ed30d9b6SIntel printf(" --tx-queue-stats-mapping (port,queue,mapping)[,(port,queue,mapping]:" 164ed30d9b6SIntel " tx queues statistics counters mapping" 165ed30d9b6SIntel " (0 <= mapping <= %d)\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 166ed30d9b6SIntel printf(" --rx-queue-stats-mapping (port,queue,mapping)[,(port,queue,mapping]:" 167ed30d9b6SIntel " rx queues statistics counters mapping" 168ed30d9b6SIntel " (0 <= mapping <= %d)\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 169af75078fSIntel } 170af75078fSIntel 171af75078fSIntel static int 172af75078fSIntel init_peer_eth_addrs(char *config_filename) 173af75078fSIntel { 174af75078fSIntel FILE *config_file; 175af75078fSIntel portid_t i; 176af75078fSIntel char buf[50]; 177af75078fSIntel 178af75078fSIntel config_file = fopen(config_filename, "r"); 179af75078fSIntel if (config_file == NULL) { 180af75078fSIntel perror("open log file failed\n"); 181af75078fSIntel return -1; 182af75078fSIntel } 183af75078fSIntel 184af75078fSIntel for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 185af75078fSIntel 186af75078fSIntel if (fgets(buf, sizeof(buf), config_file) == NULL) 187af75078fSIntel break; 188af75078fSIntel 189af75078fSIntel if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i]) < 0 ){ 190af75078fSIntel printf("bad format of mac address on line %d\n", i); 191af75078fSIntel fclose(config_file); 192af75078fSIntel return -1; 193af75078fSIntel } 194af75078fSIntel } 195af75078fSIntel fclose(config_file); 196af75078fSIntel nb_peer_eth_addrs = (portid_t) i; 197af75078fSIntel return 0; 198af75078fSIntel } 199af75078fSIntel 200af75078fSIntel /* 201af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 202af75078fSIntel * the global configuration of forwarding cores. 203af75078fSIntel */ 204af75078fSIntel static void 205af75078fSIntel parse_fwd_coremask(const char *coremask) 206af75078fSIntel { 207af75078fSIntel char *end; 208af75078fSIntel unsigned long long int cm; 209af75078fSIntel 210af75078fSIntel /* parse hexadecimal string */ 211af75078fSIntel end = NULL; 212af75078fSIntel cm = strtoull(coremask, &end, 16); 213af75078fSIntel if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0')) 214af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n"); 215af75078fSIntel else 216af75078fSIntel set_fwd_lcores_mask((uint64_t) cm); 217af75078fSIntel } 218af75078fSIntel 219af75078fSIntel /* 220af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 221af75078fSIntel * the global configuration of forwarding cores. 222af75078fSIntel */ 223af75078fSIntel static void 224af75078fSIntel parse_fwd_portmask(const char *portmask) 225af75078fSIntel { 226af75078fSIntel char *end; 227af75078fSIntel unsigned long long int pm; 228af75078fSIntel 229af75078fSIntel /* parse hexadecimal string */ 230af75078fSIntel end = NULL; 231af75078fSIntel pm = strtoull(portmask, &end, 16); 232af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 233af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n"); 234af75078fSIntel else 235af75078fSIntel set_fwd_ports_mask((uint64_t) pm); 236af75078fSIntel } 237af75078fSIntel 238ed30d9b6SIntel 239ed30d9b6SIntel static int 240ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx) 241ed30d9b6SIntel { 242ed30d9b6SIntel char s[256]; 243ed30d9b6SIntel const char *p, *p0 = q_arg; 244ed30d9b6SIntel char *end; 245ed30d9b6SIntel enum fieldnames { 246ed30d9b6SIntel FLD_PORT = 0, 247ed30d9b6SIntel FLD_QUEUE, 248ed30d9b6SIntel FLD_STATS_COUNTER, 249ed30d9b6SIntel _NUM_FLD 250ed30d9b6SIntel }; 251ed30d9b6SIntel unsigned long int_fld[_NUM_FLD]; 252ed30d9b6SIntel char *str_fld[_NUM_FLD]; 253ed30d9b6SIntel int i; 254ed30d9b6SIntel unsigned size; 255ed30d9b6SIntel 256ed30d9b6SIntel /* reset from value set at definition */ 257ed30d9b6SIntel is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0); 258ed30d9b6SIntel 259ed30d9b6SIntel while ((p = strchr(p0,'(')) != NULL) { 260ed30d9b6SIntel ++p; 261ed30d9b6SIntel if((p0 = strchr(p,')')) == NULL) 262ed30d9b6SIntel return -1; 263ed30d9b6SIntel 264ed30d9b6SIntel size = p0 - p; 265ed30d9b6SIntel if(size >= sizeof(s)) 266ed30d9b6SIntel return -1; 267ed30d9b6SIntel 268ed30d9b6SIntel rte_snprintf(s, sizeof(s), "%.*s", size, p); 269ed30d9b6SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 270ed30d9b6SIntel return -1; 271ed30d9b6SIntel for (i = 0; i < _NUM_FLD; i++){ 272ed30d9b6SIntel errno = 0; 273ed30d9b6SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 274ed30d9b6SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 275ed30d9b6SIntel return -1; 276ed30d9b6SIntel } 277ed30d9b6SIntel /* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */ 278ed30d9b6SIntel if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) { 279ed30d9b6SIntel printf("Stats counter not in the correct range 0..%d\n", 280ed30d9b6SIntel RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 281ed30d9b6SIntel return -1; 282ed30d9b6SIntel } 283ed30d9b6SIntel 284ed30d9b6SIntel if (is_rx ? (nb_rx_queue_stats_mappings >= MAX_RX_QUEUE_STATS_MAPPINGS) : 285ed30d9b6SIntel (nb_tx_queue_stats_mappings >= MAX_TX_QUEUE_STATS_MAPPINGS)) { 286ed30d9b6SIntel printf("exceeded max number of %s queue statistics mappings: %hu\n", 287ed30d9b6SIntel is_rx ? "RX" : "TX", 288ed30d9b6SIntel is_rx ? nb_rx_queue_stats_mappings : nb_tx_queue_stats_mappings); 289ed30d9b6SIntel return -1; 290ed30d9b6SIntel } 291ed30d9b6SIntel if (!is_rx) { 292ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id = 293ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 294ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id = 295ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 296ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id = 297ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 298ed30d9b6SIntel ++nb_tx_queue_stats_mappings; 299ed30d9b6SIntel } 300ed30d9b6SIntel else { 301ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id = 302ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 303ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id = 304ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 305ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id = 306ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 307ed30d9b6SIntel ++nb_rx_queue_stats_mappings; 308ed30d9b6SIntel } 309ed30d9b6SIntel 310ed30d9b6SIntel } 311ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */ 312ed30d9b6SIntel /* than to the default array (that was set at its definition) */ 313ed30d9b6SIntel is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) : 314ed30d9b6SIntel (tx_queue_stats_mappings = tx_queue_stats_mappings_array); 315ed30d9b6SIntel return 0; 316ed30d9b6SIntel } 317ed30d9b6SIntel 318ed30d9b6SIntel 319af75078fSIntel void 320af75078fSIntel launch_args_parse(int argc, char** argv) 321af75078fSIntel { 322af75078fSIntel int n, opt; 323af75078fSIntel char **argvopt; 324af75078fSIntel int opt_idx; 325af75078fSIntel static struct option lgopts[] = { 326af75078fSIntel { "help", 0, 0, 0 }, 327af75078fSIntel { "interactive", 0, 0, 0 }, 328af75078fSIntel { "eth-peers-configfile", 1, 0, 0 }, 329af75078fSIntel { "eth-peer", 1, 0, 0 }, 330af75078fSIntel { "ports", 1, 0, 0 }, 331af75078fSIntel { "nb-cores", 1, 0, 0 }, 332af75078fSIntel { "nb-ports", 1, 0, 0 }, 333af75078fSIntel { "coremask", 1, 0, 0 }, 334af75078fSIntel { "portmask", 1, 0, 0 }, 335af75078fSIntel { "numa", 0, 0, 0 }, 336af75078fSIntel { "mbuf-size", 1, 0, 0 }, 337c8798818SIntel { "total-num-mbufs", 1, 0, 0 }, 338af75078fSIntel { "max-pkt-len", 1, 0, 0 }, 339af75078fSIntel { "pkt-filter-mode", 1, 0, 0 }, 340af75078fSIntel { "pkt-filter-report-hash", 1, 0, 0 }, 341af75078fSIntel { "pkt-filter-size", 1, 0, 0 }, 342af75078fSIntel { "pkt-filter-flexbytes-offset",1, 0, 0 }, 343af75078fSIntel { "pkt-filter-drop-queue", 1, 0, 0 }, 344af75078fSIntel { "crc-strip", 0, 0, 0 }, 345af75078fSIntel { "disable-hw-vlan", 0, 0, 0 }, 346af75078fSIntel { "disable-rss", 0, 0, 0 }, 347af75078fSIntel { "port-topology", 1, 0, 0 }, 348af75078fSIntel { "rss-ip", 0, 0, 0 }, 349af75078fSIntel { "rss-udp", 0, 0, 0 }, 350af75078fSIntel { "rxq", 1, 0, 0 }, 351af75078fSIntel { "txq", 1, 0, 0 }, 352af75078fSIntel { "rxd", 1, 0, 0 }, 353af75078fSIntel { "txd", 1, 0, 0 }, 354af75078fSIntel { "burst", 1, 0, 0 }, 355af75078fSIntel { "mbcache", 1, 0, 0 }, 356af75078fSIntel { "txpt", 1, 0, 0 }, 357af75078fSIntel { "txht", 1, 0, 0 }, 358af75078fSIntel { "txwt", 1, 0, 0 }, 359af75078fSIntel { "txfreet", 1, 0, 0 }, 360af75078fSIntel { "txrst", 1, 0, 0 }, 361*ce8d5614SIntel { "txqflags", 1, 0, 0 }, 362af75078fSIntel { "rxpt", 1, 0, 0 }, 363af75078fSIntel { "rxht", 1, 0, 0 }, 364af75078fSIntel { "rxwt", 1, 0, 0 }, 365af75078fSIntel { "rxfreet", 1, 0, 0 }, 366ed30d9b6SIntel { "tx-queue-stats-mapping", 1, 0, 0 }, 367ed30d9b6SIntel { "rx-queue-stats-mapping", 1, 0, 0 }, 368af75078fSIntel { 0, 0, 0, 0 }, 369af75078fSIntel }; 370af75078fSIntel 371af75078fSIntel argvopt = argv; 372af75078fSIntel 373af75078fSIntel while ((opt = getopt_long(argc, argvopt, "ih", 374af75078fSIntel lgopts, &opt_idx)) != EOF) { 375af75078fSIntel switch (opt) { 376af75078fSIntel case 'i': 377af75078fSIntel printf("Interactive-mode selected\n"); 378af75078fSIntel interactive = 1; 379af75078fSIntel break; 380af75078fSIntel case 0: /*long options */ 381af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "help")) { 382af75078fSIntel usage(argv[0]); 383af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 384af75078fSIntel } 385af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "interactive")) { 386af75078fSIntel printf("Interactive-mode selected\n"); 387af75078fSIntel interactive = 1; 388af75078fSIntel } 389af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 390af75078fSIntel "eth-peers-configfile")) { 391af75078fSIntel if (init_peer_eth_addrs(optarg) != 0) 392af75078fSIntel rte_exit(EXIT_FAILURE, 393af75078fSIntel "Cannot open logfile\n"); 394af75078fSIntel } 395af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "eth-peer")) { 396af75078fSIntel char *port_end; 397af75078fSIntel uint8_t c, peer_addr[6]; 398af75078fSIntel 399af75078fSIntel errno = 0; 400af75078fSIntel n = strtoul(optarg, &port_end, 10); 401af75078fSIntel if (errno != 0 || port_end == optarg || *port_end++ != ',') 402af75078fSIntel rte_exit(EXIT_FAILURE, 403af75078fSIntel "Invalid eth-peer: %s", optarg); 404af75078fSIntel if (n >= RTE_MAX_ETHPORTS) 405af75078fSIntel rte_exit(EXIT_FAILURE, 406af75078fSIntel "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n", 407af75078fSIntel n, RTE_MAX_ETHPORTS); 408af75078fSIntel 409af75078fSIntel if (cmdline_parse_etheraddr(NULL, port_end, &peer_addr) < 0 ) 410af75078fSIntel rte_exit(EXIT_FAILURE, 411af75078fSIntel "Invalid ethernet address: %s\n", 412af75078fSIntel port_end); 413af75078fSIntel for (c = 0; c < 6; c++) 414af75078fSIntel peer_eth_addrs[n].addr_bytes[c] = 415af75078fSIntel peer_addr[c]; 416af75078fSIntel nb_peer_eth_addrs++; 417af75078fSIntel } 418af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-ports")) { 419af75078fSIntel n = atoi(optarg); 420af75078fSIntel if (n > 0 && n <= nb_ports) 421af75078fSIntel nb_fwd_ports = (uint8_t) n; 422af75078fSIntel else 423af75078fSIntel rte_exit(EXIT_FAILURE, 424af75078fSIntel "nb-ports should be > 0 and <= %d\n", 425af75078fSIntel nb_ports); 426af75078fSIntel } 427af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-cores")) { 428af75078fSIntel n = atoi(optarg); 429af75078fSIntel if (n > 0 && n <= nb_lcores) 430af75078fSIntel nb_fwd_lcores = (uint8_t) n; 431af75078fSIntel else 432af75078fSIntel rte_exit(EXIT_FAILURE, 433af75078fSIntel "nb-cores should be > 0 and <= %d\n", 434af75078fSIntel nb_lcores); 435af75078fSIntel } 436af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "coremask")) 437af75078fSIntel parse_fwd_coremask(optarg); 438af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "portmask")) 439af75078fSIntel parse_fwd_portmask(optarg); 440af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "numa")) 441af75078fSIntel numa_support = 1; 442af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) { 443af75078fSIntel n = atoi(optarg); 444af75078fSIntel if (n > 0 && n <= 0xFFFF) 445af75078fSIntel mbuf_data_size = (uint16_t) n; 446af75078fSIntel else 447af75078fSIntel rte_exit(EXIT_FAILURE, 448af75078fSIntel "mbuf-size should be > 0 and < 65536\n"); 449af75078fSIntel } 450c8798818SIntel if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) { 451c8798818SIntel n = atoi(optarg); 452c8798818SIntel if (n > 1024) 453c8798818SIntel param_total_num_mbufs = (unsigned)n; 454c8798818SIntel else 455c8798818SIntel rte_exit(EXIT_FAILURE, 456c8798818SIntel "total-num-mbufs should be > 1024\n"); 457c8798818SIntel } 458af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) { 459af75078fSIntel n = atoi(optarg); 460af75078fSIntel if (n >= ETHER_MIN_LEN) { 461af75078fSIntel rx_mode.max_rx_pkt_len = (uint32_t) n; 462af75078fSIntel if (n > ETHER_MAX_LEN) 463af75078fSIntel rx_mode.jumbo_frame = 1; 464af75078fSIntel } else 465af75078fSIntel rte_exit(EXIT_FAILURE, 466af75078fSIntel "Invalid max-pkt-len=%d - should be > %d\n", 467af75078fSIntel n, ETHER_MIN_LEN); 468af75078fSIntel } 469af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) { 470af75078fSIntel if (!strcmp(optarg, "signature")) 471af75078fSIntel fdir_conf.mode = 472af75078fSIntel RTE_FDIR_MODE_SIGNATURE; 473af75078fSIntel else if (!strcmp(optarg, "perfect")) 474af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_PERFECT; 475af75078fSIntel else if (!strcmp(optarg, "none")) 476af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_NONE; 477af75078fSIntel else 478af75078fSIntel rte_exit(EXIT_FAILURE, 479af75078fSIntel "pkt-mode-invalid %s invalid - must be: " 480af75078fSIntel "none, signature or perfect\n", 481af75078fSIntel optarg); 482af75078fSIntel } 483af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 484af75078fSIntel "pkt-filter-report-hash")) { 485af75078fSIntel if (!strcmp(optarg, "none")) 486af75078fSIntel fdir_conf.status = 487af75078fSIntel RTE_FDIR_NO_REPORT_STATUS; 488af75078fSIntel else if (!strcmp(optarg, "match")) 489af75078fSIntel fdir_conf.status = 490af75078fSIntel RTE_FDIR_REPORT_STATUS; 491af75078fSIntel else if (!strcmp(optarg, "always")) 492af75078fSIntel fdir_conf.status = 493af75078fSIntel RTE_FDIR_REPORT_STATUS_ALWAYS; 494af75078fSIntel else 495af75078fSIntel rte_exit(EXIT_FAILURE, 496af75078fSIntel "pkt-filter-report-hash %s invalid " 497af75078fSIntel "- must be: none or match or always\n", 498af75078fSIntel optarg); 499af75078fSIntel } 500af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) { 501af75078fSIntel if (!strcmp(optarg, "64K")) 502af75078fSIntel fdir_conf.pballoc = 503af75078fSIntel RTE_FDIR_PBALLOC_64K; 504af75078fSIntel else if (!strcmp(optarg, "128K")) 505af75078fSIntel fdir_conf.pballoc = 506af75078fSIntel RTE_FDIR_PBALLOC_128K; 507af75078fSIntel else if (!strcmp(optarg, "256K")) 508af75078fSIntel fdir_conf.pballoc = 509af75078fSIntel RTE_FDIR_PBALLOC_256K; 510af75078fSIntel else 511af75078fSIntel rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -" 512af75078fSIntel " must be: 64K or 128K or 256K\n", 513af75078fSIntel optarg); 514af75078fSIntel } 515af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 516af75078fSIntel "pkt-filter-flexbytes-offset")) { 517af75078fSIntel n = atoi(optarg); 518af75078fSIntel if ( n >= 0 && n <= (int) 32) 519af75078fSIntel fdir_conf.flexbytes_offset = 520af75078fSIntel (uint8_t) n; 521af75078fSIntel else 522af75078fSIntel rte_exit(EXIT_FAILURE, 523af75078fSIntel "flexbytes %d invalid - must" 524af75078fSIntel "be >= 0 && <= 32\n", n); 525af75078fSIntel } 526af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 527af75078fSIntel "pkt-filter-drop-queue")) { 528af75078fSIntel n = atoi(optarg); 529af75078fSIntel if (n >= 0) 530af75078fSIntel fdir_conf.drop_queue = (uint8_t) n; 531af75078fSIntel else 532af75078fSIntel rte_exit(EXIT_FAILURE, 533af75078fSIntel "drop queue %d invalid - must" 534af75078fSIntel "be >= 0 \n", n); 535af75078fSIntel } 536af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "crc-strip")) 537af75078fSIntel rx_mode.hw_strip_crc = 1; 538af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum")) 539af75078fSIntel rx_mode.hw_ip_checksum = 1; 540a47aa8b9SIntel 541a47aa8b9SIntel if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) { 542af75078fSIntel rx_mode.hw_vlan_filter = 0; 543a47aa8b9SIntel rx_mode.hw_vlan_strip = 0; 544a47aa8b9SIntel rx_mode.hw_vlan_extend = 0; 545a47aa8b9SIntel } 546a47aa8b9SIntel 547*ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "enable-drop-en")) 548*ce8d5614SIntel rx_drop_en = 1; 549*ce8d5614SIntel 550af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "disable-rss")) 551af75078fSIntel rss_hf = 0; 552af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "port-topology")) { 553af75078fSIntel if (!strcmp(optarg, "paired")) 554af75078fSIntel port_topology = PORT_TOPOLOGY_PAIRED; 555af75078fSIntel else if (!strcmp(optarg, "chained")) 556af75078fSIntel port_topology = PORT_TOPOLOGY_CHAINED; 557af75078fSIntel else 558af75078fSIntel rte_exit(EXIT_FAILURE, "port-topology %s invalid -" 559af75078fSIntel " must be: paired or chained \n", 560af75078fSIntel optarg); 561af75078fSIntel } 562af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-ip")) 563af75078fSIntel rss_hf = ETH_RSS_IPV4 | ETH_RSS_IPV6; 564af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-udp")) 565af75078fSIntel rss_hf = ETH_RSS_IPV4 | ETH_RSS_IPV6 | 566af75078fSIntel ETH_RSS_IPV4_UDP; 567af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxq")) { 568af75078fSIntel n = atoi(optarg); 569af75078fSIntel if (n >= 1 && n <= (int) MAX_QUEUE_ID) 570af75078fSIntel nb_rxq = (queueid_t) n; 571af75078fSIntel else 572af75078fSIntel rte_exit(EXIT_FAILURE, "rxq %d invalid - must be" 573af75078fSIntel " >= 1 && <= %d\n", n, 574af75078fSIntel (int) MAX_QUEUE_ID); 575af75078fSIntel } 576af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txq")) { 577af75078fSIntel n = atoi(optarg); 578af75078fSIntel if (n >= 1 && n <= (int) MAX_QUEUE_ID) 579af75078fSIntel nb_txq = (queueid_t) n; 580af75078fSIntel else 581af75078fSIntel rte_exit(EXIT_FAILURE, "txq %d invalid - must be" 582af75078fSIntel " >= 1 && <= %d\n", n, 583af75078fSIntel (int) MAX_QUEUE_ID); 584af75078fSIntel } 585af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 586af75078fSIntel n = atoi(optarg); 587af75078fSIntel if (n > 0) 588af75078fSIntel nb_rxd = (uint16_t) n; 589af75078fSIntel else 590af75078fSIntel rte_exit(EXIT_FAILURE, "rxd must be > 0\n"); 591af75078fSIntel } 592af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 593af75078fSIntel n = atoi(optarg); 594af75078fSIntel if (n > 0) 595af75078fSIntel nb_txd = (uint16_t) n; 596af75078fSIntel else 597af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 598af75078fSIntel } 599af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "burst")) { 600af75078fSIntel n = atoi(optarg); 601af75078fSIntel if ((n >= 1) && (n <= MAX_PKT_BURST)) 602af75078fSIntel nb_pkt_per_burst = (uint16_t) n; 603af75078fSIntel else 604af75078fSIntel rte_exit(EXIT_FAILURE, 605af75078fSIntel "burst must >= 1 and <= %d]", 606af75078fSIntel MAX_PKT_BURST); 607af75078fSIntel } 608af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbcache")) { 609af75078fSIntel n = atoi(optarg); 610af75078fSIntel if ((n >= 0) && 611af75078fSIntel (n <= RTE_MEMPOOL_CACHE_MAX_SIZE)) 612af75078fSIntel mb_mempool_cache = (uint16_t) n; 613af75078fSIntel else 614af75078fSIntel rte_exit(EXIT_FAILURE, 615af75078fSIntel "mbcache must be >= 0 and <= %d\n", 616af75078fSIntel RTE_MEMPOOL_CACHE_MAX_SIZE); 617af75078fSIntel } 618af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 619af75078fSIntel n = atoi(optarg); 620af75078fSIntel if (n >= 0) 621af75078fSIntel tx_thresh.pthresh = (uint8_t)n; 622af75078fSIntel else 623af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 624af75078fSIntel } 625af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 626af75078fSIntel n = atoi(optarg); 627af75078fSIntel if (n >= 0) 628af75078fSIntel tx_thresh.hthresh = (uint8_t)n; 629af75078fSIntel else 630af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 631af75078fSIntel } 632af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 633af75078fSIntel n = atoi(optarg); 634af75078fSIntel if (n >= 0) 635af75078fSIntel tx_thresh.wthresh = (uint8_t)n; 636af75078fSIntel else 637af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 638af75078fSIntel } 639af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txfreet")) { 640af75078fSIntel n = atoi(optarg); 641af75078fSIntel if (n >= 0) 642af75078fSIntel tx_free_thresh = (uint16_t)n; 643af75078fSIntel else 644af75078fSIntel rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n"); 645af75078fSIntel } 646af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txrst")) { 647af75078fSIntel n = atoi(optarg); 648af75078fSIntel if (n >= 0) 649af75078fSIntel tx_rs_thresh = (uint16_t)n; 650af75078fSIntel else 651af75078fSIntel rte_exit(EXIT_FAILURE, "txrst must be >= 0\n"); 652af75078fSIntel } 653*ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "txqflags")) { 654*ce8d5614SIntel char *end = NULL; 655*ce8d5614SIntel n = strtoul(optarg, &end, 16); 656*ce8d5614SIntel if (n >= 0) 657*ce8d5614SIntel txq_flags = (uint32_t)n; 658*ce8d5614SIntel else 659*ce8d5614SIntel rte_exit(EXIT_FAILURE, 660*ce8d5614SIntel "txqflags must be >= 0\n"); 661*ce8d5614SIntel } 662af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 663af75078fSIntel n = atoi(optarg); 664af75078fSIntel if (n >= 0) 665af75078fSIntel rx_thresh.pthresh = (uint8_t)n; 666af75078fSIntel else 667af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 668af75078fSIntel } 669af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 670af75078fSIntel n = atoi(optarg); 671af75078fSIntel if (n >= 0) 672af75078fSIntel rx_thresh.hthresh = (uint8_t)n; 673af75078fSIntel else 674af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 675af75078fSIntel } 676af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 677af75078fSIntel n = atoi(optarg); 678af75078fSIntel if (n >= 0) 679af75078fSIntel rx_thresh.wthresh = (uint8_t)n; 680af75078fSIntel else 681af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 682af75078fSIntel } 683af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 684af75078fSIntel n = atoi(optarg); 685af75078fSIntel if (n > 0) { 686af75078fSIntel if (rx_free_thresh >= n) 687af75078fSIntel rte_exit(EXIT_FAILURE, 688af75078fSIntel "rxd must be > " 689af75078fSIntel "rx_free_thresh(%d)\n", 690af75078fSIntel (int)rx_free_thresh); 691af75078fSIntel else 692af75078fSIntel nb_rxd = (uint16_t) n; 693af75078fSIntel } else 694af75078fSIntel rte_exit(EXIT_FAILURE, 695af75078fSIntel "rxd(%d) invalid - must be > 0\n", 696af75078fSIntel n); 697af75078fSIntel } 698af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 699af75078fSIntel n = atoi(optarg); 700af75078fSIntel if (n > 0) 701af75078fSIntel nb_txd = (uint16_t) n; 702af75078fSIntel else 703af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 704af75078fSIntel } 705af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 706af75078fSIntel n = atoi(optarg); 707af75078fSIntel if (n >= 0) 708af75078fSIntel tx_thresh.pthresh = (uint8_t)n; 709af75078fSIntel else 710af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 711af75078fSIntel } 712af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 713af75078fSIntel n = atoi(optarg); 714af75078fSIntel if (n >= 0) 715af75078fSIntel tx_thresh.hthresh = (uint8_t)n; 716af75078fSIntel else 717af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 718af75078fSIntel } 719af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 720af75078fSIntel n = atoi(optarg); 721af75078fSIntel if (n >= 0) 722af75078fSIntel tx_thresh.wthresh = (uint8_t)n; 723af75078fSIntel else 724af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 725af75078fSIntel } 726af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 727af75078fSIntel n = atoi(optarg); 728af75078fSIntel if (n >= 0) 729af75078fSIntel rx_thresh.pthresh = (uint8_t)n; 730af75078fSIntel else 731af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 732af75078fSIntel } 733af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 734af75078fSIntel n = atoi(optarg); 735af75078fSIntel if (n >= 0) 736af75078fSIntel rx_thresh.hthresh = (uint8_t)n; 737af75078fSIntel else 738af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 739af75078fSIntel } 740af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 741af75078fSIntel n = atoi(optarg); 742af75078fSIntel if (n >= 0) 743af75078fSIntel rx_thresh.wthresh = (uint8_t)n; 744af75078fSIntel else 745af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 746af75078fSIntel } 747af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxfreet")) { 748af75078fSIntel n = atoi(optarg); 749af75078fSIntel if (n >= 0) 750af75078fSIntel rx_free_thresh = (uint16_t)n; 751af75078fSIntel else 752af75078fSIntel rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n"); 753af75078fSIntel } 754ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) { 755ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, TX)) { 756ed30d9b6SIntel rte_exit(EXIT_FAILURE, 757ed30d9b6SIntel "invalid TX queue statistics mapping config entered\n"); 758ed30d9b6SIntel } 759ed30d9b6SIntel } 760ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) { 761ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, RX)) { 762ed30d9b6SIntel rte_exit(EXIT_FAILURE, 763ed30d9b6SIntel "invalid RX queue statistics mapping config entered\n"); 764ed30d9b6SIntel } 765ed30d9b6SIntel } 766af75078fSIntel break; 767af75078fSIntel case 'h': 768af75078fSIntel usage(argv[0]); 769af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 770af75078fSIntel break; 771af75078fSIntel default: 772af75078fSIntel usage(argv[0]); 773af75078fSIntel rte_exit(EXIT_FAILURE, 774af75078fSIntel "Command line is incomplete or incorrect\n"); 775af75078fSIntel break; 776af75078fSIntel } 777af75078fSIntel } 778af75078fSIntel } 779