xref: /dpdk/app/test-pmd/parameters.c (revision ca7feb2273665ac7544979461f83dbde3ed69c22)
1af75078fSIntel /*-
2af75078fSIntel  *   BSD LICENSE
3af75078fSIntel  *
4e9d48c00SBruce Richardson  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5af75078fSIntel  *   All rights reserved.
6af75078fSIntel  *
7af75078fSIntel  *   Redistribution and use in source and binary forms, with or without
8af75078fSIntel  *   modification, are permitted provided that the following conditions
9af75078fSIntel  *   are met:
10af75078fSIntel  *
11af75078fSIntel  *     * Redistributions of source code must retain the above copyright
12af75078fSIntel  *       notice, this list of conditions and the following disclaimer.
13af75078fSIntel  *     * Redistributions in binary form must reproduce the above copyright
14af75078fSIntel  *       notice, this list of conditions and the following disclaimer in
15af75078fSIntel  *       the documentation and/or other materials provided with the
16af75078fSIntel  *       distribution.
17af75078fSIntel  *     * Neither the name of Intel Corporation nor the names of its
18af75078fSIntel  *       contributors may be used to endorse or promote products derived
19af75078fSIntel  *       from this software without specific prior written permission.
20af75078fSIntel  *
21af75078fSIntel  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22af75078fSIntel  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23af75078fSIntel  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24af75078fSIntel  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25af75078fSIntel  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26af75078fSIntel  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27af75078fSIntel  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28af75078fSIntel  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29af75078fSIntel  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30af75078fSIntel  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31af75078fSIntel  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32af75078fSIntel  */
33af75078fSIntel 
34af75078fSIntel #include <errno.h>
35af75078fSIntel #include <getopt.h>
36af75078fSIntel #include <stdarg.h>
37af75078fSIntel #include <stdio.h>
38af75078fSIntel #include <stdlib.h>
39af75078fSIntel #include <signal.h>
40af75078fSIntel #include <string.h>
41af75078fSIntel #include <time.h>
42af75078fSIntel #include <fcntl.h>
43af75078fSIntel #include <sys/types.h>
44af75078fSIntel #include <errno.h>
45af75078fSIntel 
46af75078fSIntel #include <sys/queue.h>
47af75078fSIntel #include <sys/stat.h>
48af75078fSIntel 
49af75078fSIntel #include <stdint.h>
50af75078fSIntel #include <unistd.h>
51af75078fSIntel #include <inttypes.h>
52af75078fSIntel 
53af75078fSIntel #include <rte_common.h>
54af75078fSIntel #include <rte_byteorder.h>
55af75078fSIntel #include <rte_log.h>
56af75078fSIntel #include <rte_debug.h>
57af75078fSIntel #include <rte_cycles.h>
58af75078fSIntel #include <rte_memory.h>
59af75078fSIntel #include <rte_memzone.h>
60af75078fSIntel #include <rte_launch.h>
61af75078fSIntel #include <rte_tailq.h>
62af75078fSIntel #include <rte_eal.h>
63af75078fSIntel #include <rte_per_lcore.h>
64af75078fSIntel #include <rte_lcore.h>
65af75078fSIntel #include <rte_atomic.h>
66af75078fSIntel #include <rte_branch_prediction.h>
67af75078fSIntel #include <rte_ring.h>
68af75078fSIntel #include <rte_mempool.h>
69af75078fSIntel #include <rte_interrupts.h>
70af75078fSIntel #include <rte_pci.h>
71af75078fSIntel #include <rte_ether.h>
72af75078fSIntel #include <rte_ethdev.h>
73af75078fSIntel #include <rte_string_fns.h>
740d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
75af75078fSIntel #include <cmdline_parse.h>
76af75078fSIntel #include <cmdline_parse_etheraddr.h>
770d56cb81SThomas Monjalon #endif
78af75078fSIntel 
79af75078fSIntel #include "testpmd.h"
80af75078fSIntel 
81af75078fSIntel static void
82af75078fSIntel usage(char* progname)
83af75078fSIntel {
840d56cb81SThomas Monjalon 	printf("usage: %s "
850d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
860d56cb81SThomas Monjalon 	       "[--interactive|-i] "
870d56cb81SThomas Monjalon #endif
88*ca7feb22SCyril Chemparathy 	       "[--help|-h] | [--auto-start|-a] | ["
89af75078fSIntel 	       "--coremask=COREMASK --portmask=PORTMASK --numa "
90c8798818SIntel 	       "--mbuf-size= | --total-num-mbufs= | "
913be52ffcSIntel 	       "--nb-cores= | --nb-ports= | "
920d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
93af75078fSIntel 	       "--eth-peers-configfile= | "
943be52ffcSIntel 	       "--eth-peer=X,M:M:M:M:M:M | "
950d56cb81SThomas Monjalon #endif
96af75078fSIntel 	       "--pkt-filter-mode= |"
97af75078fSIntel 	       "--rss-ip | --rss-udp | "
98af75078fSIntel 	       "--rxpt= | --rxht= | --rxwt= | --rxfreet= | "
99af75078fSIntel 	       "--txpt= | --txht= | --txwt= | --txfreet= | "
100ce8d5614SIntel 	       "--txrst= | --txqflags= ]\n",
101af75078fSIntel 	       progname);
1020d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
1033be52ffcSIntel 	printf("  --interactive: run in interactive mode.\n");
1040d56cb81SThomas Monjalon #endif
105*ca7feb22SCyril Chemparathy 	printf("  --auto-start: start forwarding on init "
106*ca7feb22SCyril Chemparathy 	       "[always when non-interactive].\n");
1073be52ffcSIntel 	printf("  --help: display this message and quit.\n");
1083be52ffcSIntel 	printf("  --nb-cores=N: set the number of forwarding cores "
1093be52ffcSIntel 	       "(1 <= N <= %d).\n", nb_lcores);
1103be52ffcSIntel 	printf("  --nb-ports=N: set the number of forwarding ports "
1113be52ffcSIntel 	       "(1 <= N <= %d).\n", nb_ports);
112af75078fSIntel 	printf("  --coremask=COREMASK: hexadecimal bitmask of cores running "
113013af9b6SIntel 	       "the packet forwarding test. The master lcore is reserved for "
1143be52ffcSIntel 	       "command line parsing only, and cannot be masked on for "
1153be52ffcSIntel 	       "packet forwarding.\n");
116af75078fSIntel 	printf("  --portmask=PORTMASK: hexadecimal bitmask of ports used "
1173be52ffcSIntel 	       "by the packet forwarding test.\n");
118af75078fSIntel 	printf("  --numa: enable NUMA-aware allocation of RX/TX rings and of "
1193be52ffcSIntel 	       "RX memory buffers (mbufs).\n");
120b6ea6408SIntel 	printf("  --port-numa-config=(port,socket)[,(port,socket)]: "
121b6ea6408SIntel 	       "specify the socket on which the memory pool "
122b6ea6408SIntel 	       "used by the port will be allocated.\n");
123b6ea6408SIntel 	printf("  --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: "
124b6ea6408SIntel 	       "specify the socket on which the TX/RX rings for "
125b6ea6408SIntel 	       "the port will be allocated "
126b6ea6408SIntel 	       "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n");
127b6ea6408SIntel 	printf("  --socket-num=N: set socket from which all memory is allocated "
128b6ea6408SIntel 	       "in NUMA mode.\n");
1293be52ffcSIntel 	printf("  --mbuf-size=N: set the data size of mbuf to N bytes.\n");
1303be52ffcSIntel 	printf("  --total-num-mbufs=N: set the number of mbufs to be allocated "
1313be52ffcSIntel 	       "in mbuf pools.\n");
1323be52ffcSIntel 	printf("  --max-pkt-len=N: set the maximum size of packet to N bytes.\n");
1330d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
1343be52ffcSIntel 	printf("  --eth-peers-configfile=name: config file with ethernet addresses "
1353be52ffcSIntel 	       "of peer ports.\n");
1363be52ffcSIntel 	printf("  --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer "
1373be52ffcSIntel 	       "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS);
1380d56cb81SThomas Monjalon #endif
1393be52ffcSIntel 	printf("  --pkt-filter-mode=N: set Flow Director mode "
1403be52ffcSIntel 	       "(N: none (default mode) or signature or perfect).\n");
1413be52ffcSIntel 	printf("  --pkt-filter-report-hash=N: set Flow Director report mode "
1423be52ffcSIntel 	       "(N: none  or match (default) or always).\n");
1433be52ffcSIntel 	printf("  --pkt-filter-size=N: set Flow Director mode "
1443be52ffcSIntel 	       "(N: 64K (default mode) or 128K or 256K).\n");
145af75078fSIntel 	printf("  --pkt-filter-flexbytes-offset=N: set flexbytes-offset. "
146af75078fSIntel 	       "The offset is defined in word units counted from the "
147af75078fSIntel 	       "first byte of the destination Ethernet MAC address. "
1483be52ffcSIntel 	       "0 <= N <= 32.\n");
149af75078fSIntel 	printf("  --pkt-filter-drop-queue=N: set drop-queue. "
1503be52ffcSIntel 	       "In perfect mode, when you add a rule with queue = -1 "
151af75078fSIntel 	       "the packet will be enqueued into the rx drop-queue. "
152af75078fSIntel 	       "If the drop-queue doesn't exist, the packet is dropped. "
1533be52ffcSIntel 	       "By default drop-queue=127.\n");
1543be52ffcSIntel 	printf("  --crc-strip: enable CRC stripping by hardware.\n");
1553be52ffcSIntel 	printf("  --enable-rx-cksum: enable rx hardware checksum offload.\n");
1563be52ffcSIntel 	printf("  --disable-hw-vlan: disable hardware vlan.\n");
1573be52ffcSIntel 	printf("  --enable-drop-en: enable per queue packet drop.\n");
1583be52ffcSIntel 	printf("  --disable-rss: disable rss.\n");
159af75078fSIntel 	printf("  --port-topology=N: set port topology (N: paired (default) or "
1603be52ffcSIntel 	       "chained).\n");
1613be52ffcSIntel 	printf("  --rss-ip: set RSS functions to IPv4/IPv6 only .\n");
1623be52ffcSIntel 	printf("  --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n");
1633be52ffcSIntel 	printf("  --rxq=N: set the number of RX queues per port to N.\n");
1643be52ffcSIntel 	printf("  --rxd=N: set the number of descriptors in RX rings to N.\n");
1653be52ffcSIntel 	printf("  --txq=N: set the number of TX queues per port to N.\n");
1663be52ffcSIntel 	printf("  --txd=N: set the number of descriptors in TX rings to N.\n");
1673be52ffcSIntel 	printf("  --burst=N: set the number of packets per burst to N.\n");
1683be52ffcSIntel 	printf("  --mbcache=N: set the cache of mbuf memory pool to N.\n");
1693be52ffcSIntel 	printf("  --rxpt=N: set prefetch threshold register of RX rings to N "
1703be52ffcSIntel 	       "(0 <= N <= 16).\n");
1713be52ffcSIntel 	printf("  --rxht=N: set the host threshold register of RX rings to N "
1723be52ffcSIntel 	       "(0 <= N <= 16).\n");
1733be52ffcSIntel 	printf("  --rxfreet=N: set the free threshold of RX descriptors to N "
1743be52ffcSIntel 	       "(0 <= N < value of rxd).\n");
1753be52ffcSIntel 	printf("  --rxwt=N: set the write-back threshold register of RX rings "
1763be52ffcSIntel 	       "to N (0 <= N <= 16).\n");
1773be52ffcSIntel 	printf("  --txpt=N: set the prefetch threshold register of TX rings "
1783be52ffcSIntel 	       "to N (0 <= N <= 16).\n");
1793be52ffcSIntel 	printf("  --txht=N: set the nhost threshold register of TX rings to N "
1803be52ffcSIntel 	       "(0 <= N <= 16).\n");
1813be52ffcSIntel 	printf("  --txwt=N: set the write-back threshold register of TX rings "
1823be52ffcSIntel 	       "to N (0 <= N <= 16).\n");
1833be52ffcSIntel 	printf("  --txfreet=N: set the transmit free threshold of TX rings to N "
1843be52ffcSIntel 	       "(0 <= N <= value of txd).\n");
1853be52ffcSIntel 	printf("  --txrst=N: set the transmit RS bit threshold of TX rings to N "
1863be52ffcSIntel 	       "(0 <= N <= value of txd).\n");
1873be52ffcSIntel 	printf("  --txqflags=0xXXXXXXXX: hexadecimal bitmask of TX queue flags "
1883be52ffcSIntel 	       "(0 <= N <= 0x7FFFFFFF).\n");
1893be52ffcSIntel 	printf("  --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: "
190ed30d9b6SIntel 	       "tx queues statistics counters mapping "
1913be52ffcSIntel 	       "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1923be52ffcSIntel 	printf("  --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: "
193ed30d9b6SIntel 	       "rx queues statistics counters mapping "
1943be52ffcSIntel 	       "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1955e2ee196SIntel 	printf("  --no-flush-rx: Don't flush RX streams before forwarding."
1965e2ee196SIntel 	       " Used mainly with PCAP drivers.\n");
197af75078fSIntel }
198af75078fSIntel 
1990d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
200af75078fSIntel static int
201af75078fSIntel init_peer_eth_addrs(char *config_filename)
202af75078fSIntel {
203af75078fSIntel 	FILE *config_file;
204af75078fSIntel 	portid_t i;
205af75078fSIntel 	char buf[50];
206af75078fSIntel 
207af75078fSIntel 	config_file = fopen(config_filename, "r");
208af75078fSIntel 	if (config_file == NULL) {
2093be52ffcSIntel 		perror("Failed to open eth config file\n");
210af75078fSIntel 		return -1;
211af75078fSIntel 	}
212af75078fSIntel 
213af75078fSIntel 	for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
214af75078fSIntel 
215af75078fSIntel 		if (fgets(buf, sizeof(buf), config_file) == NULL)
216af75078fSIntel 			break;
217af75078fSIntel 
218af75078fSIntel 		if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i]) < 0 ){
2193be52ffcSIntel 			printf("Bad MAC address format on line %d\n", i+1);
220af75078fSIntel 			fclose(config_file);
221af75078fSIntel 			return -1;
222af75078fSIntel 		}
223af75078fSIntel 	}
224af75078fSIntel 	fclose(config_file);
225af75078fSIntel 	nb_peer_eth_addrs = (portid_t) i;
226af75078fSIntel 	return 0;
227af75078fSIntel }
2280d56cb81SThomas Monjalon #endif
229af75078fSIntel 
230af75078fSIntel /*
231af75078fSIntel  * Parse the coremask given as argument (hexadecimal string) and set
232af75078fSIntel  * the global configuration of forwarding cores.
233af75078fSIntel  */
234af75078fSIntel static void
235af75078fSIntel parse_fwd_coremask(const char *coremask)
236af75078fSIntel {
237af75078fSIntel 	char *end;
238af75078fSIntel 	unsigned long long int cm;
239af75078fSIntel 
240af75078fSIntel 	/* parse hexadecimal string */
241af75078fSIntel 	end = NULL;
242af75078fSIntel 	cm = strtoull(coremask, &end, 16);
243af75078fSIntel 	if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0'))
244af75078fSIntel 		rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n");
245013af9b6SIntel 	else if (set_fwd_lcores_mask((uint64_t) cm) < 0)
246013af9b6SIntel 		rte_exit(EXIT_FAILURE, "coremask is not valid\n");
247af75078fSIntel }
248af75078fSIntel 
249af75078fSIntel /*
250af75078fSIntel  * Parse the coremask given as argument (hexadecimal string) and set
251af75078fSIntel  * the global configuration of forwarding cores.
252af75078fSIntel  */
253af75078fSIntel static void
254af75078fSIntel parse_fwd_portmask(const char *portmask)
255af75078fSIntel {
256af75078fSIntel 	char *end;
257af75078fSIntel 	unsigned long long int pm;
258af75078fSIntel 
259af75078fSIntel 	/* parse hexadecimal string */
260af75078fSIntel 	end = NULL;
261af75078fSIntel 	pm = strtoull(portmask, &end, 16);
262af75078fSIntel 	if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
263af75078fSIntel 		rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n");
264af75078fSIntel 	else
265af75078fSIntel 		set_fwd_ports_mask((uint64_t) pm);
266af75078fSIntel }
267af75078fSIntel 
268ed30d9b6SIntel 
269ed30d9b6SIntel static int
270ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx)
271ed30d9b6SIntel {
272ed30d9b6SIntel 	char s[256];
273ed30d9b6SIntel 	const char *p, *p0 = q_arg;
274ed30d9b6SIntel 	char *end;
275ed30d9b6SIntel 	enum fieldnames {
276ed30d9b6SIntel 		FLD_PORT = 0,
277ed30d9b6SIntel 		FLD_QUEUE,
278ed30d9b6SIntel 		FLD_STATS_COUNTER,
279ed30d9b6SIntel 		_NUM_FLD
280ed30d9b6SIntel 	};
281ed30d9b6SIntel 	unsigned long int_fld[_NUM_FLD];
282ed30d9b6SIntel 	char *str_fld[_NUM_FLD];
283ed30d9b6SIntel 	int i;
284ed30d9b6SIntel 	unsigned size;
285ed30d9b6SIntel 
286ed30d9b6SIntel 	/* reset from value set at definition */
287ed30d9b6SIntel 	is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0);
288ed30d9b6SIntel 
289ed30d9b6SIntel 	while ((p = strchr(p0,'(')) != NULL) {
290ed30d9b6SIntel 		++p;
291ed30d9b6SIntel 		if((p0 = strchr(p,')')) == NULL)
292ed30d9b6SIntel 			return -1;
293ed30d9b6SIntel 
294ed30d9b6SIntel 		size = p0 - p;
295ed30d9b6SIntel 		if(size >= sizeof(s))
296ed30d9b6SIntel 			return -1;
297ed30d9b6SIntel 
298ed30d9b6SIntel 		rte_snprintf(s, sizeof(s), "%.*s", size, p);
299ed30d9b6SIntel 		if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD)
300ed30d9b6SIntel 			return -1;
301ed30d9b6SIntel 		for (i = 0; i < _NUM_FLD; i++){
302ed30d9b6SIntel 			errno = 0;
303ed30d9b6SIntel 			int_fld[i] = strtoul(str_fld[i], &end, 0);
304ed30d9b6SIntel 			if (errno != 0 || end == str_fld[i] || int_fld[i] > 255)
305ed30d9b6SIntel 				return -1;
306ed30d9b6SIntel 		}
307ed30d9b6SIntel 		/* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */
308ed30d9b6SIntel 		if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) {
309ed30d9b6SIntel 			printf("Stats counter not in the correct range 0..%d\n",
310ed30d9b6SIntel 					RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
311ed30d9b6SIntel 			return -1;
312ed30d9b6SIntel 		}
313ed30d9b6SIntel 
314ed30d9b6SIntel 		if (is_rx ? (nb_rx_queue_stats_mappings >= MAX_RX_QUEUE_STATS_MAPPINGS) :
315ed30d9b6SIntel 		    (nb_tx_queue_stats_mappings >= MAX_TX_QUEUE_STATS_MAPPINGS)) {
316ed30d9b6SIntel 			printf("exceeded max number of %s queue statistics mappings: %hu\n",
317ed30d9b6SIntel 			       is_rx ? "RX" : "TX",
318ed30d9b6SIntel 			       is_rx ? nb_rx_queue_stats_mappings : nb_tx_queue_stats_mappings);
319ed30d9b6SIntel 			return -1;
320ed30d9b6SIntel 		}
321ed30d9b6SIntel 		if (!is_rx) {
322ed30d9b6SIntel 			tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id =
323ed30d9b6SIntel 				(uint8_t)int_fld[FLD_PORT];
324ed30d9b6SIntel 			tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id =
325ed30d9b6SIntel 				(uint8_t)int_fld[FLD_QUEUE];
326ed30d9b6SIntel 			tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id =
327ed30d9b6SIntel 				(uint8_t)int_fld[FLD_STATS_COUNTER];
328ed30d9b6SIntel 			++nb_tx_queue_stats_mappings;
329ed30d9b6SIntel 		}
330ed30d9b6SIntel 		else {
331ed30d9b6SIntel 			rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id =
332ed30d9b6SIntel 				(uint8_t)int_fld[FLD_PORT];
333ed30d9b6SIntel 			rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id =
334ed30d9b6SIntel 				(uint8_t)int_fld[FLD_QUEUE];
335ed30d9b6SIntel 			rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id =
336ed30d9b6SIntel 				(uint8_t)int_fld[FLD_STATS_COUNTER];
337ed30d9b6SIntel 			++nb_rx_queue_stats_mappings;
338ed30d9b6SIntel 		}
339ed30d9b6SIntel 
340ed30d9b6SIntel 	}
341ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */
342ed30d9b6SIntel /* than to the default array (that was set at its definition) */
343ed30d9b6SIntel 	is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) :
344ed30d9b6SIntel 		(tx_queue_stats_mappings = tx_queue_stats_mappings_array);
345ed30d9b6SIntel 	return 0;
346ed30d9b6SIntel }
347ed30d9b6SIntel 
348b6ea6408SIntel static int
349b6ea6408SIntel parse_portnuma_config(const char *q_arg)
350b6ea6408SIntel {
351b6ea6408SIntel 	char s[256];
352b6ea6408SIntel 	const char *p, *p0 = q_arg;
353b6ea6408SIntel 	char *end;
354b6ea6408SIntel 	uint8_t i,port_id,socket_id;
355b6ea6408SIntel 	unsigned size;
356b6ea6408SIntel 	enum fieldnames {
357b6ea6408SIntel 		FLD_PORT = 0,
358b6ea6408SIntel 		FLD_SOCKET,
359b6ea6408SIntel 		_NUM_FLD
360b6ea6408SIntel 	};
361b6ea6408SIntel 	unsigned long int_fld[_NUM_FLD];
362b6ea6408SIntel 	char *str_fld[_NUM_FLD];
363b6ea6408SIntel 
364b6ea6408SIntel 	/* reset from value set at definition */
365b6ea6408SIntel 	while ((p = strchr(p0,'(')) != NULL) {
366b6ea6408SIntel 		++p;
367b6ea6408SIntel 		if((p0 = strchr(p,')')) == NULL)
368b6ea6408SIntel 			return -1;
369b6ea6408SIntel 
370b6ea6408SIntel 		size = p0 - p;
371b6ea6408SIntel 		if(size >= sizeof(s))
372b6ea6408SIntel 			return -1;
373b6ea6408SIntel 
374b6ea6408SIntel 		rte_snprintf(s, sizeof(s), "%.*s", size, p);
375b6ea6408SIntel 		if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD)
376b6ea6408SIntel 			return -1;
377b6ea6408SIntel 		for (i = 0; i < _NUM_FLD; i++) {
378b6ea6408SIntel 			errno = 0;
379b6ea6408SIntel 			int_fld[i] = strtoul(str_fld[i], &end, 0);
380b6ea6408SIntel 			if (errno != 0 || end == str_fld[i] || int_fld[i] > 255)
381b6ea6408SIntel 				return -1;
382b6ea6408SIntel 		}
383b6ea6408SIntel 		port_id = (uint8_t)int_fld[FLD_PORT];
384b6ea6408SIntel 		if (port_id >= nb_ports) {
385b6ea6408SIntel 			printf("Invalid port, range is [0, %d]\n", nb_ports - 1);
386b6ea6408SIntel 			return -1;
387b6ea6408SIntel 		}
388b6ea6408SIntel 		socket_id = (uint8_t)int_fld[FLD_SOCKET];
389b6ea6408SIntel 		if(socket_id >= MAX_SOCKET) {
390b6ea6408SIntel 			printf("Invalid socket id, range is [0, %d]\n",
391b6ea6408SIntel 				 MAX_SOCKET - 1);
392b6ea6408SIntel 			return -1;
393b6ea6408SIntel 		}
394b6ea6408SIntel 		port_numa[port_id] = socket_id;
395b6ea6408SIntel 	}
396b6ea6408SIntel 
397b6ea6408SIntel 	return 0;
398b6ea6408SIntel }
399b6ea6408SIntel 
400b6ea6408SIntel static int
401b6ea6408SIntel parse_ringnuma_config(const char *q_arg)
402b6ea6408SIntel {
403b6ea6408SIntel 	char s[256];
404b6ea6408SIntel 	const char *p, *p0 = q_arg;
405b6ea6408SIntel 	char *end;
406b6ea6408SIntel 	uint8_t i,port_id,ring_flag,socket_id;
407b6ea6408SIntel 	unsigned size;
408b6ea6408SIntel 	enum fieldnames {
409b6ea6408SIntel 		FLD_PORT = 0,
410b6ea6408SIntel 		FLD_FLAG,
411b6ea6408SIntel 		FLD_SOCKET,
412b6ea6408SIntel 		_NUM_FLD
413b6ea6408SIntel 	};
414b6ea6408SIntel 	unsigned long int_fld[_NUM_FLD];
415b6ea6408SIntel 	char *str_fld[_NUM_FLD];
416b6ea6408SIntel 	#define RX_RING_ONLY 0x1
417b6ea6408SIntel 	#define TX_RING_ONLY 0x2
418b6ea6408SIntel 	#define RXTX_RING    0x3
419b6ea6408SIntel 
420b6ea6408SIntel 	/* reset from value set at definition */
421b6ea6408SIntel 	while ((p = strchr(p0,'(')) != NULL) {
422b6ea6408SIntel 		++p;
423b6ea6408SIntel 		if((p0 = strchr(p,')')) == NULL)
424b6ea6408SIntel 			return -1;
425b6ea6408SIntel 
426b6ea6408SIntel 		size = p0 - p;
427b6ea6408SIntel 		if(size >= sizeof(s))
428b6ea6408SIntel 			return -1;
429b6ea6408SIntel 
430b6ea6408SIntel 		rte_snprintf(s, sizeof(s), "%.*s", size, p);
431b6ea6408SIntel 		if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD)
432b6ea6408SIntel 			return -1;
433b6ea6408SIntel 		for (i = 0; i < _NUM_FLD; i++) {
434b6ea6408SIntel 			errno = 0;
435b6ea6408SIntel 			int_fld[i] = strtoul(str_fld[i], &end, 0);
436b6ea6408SIntel 			if (errno != 0 || end == str_fld[i] || int_fld[i] > 255)
437b6ea6408SIntel 				return -1;
438b6ea6408SIntel 		}
439b6ea6408SIntel 		port_id = (uint8_t)int_fld[FLD_PORT];
440b6ea6408SIntel 		if (port_id >= nb_ports) {
441b6ea6408SIntel 			printf("Invalid port, range is [0, %d]\n", nb_ports - 1);
442b6ea6408SIntel 			return -1;
443b6ea6408SIntel 		}
444b6ea6408SIntel 		socket_id = (uint8_t)int_fld[FLD_SOCKET];
445b6ea6408SIntel 		if (socket_id >= MAX_SOCKET) {
446b6ea6408SIntel 			printf("Invalid socket id, range is [0, %d]\n",
447b6ea6408SIntel 				MAX_SOCKET - 1);
448b6ea6408SIntel 			return -1;
449b6ea6408SIntel 		}
450b6ea6408SIntel 		ring_flag = (uint8_t)int_fld[FLD_FLAG];
451b6ea6408SIntel 		if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) {
452b6ea6408SIntel 			printf("Invalid ring-flag=%d config for port =%d\n",
453b6ea6408SIntel 				ring_flag,port_id);
454b6ea6408SIntel 			return -1;
455b6ea6408SIntel 		}
456b6ea6408SIntel 
457b6ea6408SIntel 		switch (ring_flag & RXTX_RING) {
458b6ea6408SIntel 		case RX_RING_ONLY:
459b6ea6408SIntel 			rxring_numa[port_id] = socket_id;
460b6ea6408SIntel 			break;
461b6ea6408SIntel 		case TX_RING_ONLY:
462b6ea6408SIntel 			txring_numa[port_id] = socket_id;
463b6ea6408SIntel 			break;
464b6ea6408SIntel 		case RXTX_RING:
465b6ea6408SIntel 			rxring_numa[port_id] = socket_id;
466b6ea6408SIntel 			txring_numa[port_id] = socket_id;
467b6ea6408SIntel 			break;
468b6ea6408SIntel 		default:
469b6ea6408SIntel 			printf("Invalid ring-flag=%d config for port=%d\n",
470b6ea6408SIntel 				ring_flag,port_id);
471b6ea6408SIntel 			break;
472b6ea6408SIntel 		}
473b6ea6408SIntel 	}
474b6ea6408SIntel 
475b6ea6408SIntel 	return 0;
476b6ea6408SIntel }
477ed30d9b6SIntel 
478af75078fSIntel void
479af75078fSIntel launch_args_parse(int argc, char** argv)
480af75078fSIntel {
481af75078fSIntel 	int n, opt;
482af75078fSIntel 	char **argvopt;
483af75078fSIntel 	int opt_idx;
484013af9b6SIntel 	enum { TX, RX };
485013af9b6SIntel 
486af75078fSIntel 	static struct option lgopts[] = {
487af75078fSIntel 		{ "help",			0, 0, 0 },
4880d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
489af75078fSIntel 		{ "interactive",		0, 0, 0 },
490*ca7feb22SCyril Chemparathy 		{ "auto-start",			0, 0, 0 },
491af75078fSIntel 		{ "eth-peers-configfile",	1, 0, 0 },
492af75078fSIntel 		{ "eth-peer",			1, 0, 0 },
4930d56cb81SThomas Monjalon #endif
494af75078fSIntel 		{ "ports",			1, 0, 0 },
495af75078fSIntel 		{ "nb-cores",			1, 0, 0 },
496af75078fSIntel 		{ "nb-ports",			1, 0, 0 },
497af75078fSIntel 		{ "coremask",			1, 0, 0 },
498af75078fSIntel 		{ "portmask",			1, 0, 0 },
499af75078fSIntel 		{ "numa",			0, 0, 0 },
500148f963fSBruce Richardson 		{ "mp-anon",			0, 0, 0 },
501b6ea6408SIntel 		{ "port-numa-config",           1, 0, 0 },
502b6ea6408SIntel 		{ "ring-numa-config",           1, 0, 0 },
503b6ea6408SIntel 		{ "socket-num",			1, 0, 0 },
504af75078fSIntel 		{ "mbuf-size",			1, 0, 0 },
505c8798818SIntel 		{ "total-num-mbufs",		1, 0, 0 },
506af75078fSIntel 		{ "max-pkt-len",		1, 0, 0 },
507af75078fSIntel 		{ "pkt-filter-mode",            1, 0, 0 },
508af75078fSIntel 		{ "pkt-filter-report-hash",     1, 0, 0 },
509af75078fSIntel 		{ "pkt-filter-size",            1, 0, 0 },
510af75078fSIntel 		{ "pkt-filter-flexbytes-offset",1, 0, 0 },
511af75078fSIntel 		{ "pkt-filter-drop-queue",      1, 0, 0 },
512af75078fSIntel 		{ "crc-strip",                  0, 0, 0 },
513013af9b6SIntel 		{ "enable-rx-cksum",            0, 0, 0 },
514af75078fSIntel 		{ "disable-hw-vlan",            0, 0, 0 },
515013af9b6SIntel 		{ "enable-drop-en",            0, 0, 0 },
516af75078fSIntel 		{ "disable-rss",                0, 0, 0 },
517af75078fSIntel 		{ "port-topology",              1, 0, 0 },
518af75078fSIntel 		{ "rss-ip",			0, 0, 0 },
519af75078fSIntel 		{ "rss-udp",			0, 0, 0 },
520af75078fSIntel 		{ "rxq",			1, 0, 0 },
521af75078fSIntel 		{ "txq",			1, 0, 0 },
522af75078fSIntel 		{ "rxd",			1, 0, 0 },
523af75078fSIntel 		{ "txd",			1, 0, 0 },
524af75078fSIntel 		{ "burst",			1, 0, 0 },
525af75078fSIntel 		{ "mbcache",			1, 0, 0 },
526af75078fSIntel 		{ "txpt",			1, 0, 0 },
527af75078fSIntel 		{ "txht",			1, 0, 0 },
528af75078fSIntel 		{ "txwt",			1, 0, 0 },
529af75078fSIntel 		{ "txfreet",			1, 0, 0 },
530af75078fSIntel 		{ "txrst",			1, 0, 0 },
531ce8d5614SIntel 		{ "txqflags",			1, 0, 0 },
532af75078fSIntel 		{ "rxpt",			1, 0, 0 },
533af75078fSIntel 		{ "rxht",			1, 0, 0 },
534af75078fSIntel 		{ "rxwt",			1, 0, 0 },
535af75078fSIntel 		{ "rxfreet",                    1, 0, 0 },
536ed30d9b6SIntel 		{ "tx-queue-stats-mapping",	1, 0, 0 },
537ed30d9b6SIntel 		{ "rx-queue-stats-mapping",	1, 0, 0 },
5387741e4cfSIntel 		{ "no-flush-rx",	0, 0, 0 },
539af75078fSIntel 		{ 0, 0, 0, 0 },
540af75078fSIntel 	};
541af75078fSIntel 
542af75078fSIntel 	argvopt = argv;
543af75078fSIntel 
5440d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
545*ca7feb22SCyril Chemparathy #define SHORTOPTS "i"
5460d56cb81SThomas Monjalon #else
547*ca7feb22SCyril Chemparathy #define SHORTOPTS ""
5480d56cb81SThomas Monjalon #endif
549*ca7feb22SCyril Chemparathy 	while ((opt = getopt_long(argc, argvopt, SHORTOPTS "ah",
550af75078fSIntel 				 lgopts, &opt_idx)) != EOF) {
551af75078fSIntel 		switch (opt) {
5520d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
553af75078fSIntel 		case 'i':
554af75078fSIntel 			printf("Interactive-mode selected\n");
555af75078fSIntel 			interactive = 1;
556af75078fSIntel 			break;
5570d56cb81SThomas Monjalon #endif
558*ca7feb22SCyril Chemparathy 		case 'a':
559*ca7feb22SCyril Chemparathy 			printf("Auto-start selected\n");
560*ca7feb22SCyril Chemparathy 			auto_start = 1;
561*ca7feb22SCyril Chemparathy 			break;
562*ca7feb22SCyril Chemparathy 
563af75078fSIntel 		case 0: /*long options */
564af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "help")) {
565af75078fSIntel 				usage(argv[0]);
566af75078fSIntel 				rte_exit(EXIT_SUCCESS, "Displayed help\n");
567af75078fSIntel 			}
5680d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
569af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "interactive")) {
570af75078fSIntel 				printf("Interactive-mode selected\n");
571af75078fSIntel 				interactive = 1;
572af75078fSIntel 			}
573*ca7feb22SCyril Chemparathy 			if (!strcmp(lgopts[opt_idx].name, "auto-start")) {
574*ca7feb22SCyril Chemparathy 				printf("Auto-start selected\n");
575*ca7feb22SCyril Chemparathy 				auto_start = 1;
576*ca7feb22SCyril Chemparathy 			}
577af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name,
578af75078fSIntel 				    "eth-peers-configfile")) {
579af75078fSIntel 				if (init_peer_eth_addrs(optarg) != 0)
580af75078fSIntel 					rte_exit(EXIT_FAILURE,
581af75078fSIntel 						 "Cannot open logfile\n");
582af75078fSIntel 			}
583af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "eth-peer")) {
584af75078fSIntel 				char *port_end;
585af75078fSIntel 				uint8_t c, peer_addr[6];
586af75078fSIntel 
587af75078fSIntel 				errno = 0;
588af75078fSIntel 				n = strtoul(optarg, &port_end, 10);
589af75078fSIntel 				if (errno != 0 || port_end == optarg || *port_end++ != ',')
590af75078fSIntel 					rte_exit(EXIT_FAILURE,
591af75078fSIntel 						 "Invalid eth-peer: %s", optarg);
592af75078fSIntel 				if (n >= RTE_MAX_ETHPORTS)
593af75078fSIntel 					rte_exit(EXIT_FAILURE,
594af75078fSIntel 						 "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n",
595af75078fSIntel 						 n, RTE_MAX_ETHPORTS);
596af75078fSIntel 
597af75078fSIntel 				if (cmdline_parse_etheraddr(NULL, port_end, &peer_addr) < 0 )
598af75078fSIntel 					rte_exit(EXIT_FAILURE,
599af75078fSIntel 						 "Invalid ethernet address: %s\n",
600af75078fSIntel 						 port_end);
601af75078fSIntel 				for (c = 0; c < 6; c++)
602af75078fSIntel 					peer_eth_addrs[n].addr_bytes[c] =
603af75078fSIntel 						peer_addr[c];
604af75078fSIntel 				nb_peer_eth_addrs++;
605af75078fSIntel 			}
6060d56cb81SThomas Monjalon #endif
607af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "nb-ports")) {
608af75078fSIntel 				n = atoi(optarg);
609af75078fSIntel 				if (n > 0 && n <= nb_ports)
610af75078fSIntel 					nb_fwd_ports = (uint8_t) n;
611af75078fSIntel 				else
612af75078fSIntel 					rte_exit(EXIT_FAILURE,
613af75078fSIntel 						 "nb-ports should be > 0 and <= %d\n",
614af75078fSIntel 						 nb_ports);
615af75078fSIntel 			}
616af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "nb-cores")) {
617af75078fSIntel 				n = atoi(optarg);
618af75078fSIntel 				if (n > 0 && n <= nb_lcores)
619af75078fSIntel 					nb_fwd_lcores = (uint8_t) n;
620af75078fSIntel 				else
621af75078fSIntel 					rte_exit(EXIT_FAILURE,
622af75078fSIntel 						 "nb-cores should be > 0 and <= %d\n",
623af75078fSIntel 						 nb_lcores);
624af75078fSIntel 			}
625af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "coremask"))
626af75078fSIntel 				parse_fwd_coremask(optarg);
627af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "portmask"))
628af75078fSIntel 				parse_fwd_portmask(optarg);
629b6ea6408SIntel 			if (!strcmp(lgopts[opt_idx].name, "numa")) {
630af75078fSIntel 				numa_support = 1;
631b6ea6408SIntel 				memset(port_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS);
632b6ea6408SIntel 				memset(rxring_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS);
633b6ea6408SIntel 				memset(txring_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS);
634b6ea6408SIntel 			}
635148f963fSBruce Richardson 			if (!strcmp(lgopts[opt_idx].name, "mp-anon")) {
636148f963fSBruce Richardson 				mp_anon = 1;
637148f963fSBruce Richardson 			}
638b6ea6408SIntel 			if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) {
639b6ea6408SIntel 				if (parse_portnuma_config(optarg))
640b6ea6408SIntel 					rte_exit(EXIT_FAILURE,
641b6ea6408SIntel 					   "invalid port-numa configuration\n");
642b6ea6408SIntel 			}
643b6ea6408SIntel 			if (!strcmp(lgopts[opt_idx].name, "ring-numa-config"))
644b6ea6408SIntel 				if (parse_ringnuma_config(optarg))
645b6ea6408SIntel 					rte_exit(EXIT_FAILURE,
646b6ea6408SIntel 					   "invalid ring-numa configuration\n");
647b6ea6408SIntel 			if (!strcmp(lgopts[opt_idx].name, "socket-num")) {
648b6ea6408SIntel 				n = atoi(optarg);
649b6ea6408SIntel 				if(n < MAX_SOCKET)
650b6ea6408SIntel 					socket_num = (uint8_t)n;
651b6ea6408SIntel 				else
652b6ea6408SIntel 					rte_exit(EXIT_FAILURE,
653b6ea6408SIntel 						"The socket number should be < %d\n",
654b6ea6408SIntel 						MAX_SOCKET);
655b6ea6408SIntel 			}
656af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) {
657af75078fSIntel 				n = atoi(optarg);
658af75078fSIntel 				if (n > 0 && n <= 0xFFFF)
659af75078fSIntel 					mbuf_data_size = (uint16_t) n;
660af75078fSIntel 				else
661af75078fSIntel 					rte_exit(EXIT_FAILURE,
662af75078fSIntel 						 "mbuf-size should be > 0 and < 65536\n");
663af75078fSIntel 			}
664c8798818SIntel 			if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) {
665c8798818SIntel 				n = atoi(optarg);
666c8798818SIntel 				if (n > 1024)
667c8798818SIntel 					param_total_num_mbufs = (unsigned)n;
668c8798818SIntel 				else
669c8798818SIntel 					rte_exit(EXIT_FAILURE,
670c8798818SIntel 						 "total-num-mbufs should be > 1024\n");
671c8798818SIntel 			}
672af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) {
673af75078fSIntel 				n = atoi(optarg);
674af75078fSIntel 				if (n >= ETHER_MIN_LEN) {
675af75078fSIntel 					rx_mode.max_rx_pkt_len = (uint32_t) n;
676af75078fSIntel 					if (n > ETHER_MAX_LEN)
677af75078fSIntel 					    rx_mode.jumbo_frame = 1;
678af75078fSIntel 				} else
679af75078fSIntel 					rte_exit(EXIT_FAILURE,
680af75078fSIntel 						 "Invalid max-pkt-len=%d - should be > %d\n",
681af75078fSIntel 						 n, ETHER_MIN_LEN);
682af75078fSIntel 			}
683af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) {
684af75078fSIntel 				if (!strcmp(optarg, "signature"))
685af75078fSIntel 					fdir_conf.mode =
686af75078fSIntel 						RTE_FDIR_MODE_SIGNATURE;
687af75078fSIntel 				else if (!strcmp(optarg, "perfect"))
688af75078fSIntel 					fdir_conf.mode = RTE_FDIR_MODE_PERFECT;
689af75078fSIntel 				else if (!strcmp(optarg, "none"))
690af75078fSIntel 					fdir_conf.mode = RTE_FDIR_MODE_NONE;
691af75078fSIntel 				else
692af75078fSIntel 					rte_exit(EXIT_FAILURE,
693af75078fSIntel 						 "pkt-mode-invalid %s invalid - must be: "
694af75078fSIntel 						 "none, signature or perfect\n",
695af75078fSIntel 						 optarg);
696af75078fSIntel 			}
697af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name,
698af75078fSIntel 				    "pkt-filter-report-hash")) {
699af75078fSIntel 				if (!strcmp(optarg, "none"))
700af75078fSIntel 					fdir_conf.status =
701af75078fSIntel 						RTE_FDIR_NO_REPORT_STATUS;
702af75078fSIntel 				else if (!strcmp(optarg, "match"))
703af75078fSIntel 					fdir_conf.status =
704af75078fSIntel 						RTE_FDIR_REPORT_STATUS;
705af75078fSIntel 				else if (!strcmp(optarg, "always"))
706af75078fSIntel 					fdir_conf.status =
707af75078fSIntel 						RTE_FDIR_REPORT_STATUS_ALWAYS;
708af75078fSIntel 				else
709af75078fSIntel 					rte_exit(EXIT_FAILURE,
710af75078fSIntel 						 "pkt-filter-report-hash %s invalid "
711af75078fSIntel 						 "- must be: none or match or always\n",
712af75078fSIntel 						 optarg);
713af75078fSIntel 			}
714af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) {
715af75078fSIntel 				if (!strcmp(optarg, "64K"))
716af75078fSIntel 					fdir_conf.pballoc =
717af75078fSIntel 						RTE_FDIR_PBALLOC_64K;
718af75078fSIntel 				else if (!strcmp(optarg, "128K"))
719af75078fSIntel 					fdir_conf.pballoc =
720af75078fSIntel 						RTE_FDIR_PBALLOC_128K;
721af75078fSIntel 				else if (!strcmp(optarg, "256K"))
722af75078fSIntel 					fdir_conf.pballoc =
723af75078fSIntel 						RTE_FDIR_PBALLOC_256K;
724af75078fSIntel 				else
725af75078fSIntel 					rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -"
726af75078fSIntel 						 " must be: 64K or 128K or 256K\n",
727af75078fSIntel 						 optarg);
728af75078fSIntel 			}
729af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name,
730af75078fSIntel 				    "pkt-filter-flexbytes-offset")) {
731af75078fSIntel 				n = atoi(optarg);
732af75078fSIntel 				if ( n >= 0 && n <= (int) 32)
733af75078fSIntel 					fdir_conf.flexbytes_offset =
734af75078fSIntel 						(uint8_t) n;
735af75078fSIntel 				else
736af75078fSIntel 					rte_exit(EXIT_FAILURE,
737af75078fSIntel 						 "flexbytes %d invalid - must"
738af75078fSIntel 						 "be  >= 0 && <= 32\n", n);
739af75078fSIntel 			}
740af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name,
741af75078fSIntel 				    "pkt-filter-drop-queue")) {
742af75078fSIntel 				n = atoi(optarg);
743af75078fSIntel 				if (n >= 0)
744af75078fSIntel 					fdir_conf.drop_queue = (uint8_t) n;
745af75078fSIntel 				else
746af75078fSIntel 					rte_exit(EXIT_FAILURE,
747af75078fSIntel 						 "drop queue %d invalid - must"
748af75078fSIntel 						 "be >= 0 \n", n);
749af75078fSIntel 			}
750af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "crc-strip"))
751af75078fSIntel 				rx_mode.hw_strip_crc = 1;
752af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
753af75078fSIntel 				rx_mode.hw_ip_checksum = 1;
754a47aa8b9SIntel 
755a47aa8b9SIntel 			if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) {
756af75078fSIntel 				rx_mode.hw_vlan_filter = 0;
757a47aa8b9SIntel 				rx_mode.hw_vlan_strip  = 0;
758a47aa8b9SIntel 				rx_mode.hw_vlan_extend = 0;
759a47aa8b9SIntel 			}
760a47aa8b9SIntel 
761ce8d5614SIntel 			if (!strcmp(lgopts[opt_idx].name, "enable-drop-en"))
762ce8d5614SIntel 				rx_drop_en = 1;
763ce8d5614SIntel 
764af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "disable-rss"))
765af75078fSIntel 				rss_hf = 0;
766af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "port-topology")) {
767af75078fSIntel 				if (!strcmp(optarg, "paired"))
768af75078fSIntel 					port_topology = PORT_TOPOLOGY_PAIRED;
769af75078fSIntel 				else if (!strcmp(optarg, "chained"))
770af75078fSIntel 					port_topology = PORT_TOPOLOGY_CHAINED;
7713e2006d6SCyril Chemparathy 				else if (!strcmp(optarg, "loop"))
7723e2006d6SCyril Chemparathy 					port_topology = PORT_TOPOLOGY_LOOP;
773af75078fSIntel 				else
774af75078fSIntel 					rte_exit(EXIT_FAILURE, "port-topology %s invalid -"
775af75078fSIntel 						 " must be: paired or chained \n",
776af75078fSIntel 						 optarg);
777af75078fSIntel 			}
778af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rss-ip"))
779af75078fSIntel 				rss_hf = ETH_RSS_IPV4 | ETH_RSS_IPV6;
780af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rss-udp"))
781013af9b6SIntel 				rss_hf = ETH_RSS_IPV4 |
782013af9b6SIntel 						ETH_RSS_IPV6 | ETH_RSS_IPV4_UDP;
783af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxq")) {
784af75078fSIntel 				n = atoi(optarg);
785af75078fSIntel 				if (n >= 1 && n <= (int) MAX_QUEUE_ID)
786af75078fSIntel 					nb_rxq = (queueid_t) n;
787af75078fSIntel 				else
788af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxq %d invalid - must be"
789af75078fSIntel 						  " >= 1 && <= %d\n", n,
790af75078fSIntel 						  (int) MAX_QUEUE_ID);
791af75078fSIntel 			}
792af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txq")) {
793af75078fSIntel 				n = atoi(optarg);
794af75078fSIntel 				if (n >= 1 && n <= (int) MAX_QUEUE_ID)
795af75078fSIntel 					nb_txq = (queueid_t) n;
796af75078fSIntel 				else
797af75078fSIntel 					rte_exit(EXIT_FAILURE, "txq %d invalid - must be"
798af75078fSIntel 						  " >= 1 && <= %d\n", n,
799af75078fSIntel 						  (int) MAX_QUEUE_ID);
800af75078fSIntel 			}
801af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxd")) {
802af75078fSIntel 				n = atoi(optarg);
803af75078fSIntel 				if (n > 0)
804af75078fSIntel 					nb_rxd = (uint16_t) n;
805af75078fSIntel 				else
806af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxd must be > 0\n");
807af75078fSIntel 			}
808af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txd")) {
809af75078fSIntel 				n = atoi(optarg);
810af75078fSIntel 				if (n > 0)
811af75078fSIntel 					nb_txd = (uint16_t) n;
812af75078fSIntel 				else
813af75078fSIntel 					rte_exit(EXIT_FAILURE, "txd must be in > 0\n");
814af75078fSIntel 			}
815af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "burst")) {
816af75078fSIntel 				n = atoi(optarg);
817af75078fSIntel 				if ((n >= 1) && (n <= MAX_PKT_BURST))
818af75078fSIntel 					nb_pkt_per_burst = (uint16_t) n;
819af75078fSIntel 				else
820af75078fSIntel 					rte_exit(EXIT_FAILURE,
821af75078fSIntel 						 "burst must >= 1 and <= %d]",
822af75078fSIntel 						 MAX_PKT_BURST);
823af75078fSIntel 			}
824af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "mbcache")) {
825af75078fSIntel 				n = atoi(optarg);
826af75078fSIntel 				if ((n >= 0) &&
827af75078fSIntel 				    (n <= RTE_MEMPOOL_CACHE_MAX_SIZE))
828af75078fSIntel 					mb_mempool_cache = (uint16_t) n;
829af75078fSIntel 				else
830af75078fSIntel 					rte_exit(EXIT_FAILURE,
831af75078fSIntel 						 "mbcache must be >= 0 and <= %d\n",
832af75078fSIntel 						 RTE_MEMPOOL_CACHE_MAX_SIZE);
833af75078fSIntel 			}
834af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txpt")) {
835af75078fSIntel 				n = atoi(optarg);
836af75078fSIntel 				if (n >= 0)
837af75078fSIntel 					tx_thresh.pthresh = (uint8_t)n;
838af75078fSIntel 				else
839af75078fSIntel 					rte_exit(EXIT_FAILURE, "txpt must be >= 0\n");
840af75078fSIntel 			}
841af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txht")) {
842af75078fSIntel 				n = atoi(optarg);
843af75078fSIntel 				if (n >= 0)
844af75078fSIntel 					tx_thresh.hthresh = (uint8_t)n;
845af75078fSIntel 				else
846af75078fSIntel 					rte_exit(EXIT_FAILURE, "txht must be >= 0\n");
847af75078fSIntel 			}
848af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txwt")) {
849af75078fSIntel 				n = atoi(optarg);
850af75078fSIntel 				if (n >= 0)
851af75078fSIntel 					tx_thresh.wthresh = (uint8_t)n;
852af75078fSIntel 				else
853af75078fSIntel 					rte_exit(EXIT_FAILURE, "txwt must be >= 0\n");
854af75078fSIntel 			}
855af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txfreet")) {
856af75078fSIntel 				n = atoi(optarg);
857af75078fSIntel 				if (n >= 0)
858af75078fSIntel 					tx_free_thresh = (uint16_t)n;
859af75078fSIntel 				else
860af75078fSIntel 					rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n");
861af75078fSIntel 			}
862af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txrst")) {
863af75078fSIntel 				n = atoi(optarg);
864af75078fSIntel 				if (n >= 0)
865af75078fSIntel 					tx_rs_thresh = (uint16_t)n;
866af75078fSIntel 				else
867af75078fSIntel 					rte_exit(EXIT_FAILURE, "txrst must be >= 0\n");
868af75078fSIntel 			}
869ce8d5614SIntel 			if (!strcmp(lgopts[opt_idx].name, "txqflags")) {
870ce8d5614SIntel 				char *end = NULL;
871ce8d5614SIntel 				n = strtoul(optarg, &end, 16);
872ce8d5614SIntel 				if (n >= 0)
873ce8d5614SIntel 					txq_flags = (uint32_t)n;
874ce8d5614SIntel 				else
875ce8d5614SIntel 					rte_exit(EXIT_FAILURE,
876ce8d5614SIntel 						 "txqflags must be >= 0\n");
877ce8d5614SIntel 			}
878af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxpt")) {
879af75078fSIntel 				n = atoi(optarg);
880af75078fSIntel 				if (n >= 0)
881af75078fSIntel 					rx_thresh.pthresh = (uint8_t)n;
882af75078fSIntel 				else
883af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n");
884af75078fSIntel 			}
885af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxht")) {
886af75078fSIntel 				n = atoi(optarg);
887af75078fSIntel 				if (n >= 0)
888af75078fSIntel 					rx_thresh.hthresh = (uint8_t)n;
889af75078fSIntel 				else
890af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxht must be >= 0\n");
891af75078fSIntel 			}
892af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxwt")) {
893af75078fSIntel 				n = atoi(optarg);
894af75078fSIntel 				if (n >= 0)
895af75078fSIntel 					rx_thresh.wthresh = (uint8_t)n;
896af75078fSIntel 				else
897af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n");
898af75078fSIntel 			}
899af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxd")) {
900af75078fSIntel 				n = atoi(optarg);
901af75078fSIntel 				if (n > 0) {
902af75078fSIntel 					if (rx_free_thresh >= n)
903af75078fSIntel 						rte_exit(EXIT_FAILURE,
904af75078fSIntel 							 "rxd must be > "
905af75078fSIntel 							 "rx_free_thresh(%d)\n",
906af75078fSIntel 							 (int)rx_free_thresh);
907af75078fSIntel 					else
908af75078fSIntel 						nb_rxd = (uint16_t) n;
909af75078fSIntel 				} else
910af75078fSIntel 					rte_exit(EXIT_FAILURE,
911af75078fSIntel 						 "rxd(%d) invalid - must be > 0\n",
912af75078fSIntel 						 n);
913af75078fSIntel 			}
914af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txd")) {
915af75078fSIntel 				n = atoi(optarg);
916af75078fSIntel 				if (n > 0)
917af75078fSIntel 					nb_txd = (uint16_t) n;
918af75078fSIntel 				else
919af75078fSIntel 					rte_exit(EXIT_FAILURE, "txd must be in > 0\n");
920af75078fSIntel 			}
921af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txpt")) {
922af75078fSIntel 				n = atoi(optarg);
923af75078fSIntel 				if (n >= 0)
924af75078fSIntel 					tx_thresh.pthresh = (uint8_t)n;
925af75078fSIntel 				else
926af75078fSIntel 					rte_exit(EXIT_FAILURE, "txpt must be >= 0\n");
927af75078fSIntel 			}
928af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txht")) {
929af75078fSIntel 				n = atoi(optarg);
930af75078fSIntel 				if (n >= 0)
931af75078fSIntel 					tx_thresh.hthresh = (uint8_t)n;
932af75078fSIntel 				else
933af75078fSIntel 					rte_exit(EXIT_FAILURE, "txht must be >= 0\n");
934af75078fSIntel 			}
935af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txwt")) {
936af75078fSIntel 				n = atoi(optarg);
937af75078fSIntel 				if (n >= 0)
938af75078fSIntel 					tx_thresh.wthresh = (uint8_t)n;
939af75078fSIntel 				else
940af75078fSIntel 					rte_exit(EXIT_FAILURE, "txwt must be >= 0\n");
941af75078fSIntel 			}
942af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxpt")) {
943af75078fSIntel 				n = atoi(optarg);
944af75078fSIntel 				if (n >= 0)
945af75078fSIntel 					rx_thresh.pthresh = (uint8_t)n;
946af75078fSIntel 				else
947af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n");
948af75078fSIntel 			}
949af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxht")) {
950af75078fSIntel 				n = atoi(optarg);
951af75078fSIntel 				if (n >= 0)
952af75078fSIntel 					rx_thresh.hthresh = (uint8_t)n;
953af75078fSIntel 				else
954af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxht must be >= 0\n");
955af75078fSIntel 			}
956af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxwt")) {
957af75078fSIntel 				n = atoi(optarg);
958af75078fSIntel 				if (n >= 0)
959af75078fSIntel 					rx_thresh.wthresh = (uint8_t)n;
960af75078fSIntel 				else
961af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n");
962af75078fSIntel 			}
963af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxfreet")) {
964af75078fSIntel 				n = atoi(optarg);
965af75078fSIntel 				if (n >= 0)
966af75078fSIntel 					rx_free_thresh = (uint16_t)n;
967af75078fSIntel 				else
968af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n");
969af75078fSIntel 			}
970ed30d9b6SIntel 			if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) {
971ed30d9b6SIntel 				if (parse_queue_stats_mapping_config(optarg, TX)) {
972ed30d9b6SIntel 					rte_exit(EXIT_FAILURE,
973ed30d9b6SIntel 						 "invalid TX queue statistics mapping config entered\n");
974ed30d9b6SIntel 				}
975ed30d9b6SIntel 			}
976ed30d9b6SIntel 			if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) {
977ed30d9b6SIntel 				if (parse_queue_stats_mapping_config(optarg, RX)) {
978ed30d9b6SIntel 					rte_exit(EXIT_FAILURE,
979ed30d9b6SIntel 						 "invalid RX queue statistics mapping config entered\n");
980ed30d9b6SIntel 				}
981ed30d9b6SIntel 			}
9827741e4cfSIntel 			if (!strcmp(lgopts[opt_idx].name, "no-flush-rx"))
9837741e4cfSIntel 				no_flush_rx = 1;
9847741e4cfSIntel 
985af75078fSIntel 			break;
986af75078fSIntel 		case 'h':
987af75078fSIntel 			usage(argv[0]);
988af75078fSIntel 			rte_exit(EXIT_SUCCESS, "Displayed help\n");
989af75078fSIntel 			break;
990af75078fSIntel 		default:
991af75078fSIntel 			usage(argv[0]);
992af75078fSIntel 			rte_exit(EXIT_FAILURE,
993af75078fSIntel 				 "Command line is incomplete or incorrect\n");
994af75078fSIntel 			break;
995af75078fSIntel 		}
996af75078fSIntel 	}
997af75078fSIntel }
998