1af75078fSIntel /*- 2af75078fSIntel * BSD LICENSE 3af75078fSIntel * 4e9d48c00SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5af75078fSIntel * All rights reserved. 6af75078fSIntel * 7af75078fSIntel * Redistribution and use in source and binary forms, with or without 8af75078fSIntel * modification, are permitted provided that the following conditions 9af75078fSIntel * are met: 10af75078fSIntel * 11af75078fSIntel * * Redistributions of source code must retain the above copyright 12af75078fSIntel * notice, this list of conditions and the following disclaimer. 13af75078fSIntel * * Redistributions in binary form must reproduce the above copyright 14af75078fSIntel * notice, this list of conditions and the following disclaimer in 15af75078fSIntel * the documentation and/or other materials provided with the 16af75078fSIntel * distribution. 17af75078fSIntel * * Neither the name of Intel Corporation nor the names of its 18af75078fSIntel * contributors may be used to endorse or promote products derived 19af75078fSIntel * from this software without specific prior written permission. 20af75078fSIntel * 21af75078fSIntel * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22af75078fSIntel * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23af75078fSIntel * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24af75078fSIntel * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25af75078fSIntel * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26af75078fSIntel * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27af75078fSIntel * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28af75078fSIntel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29af75078fSIntel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30af75078fSIntel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31af75078fSIntel * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32af75078fSIntel */ 33af75078fSIntel 34af75078fSIntel #include <errno.h> 35af75078fSIntel #include <getopt.h> 36af75078fSIntel #include <stdarg.h> 37af75078fSIntel #include <stdio.h> 38af75078fSIntel #include <stdlib.h> 39af75078fSIntel #include <signal.h> 40af75078fSIntel #include <string.h> 41af75078fSIntel #include <time.h> 42af75078fSIntel #include <fcntl.h> 43af75078fSIntel #include <sys/types.h> 44af75078fSIntel #include <errno.h> 45af75078fSIntel 46af75078fSIntel #include <sys/queue.h> 47af75078fSIntel #include <sys/stat.h> 48af75078fSIntel 49af75078fSIntel #include <stdint.h> 50af75078fSIntel #include <unistd.h> 51af75078fSIntel #include <inttypes.h> 52af75078fSIntel 53af75078fSIntel #include <rte_common.h> 54af75078fSIntel #include <rte_byteorder.h> 55af75078fSIntel #include <rte_log.h> 56af75078fSIntel #include <rte_debug.h> 57af75078fSIntel #include <rte_cycles.h> 58af75078fSIntel #include <rte_memory.h> 59af75078fSIntel #include <rte_memzone.h> 60af75078fSIntel #include <rte_launch.h> 61af75078fSIntel #include <rte_tailq.h> 62af75078fSIntel #include <rte_eal.h> 63af75078fSIntel #include <rte_per_lcore.h> 64af75078fSIntel #include <rte_lcore.h> 65af75078fSIntel #include <rte_atomic.h> 66af75078fSIntel #include <rte_branch_prediction.h> 67af75078fSIntel #include <rte_ring.h> 68af75078fSIntel #include <rte_mempool.h> 69af75078fSIntel #include <rte_interrupts.h> 70af75078fSIntel #include <rte_pci.h> 71af75078fSIntel #include <rte_ether.h> 72af75078fSIntel #include <rte_ethdev.h> 73af75078fSIntel #include <rte_string_fns.h> 740d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 75af75078fSIntel #include <cmdline_parse.h> 76af75078fSIntel #include <cmdline_parse_etheraddr.h> 770d56cb81SThomas Monjalon #endif 78af75078fSIntel 79af75078fSIntel #include "testpmd.h" 80af75078fSIntel 81af75078fSIntel static void 82af75078fSIntel usage(char* progname) 83af75078fSIntel { 840d56cb81SThomas Monjalon printf("usage: %s " 850d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 860d56cb81SThomas Monjalon "[--interactive|-i] " 870d56cb81SThomas Monjalon #endif 88ca7feb22SCyril Chemparathy "[--help|-h] | [--auto-start|-a] | [" 89af75078fSIntel "--coremask=COREMASK --portmask=PORTMASK --numa " 90c8798818SIntel "--mbuf-size= | --total-num-mbufs= | " 913be52ffcSIntel "--nb-cores= | --nb-ports= | " 920d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 93af75078fSIntel "--eth-peers-configfile= | " 943be52ffcSIntel "--eth-peer=X,M:M:M:M:M:M | " 950d56cb81SThomas Monjalon #endif 96af75078fSIntel "--pkt-filter-mode= |" 97af75078fSIntel "--rss-ip | --rss-udp | " 98af75078fSIntel "--rxpt= | --rxht= | --rxwt= | --rxfreet= | " 99af75078fSIntel "--txpt= | --txht= | --txwt= | --txfreet= | " 100ce8d5614SIntel "--txrst= | --txqflags= ]\n", 101af75078fSIntel progname); 1020d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1033be52ffcSIntel printf(" --interactive: run in interactive mode.\n"); 1040d56cb81SThomas Monjalon #endif 105ca7feb22SCyril Chemparathy printf(" --auto-start: start forwarding on init " 106ca7feb22SCyril Chemparathy "[always when non-interactive].\n"); 1073be52ffcSIntel printf(" --help: display this message and quit.\n"); 1083be52ffcSIntel printf(" --nb-cores=N: set the number of forwarding cores " 1093be52ffcSIntel "(1 <= N <= %d).\n", nb_lcores); 1103be52ffcSIntel printf(" --nb-ports=N: set the number of forwarding ports " 1113be52ffcSIntel "(1 <= N <= %d).\n", nb_ports); 112af75078fSIntel printf(" --coremask=COREMASK: hexadecimal bitmask of cores running " 113013af9b6SIntel "the packet forwarding test. The master lcore is reserved for " 1143be52ffcSIntel "command line parsing only, and cannot be masked on for " 1153be52ffcSIntel "packet forwarding.\n"); 116af75078fSIntel printf(" --portmask=PORTMASK: hexadecimal bitmask of ports used " 1173be52ffcSIntel "by the packet forwarding test.\n"); 118af75078fSIntel printf(" --numa: enable NUMA-aware allocation of RX/TX rings and of " 1193be52ffcSIntel "RX memory buffers (mbufs).\n"); 120b6ea6408SIntel printf(" --port-numa-config=(port,socket)[,(port,socket)]: " 121b6ea6408SIntel "specify the socket on which the memory pool " 122b6ea6408SIntel "used by the port will be allocated.\n"); 123b6ea6408SIntel printf(" --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: " 124b6ea6408SIntel "specify the socket on which the TX/RX rings for " 125b6ea6408SIntel "the port will be allocated " 126b6ea6408SIntel "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n"); 127b6ea6408SIntel printf(" --socket-num=N: set socket from which all memory is allocated " 128b6ea6408SIntel "in NUMA mode.\n"); 1293be52ffcSIntel printf(" --mbuf-size=N: set the data size of mbuf to N bytes.\n"); 1303be52ffcSIntel printf(" --total-num-mbufs=N: set the number of mbufs to be allocated " 1313be52ffcSIntel "in mbuf pools.\n"); 1323be52ffcSIntel printf(" --max-pkt-len=N: set the maximum size of packet to N bytes.\n"); 1330d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1343be52ffcSIntel printf(" --eth-peers-configfile=name: config file with ethernet addresses " 1353be52ffcSIntel "of peer ports.\n"); 1363be52ffcSIntel printf(" --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer " 1373be52ffcSIntel "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS); 1380d56cb81SThomas Monjalon #endif 1393be52ffcSIntel printf(" --pkt-filter-mode=N: set Flow Director mode " 1403be52ffcSIntel "(N: none (default mode) or signature or perfect).\n"); 1413be52ffcSIntel printf(" --pkt-filter-report-hash=N: set Flow Director report mode " 1423be52ffcSIntel "(N: none or match (default) or always).\n"); 1433be52ffcSIntel printf(" --pkt-filter-size=N: set Flow Director mode " 1443be52ffcSIntel "(N: 64K (default mode) or 128K or 256K).\n"); 145af75078fSIntel printf(" --pkt-filter-flexbytes-offset=N: set flexbytes-offset. " 146af75078fSIntel "The offset is defined in word units counted from the " 147af75078fSIntel "first byte of the destination Ethernet MAC address. " 1483be52ffcSIntel "0 <= N <= 32.\n"); 149af75078fSIntel printf(" --pkt-filter-drop-queue=N: set drop-queue. " 1503be52ffcSIntel "In perfect mode, when you add a rule with queue = -1 " 151af75078fSIntel "the packet will be enqueued into the rx drop-queue. " 152af75078fSIntel "If the drop-queue doesn't exist, the packet is dropped. " 1533be52ffcSIntel "By default drop-queue=127.\n"); 1543be52ffcSIntel printf(" --crc-strip: enable CRC stripping by hardware.\n"); 1553be52ffcSIntel printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n"); 1563be52ffcSIntel printf(" --disable-hw-vlan: disable hardware vlan.\n"); 1573be52ffcSIntel printf(" --enable-drop-en: enable per queue packet drop.\n"); 1583be52ffcSIntel printf(" --disable-rss: disable rss.\n"); 159af75078fSIntel printf(" --port-topology=N: set port topology (N: paired (default) or " 1603be52ffcSIntel "chained).\n"); 161769ce6b1SThomas Monjalon printf(" --forward-mode=N: set forwarding mode (N: %s).\n", 162769ce6b1SThomas Monjalon list_pkt_forwarding_modes()); 1633be52ffcSIntel printf(" --rss-ip: set RSS functions to IPv4/IPv6 only .\n"); 1643be52ffcSIntel printf(" --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n"); 1653be52ffcSIntel printf(" --rxq=N: set the number of RX queues per port to N.\n"); 1663be52ffcSIntel printf(" --rxd=N: set the number of descriptors in RX rings to N.\n"); 1673be52ffcSIntel printf(" --txq=N: set the number of TX queues per port to N.\n"); 1683be52ffcSIntel printf(" --txd=N: set the number of descriptors in TX rings to N.\n"); 1693be52ffcSIntel printf(" --burst=N: set the number of packets per burst to N.\n"); 1703be52ffcSIntel printf(" --mbcache=N: set the cache of mbuf memory pool to N.\n"); 1713be52ffcSIntel printf(" --rxpt=N: set prefetch threshold register of RX rings to N " 1723be52ffcSIntel "(0 <= N <= 16).\n"); 1733be52ffcSIntel printf(" --rxht=N: set the host threshold register of RX rings to N " 1743be52ffcSIntel "(0 <= N <= 16).\n"); 1753be52ffcSIntel printf(" --rxfreet=N: set the free threshold of RX descriptors to N " 1763be52ffcSIntel "(0 <= N < value of rxd).\n"); 1773be52ffcSIntel printf(" --rxwt=N: set the write-back threshold register of RX rings " 1783be52ffcSIntel "to N (0 <= N <= 16).\n"); 1793be52ffcSIntel printf(" --txpt=N: set the prefetch threshold register of TX rings " 1803be52ffcSIntel "to N (0 <= N <= 16).\n"); 1813be52ffcSIntel printf(" --txht=N: set the nhost threshold register of TX rings to N " 1823be52ffcSIntel "(0 <= N <= 16).\n"); 1833be52ffcSIntel printf(" --txwt=N: set the write-back threshold register of TX rings " 1843be52ffcSIntel "to N (0 <= N <= 16).\n"); 1853be52ffcSIntel printf(" --txfreet=N: set the transmit free threshold of TX rings to N " 1863be52ffcSIntel "(0 <= N <= value of txd).\n"); 1873be52ffcSIntel printf(" --txrst=N: set the transmit RS bit threshold of TX rings to N " 1883be52ffcSIntel "(0 <= N <= value of txd).\n"); 1893be52ffcSIntel printf(" --txqflags=0xXXXXXXXX: hexadecimal bitmask of TX queue flags " 1903be52ffcSIntel "(0 <= N <= 0x7FFFFFFF).\n"); 1913be52ffcSIntel printf(" --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 192ed30d9b6SIntel "tx queues statistics counters mapping " 1933be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1943be52ffcSIntel printf(" --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 195ed30d9b6SIntel "rx queues statistics counters mapping " 1963be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1975e2ee196SIntel printf(" --no-flush-rx: Don't flush RX streams before forwarding." 1985e2ee196SIntel " Used mainly with PCAP drivers.\n"); 199a7e7bb4eSCyril Chemparathy printf(" --txpkts=X[,Y]*: set TX segment sizes.\n"); 200*bc202406SDavid Marchand printf(" --disable-link-check: disable check on link status when " 201*bc202406SDavid Marchand "starting/stopping ports.\n"); 202af75078fSIntel } 203af75078fSIntel 2040d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 205af75078fSIntel static int 206af75078fSIntel init_peer_eth_addrs(char *config_filename) 207af75078fSIntel { 208af75078fSIntel FILE *config_file; 209af75078fSIntel portid_t i; 210af75078fSIntel char buf[50]; 211af75078fSIntel 212af75078fSIntel config_file = fopen(config_filename, "r"); 213af75078fSIntel if (config_file == NULL) { 2143be52ffcSIntel perror("Failed to open eth config file\n"); 215af75078fSIntel return -1; 216af75078fSIntel } 217af75078fSIntel 218af75078fSIntel for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 219af75078fSIntel 220af75078fSIntel if (fgets(buf, sizeof(buf), config_file) == NULL) 221af75078fSIntel break; 222af75078fSIntel 223af75078fSIntel if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i]) < 0 ){ 2243be52ffcSIntel printf("Bad MAC address format on line %d\n", i+1); 225af75078fSIntel fclose(config_file); 226af75078fSIntel return -1; 227af75078fSIntel } 228af75078fSIntel } 229af75078fSIntel fclose(config_file); 230af75078fSIntel nb_peer_eth_addrs = (portid_t) i; 231af75078fSIntel return 0; 232af75078fSIntel } 2330d56cb81SThomas Monjalon #endif 234af75078fSIntel 235af75078fSIntel /* 236af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 237af75078fSIntel * the global configuration of forwarding cores. 238af75078fSIntel */ 239af75078fSIntel static void 240af75078fSIntel parse_fwd_coremask(const char *coremask) 241af75078fSIntel { 242af75078fSIntel char *end; 243af75078fSIntel unsigned long long int cm; 244af75078fSIntel 245af75078fSIntel /* parse hexadecimal string */ 246af75078fSIntel end = NULL; 247af75078fSIntel cm = strtoull(coremask, &end, 16); 248af75078fSIntel if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0')) 249af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n"); 250013af9b6SIntel else if (set_fwd_lcores_mask((uint64_t) cm) < 0) 251013af9b6SIntel rte_exit(EXIT_FAILURE, "coremask is not valid\n"); 252af75078fSIntel } 253af75078fSIntel 254af75078fSIntel /* 255af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 256af75078fSIntel * the global configuration of forwarding cores. 257af75078fSIntel */ 258af75078fSIntel static void 259af75078fSIntel parse_fwd_portmask(const char *portmask) 260af75078fSIntel { 261af75078fSIntel char *end; 262af75078fSIntel unsigned long long int pm; 263af75078fSIntel 264af75078fSIntel /* parse hexadecimal string */ 265af75078fSIntel end = NULL; 266af75078fSIntel pm = strtoull(portmask, &end, 16); 267af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 268af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n"); 269af75078fSIntel else 270af75078fSIntel set_fwd_ports_mask((uint64_t) pm); 271af75078fSIntel } 272af75078fSIntel 273ed30d9b6SIntel 274ed30d9b6SIntel static int 275ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx) 276ed30d9b6SIntel { 277ed30d9b6SIntel char s[256]; 278ed30d9b6SIntel const char *p, *p0 = q_arg; 279ed30d9b6SIntel char *end; 280ed30d9b6SIntel enum fieldnames { 281ed30d9b6SIntel FLD_PORT = 0, 282ed30d9b6SIntel FLD_QUEUE, 283ed30d9b6SIntel FLD_STATS_COUNTER, 284ed30d9b6SIntel _NUM_FLD 285ed30d9b6SIntel }; 286ed30d9b6SIntel unsigned long int_fld[_NUM_FLD]; 287ed30d9b6SIntel char *str_fld[_NUM_FLD]; 288ed30d9b6SIntel int i; 289ed30d9b6SIntel unsigned size; 290ed30d9b6SIntel 291ed30d9b6SIntel /* reset from value set at definition */ 292ed30d9b6SIntel is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0); 293ed30d9b6SIntel 294ed30d9b6SIntel while ((p = strchr(p0,'(')) != NULL) { 295ed30d9b6SIntel ++p; 296ed30d9b6SIntel if((p0 = strchr(p,')')) == NULL) 297ed30d9b6SIntel return -1; 298ed30d9b6SIntel 299ed30d9b6SIntel size = p0 - p; 300ed30d9b6SIntel if(size >= sizeof(s)) 301ed30d9b6SIntel return -1; 302ed30d9b6SIntel 303ed30d9b6SIntel rte_snprintf(s, sizeof(s), "%.*s", size, p); 304ed30d9b6SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 305ed30d9b6SIntel return -1; 306ed30d9b6SIntel for (i = 0; i < _NUM_FLD; i++){ 307ed30d9b6SIntel errno = 0; 308ed30d9b6SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 309ed30d9b6SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 310ed30d9b6SIntel return -1; 311ed30d9b6SIntel } 312ed30d9b6SIntel /* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */ 313ed30d9b6SIntel if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) { 314ed30d9b6SIntel printf("Stats counter not in the correct range 0..%d\n", 315ed30d9b6SIntel RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 316ed30d9b6SIntel return -1; 317ed30d9b6SIntel } 318ed30d9b6SIntel 319ed30d9b6SIntel if (is_rx ? (nb_rx_queue_stats_mappings >= MAX_RX_QUEUE_STATS_MAPPINGS) : 320ed30d9b6SIntel (nb_tx_queue_stats_mappings >= MAX_TX_QUEUE_STATS_MAPPINGS)) { 321ed30d9b6SIntel printf("exceeded max number of %s queue statistics mappings: %hu\n", 322ed30d9b6SIntel is_rx ? "RX" : "TX", 323ed30d9b6SIntel is_rx ? nb_rx_queue_stats_mappings : nb_tx_queue_stats_mappings); 324ed30d9b6SIntel return -1; 325ed30d9b6SIntel } 326ed30d9b6SIntel if (!is_rx) { 327ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id = 328ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 329ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id = 330ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 331ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id = 332ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 333ed30d9b6SIntel ++nb_tx_queue_stats_mappings; 334ed30d9b6SIntel } 335ed30d9b6SIntel else { 336ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id = 337ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 338ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id = 339ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 340ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id = 341ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 342ed30d9b6SIntel ++nb_rx_queue_stats_mappings; 343ed30d9b6SIntel } 344ed30d9b6SIntel 345ed30d9b6SIntel } 346ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */ 347ed30d9b6SIntel /* than to the default array (that was set at its definition) */ 348ed30d9b6SIntel is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) : 349ed30d9b6SIntel (tx_queue_stats_mappings = tx_queue_stats_mappings_array); 350ed30d9b6SIntel return 0; 351ed30d9b6SIntel } 352ed30d9b6SIntel 353b6ea6408SIntel static int 354b6ea6408SIntel parse_portnuma_config(const char *q_arg) 355b6ea6408SIntel { 356b6ea6408SIntel char s[256]; 357b6ea6408SIntel const char *p, *p0 = q_arg; 358b6ea6408SIntel char *end; 359b6ea6408SIntel uint8_t i,port_id,socket_id; 360b6ea6408SIntel unsigned size; 361b6ea6408SIntel enum fieldnames { 362b6ea6408SIntel FLD_PORT = 0, 363b6ea6408SIntel FLD_SOCKET, 364b6ea6408SIntel _NUM_FLD 365b6ea6408SIntel }; 366b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 367b6ea6408SIntel char *str_fld[_NUM_FLD]; 368b6ea6408SIntel 369b6ea6408SIntel /* reset from value set at definition */ 370b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 371b6ea6408SIntel ++p; 372b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 373b6ea6408SIntel return -1; 374b6ea6408SIntel 375b6ea6408SIntel size = p0 - p; 376b6ea6408SIntel if(size >= sizeof(s)) 377b6ea6408SIntel return -1; 378b6ea6408SIntel 379b6ea6408SIntel rte_snprintf(s, sizeof(s), "%.*s", size, p); 380b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 381b6ea6408SIntel return -1; 382b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 383b6ea6408SIntel errno = 0; 384b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 385b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 386b6ea6408SIntel return -1; 387b6ea6408SIntel } 388b6ea6408SIntel port_id = (uint8_t)int_fld[FLD_PORT]; 389b6ea6408SIntel if (port_id >= nb_ports) { 390b6ea6408SIntel printf("Invalid port, range is [0, %d]\n", nb_ports - 1); 391b6ea6408SIntel return -1; 392b6ea6408SIntel } 393b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 394b6ea6408SIntel if(socket_id >= MAX_SOCKET) { 395b6ea6408SIntel printf("Invalid socket id, range is [0, %d]\n", 396b6ea6408SIntel MAX_SOCKET - 1); 397b6ea6408SIntel return -1; 398b6ea6408SIntel } 399b6ea6408SIntel port_numa[port_id] = socket_id; 400b6ea6408SIntel } 401b6ea6408SIntel 402b6ea6408SIntel return 0; 403b6ea6408SIntel } 404b6ea6408SIntel 405b6ea6408SIntel static int 406b6ea6408SIntel parse_ringnuma_config(const char *q_arg) 407b6ea6408SIntel { 408b6ea6408SIntel char s[256]; 409b6ea6408SIntel const char *p, *p0 = q_arg; 410b6ea6408SIntel char *end; 411b6ea6408SIntel uint8_t i,port_id,ring_flag,socket_id; 412b6ea6408SIntel unsigned size; 413b6ea6408SIntel enum fieldnames { 414b6ea6408SIntel FLD_PORT = 0, 415b6ea6408SIntel FLD_FLAG, 416b6ea6408SIntel FLD_SOCKET, 417b6ea6408SIntel _NUM_FLD 418b6ea6408SIntel }; 419b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 420b6ea6408SIntel char *str_fld[_NUM_FLD]; 421b6ea6408SIntel #define RX_RING_ONLY 0x1 422b6ea6408SIntel #define TX_RING_ONLY 0x2 423b6ea6408SIntel #define RXTX_RING 0x3 424b6ea6408SIntel 425b6ea6408SIntel /* reset from value set at definition */ 426b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 427b6ea6408SIntel ++p; 428b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 429b6ea6408SIntel return -1; 430b6ea6408SIntel 431b6ea6408SIntel size = p0 - p; 432b6ea6408SIntel if(size >= sizeof(s)) 433b6ea6408SIntel return -1; 434b6ea6408SIntel 435b6ea6408SIntel rte_snprintf(s, sizeof(s), "%.*s", size, p); 436b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 437b6ea6408SIntel return -1; 438b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 439b6ea6408SIntel errno = 0; 440b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 441b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 442b6ea6408SIntel return -1; 443b6ea6408SIntel } 444b6ea6408SIntel port_id = (uint8_t)int_fld[FLD_PORT]; 445b6ea6408SIntel if (port_id >= nb_ports) { 446b6ea6408SIntel printf("Invalid port, range is [0, %d]\n", nb_ports - 1); 447b6ea6408SIntel return -1; 448b6ea6408SIntel } 449b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 450b6ea6408SIntel if (socket_id >= MAX_SOCKET) { 451b6ea6408SIntel printf("Invalid socket id, range is [0, %d]\n", 452b6ea6408SIntel MAX_SOCKET - 1); 453b6ea6408SIntel return -1; 454b6ea6408SIntel } 455b6ea6408SIntel ring_flag = (uint8_t)int_fld[FLD_FLAG]; 456b6ea6408SIntel if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) { 457b6ea6408SIntel printf("Invalid ring-flag=%d config for port =%d\n", 458b6ea6408SIntel ring_flag,port_id); 459b6ea6408SIntel return -1; 460b6ea6408SIntel } 461b6ea6408SIntel 462b6ea6408SIntel switch (ring_flag & RXTX_RING) { 463b6ea6408SIntel case RX_RING_ONLY: 464b6ea6408SIntel rxring_numa[port_id] = socket_id; 465b6ea6408SIntel break; 466b6ea6408SIntel case TX_RING_ONLY: 467b6ea6408SIntel txring_numa[port_id] = socket_id; 468b6ea6408SIntel break; 469b6ea6408SIntel case RXTX_RING: 470b6ea6408SIntel rxring_numa[port_id] = socket_id; 471b6ea6408SIntel txring_numa[port_id] = socket_id; 472b6ea6408SIntel break; 473b6ea6408SIntel default: 474b6ea6408SIntel printf("Invalid ring-flag=%d config for port=%d\n", 475b6ea6408SIntel ring_flag,port_id); 476b6ea6408SIntel break; 477b6ea6408SIntel } 478b6ea6408SIntel } 479b6ea6408SIntel 480b6ea6408SIntel return 0; 481b6ea6408SIntel } 482ed30d9b6SIntel 483a7e7bb4eSCyril Chemparathy static unsigned int 484a7e7bb4eSCyril Chemparathy parse_item_list(char* str, unsigned int max_items, unsigned int *parsed_items) 485a7e7bb4eSCyril Chemparathy { 486a7e7bb4eSCyril Chemparathy unsigned int nb_item; 487a7e7bb4eSCyril Chemparathy unsigned int value; 488a7e7bb4eSCyril Chemparathy unsigned int i; 489a7e7bb4eSCyril Chemparathy int value_ok; 490a7e7bb4eSCyril Chemparathy char c; 491a7e7bb4eSCyril Chemparathy 492a7e7bb4eSCyril Chemparathy /* 493a7e7bb4eSCyril Chemparathy * First parse all items in the list and store their value. 494a7e7bb4eSCyril Chemparathy */ 495a7e7bb4eSCyril Chemparathy value = 0; 496a7e7bb4eSCyril Chemparathy nb_item = 0; 497a7e7bb4eSCyril Chemparathy value_ok = 0; 498a7e7bb4eSCyril Chemparathy for (i = 0; i < strlen(str); i++) { 499a7e7bb4eSCyril Chemparathy c = str[i]; 500a7e7bb4eSCyril Chemparathy if ((c >= '0') && (c <= '9')) { 501a7e7bb4eSCyril Chemparathy value = (unsigned int) (value * 10 + (c - '0')); 502a7e7bb4eSCyril Chemparathy value_ok = 1; 503a7e7bb4eSCyril Chemparathy continue; 504a7e7bb4eSCyril Chemparathy } 505a7e7bb4eSCyril Chemparathy if (c != ',') { 506a7e7bb4eSCyril Chemparathy printf("character %c is not a decimal digit\n", c); 507a7e7bb4eSCyril Chemparathy return (0); 508a7e7bb4eSCyril Chemparathy } 509a7e7bb4eSCyril Chemparathy if (! value_ok) { 510a7e7bb4eSCyril Chemparathy printf("No valid value before comma\n"); 511a7e7bb4eSCyril Chemparathy return (0); 512a7e7bb4eSCyril Chemparathy } 513a7e7bb4eSCyril Chemparathy if (nb_item < max_items) { 514a7e7bb4eSCyril Chemparathy parsed_items[nb_item] = value; 515a7e7bb4eSCyril Chemparathy value_ok = 0; 516a7e7bb4eSCyril Chemparathy value = 0; 517a7e7bb4eSCyril Chemparathy } 518a7e7bb4eSCyril Chemparathy nb_item++; 519a7e7bb4eSCyril Chemparathy } 520a7e7bb4eSCyril Chemparathy 521a7e7bb4eSCyril Chemparathy if (nb_item >= max_items) 522a7e7bb4eSCyril Chemparathy rte_exit(EXIT_FAILURE, "too many txpkt segments!\n"); 523a7e7bb4eSCyril Chemparathy 524a7e7bb4eSCyril Chemparathy parsed_items[nb_item++] = value; 525a7e7bb4eSCyril Chemparathy 526a7e7bb4eSCyril Chemparathy return (nb_item); 527a7e7bb4eSCyril Chemparathy } 528a7e7bb4eSCyril Chemparathy 529af75078fSIntel void 530af75078fSIntel launch_args_parse(int argc, char** argv) 531af75078fSIntel { 532af75078fSIntel int n, opt; 533af75078fSIntel char **argvopt; 534af75078fSIntel int opt_idx; 535013af9b6SIntel enum { TX, RX }; 536013af9b6SIntel 537af75078fSIntel static struct option lgopts[] = { 538af75078fSIntel { "help", 0, 0, 0 }, 5390d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 540af75078fSIntel { "interactive", 0, 0, 0 }, 541ca7feb22SCyril Chemparathy { "auto-start", 0, 0, 0 }, 542af75078fSIntel { "eth-peers-configfile", 1, 0, 0 }, 543af75078fSIntel { "eth-peer", 1, 0, 0 }, 5440d56cb81SThomas Monjalon #endif 545af75078fSIntel { "ports", 1, 0, 0 }, 546af75078fSIntel { "nb-cores", 1, 0, 0 }, 547af75078fSIntel { "nb-ports", 1, 0, 0 }, 548af75078fSIntel { "coremask", 1, 0, 0 }, 549af75078fSIntel { "portmask", 1, 0, 0 }, 550af75078fSIntel { "numa", 0, 0, 0 }, 551148f963fSBruce Richardson { "mp-anon", 0, 0, 0 }, 552b6ea6408SIntel { "port-numa-config", 1, 0, 0 }, 553b6ea6408SIntel { "ring-numa-config", 1, 0, 0 }, 554b6ea6408SIntel { "socket-num", 1, 0, 0 }, 555af75078fSIntel { "mbuf-size", 1, 0, 0 }, 556c8798818SIntel { "total-num-mbufs", 1, 0, 0 }, 557af75078fSIntel { "max-pkt-len", 1, 0, 0 }, 558af75078fSIntel { "pkt-filter-mode", 1, 0, 0 }, 559af75078fSIntel { "pkt-filter-report-hash", 1, 0, 0 }, 560af75078fSIntel { "pkt-filter-size", 1, 0, 0 }, 561af75078fSIntel { "pkt-filter-flexbytes-offset",1, 0, 0 }, 562af75078fSIntel { "pkt-filter-drop-queue", 1, 0, 0 }, 563af75078fSIntel { "crc-strip", 0, 0, 0 }, 564013af9b6SIntel { "enable-rx-cksum", 0, 0, 0 }, 565af75078fSIntel { "disable-hw-vlan", 0, 0, 0 }, 566013af9b6SIntel { "enable-drop-en", 0, 0, 0 }, 567af75078fSIntel { "disable-rss", 0, 0, 0 }, 568af75078fSIntel { "port-topology", 1, 0, 0 }, 569ce9b9fb0SCyril Chemparathy { "forward-mode", 1, 0, 0 }, 570af75078fSIntel { "rss-ip", 0, 0, 0 }, 571af75078fSIntel { "rss-udp", 0, 0, 0 }, 572af75078fSIntel { "rxq", 1, 0, 0 }, 573af75078fSIntel { "txq", 1, 0, 0 }, 574af75078fSIntel { "rxd", 1, 0, 0 }, 575af75078fSIntel { "txd", 1, 0, 0 }, 576af75078fSIntel { "burst", 1, 0, 0 }, 577af75078fSIntel { "mbcache", 1, 0, 0 }, 578af75078fSIntel { "txpt", 1, 0, 0 }, 579af75078fSIntel { "txht", 1, 0, 0 }, 580af75078fSIntel { "txwt", 1, 0, 0 }, 581af75078fSIntel { "txfreet", 1, 0, 0 }, 582af75078fSIntel { "txrst", 1, 0, 0 }, 583ce8d5614SIntel { "txqflags", 1, 0, 0 }, 584af75078fSIntel { "rxpt", 1, 0, 0 }, 585af75078fSIntel { "rxht", 1, 0, 0 }, 586af75078fSIntel { "rxwt", 1, 0, 0 }, 587af75078fSIntel { "rxfreet", 1, 0, 0 }, 588ed30d9b6SIntel { "tx-queue-stats-mapping", 1, 0, 0 }, 589ed30d9b6SIntel { "rx-queue-stats-mapping", 1, 0, 0 }, 5907741e4cfSIntel { "no-flush-rx", 0, 0, 0 }, 591a7e7bb4eSCyril Chemparathy { "txpkts", 1, 0, 0 }, 592*bc202406SDavid Marchand { "disable-link-check", 0, 0, 0 }, 593af75078fSIntel { 0, 0, 0, 0 }, 594af75078fSIntel }; 595af75078fSIntel 596af75078fSIntel argvopt = argv; 597af75078fSIntel 5980d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 599ca7feb22SCyril Chemparathy #define SHORTOPTS "i" 6000d56cb81SThomas Monjalon #else 601ca7feb22SCyril Chemparathy #define SHORTOPTS "" 6020d56cb81SThomas Monjalon #endif 603ca7feb22SCyril Chemparathy while ((opt = getopt_long(argc, argvopt, SHORTOPTS "ah", 604af75078fSIntel lgopts, &opt_idx)) != EOF) { 605af75078fSIntel switch (opt) { 6060d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 607af75078fSIntel case 'i': 608af75078fSIntel printf("Interactive-mode selected\n"); 609af75078fSIntel interactive = 1; 610af75078fSIntel break; 6110d56cb81SThomas Monjalon #endif 612ca7feb22SCyril Chemparathy case 'a': 613ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 614ca7feb22SCyril Chemparathy auto_start = 1; 615ca7feb22SCyril Chemparathy break; 616ca7feb22SCyril Chemparathy 617af75078fSIntel case 0: /*long options */ 618af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "help")) { 619af75078fSIntel usage(argv[0]); 620af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 621af75078fSIntel } 6220d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 623af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "interactive")) { 624af75078fSIntel printf("Interactive-mode selected\n"); 625af75078fSIntel interactive = 1; 626af75078fSIntel } 627ca7feb22SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "auto-start")) { 628ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 629ca7feb22SCyril Chemparathy auto_start = 1; 630ca7feb22SCyril Chemparathy } 631af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 632af75078fSIntel "eth-peers-configfile")) { 633af75078fSIntel if (init_peer_eth_addrs(optarg) != 0) 634af75078fSIntel rte_exit(EXIT_FAILURE, 635af75078fSIntel "Cannot open logfile\n"); 636af75078fSIntel } 637af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "eth-peer")) { 638af75078fSIntel char *port_end; 639af75078fSIntel uint8_t c, peer_addr[6]; 640af75078fSIntel 641af75078fSIntel errno = 0; 642af75078fSIntel n = strtoul(optarg, &port_end, 10); 643af75078fSIntel if (errno != 0 || port_end == optarg || *port_end++ != ',') 644af75078fSIntel rte_exit(EXIT_FAILURE, 645af75078fSIntel "Invalid eth-peer: %s", optarg); 646af75078fSIntel if (n >= RTE_MAX_ETHPORTS) 647af75078fSIntel rte_exit(EXIT_FAILURE, 648af75078fSIntel "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n", 649af75078fSIntel n, RTE_MAX_ETHPORTS); 650af75078fSIntel 651af75078fSIntel if (cmdline_parse_etheraddr(NULL, port_end, &peer_addr) < 0 ) 652af75078fSIntel rte_exit(EXIT_FAILURE, 653af75078fSIntel "Invalid ethernet address: %s\n", 654af75078fSIntel port_end); 655af75078fSIntel for (c = 0; c < 6; c++) 656af75078fSIntel peer_eth_addrs[n].addr_bytes[c] = 657af75078fSIntel peer_addr[c]; 658af75078fSIntel nb_peer_eth_addrs++; 659af75078fSIntel } 6600d56cb81SThomas Monjalon #endif 661af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-ports")) { 662af75078fSIntel n = atoi(optarg); 663af75078fSIntel if (n > 0 && n <= nb_ports) 664af75078fSIntel nb_fwd_ports = (uint8_t) n; 665af75078fSIntel else 666af75078fSIntel rte_exit(EXIT_FAILURE, 667af75078fSIntel "nb-ports should be > 0 and <= %d\n", 668af75078fSIntel nb_ports); 669af75078fSIntel } 670af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-cores")) { 671af75078fSIntel n = atoi(optarg); 672af75078fSIntel if (n > 0 && n <= nb_lcores) 673af75078fSIntel nb_fwd_lcores = (uint8_t) n; 674af75078fSIntel else 675af75078fSIntel rte_exit(EXIT_FAILURE, 676af75078fSIntel "nb-cores should be > 0 and <= %d\n", 677af75078fSIntel nb_lcores); 678af75078fSIntel } 679af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "coremask")) 680af75078fSIntel parse_fwd_coremask(optarg); 681af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "portmask")) 682af75078fSIntel parse_fwd_portmask(optarg); 683b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "numa")) { 684af75078fSIntel numa_support = 1; 685b6ea6408SIntel memset(port_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 686b6ea6408SIntel memset(rxring_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 687b6ea6408SIntel memset(txring_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 688b6ea6408SIntel } 689148f963fSBruce Richardson if (!strcmp(lgopts[opt_idx].name, "mp-anon")) { 690148f963fSBruce Richardson mp_anon = 1; 691148f963fSBruce Richardson } 692b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) { 693b6ea6408SIntel if (parse_portnuma_config(optarg)) 694b6ea6408SIntel rte_exit(EXIT_FAILURE, 695b6ea6408SIntel "invalid port-numa configuration\n"); 696b6ea6408SIntel } 697b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "ring-numa-config")) 698b6ea6408SIntel if (parse_ringnuma_config(optarg)) 699b6ea6408SIntel rte_exit(EXIT_FAILURE, 700b6ea6408SIntel "invalid ring-numa configuration\n"); 701b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "socket-num")) { 702b6ea6408SIntel n = atoi(optarg); 703b6ea6408SIntel if(n < MAX_SOCKET) 704b6ea6408SIntel socket_num = (uint8_t)n; 705b6ea6408SIntel else 706b6ea6408SIntel rte_exit(EXIT_FAILURE, 707b6ea6408SIntel "The socket number should be < %d\n", 708b6ea6408SIntel MAX_SOCKET); 709b6ea6408SIntel } 710af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) { 711af75078fSIntel n = atoi(optarg); 712af75078fSIntel if (n > 0 && n <= 0xFFFF) 713af75078fSIntel mbuf_data_size = (uint16_t) n; 714af75078fSIntel else 715af75078fSIntel rte_exit(EXIT_FAILURE, 716af75078fSIntel "mbuf-size should be > 0 and < 65536\n"); 717af75078fSIntel } 718c8798818SIntel if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) { 719c8798818SIntel n = atoi(optarg); 720c8798818SIntel if (n > 1024) 721c8798818SIntel param_total_num_mbufs = (unsigned)n; 722c8798818SIntel else 723c8798818SIntel rte_exit(EXIT_FAILURE, 724c8798818SIntel "total-num-mbufs should be > 1024\n"); 725c8798818SIntel } 726af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) { 727af75078fSIntel n = atoi(optarg); 728af75078fSIntel if (n >= ETHER_MIN_LEN) { 729af75078fSIntel rx_mode.max_rx_pkt_len = (uint32_t) n; 730af75078fSIntel if (n > ETHER_MAX_LEN) 731af75078fSIntel rx_mode.jumbo_frame = 1; 732af75078fSIntel } else 733af75078fSIntel rte_exit(EXIT_FAILURE, 734af75078fSIntel "Invalid max-pkt-len=%d - should be > %d\n", 735af75078fSIntel n, ETHER_MIN_LEN); 736af75078fSIntel } 737af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) { 738af75078fSIntel if (!strcmp(optarg, "signature")) 739af75078fSIntel fdir_conf.mode = 740af75078fSIntel RTE_FDIR_MODE_SIGNATURE; 741af75078fSIntel else if (!strcmp(optarg, "perfect")) 742af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_PERFECT; 743af75078fSIntel else if (!strcmp(optarg, "none")) 744af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_NONE; 745af75078fSIntel else 746af75078fSIntel rte_exit(EXIT_FAILURE, 747af75078fSIntel "pkt-mode-invalid %s invalid - must be: " 748af75078fSIntel "none, signature or perfect\n", 749af75078fSIntel optarg); 750af75078fSIntel } 751af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 752af75078fSIntel "pkt-filter-report-hash")) { 753af75078fSIntel if (!strcmp(optarg, "none")) 754af75078fSIntel fdir_conf.status = 755af75078fSIntel RTE_FDIR_NO_REPORT_STATUS; 756af75078fSIntel else if (!strcmp(optarg, "match")) 757af75078fSIntel fdir_conf.status = 758af75078fSIntel RTE_FDIR_REPORT_STATUS; 759af75078fSIntel else if (!strcmp(optarg, "always")) 760af75078fSIntel fdir_conf.status = 761af75078fSIntel RTE_FDIR_REPORT_STATUS_ALWAYS; 762af75078fSIntel else 763af75078fSIntel rte_exit(EXIT_FAILURE, 764af75078fSIntel "pkt-filter-report-hash %s invalid " 765af75078fSIntel "- must be: none or match or always\n", 766af75078fSIntel optarg); 767af75078fSIntel } 768af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) { 769af75078fSIntel if (!strcmp(optarg, "64K")) 770af75078fSIntel fdir_conf.pballoc = 771af75078fSIntel RTE_FDIR_PBALLOC_64K; 772af75078fSIntel else if (!strcmp(optarg, "128K")) 773af75078fSIntel fdir_conf.pballoc = 774af75078fSIntel RTE_FDIR_PBALLOC_128K; 775af75078fSIntel else if (!strcmp(optarg, "256K")) 776af75078fSIntel fdir_conf.pballoc = 777af75078fSIntel RTE_FDIR_PBALLOC_256K; 778af75078fSIntel else 779af75078fSIntel rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -" 780af75078fSIntel " must be: 64K or 128K or 256K\n", 781af75078fSIntel optarg); 782af75078fSIntel } 783af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 784af75078fSIntel "pkt-filter-flexbytes-offset")) { 785af75078fSIntel n = atoi(optarg); 786af75078fSIntel if ( n >= 0 && n <= (int) 32) 787af75078fSIntel fdir_conf.flexbytes_offset = 788af75078fSIntel (uint8_t) n; 789af75078fSIntel else 790af75078fSIntel rte_exit(EXIT_FAILURE, 791af75078fSIntel "flexbytes %d invalid - must" 792af75078fSIntel "be >= 0 && <= 32\n", n); 793af75078fSIntel } 794af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 795af75078fSIntel "pkt-filter-drop-queue")) { 796af75078fSIntel n = atoi(optarg); 797af75078fSIntel if (n >= 0) 798af75078fSIntel fdir_conf.drop_queue = (uint8_t) n; 799af75078fSIntel else 800af75078fSIntel rte_exit(EXIT_FAILURE, 801af75078fSIntel "drop queue %d invalid - must" 802af75078fSIntel "be >= 0 \n", n); 803af75078fSIntel } 804af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "crc-strip")) 805af75078fSIntel rx_mode.hw_strip_crc = 1; 806af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum")) 807af75078fSIntel rx_mode.hw_ip_checksum = 1; 808a47aa8b9SIntel 809a47aa8b9SIntel if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) { 810af75078fSIntel rx_mode.hw_vlan_filter = 0; 811a47aa8b9SIntel rx_mode.hw_vlan_strip = 0; 812a47aa8b9SIntel rx_mode.hw_vlan_extend = 0; 813a47aa8b9SIntel } 814a47aa8b9SIntel 815ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "enable-drop-en")) 816ce8d5614SIntel rx_drop_en = 1; 817ce8d5614SIntel 818af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "disable-rss")) 819af75078fSIntel rss_hf = 0; 820af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "port-topology")) { 821af75078fSIntel if (!strcmp(optarg, "paired")) 822af75078fSIntel port_topology = PORT_TOPOLOGY_PAIRED; 823af75078fSIntel else if (!strcmp(optarg, "chained")) 824af75078fSIntel port_topology = PORT_TOPOLOGY_CHAINED; 8253e2006d6SCyril Chemparathy else if (!strcmp(optarg, "loop")) 8263e2006d6SCyril Chemparathy port_topology = PORT_TOPOLOGY_LOOP; 827af75078fSIntel else 828af75078fSIntel rte_exit(EXIT_FAILURE, "port-topology %s invalid -" 829af75078fSIntel " must be: paired or chained \n", 830af75078fSIntel optarg); 831af75078fSIntel } 832ce9b9fb0SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "forward-mode")) 833ce9b9fb0SCyril Chemparathy set_pkt_forwarding_mode(optarg); 834af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-ip")) 835af75078fSIntel rss_hf = ETH_RSS_IPV4 | ETH_RSS_IPV6; 836af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-udp")) 837013af9b6SIntel rss_hf = ETH_RSS_IPV4 | 838013af9b6SIntel ETH_RSS_IPV6 | ETH_RSS_IPV4_UDP; 839af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxq")) { 840af75078fSIntel n = atoi(optarg); 841af75078fSIntel if (n >= 1 && n <= (int) MAX_QUEUE_ID) 842af75078fSIntel nb_rxq = (queueid_t) n; 843af75078fSIntel else 844af75078fSIntel rte_exit(EXIT_FAILURE, "rxq %d invalid - must be" 845af75078fSIntel " >= 1 && <= %d\n", n, 846af75078fSIntel (int) MAX_QUEUE_ID); 847af75078fSIntel } 848af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txq")) { 849af75078fSIntel n = atoi(optarg); 850af75078fSIntel if (n >= 1 && n <= (int) MAX_QUEUE_ID) 851af75078fSIntel nb_txq = (queueid_t) n; 852af75078fSIntel else 853af75078fSIntel rte_exit(EXIT_FAILURE, "txq %d invalid - must be" 854af75078fSIntel " >= 1 && <= %d\n", n, 855af75078fSIntel (int) MAX_QUEUE_ID); 856af75078fSIntel } 857af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 858af75078fSIntel n = atoi(optarg); 859af75078fSIntel if (n > 0) 860af75078fSIntel nb_rxd = (uint16_t) n; 861af75078fSIntel else 862af75078fSIntel rte_exit(EXIT_FAILURE, "rxd must be > 0\n"); 863af75078fSIntel } 864af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 865af75078fSIntel n = atoi(optarg); 866af75078fSIntel if (n > 0) 867af75078fSIntel nb_txd = (uint16_t) n; 868af75078fSIntel else 869af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 870af75078fSIntel } 871af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "burst")) { 872af75078fSIntel n = atoi(optarg); 873af75078fSIntel if ((n >= 1) && (n <= MAX_PKT_BURST)) 874af75078fSIntel nb_pkt_per_burst = (uint16_t) n; 875af75078fSIntel else 876af75078fSIntel rte_exit(EXIT_FAILURE, 877af75078fSIntel "burst must >= 1 and <= %d]", 878af75078fSIntel MAX_PKT_BURST); 879af75078fSIntel } 880af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbcache")) { 881af75078fSIntel n = atoi(optarg); 882af75078fSIntel if ((n >= 0) && 883af75078fSIntel (n <= RTE_MEMPOOL_CACHE_MAX_SIZE)) 884af75078fSIntel mb_mempool_cache = (uint16_t) n; 885af75078fSIntel else 886af75078fSIntel rte_exit(EXIT_FAILURE, 887af75078fSIntel "mbcache must be >= 0 and <= %d\n", 888af75078fSIntel RTE_MEMPOOL_CACHE_MAX_SIZE); 889af75078fSIntel } 890af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 891af75078fSIntel n = atoi(optarg); 892af75078fSIntel if (n >= 0) 893af75078fSIntel tx_thresh.pthresh = (uint8_t)n; 894af75078fSIntel else 895af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 896af75078fSIntel } 897af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 898af75078fSIntel n = atoi(optarg); 899af75078fSIntel if (n >= 0) 900af75078fSIntel tx_thresh.hthresh = (uint8_t)n; 901af75078fSIntel else 902af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 903af75078fSIntel } 904af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 905af75078fSIntel n = atoi(optarg); 906af75078fSIntel if (n >= 0) 907af75078fSIntel tx_thresh.wthresh = (uint8_t)n; 908af75078fSIntel else 909af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 910af75078fSIntel } 911af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txfreet")) { 912af75078fSIntel n = atoi(optarg); 913af75078fSIntel if (n >= 0) 914af75078fSIntel tx_free_thresh = (uint16_t)n; 915af75078fSIntel else 916af75078fSIntel rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n"); 917af75078fSIntel } 918af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txrst")) { 919af75078fSIntel n = atoi(optarg); 920af75078fSIntel if (n >= 0) 921af75078fSIntel tx_rs_thresh = (uint16_t)n; 922af75078fSIntel else 923af75078fSIntel rte_exit(EXIT_FAILURE, "txrst must be >= 0\n"); 924af75078fSIntel } 925ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "txqflags")) { 926ce8d5614SIntel char *end = NULL; 927ce8d5614SIntel n = strtoul(optarg, &end, 16); 928ce8d5614SIntel if (n >= 0) 929ce8d5614SIntel txq_flags = (uint32_t)n; 930ce8d5614SIntel else 931ce8d5614SIntel rte_exit(EXIT_FAILURE, 932ce8d5614SIntel "txqflags must be >= 0\n"); 933ce8d5614SIntel } 934af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 935af75078fSIntel n = atoi(optarg); 936af75078fSIntel if (n >= 0) 937af75078fSIntel rx_thresh.pthresh = (uint8_t)n; 938af75078fSIntel else 939af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 940af75078fSIntel } 941af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 942af75078fSIntel n = atoi(optarg); 943af75078fSIntel if (n >= 0) 944af75078fSIntel rx_thresh.hthresh = (uint8_t)n; 945af75078fSIntel else 946af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 947af75078fSIntel } 948af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 949af75078fSIntel n = atoi(optarg); 950af75078fSIntel if (n >= 0) 951af75078fSIntel rx_thresh.wthresh = (uint8_t)n; 952af75078fSIntel else 953af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 954af75078fSIntel } 955af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 956af75078fSIntel n = atoi(optarg); 957af75078fSIntel if (n > 0) { 958af75078fSIntel if (rx_free_thresh >= n) 959af75078fSIntel rte_exit(EXIT_FAILURE, 960af75078fSIntel "rxd must be > " 961af75078fSIntel "rx_free_thresh(%d)\n", 962af75078fSIntel (int)rx_free_thresh); 963af75078fSIntel else 964af75078fSIntel nb_rxd = (uint16_t) n; 965af75078fSIntel } else 966af75078fSIntel rte_exit(EXIT_FAILURE, 967af75078fSIntel "rxd(%d) invalid - must be > 0\n", 968af75078fSIntel n); 969af75078fSIntel } 970af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 971af75078fSIntel n = atoi(optarg); 972af75078fSIntel if (n > 0) 973af75078fSIntel nb_txd = (uint16_t) n; 974af75078fSIntel else 975af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 976af75078fSIntel } 977af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 978af75078fSIntel n = atoi(optarg); 979af75078fSIntel if (n >= 0) 980af75078fSIntel tx_thresh.pthresh = (uint8_t)n; 981af75078fSIntel else 982af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 983af75078fSIntel } 984af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 985af75078fSIntel n = atoi(optarg); 986af75078fSIntel if (n >= 0) 987af75078fSIntel tx_thresh.hthresh = (uint8_t)n; 988af75078fSIntel else 989af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 990af75078fSIntel } 991af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 992af75078fSIntel n = atoi(optarg); 993af75078fSIntel if (n >= 0) 994af75078fSIntel tx_thresh.wthresh = (uint8_t)n; 995af75078fSIntel else 996af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 997af75078fSIntel } 998af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 999af75078fSIntel n = atoi(optarg); 1000af75078fSIntel if (n >= 0) 1001af75078fSIntel rx_thresh.pthresh = (uint8_t)n; 1002af75078fSIntel else 1003af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 1004af75078fSIntel } 1005af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 1006af75078fSIntel n = atoi(optarg); 1007af75078fSIntel if (n >= 0) 1008af75078fSIntel rx_thresh.hthresh = (uint8_t)n; 1009af75078fSIntel else 1010af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 1011af75078fSIntel } 1012af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 1013af75078fSIntel n = atoi(optarg); 1014af75078fSIntel if (n >= 0) 1015af75078fSIntel rx_thresh.wthresh = (uint8_t)n; 1016af75078fSIntel else 1017af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 1018af75078fSIntel } 1019af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxfreet")) { 1020af75078fSIntel n = atoi(optarg); 1021af75078fSIntel if (n >= 0) 1022af75078fSIntel rx_free_thresh = (uint16_t)n; 1023af75078fSIntel else 1024af75078fSIntel rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n"); 1025af75078fSIntel } 1026ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) { 1027ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, TX)) { 1028ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1029ed30d9b6SIntel "invalid TX queue statistics mapping config entered\n"); 1030ed30d9b6SIntel } 1031ed30d9b6SIntel } 1032ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) { 1033ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, RX)) { 1034ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1035ed30d9b6SIntel "invalid RX queue statistics mapping config entered\n"); 1036ed30d9b6SIntel } 1037ed30d9b6SIntel } 1038a7e7bb4eSCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "txpkts")) { 1039a7e7bb4eSCyril Chemparathy unsigned seg_lengths[RTE_MAX_SEGS_PER_PKT]; 1040a7e7bb4eSCyril Chemparathy unsigned int nb_segs; 1041a7e7bb4eSCyril Chemparathy 1042a7e7bb4eSCyril Chemparathy nb_segs = parse_item_list(optarg, RTE_MAX_SEGS_PER_PKT, seg_lengths); 1043a7e7bb4eSCyril Chemparathy if (nb_segs > 0) 1044a7e7bb4eSCyril Chemparathy set_tx_pkt_segments(seg_lengths, nb_segs); 1045a7e7bb4eSCyril Chemparathy else 1046a7e7bb4eSCyril Chemparathy rte_exit(EXIT_FAILURE, "bad txpkts\n"); 1047a7e7bb4eSCyril Chemparathy } 10487741e4cfSIntel if (!strcmp(lgopts[opt_idx].name, "no-flush-rx")) 10497741e4cfSIntel no_flush_rx = 1; 1050*bc202406SDavid Marchand if (!strcmp(lgopts[opt_idx].name, "disable-link-check")) 1051*bc202406SDavid Marchand no_link_check = 1; 10527741e4cfSIntel 1053af75078fSIntel break; 1054af75078fSIntel case 'h': 1055af75078fSIntel usage(argv[0]); 1056af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 1057af75078fSIntel break; 1058af75078fSIntel default: 1059af75078fSIntel usage(argv[0]); 1060af75078fSIntel rte_exit(EXIT_FAILURE, 1061af75078fSIntel "Command line is incomplete or incorrect\n"); 1062af75078fSIntel break; 1063af75078fSIntel } 1064af75078fSIntel } 1065af75078fSIntel } 1066