1174a1631SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause 2174a1631SBruce Richardson * Copyright(c) 2010-2017 Intel Corporation 3af75078fSIntel */ 4af75078fSIntel 5af75078fSIntel #include <errno.h> 6af75078fSIntel #include <getopt.h> 7af75078fSIntel #include <stdarg.h> 8af75078fSIntel #include <stdio.h> 9af75078fSIntel #include <stdlib.h> 10af75078fSIntel #include <signal.h> 11af75078fSIntel #include <string.h> 12af75078fSIntel #include <time.h> 13af75078fSIntel #include <fcntl.h> 14af75078fSIntel #include <sys/types.h> 15af75078fSIntel 16af75078fSIntel #include <sys/queue.h> 17af75078fSIntel #include <sys/stat.h> 18af75078fSIntel 19af75078fSIntel #include <stdint.h> 20af75078fSIntel #include <unistd.h> 21af75078fSIntel #include <inttypes.h> 22af75078fSIntel 23af75078fSIntel #include <rte_common.h> 24af75078fSIntel #include <rte_byteorder.h> 25af75078fSIntel #include <rte_log.h> 26af75078fSIntel #include <rte_debug.h> 27af75078fSIntel #include <rte_cycles.h> 28af75078fSIntel #include <rte_memory.h> 29af75078fSIntel #include <rte_launch.h> 30af75078fSIntel #include <rte_eal.h> 31af75078fSIntel #include <rte_per_lcore.h> 32af75078fSIntel #include <rte_lcore.h> 33af75078fSIntel #include <rte_atomic.h> 34af75078fSIntel #include <rte_branch_prediction.h> 35af75078fSIntel #include <rte_mempool.h> 36af75078fSIntel #include <rte_interrupts.h> 37af75078fSIntel #include <rte_pci.h> 38af75078fSIntel #include <rte_ether.h> 39af75078fSIntel #include <rte_ethdev.h> 40af75078fSIntel #include <rte_string_fns.h> 410d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 42af75078fSIntel #include <cmdline_parse.h> 43af75078fSIntel #include <cmdline_parse_etheraddr.h> 440d56cb81SThomas Monjalon #endif 452950a769SDeclan Doherty #ifdef RTE_LIBRTE_PMD_BOND 462950a769SDeclan Doherty #include <rte_eth_bond.h> 472950a769SDeclan Doherty #endif 48938a184aSAdrien Mazarguil #include <rte_flow.h> 49af75078fSIntel 50af75078fSIntel #include "testpmd.h" 51af75078fSIntel 52af75078fSIntel static void 53af75078fSIntel usage(char* progname) 54af75078fSIntel { 550d56cb81SThomas Monjalon printf("usage: %s " 560d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 570d56cb81SThomas Monjalon "[--interactive|-i] " 5881ef862bSAllain Legacy "[--cmdline-file=FILENAME] " 590d56cb81SThomas Monjalon #endif 60ca7feb22SCyril Chemparathy "[--help|-h] | [--auto-start|-a] | [" 61cfea1f30SPablo de Lara "--tx-first | --stats-period=PERIOD | " 62af75078fSIntel "--coremask=COREMASK --portmask=PORTMASK --numa " 63c8798818SIntel "--mbuf-size= | --total-num-mbufs= | " 643be52ffcSIntel "--nb-cores= | --nb-ports= | " 650d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 66af75078fSIntel "--eth-peers-configfile= | " 673be52ffcSIntel "--eth-peer=X,M:M:M:M:M:M | " 680d56cb81SThomas Monjalon #endif 69af75078fSIntel "--pkt-filter-mode= |" 70af75078fSIntel "--rss-ip | --rss-udp | " 71af75078fSIntel "--rxpt= | --rxht= | --rxwt= | --rxfreet= | " 72af75078fSIntel "--txpt= | --txht= | --txwt= | --txfreet= | " 7328da7d75SShahaf Shuler "--txrst= | --tx-offloads ]\n", 74af75078fSIntel progname); 750d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 763be52ffcSIntel printf(" --interactive: run in interactive mode.\n"); 7781ef862bSAllain Legacy printf(" --cmdline-file: execute cli commands before startup.\n"); 780d56cb81SThomas Monjalon #endif 79ca7feb22SCyril Chemparathy printf(" --auto-start: start forwarding on init " 80ca7feb22SCyril Chemparathy "[always when non-interactive].\n"); 813be52ffcSIntel printf(" --help: display this message and quit.\n"); 8299cabef0SPablo de Lara printf(" --tx-first: start forwarding sending a burst first " 8399cabef0SPablo de Lara "(only if interactive is disabled).\n"); 84cfea1f30SPablo de Lara printf(" --stats-period=PERIOD: statistics will be shown " 85cfea1f30SPablo de Lara "every PERIOD seconds (only if interactive is disabled).\n"); 863be52ffcSIntel printf(" --nb-cores=N: set the number of forwarding cores " 873be52ffcSIntel "(1 <= N <= %d).\n", nb_lcores); 883be52ffcSIntel printf(" --nb-ports=N: set the number of forwarding ports " 893be52ffcSIntel "(1 <= N <= %d).\n", nb_ports); 90af75078fSIntel printf(" --coremask=COREMASK: hexadecimal bitmask of cores running " 91013af9b6SIntel "the packet forwarding test. The master lcore is reserved for " 923be52ffcSIntel "command line parsing only, and cannot be masked on for " 933be52ffcSIntel "packet forwarding.\n"); 94af75078fSIntel printf(" --portmask=PORTMASK: hexadecimal bitmask of ports used " 953be52ffcSIntel "by the packet forwarding test.\n"); 96af75078fSIntel printf(" --numa: enable NUMA-aware allocation of RX/TX rings and of " 973be52ffcSIntel "RX memory buffers (mbufs).\n"); 98b6ea6408SIntel printf(" --port-numa-config=(port,socket)[,(port,socket)]: " 99b6ea6408SIntel "specify the socket on which the memory pool " 100b6ea6408SIntel "used by the port will be allocated.\n"); 101b6ea6408SIntel printf(" --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: " 102b6ea6408SIntel "specify the socket on which the TX/RX rings for " 103b6ea6408SIntel "the port will be allocated " 104b6ea6408SIntel "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n"); 105b6ea6408SIntel printf(" --socket-num=N: set socket from which all memory is allocated " 106b6ea6408SIntel "in NUMA mode.\n"); 1073be52ffcSIntel printf(" --mbuf-size=N: set the data size of mbuf to N bytes.\n"); 1083be52ffcSIntel printf(" --total-num-mbufs=N: set the number of mbufs to be allocated " 1093be52ffcSIntel "in mbuf pools.\n"); 1103be52ffcSIntel printf(" --max-pkt-len=N: set the maximum size of packet to N bytes.\n"); 1110d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1123be52ffcSIntel printf(" --eth-peers-configfile=name: config file with ethernet addresses " 1133be52ffcSIntel "of peer ports.\n"); 1143be52ffcSIntel printf(" --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer " 1153be52ffcSIntel "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS); 1160d56cb81SThomas Monjalon #endif 1173be52ffcSIntel printf(" --pkt-filter-mode=N: set Flow Director mode " 1183be52ffcSIntel "(N: none (default mode) or signature or perfect).\n"); 1193be52ffcSIntel printf(" --pkt-filter-report-hash=N: set Flow Director report mode " 1203be52ffcSIntel "(N: none or match (default) or always).\n"); 1213be52ffcSIntel printf(" --pkt-filter-size=N: set Flow Director mode " 1223be52ffcSIntel "(N: 64K (default mode) or 128K or 256K).\n"); 123af75078fSIntel printf(" --pkt-filter-drop-queue=N: set drop-queue. " 1243be52ffcSIntel "In perfect mode, when you add a rule with queue = -1 " 125af75078fSIntel "the packet will be enqueued into the rx drop-queue. " 126af75078fSIntel "If the drop-queue doesn't exist, the packet is dropped. " 1273be52ffcSIntel "By default drop-queue=127.\n"); 12862d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 12962d3216dSReshma Pattan printf(" --latencystats=N: enable latency and jitter statistcs " 13062d3216dSReshma Pattan "monitoring on forwarding lcore id N.\n"); 13162d3216dSReshma Pattan #endif 13279dd163fSJeff Guo printf(" --disable-crc-strip: disable CRC stripping by hardware.\n"); 1334c3ea508SOlivier Matz printf(" --enable-lro: enable large receive offload.\n"); 1343be52ffcSIntel printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n"); 135912267a3SRaslan Darawsheh printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n"); 1368b9bd0efSMoti Haimovsky printf(" --enable-hw-vlan: enable hardware vlan.\n"); 1378b9bd0efSMoti Haimovsky printf(" --enable-hw-vlan-filter: enable hardware vlan filter.\n"); 1388b9bd0efSMoti Haimovsky printf(" --enable-hw-vlan-strip: enable hardware vlan strip.\n"); 1398b9bd0efSMoti Haimovsky printf(" --enable-hw-vlan-extend: enable hardware vlan extend.\n"); 1403be52ffcSIntel printf(" --enable-drop-en: enable per queue packet drop.\n"); 1413be52ffcSIntel printf(" --disable-rss: disable rss.\n"); 142af75078fSIntel printf(" --port-topology=N: set port topology (N: paired (default) or " 1433be52ffcSIntel "chained).\n"); 144769ce6b1SThomas Monjalon printf(" --forward-mode=N: set forwarding mode (N: %s).\n", 145769ce6b1SThomas Monjalon list_pkt_forwarding_modes()); 1463be52ffcSIntel printf(" --rss-ip: set RSS functions to IPv4/IPv6 only .\n"); 1473be52ffcSIntel printf(" --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n"); 1483be52ffcSIntel printf(" --rxq=N: set the number of RX queues per port to N.\n"); 1493be52ffcSIntel printf(" --rxd=N: set the number of descriptors in RX rings to N.\n"); 1503be52ffcSIntel printf(" --txq=N: set the number of TX queues per port to N.\n"); 1513be52ffcSIntel printf(" --txd=N: set the number of descriptors in TX rings to N.\n"); 1523be52ffcSIntel printf(" --burst=N: set the number of packets per burst to N.\n"); 1533be52ffcSIntel printf(" --mbcache=N: set the cache of mbuf memory pool to N.\n"); 15457af3415SPablo de Lara printf(" --rxpt=N: set prefetch threshold register of RX rings to N.\n"); 15557af3415SPablo de Lara printf(" --rxht=N: set the host threshold register of RX rings to N.\n"); 1563be52ffcSIntel printf(" --rxfreet=N: set the free threshold of RX descriptors to N " 1573be52ffcSIntel "(0 <= N < value of rxd).\n"); 15857af3415SPablo de Lara printf(" --rxwt=N: set the write-back threshold register of RX rings to N.\n"); 15957af3415SPablo de Lara printf(" --txpt=N: set the prefetch threshold register of TX rings to N.\n"); 16057af3415SPablo de Lara printf(" --txht=N: set the nhost threshold register of TX rings to N.\n"); 16157af3415SPablo de Lara printf(" --txwt=N: set the write-back threshold register of TX rings to N.\n"); 1623be52ffcSIntel printf(" --txfreet=N: set the transmit free threshold of TX rings to N " 1633be52ffcSIntel "(0 <= N <= value of txd).\n"); 1643be52ffcSIntel printf(" --txrst=N: set the transmit RS bit threshold of TX rings to N " 1653be52ffcSIntel "(0 <= N <= value of txd).\n"); 1663be52ffcSIntel printf(" --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 167ed30d9b6SIntel "tx queues statistics counters mapping " 1683be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1693be52ffcSIntel printf(" --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 170ed30d9b6SIntel "rx queues statistics counters mapping " 1713be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1725e2ee196SIntel printf(" --no-flush-rx: Don't flush RX streams before forwarding." 1735e2ee196SIntel " Used mainly with PCAP drivers.\n"); 1742ebacaa7SMaciej Czekaj printf(" --txpkts=X[,Y]*: set TX segment sizes" 1752ebacaa7SMaciej Czekaj " or total packet length.\n"); 176bc202406SDavid Marchand printf(" --disable-link-check: disable check on link status when " 177bc202406SDavid Marchand "starting/stopping ports.\n"); 1788ea656f8SGaetan Rivet printf(" --no-lsc-interrupt: disable link status change interrupt.\n"); 179e25e6c70SRemy Horton printf(" --no-rmv-interrupt: disable device removal interrupt.\n"); 180e25e6c70SRemy Horton printf(" --bitrate-stats=N: set the logical core N to perform " 181e25e6c70SRemy Horton "bit-rate calculation.\n"); 182b6b63dfdSGaetan Rivet printf(" --print-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: " 183776ecd42SWenzhuo Lu "enable print of designated event or all of them.\n"); 184b6b63dfdSGaetan Rivet printf(" --mask-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: " 185776ecd42SWenzhuo Lu "disable print of designated event or all of them.\n"); 1867ee3e944SVasily Philipov printf(" --flow-isolate-all: " 187776ecd42SWenzhuo Lu "requests flow API isolated mode on all ports at initialization time.\n"); 188fd8c20aaSShahaf Shuler printf(" --tx-offloads=0xXXXXXXXX: hexadecimal bitmask of TX queue offloads\n"); 189fb73e096SJeff Guo printf(" --hot-plug: enable hot plug for device.\n"); 190af75078fSIntel } 191af75078fSIntel 1920d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 193af75078fSIntel static int 194af75078fSIntel init_peer_eth_addrs(char *config_filename) 195af75078fSIntel { 196af75078fSIntel FILE *config_file; 197af75078fSIntel portid_t i; 198af75078fSIntel char buf[50]; 199af75078fSIntel 200af75078fSIntel config_file = fopen(config_filename, "r"); 201af75078fSIntel if (config_file == NULL) { 2023be52ffcSIntel perror("Failed to open eth config file\n"); 203af75078fSIntel return -1; 204af75078fSIntel } 205af75078fSIntel 206af75078fSIntel for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 207af75078fSIntel 208af75078fSIntel if (fgets(buf, sizeof(buf), config_file) == NULL) 209af75078fSIntel break; 210af75078fSIntel 211aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i], 212aaa662e7SAlan Carew sizeof(peer_eth_addrs[i])) < 0) { 2133be52ffcSIntel printf("Bad MAC address format on line %d\n", i+1); 214af75078fSIntel fclose(config_file); 215af75078fSIntel return -1; 216af75078fSIntel } 217af75078fSIntel } 218af75078fSIntel fclose(config_file); 219af75078fSIntel nb_peer_eth_addrs = (portid_t) i; 220af75078fSIntel return 0; 221af75078fSIntel } 2220d56cb81SThomas Monjalon #endif 223af75078fSIntel 224af75078fSIntel /* 225af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 226af75078fSIntel * the global configuration of forwarding cores. 227af75078fSIntel */ 228af75078fSIntel static void 229af75078fSIntel parse_fwd_coremask(const char *coremask) 230af75078fSIntel { 231af75078fSIntel char *end; 232af75078fSIntel unsigned long long int cm; 233af75078fSIntel 234af75078fSIntel /* parse hexadecimal string */ 235af75078fSIntel end = NULL; 236af75078fSIntel cm = strtoull(coremask, &end, 16); 237af75078fSIntel if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0')) 238af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n"); 239013af9b6SIntel else if (set_fwd_lcores_mask((uint64_t) cm) < 0) 240013af9b6SIntel rte_exit(EXIT_FAILURE, "coremask is not valid\n"); 241af75078fSIntel } 242af75078fSIntel 243af75078fSIntel /* 244af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 245af75078fSIntel * the global configuration of forwarding cores. 246af75078fSIntel */ 247af75078fSIntel static void 248af75078fSIntel parse_fwd_portmask(const char *portmask) 249af75078fSIntel { 250af75078fSIntel char *end; 251af75078fSIntel unsigned long long int pm; 252af75078fSIntel 253af75078fSIntel /* parse hexadecimal string */ 254af75078fSIntel end = NULL; 255af75078fSIntel pm = strtoull(portmask, &end, 16); 256af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 257af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n"); 258af75078fSIntel else 259af75078fSIntel set_fwd_ports_mask((uint64_t) pm); 260af75078fSIntel } 261af75078fSIntel 262ed30d9b6SIntel 263ed30d9b6SIntel static int 264ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx) 265ed30d9b6SIntel { 266ed30d9b6SIntel char s[256]; 267ed30d9b6SIntel const char *p, *p0 = q_arg; 268ed30d9b6SIntel char *end; 269ed30d9b6SIntel enum fieldnames { 270ed30d9b6SIntel FLD_PORT = 0, 271ed30d9b6SIntel FLD_QUEUE, 272ed30d9b6SIntel FLD_STATS_COUNTER, 273ed30d9b6SIntel _NUM_FLD 274ed30d9b6SIntel }; 275ed30d9b6SIntel unsigned long int_fld[_NUM_FLD]; 276ed30d9b6SIntel char *str_fld[_NUM_FLD]; 277ed30d9b6SIntel int i; 278ed30d9b6SIntel unsigned size; 279ed30d9b6SIntel 280ed30d9b6SIntel /* reset from value set at definition */ 281ed30d9b6SIntel is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0); 282ed30d9b6SIntel 283ed30d9b6SIntel while ((p = strchr(p0,'(')) != NULL) { 284ed30d9b6SIntel ++p; 285ed30d9b6SIntel if((p0 = strchr(p,')')) == NULL) 286ed30d9b6SIntel return -1; 287ed30d9b6SIntel 288ed30d9b6SIntel size = p0 - p; 289ed30d9b6SIntel if(size >= sizeof(s)) 290ed30d9b6SIntel return -1; 291ed30d9b6SIntel 2926f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 293ed30d9b6SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 294ed30d9b6SIntel return -1; 295ed30d9b6SIntel for (i = 0; i < _NUM_FLD; i++){ 296ed30d9b6SIntel errno = 0; 297ed30d9b6SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 298ed30d9b6SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 299ed30d9b6SIntel return -1; 300ed30d9b6SIntel } 301ed30d9b6SIntel /* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */ 302ed30d9b6SIntel if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) { 303ed30d9b6SIntel printf("Stats counter not in the correct range 0..%d\n", 304ed30d9b6SIntel RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 305ed30d9b6SIntel return -1; 306ed30d9b6SIntel } 307ed30d9b6SIntel 3084dccdc78SBruce Richardson if (!is_rx) { 3094dccdc78SBruce Richardson if ((nb_tx_queue_stats_mappings >= 3104dccdc78SBruce Richardson MAX_TX_QUEUE_STATS_MAPPINGS)) { 3114dccdc78SBruce Richardson printf("exceeded max number of TX queue " 3124dccdc78SBruce Richardson "statistics mappings: %hu\n", 3134dccdc78SBruce Richardson nb_tx_queue_stats_mappings); 314ed30d9b6SIntel return -1; 315ed30d9b6SIntel } 316ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id = 317ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 318ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id = 319ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 320ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id = 321ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 322ed30d9b6SIntel ++nb_tx_queue_stats_mappings; 323ed30d9b6SIntel } 324ed30d9b6SIntel else { 3254dccdc78SBruce Richardson if ((nb_rx_queue_stats_mappings >= 3264dccdc78SBruce Richardson MAX_RX_QUEUE_STATS_MAPPINGS)) { 3274dccdc78SBruce Richardson printf("exceeded max number of RX queue " 3284dccdc78SBruce Richardson "statistics mappings: %hu\n", 3294dccdc78SBruce Richardson nb_rx_queue_stats_mappings); 3304dccdc78SBruce Richardson return -1; 3314dccdc78SBruce Richardson } 332ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id = 333ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 334ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id = 335ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 336ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id = 337ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 338ed30d9b6SIntel ++nb_rx_queue_stats_mappings; 339ed30d9b6SIntel } 340ed30d9b6SIntel 341ed30d9b6SIntel } 342ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */ 343ed30d9b6SIntel /* than to the default array (that was set at its definition) */ 344ed30d9b6SIntel is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) : 345ed30d9b6SIntel (tx_queue_stats_mappings = tx_queue_stats_mappings_array); 346ed30d9b6SIntel return 0; 347ed30d9b6SIntel } 348ed30d9b6SIntel 349c9cafcc8SShahaf Shuler static void 350c9cafcc8SShahaf Shuler print_invalid_socket_id_error(void) 351c9cafcc8SShahaf Shuler { 352c9cafcc8SShahaf Shuler unsigned int i = 0; 353c9cafcc8SShahaf Shuler 354c9cafcc8SShahaf Shuler printf("Invalid socket id, options are: "); 355c9cafcc8SShahaf Shuler for (i = 0; i < num_sockets; i++) { 356c9cafcc8SShahaf Shuler printf("%u%s", socket_ids[i], 357c9cafcc8SShahaf Shuler (i == num_sockets - 1) ? "\n" : ","); 358c9cafcc8SShahaf Shuler } 359c9cafcc8SShahaf Shuler } 360c9cafcc8SShahaf Shuler 361b6ea6408SIntel static int 362b6ea6408SIntel parse_portnuma_config(const char *q_arg) 363b6ea6408SIntel { 364b6ea6408SIntel char s[256]; 365b6ea6408SIntel const char *p, *p0 = q_arg; 366b6ea6408SIntel char *end; 367d1f1a0fdSLi Han uint8_t i, socket_id; 368d1f1a0fdSLi Han portid_t port_id; 369b6ea6408SIntel unsigned size; 370b6ea6408SIntel enum fieldnames { 371b6ea6408SIntel FLD_PORT = 0, 372b6ea6408SIntel FLD_SOCKET, 373b6ea6408SIntel _NUM_FLD 374b6ea6408SIntel }; 375b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 376b6ea6408SIntel char *str_fld[_NUM_FLD]; 377edab33b1STetsuya Mukawa portid_t pid; 378b6ea6408SIntel 379b6ea6408SIntel /* reset from value set at definition */ 380b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 381b6ea6408SIntel ++p; 382b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 383b6ea6408SIntel return -1; 384b6ea6408SIntel 385b6ea6408SIntel size = p0 - p; 386b6ea6408SIntel if(size >= sizeof(s)) 387b6ea6408SIntel return -1; 388b6ea6408SIntel 3896f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 390b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 391b6ea6408SIntel return -1; 392b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 393b6ea6408SIntel errno = 0; 394b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 395b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 396b6ea6408SIntel return -1; 397b6ea6408SIntel } 398d1f1a0fdSLi Han port_id = (portid_t)int_fld[FLD_PORT]; 399d1f1a0fdSLi Han if (port_id_is_invalid(port_id, ENABLED_WARN) || 400d1f1a0fdSLi Han port_id == (portid_t)RTE_PORT_ALL) { 401edab33b1STetsuya Mukawa printf("Valid port range is [0"); 4027d89b261SGaetan Rivet RTE_ETH_FOREACH_DEV(pid) 403edab33b1STetsuya Mukawa printf(", %d", pid); 404edab33b1STetsuya Mukawa printf("]\n"); 405b6ea6408SIntel return -1; 406b6ea6408SIntel } 407b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 408c9cafcc8SShahaf Shuler if (new_socket_id(socket_id)) { 409c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 410b6ea6408SIntel return -1; 411b6ea6408SIntel } 412b6ea6408SIntel port_numa[port_id] = socket_id; 413b6ea6408SIntel } 414b6ea6408SIntel 415b6ea6408SIntel return 0; 416b6ea6408SIntel } 417b6ea6408SIntel 418b6ea6408SIntel static int 419b6ea6408SIntel parse_ringnuma_config(const char *q_arg) 420b6ea6408SIntel { 421b6ea6408SIntel char s[256]; 422b6ea6408SIntel const char *p, *p0 = q_arg; 423b6ea6408SIntel char *end; 424d1f1a0fdSLi Han uint8_t i, ring_flag, socket_id; 425d1f1a0fdSLi Han portid_t port_id; 426b6ea6408SIntel unsigned size; 427b6ea6408SIntel enum fieldnames { 428b6ea6408SIntel FLD_PORT = 0, 429b6ea6408SIntel FLD_FLAG, 430b6ea6408SIntel FLD_SOCKET, 431b6ea6408SIntel _NUM_FLD 432b6ea6408SIntel }; 433b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 434b6ea6408SIntel char *str_fld[_NUM_FLD]; 435edab33b1STetsuya Mukawa portid_t pid; 436b6ea6408SIntel #define RX_RING_ONLY 0x1 437b6ea6408SIntel #define TX_RING_ONLY 0x2 438b6ea6408SIntel #define RXTX_RING 0x3 439b6ea6408SIntel 440b6ea6408SIntel /* reset from value set at definition */ 441b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 442b6ea6408SIntel ++p; 443b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 444b6ea6408SIntel return -1; 445b6ea6408SIntel 446b6ea6408SIntel size = p0 - p; 447b6ea6408SIntel if(size >= sizeof(s)) 448b6ea6408SIntel return -1; 449b6ea6408SIntel 4506f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 451b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 452b6ea6408SIntel return -1; 453b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 454b6ea6408SIntel errno = 0; 455b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 456b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 457b6ea6408SIntel return -1; 458b6ea6408SIntel } 459d1f1a0fdSLi Han port_id = (portid_t)int_fld[FLD_PORT]; 460d1f1a0fdSLi Han if (port_id_is_invalid(port_id, ENABLED_WARN) || 461d1f1a0fdSLi Han port_id == (portid_t)RTE_PORT_ALL) { 462edab33b1STetsuya Mukawa printf("Valid port range is [0"); 4637d89b261SGaetan Rivet RTE_ETH_FOREACH_DEV(pid) 464edab33b1STetsuya Mukawa printf(", %d", pid); 465edab33b1STetsuya Mukawa printf("]\n"); 466b6ea6408SIntel return -1; 467b6ea6408SIntel } 468b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 469c9cafcc8SShahaf Shuler if (new_socket_id(socket_id)) { 470c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 471b6ea6408SIntel return -1; 472b6ea6408SIntel } 473b6ea6408SIntel ring_flag = (uint8_t)int_fld[FLD_FLAG]; 474b6ea6408SIntel if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) { 475b6ea6408SIntel printf("Invalid ring-flag=%d config for port =%d\n", 476b6ea6408SIntel ring_flag,port_id); 477b6ea6408SIntel return -1; 478b6ea6408SIntel } 479b6ea6408SIntel 480b6ea6408SIntel switch (ring_flag & RXTX_RING) { 481b6ea6408SIntel case RX_RING_ONLY: 482b6ea6408SIntel rxring_numa[port_id] = socket_id; 483b6ea6408SIntel break; 484b6ea6408SIntel case TX_RING_ONLY: 485b6ea6408SIntel txring_numa[port_id] = socket_id; 486b6ea6408SIntel break; 487b6ea6408SIntel case RXTX_RING: 488b6ea6408SIntel rxring_numa[port_id] = socket_id; 489b6ea6408SIntel txring_numa[port_id] = socket_id; 490b6ea6408SIntel break; 491b6ea6408SIntel default: 492b6ea6408SIntel printf("Invalid ring-flag=%d config for port=%d\n", 493b6ea6408SIntel ring_flag,port_id); 494b6ea6408SIntel break; 495b6ea6408SIntel } 496b6ea6408SIntel } 497b6ea6408SIntel 498b6ea6408SIntel return 0; 499b6ea6408SIntel } 500ed30d9b6SIntel 5013af72783SGaetan Rivet static int 5023af72783SGaetan Rivet parse_event_printing_config(const char *optarg, int enable) 5033af72783SGaetan Rivet { 5043af72783SGaetan Rivet uint32_t mask = 0; 5053af72783SGaetan Rivet 5063af72783SGaetan Rivet if (!strcmp(optarg, "unknown")) 5073af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_UNKNOWN; 5083af72783SGaetan Rivet else if (!strcmp(optarg, "intr_lsc")) 5093af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_LSC; 5103af72783SGaetan Rivet else if (!strcmp(optarg, "queue_state")) 5113af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_QUEUE_STATE; 5123af72783SGaetan Rivet else if (!strcmp(optarg, "intr_reset")) 5133af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RESET; 5143af72783SGaetan Rivet else if (!strcmp(optarg, "vf_mbox")) 5153af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_VF_MBOX; 516*badb87c1SAnoob Joseph else if (!strcmp(optarg, "ipsec")) 517*badb87c1SAnoob Joseph mask = UINT32_C(1) << RTE_ETH_EVENT_IPSEC; 5183af72783SGaetan Rivet else if (!strcmp(optarg, "macsec")) 5193af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_MACSEC; 5203af72783SGaetan Rivet else if (!strcmp(optarg, "intr_rmv")) 5213af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RMV; 5224fb82244SMatan Azrad else if (!strcmp(optarg, "dev_probed")) 5234fb82244SMatan Azrad mask = UINT32_C(1) << RTE_ETH_EVENT_NEW; 5244fb82244SMatan Azrad else if (!strcmp(optarg, "dev_released")) 5254fb82244SMatan Azrad mask = UINT32_C(1) << RTE_ETH_EVENT_DESTROY; 526b6b63dfdSGaetan Rivet else if (!strcmp(optarg, "all")) 527b6b63dfdSGaetan Rivet mask = ~UINT32_C(0); 5283af72783SGaetan Rivet else { 5293af72783SGaetan Rivet fprintf(stderr, "Invalid event: %s\n", optarg); 5303af72783SGaetan Rivet return -1; 5313af72783SGaetan Rivet } 5323af72783SGaetan Rivet if (enable) 5333af72783SGaetan Rivet event_print_mask |= mask; 5343af72783SGaetan Rivet else 5353af72783SGaetan Rivet event_print_mask &= ~mask; 5363af72783SGaetan Rivet return 0; 5373af72783SGaetan Rivet } 5383af72783SGaetan Rivet 539af75078fSIntel void 540af75078fSIntel launch_args_parse(int argc, char** argv) 541af75078fSIntel { 542af75078fSIntel int n, opt; 543af75078fSIntel char **argvopt; 544af75078fSIntel int opt_idx; 5453f7311baSWei Dai portid_t pid; 546013af9b6SIntel enum { TX, RX }; 547fd8c20aaSShahaf Shuler /* Default offloads for all ports. */ 5480074d02fSShahaf Shuler uint64_t rx_offloads = rx_mode.offloads; 549fd8c20aaSShahaf Shuler uint64_t tx_offloads = tx_mode.offloads; 5508599ed31SRemy Horton struct rte_eth_dev_info dev_info; 5518599ed31SRemy Horton uint16_t rec_nb_pkts; 552013af9b6SIntel 553af75078fSIntel static struct option lgopts[] = { 554af75078fSIntel { "help", 0, 0, 0 }, 5550d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 556af75078fSIntel { "interactive", 0, 0, 0 }, 55781ef862bSAllain Legacy { "cmdline-file", 1, 0, 0 }, 558ca7feb22SCyril Chemparathy { "auto-start", 0, 0, 0 }, 559af75078fSIntel { "eth-peers-configfile", 1, 0, 0 }, 560af75078fSIntel { "eth-peer", 1, 0, 0 }, 5610d56cb81SThomas Monjalon #endif 56299cabef0SPablo de Lara { "tx-first", 0, 0, 0 }, 563cfea1f30SPablo de Lara { "stats-period", 1, 0, 0 }, 564af75078fSIntel { "ports", 1, 0, 0 }, 565af75078fSIntel { "nb-cores", 1, 0, 0 }, 566af75078fSIntel { "nb-ports", 1, 0, 0 }, 567af75078fSIntel { "coremask", 1, 0, 0 }, 568af75078fSIntel { "portmask", 1, 0, 0 }, 569af75078fSIntel { "numa", 0, 0, 0 }, 570999b2ee0SBruce Richardson { "no-numa", 0, 0, 0 }, 571148f963fSBruce Richardson { "mp-anon", 0, 0, 0 }, 572b6ea6408SIntel { "port-numa-config", 1, 0, 0 }, 573b6ea6408SIntel { "ring-numa-config", 1, 0, 0 }, 574b6ea6408SIntel { "socket-num", 1, 0, 0 }, 575af75078fSIntel { "mbuf-size", 1, 0, 0 }, 576c8798818SIntel { "total-num-mbufs", 1, 0, 0 }, 577af75078fSIntel { "max-pkt-len", 1, 0, 0 }, 578af75078fSIntel { "pkt-filter-mode", 1, 0, 0 }, 579af75078fSIntel { "pkt-filter-report-hash", 1, 0, 0 }, 580af75078fSIntel { "pkt-filter-size", 1, 0, 0 }, 581af75078fSIntel { "pkt-filter-drop-queue", 1, 0, 0 }, 58262d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 58362d3216dSReshma Pattan { "latencystats", 1, 0, 0 }, 58462d3216dSReshma Pattan #endif 585e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE 586e25e6c70SRemy Horton { "bitrate-stats", 1, 0, 0 }, 587e25e6c70SRemy Horton #endif 58879dd163fSJeff Guo { "disable-crc-strip", 0, 0, 0 }, 5894c3ea508SOlivier Matz { "enable-lro", 0, 0, 0 }, 590013af9b6SIntel { "enable-rx-cksum", 0, 0, 0 }, 591912267a3SRaslan Darawsheh { "enable-rx-timestamp", 0, 0, 0 }, 59204997938SMaciej Czekaj { "enable-scatter", 0, 0, 0 }, 5938b9bd0efSMoti Haimovsky { "enable-hw-vlan", 0, 0, 0 }, 5948b9bd0efSMoti Haimovsky { "enable-hw-vlan-filter", 0, 0, 0 }, 5958b9bd0efSMoti Haimovsky { "enable-hw-vlan-strip", 0, 0, 0 }, 5968b9bd0efSMoti Haimovsky { "enable-hw-vlan-extend", 0, 0, 0 }, 597013af9b6SIntel { "enable-drop-en", 0, 0, 0 }, 598af75078fSIntel { "disable-rss", 0, 0, 0 }, 599af75078fSIntel { "port-topology", 1, 0, 0 }, 600ce9b9fb0SCyril Chemparathy { "forward-mode", 1, 0, 0 }, 601af75078fSIntel { "rss-ip", 0, 0, 0 }, 602af75078fSIntel { "rss-udp", 0, 0, 0 }, 603af75078fSIntel { "rxq", 1, 0, 0 }, 604af75078fSIntel { "txq", 1, 0, 0 }, 605af75078fSIntel { "rxd", 1, 0, 0 }, 606af75078fSIntel { "txd", 1, 0, 0 }, 607af75078fSIntel { "burst", 1, 0, 0 }, 608af75078fSIntel { "mbcache", 1, 0, 0 }, 609af75078fSIntel { "txpt", 1, 0, 0 }, 610af75078fSIntel { "txht", 1, 0, 0 }, 611af75078fSIntel { "txwt", 1, 0, 0 }, 612af75078fSIntel { "txfreet", 1, 0, 0 }, 613af75078fSIntel { "txrst", 1, 0, 0 }, 614af75078fSIntel { "rxpt", 1, 0, 0 }, 615af75078fSIntel { "rxht", 1, 0, 0 }, 616af75078fSIntel { "rxwt", 1, 0, 0 }, 617af75078fSIntel { "rxfreet", 1, 0, 0 }, 618ed30d9b6SIntel { "tx-queue-stats-mapping", 1, 0, 0 }, 619ed30d9b6SIntel { "rx-queue-stats-mapping", 1, 0, 0 }, 6207741e4cfSIntel { "no-flush-rx", 0, 0, 0 }, 6217ee3e944SVasily Philipov { "flow-isolate-all", 0, 0, 0 }, 622a7e7bb4eSCyril Chemparathy { "txpkts", 1, 0, 0 }, 623bc202406SDavid Marchand { "disable-link-check", 0, 0, 0 }, 6248ea656f8SGaetan Rivet { "no-lsc-interrupt", 0, 0, 0 }, 625284c908cSGaetan Rivet { "no-rmv-interrupt", 0, 0, 0 }, 6263af72783SGaetan Rivet { "print-event", 1, 0, 0 }, 6273af72783SGaetan Rivet { "mask-event", 1, 0, 0 }, 628fd8c20aaSShahaf Shuler { "tx-offloads", 1, 0, 0 }, 629fb73e096SJeff Guo { "hot-plug", 0, 0, 0 }, 630af75078fSIntel { 0, 0, 0, 0 }, 631af75078fSIntel }; 632af75078fSIntel 633af75078fSIntel argvopt = argv; 634af75078fSIntel 6350d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 636ca7feb22SCyril Chemparathy #define SHORTOPTS "i" 6370d56cb81SThomas Monjalon #else 638ca7feb22SCyril Chemparathy #define SHORTOPTS "" 6390d56cb81SThomas Monjalon #endif 640ca7feb22SCyril Chemparathy while ((opt = getopt_long(argc, argvopt, SHORTOPTS "ah", 641af75078fSIntel lgopts, &opt_idx)) != EOF) { 642af75078fSIntel switch (opt) { 6430d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 644af75078fSIntel case 'i': 645af75078fSIntel printf("Interactive-mode selected\n"); 646af75078fSIntel interactive = 1; 647af75078fSIntel break; 6480d56cb81SThomas Monjalon #endif 649ca7feb22SCyril Chemparathy case 'a': 650ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 651ca7feb22SCyril Chemparathy auto_start = 1; 652ca7feb22SCyril Chemparathy break; 653ca7feb22SCyril Chemparathy 654af75078fSIntel case 0: /*long options */ 655af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "help")) { 656af75078fSIntel usage(argv[0]); 657af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 658af75078fSIntel } 6590d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 660af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "interactive")) { 661af75078fSIntel printf("Interactive-mode selected\n"); 662af75078fSIntel interactive = 1; 663af75078fSIntel } 66481ef862bSAllain Legacy if (!strcmp(lgopts[opt_idx].name, "cmdline-file")) { 66581ef862bSAllain Legacy printf("CLI commands to be read from %s\n", 66681ef862bSAllain Legacy optarg); 667c022cb40SBruce Richardson strlcpy(cmdline_filename, optarg, 668c022cb40SBruce Richardson sizeof(cmdline_filename)); 66981ef862bSAllain Legacy } 670ca7feb22SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "auto-start")) { 671ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 672ca7feb22SCyril Chemparathy auto_start = 1; 673ca7feb22SCyril Chemparathy } 67499cabef0SPablo de Lara if (!strcmp(lgopts[opt_idx].name, "tx-first")) { 67599cabef0SPablo de Lara printf("Ports to start sending a burst of " 67699cabef0SPablo de Lara "packets first\n"); 67799cabef0SPablo de Lara tx_first = 1; 67899cabef0SPablo de Lara } 679cfea1f30SPablo de Lara if (!strcmp(lgopts[opt_idx].name, "stats-period")) { 680cfea1f30SPablo de Lara char *end = NULL; 681cfea1f30SPablo de Lara unsigned int n; 682cfea1f30SPablo de Lara 683cfea1f30SPablo de Lara n = strtoul(optarg, &end, 10); 684cfea1f30SPablo de Lara if ((optarg[0] == '\0') || (end == NULL) || 685cfea1f30SPablo de Lara (*end != '\0')) 686cfea1f30SPablo de Lara break; 687cfea1f30SPablo de Lara 688cfea1f30SPablo de Lara stats_period = n; 689cfea1f30SPablo de Lara break; 690cfea1f30SPablo de Lara } 691af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 692af75078fSIntel "eth-peers-configfile")) { 693af75078fSIntel if (init_peer_eth_addrs(optarg) != 0) 694af75078fSIntel rte_exit(EXIT_FAILURE, 695af75078fSIntel "Cannot open logfile\n"); 696af75078fSIntel } 697af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "eth-peer")) { 698af75078fSIntel char *port_end; 699af75078fSIntel uint8_t c, peer_addr[6]; 700af75078fSIntel 701af75078fSIntel errno = 0; 702af75078fSIntel n = strtoul(optarg, &port_end, 10); 703af75078fSIntel if (errno != 0 || port_end == optarg || *port_end++ != ',') 704af75078fSIntel rte_exit(EXIT_FAILURE, 705af75078fSIntel "Invalid eth-peer: %s", optarg); 706af75078fSIntel if (n >= RTE_MAX_ETHPORTS) 707af75078fSIntel rte_exit(EXIT_FAILURE, 708af75078fSIntel "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n", 709af75078fSIntel n, RTE_MAX_ETHPORTS); 710af75078fSIntel 711aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, port_end, 712aaa662e7SAlan Carew &peer_addr, sizeof(peer_addr)) < 0) 713af75078fSIntel rte_exit(EXIT_FAILURE, 714af75078fSIntel "Invalid ethernet address: %s\n", 715af75078fSIntel port_end); 716af75078fSIntel for (c = 0; c < 6; c++) 717af75078fSIntel peer_eth_addrs[n].addr_bytes[c] = 718af75078fSIntel peer_addr[c]; 719af75078fSIntel nb_peer_eth_addrs++; 720af75078fSIntel } 7210d56cb81SThomas Monjalon #endif 722af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-ports")) { 723af75078fSIntel n = atoi(optarg); 7240a530f0dSYong Liu if (n > 0 && n <= nb_ports) 725f8244c63SZhiyong Yang nb_fwd_ports = n; 726af75078fSIntel else 727af75078fSIntel rte_exit(EXIT_FAILURE, 728edab33b1STetsuya Mukawa "Invalid port %d\n", n); 729af75078fSIntel } 730af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-cores")) { 731af75078fSIntel n = atoi(optarg); 732af75078fSIntel if (n > 0 && n <= nb_lcores) 733af75078fSIntel nb_fwd_lcores = (uint8_t) n; 734af75078fSIntel else 735af75078fSIntel rte_exit(EXIT_FAILURE, 736af75078fSIntel "nb-cores should be > 0 and <= %d\n", 737af75078fSIntel nb_lcores); 738af75078fSIntel } 739af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "coremask")) 740af75078fSIntel parse_fwd_coremask(optarg); 741af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "portmask")) 742af75078fSIntel parse_fwd_portmask(optarg); 743999b2ee0SBruce Richardson if (!strcmp(lgopts[opt_idx].name, "no-numa")) 744999b2ee0SBruce Richardson numa_support = 0; 745487f9a59SYulong Pei if (!strcmp(lgopts[opt_idx].name, "numa")) 746af75078fSIntel numa_support = 1; 747148f963fSBruce Richardson if (!strcmp(lgopts[opt_idx].name, "mp-anon")) { 748148f963fSBruce Richardson mp_anon = 1; 749148f963fSBruce Richardson } 750b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) { 751b6ea6408SIntel if (parse_portnuma_config(optarg)) 752b6ea6408SIntel rte_exit(EXIT_FAILURE, 753b6ea6408SIntel "invalid port-numa configuration\n"); 754b6ea6408SIntel } 755b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "ring-numa-config")) 756b6ea6408SIntel if (parse_ringnuma_config(optarg)) 757b6ea6408SIntel rte_exit(EXIT_FAILURE, 758b6ea6408SIntel "invalid ring-numa configuration\n"); 759b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "socket-num")) { 760b6ea6408SIntel n = atoi(optarg); 761c9cafcc8SShahaf Shuler if (!new_socket_id((uint8_t)n)) { 762b6ea6408SIntel socket_num = (uint8_t)n; 763c9cafcc8SShahaf Shuler } else { 764c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 765b6ea6408SIntel rte_exit(EXIT_FAILURE, 766c9cafcc8SShahaf Shuler "Invalid socket id"); 767c9cafcc8SShahaf Shuler } 768b6ea6408SIntel } 769af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) { 770af75078fSIntel n = atoi(optarg); 771af75078fSIntel if (n > 0 && n <= 0xFFFF) 772af75078fSIntel mbuf_data_size = (uint16_t) n; 773af75078fSIntel else 774af75078fSIntel rte_exit(EXIT_FAILURE, 775af75078fSIntel "mbuf-size should be > 0 and < 65536\n"); 776af75078fSIntel } 777c8798818SIntel if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) { 778c8798818SIntel n = atoi(optarg); 779c8798818SIntel if (n > 1024) 780c8798818SIntel param_total_num_mbufs = (unsigned)n; 781c8798818SIntel else 782c8798818SIntel rte_exit(EXIT_FAILURE, 783c8798818SIntel "total-num-mbufs should be > 1024\n"); 784c8798818SIntel } 785af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) { 786af75078fSIntel n = atoi(optarg); 787af75078fSIntel if (n >= ETHER_MIN_LEN) { 788af75078fSIntel rx_mode.max_rx_pkt_len = (uint32_t) n; 789af75078fSIntel if (n > ETHER_MAX_LEN) 7900074d02fSShahaf Shuler rx_offloads |= 7910074d02fSShahaf Shuler DEV_RX_OFFLOAD_JUMBO_FRAME; 792af75078fSIntel } else 793af75078fSIntel rte_exit(EXIT_FAILURE, 794af75078fSIntel "Invalid max-pkt-len=%d - should be > %d\n", 795af75078fSIntel n, ETHER_MIN_LEN); 796af75078fSIntel } 797af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) { 798af75078fSIntel if (!strcmp(optarg, "signature")) 799af75078fSIntel fdir_conf.mode = 800af75078fSIntel RTE_FDIR_MODE_SIGNATURE; 801af75078fSIntel else if (!strcmp(optarg, "perfect")) 802af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_PERFECT; 8039276b982SWenzhuo Lu else if (!strcmp(optarg, "perfect-mac-vlan")) 8049276b982SWenzhuo Lu fdir_conf.mode = RTE_FDIR_MODE_PERFECT_MAC_VLAN; 8059276b982SWenzhuo Lu else if (!strcmp(optarg, "perfect-tunnel")) 8069276b982SWenzhuo Lu fdir_conf.mode = RTE_FDIR_MODE_PERFECT_TUNNEL; 807af75078fSIntel else if (!strcmp(optarg, "none")) 808af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_NONE; 809af75078fSIntel else 810af75078fSIntel rte_exit(EXIT_FAILURE, 811af75078fSIntel "pkt-mode-invalid %s invalid - must be: " 8129276b982SWenzhuo Lu "none, signature, perfect, perfect-mac-vlan" 8139276b982SWenzhuo Lu " or perfect-tunnel\n", 814af75078fSIntel optarg); 815af75078fSIntel } 816af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 817af75078fSIntel "pkt-filter-report-hash")) { 818af75078fSIntel if (!strcmp(optarg, "none")) 819af75078fSIntel fdir_conf.status = 820af75078fSIntel RTE_FDIR_NO_REPORT_STATUS; 821af75078fSIntel else if (!strcmp(optarg, "match")) 822af75078fSIntel fdir_conf.status = 823af75078fSIntel RTE_FDIR_REPORT_STATUS; 824af75078fSIntel else if (!strcmp(optarg, "always")) 825af75078fSIntel fdir_conf.status = 826af75078fSIntel RTE_FDIR_REPORT_STATUS_ALWAYS; 827af75078fSIntel else 828af75078fSIntel rte_exit(EXIT_FAILURE, 829af75078fSIntel "pkt-filter-report-hash %s invalid " 830af75078fSIntel "- must be: none or match or always\n", 831af75078fSIntel optarg); 832af75078fSIntel } 833af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) { 834af75078fSIntel if (!strcmp(optarg, "64K")) 835af75078fSIntel fdir_conf.pballoc = 836af75078fSIntel RTE_FDIR_PBALLOC_64K; 837af75078fSIntel else if (!strcmp(optarg, "128K")) 838af75078fSIntel fdir_conf.pballoc = 839af75078fSIntel RTE_FDIR_PBALLOC_128K; 840af75078fSIntel else if (!strcmp(optarg, "256K")) 841af75078fSIntel fdir_conf.pballoc = 842af75078fSIntel RTE_FDIR_PBALLOC_256K; 843af75078fSIntel else 844af75078fSIntel rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -" 845af75078fSIntel " must be: 64K or 128K or 256K\n", 846af75078fSIntel optarg); 847af75078fSIntel } 848af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 849af75078fSIntel "pkt-filter-drop-queue")) { 850af75078fSIntel n = atoi(optarg); 851af75078fSIntel if (n >= 0) 852af75078fSIntel fdir_conf.drop_queue = (uint8_t) n; 853af75078fSIntel else 854af75078fSIntel rte_exit(EXIT_FAILURE, 855af75078fSIntel "drop queue %d invalid - must" 856af75078fSIntel "be >= 0 \n", n); 857af75078fSIntel } 85862d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 85962d3216dSReshma Pattan if (!strcmp(lgopts[opt_idx].name, 86062d3216dSReshma Pattan "latencystats")) { 86162d3216dSReshma Pattan n = atoi(optarg); 86262d3216dSReshma Pattan if (n >= 0) { 86362d3216dSReshma Pattan latencystats_lcore_id = (lcoreid_t) n; 86462d3216dSReshma Pattan latencystats_enabled = 1; 86562d3216dSReshma Pattan } else 86662d3216dSReshma Pattan rte_exit(EXIT_FAILURE, 86762d3216dSReshma Pattan "invalid lcore id %d for latencystats" 86862d3216dSReshma Pattan " must be >= 0\n", n); 86962d3216dSReshma Pattan } 87062d3216dSReshma Pattan #endif 871e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE 872e25e6c70SRemy Horton if (!strcmp(lgopts[opt_idx].name, "bitrate-stats")) { 873e25e6c70SRemy Horton n = atoi(optarg); 874e25e6c70SRemy Horton if (n >= 0) { 875e25e6c70SRemy Horton bitrate_lcore_id = (lcoreid_t) n; 876e25e6c70SRemy Horton bitrate_enabled = 1; 877e25e6c70SRemy Horton } else 878e25e6c70SRemy Horton rte_exit(EXIT_FAILURE, 879e25e6c70SRemy Horton "invalid lcore id %d for bitrate stats" 880e25e6c70SRemy Horton " must be >= 0\n", n); 881e25e6c70SRemy Horton } 882e25e6c70SRemy Horton #endif 88379dd163fSJeff Guo if (!strcmp(lgopts[opt_idx].name, "disable-crc-strip")) 8840074d02fSShahaf Shuler rx_offloads &= ~DEV_RX_OFFLOAD_CRC_STRIP; 8854c3ea508SOlivier Matz if (!strcmp(lgopts[opt_idx].name, "enable-lro")) 8860074d02fSShahaf Shuler rx_offloads |= DEV_RX_OFFLOAD_TCP_LRO; 88704997938SMaciej Czekaj if (!strcmp(lgopts[opt_idx].name, "enable-scatter")) 8880074d02fSShahaf Shuler rx_offloads |= DEV_RX_OFFLOAD_SCATTER; 889af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum")) 8900074d02fSShahaf Shuler rx_offloads |= DEV_RX_OFFLOAD_CHECKSUM; 891912267a3SRaslan Darawsheh if (!strcmp(lgopts[opt_idx].name, 892912267a3SRaslan Darawsheh "enable-rx-timestamp")) 8930074d02fSShahaf Shuler rx_offloads |= DEV_RX_OFFLOAD_TIMESTAMP; 8948b9bd0efSMoti Haimovsky if (!strcmp(lgopts[opt_idx].name, "enable-hw-vlan")) 8958b9bd0efSMoti Haimovsky rx_offloads |= DEV_RX_OFFLOAD_VLAN; 896a47aa8b9SIntel 897c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 8988b9bd0efSMoti Haimovsky "enable-hw-vlan-filter")) 8998b9bd0efSMoti Haimovsky rx_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER; 900c9dd4aadSOuyang Changchun 901c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 9028b9bd0efSMoti Haimovsky "enable-hw-vlan-strip")) 9038b9bd0efSMoti Haimovsky rx_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP; 904c9dd4aadSOuyang Changchun 905c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 9068b9bd0efSMoti Haimovsky "enable-hw-vlan-extend")) 9078b9bd0efSMoti Haimovsky rx_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND; 908c9dd4aadSOuyang Changchun 909ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "enable-drop-en")) 910ce8d5614SIntel rx_drop_en = 1; 911ce8d5614SIntel 912af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "disable-rss")) 913af75078fSIntel rss_hf = 0; 914af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "port-topology")) { 915af75078fSIntel if (!strcmp(optarg, "paired")) 916af75078fSIntel port_topology = PORT_TOPOLOGY_PAIRED; 917af75078fSIntel else if (!strcmp(optarg, "chained")) 918af75078fSIntel port_topology = PORT_TOPOLOGY_CHAINED; 9193e2006d6SCyril Chemparathy else if (!strcmp(optarg, "loop")) 9203e2006d6SCyril Chemparathy port_topology = PORT_TOPOLOGY_LOOP; 921af75078fSIntel else 922af75078fSIntel rte_exit(EXIT_FAILURE, "port-topology %s invalid -" 92375358833SPablo de Lara " must be: paired, chained or loop\n", 924af75078fSIntel optarg); 925af75078fSIntel } 926ce9b9fb0SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "forward-mode")) 927ce9b9fb0SCyril Chemparathy set_pkt_forwarding_mode(optarg); 928af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-ip")) 9298a387fa8SHelin Zhang rss_hf = ETH_RSS_IP; 930af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-udp")) 9318a387fa8SHelin Zhang rss_hf = ETH_RSS_UDP; 932af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxq")) { 933af75078fSIntel n = atoi(optarg); 9343f7311baSWei Dai if (n >= 0 && check_nb_rxq((queueid_t)n) == 0) 935af75078fSIntel nb_rxq = (queueid_t) n; 936af75078fSIntel else 937af75078fSIntel rte_exit(EXIT_FAILURE, "rxq %d invalid - must be" 9383f7311baSWei Dai " >= 0 && <= %u\n", n, 9393f7311baSWei Dai get_allowed_max_nb_rxq(&pid)); 940af75078fSIntel } 941af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txq")) { 942af75078fSIntel n = atoi(optarg); 94336db4f6cSWei Dai if (n >= 0 && check_nb_txq((queueid_t)n) == 0) 944af75078fSIntel nb_txq = (queueid_t) n; 945af75078fSIntel else 946af75078fSIntel rte_exit(EXIT_FAILURE, "txq %d invalid - must be" 94736db4f6cSWei Dai " >= 0 && <= %u\n", n, 94836db4f6cSWei Dai get_allowed_max_nb_txq(&pid)); 949af75078fSIntel } 9505a8fb55cSReshma Pattan if (!nb_rxq && !nb_txq) { 9515a8fb55cSReshma Pattan rte_exit(EXIT_FAILURE, "Either rx or tx queues should " 9525a8fb55cSReshma Pattan "be non-zero\n"); 9535a8fb55cSReshma Pattan } 954af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "burst")) { 955af75078fSIntel n = atoi(optarg); 9568599ed31SRemy Horton if (n == 0) { 9578599ed31SRemy Horton /* A burst size of zero means that the 9588599ed31SRemy Horton * PMD should be queried for 9598599ed31SRemy Horton * recommended Rx burst size. Since 9608599ed31SRemy Horton * testpmd uses a single size for all 9618599ed31SRemy Horton * ports, port 0 is queried for the 9628599ed31SRemy Horton * value, on the assumption that all 9638599ed31SRemy Horton * ports are of the same NIC model. 9648599ed31SRemy Horton */ 9658599ed31SRemy Horton rte_eth_dev_info_get(0, &dev_info); 9668599ed31SRemy Horton rec_nb_pkts = dev_info 9678599ed31SRemy Horton .default_rxportconf.burst_size; 9688599ed31SRemy Horton 9698599ed31SRemy Horton if (rec_nb_pkts == 0) 970af75078fSIntel rte_exit(EXIT_FAILURE, 9718599ed31SRemy Horton "PMD does not recommend a burst size. " 9728599ed31SRemy Horton "Provided value must be between " 9738599ed31SRemy Horton "1 and %d\n", MAX_PKT_BURST); 9748599ed31SRemy Horton else if (rec_nb_pkts > MAX_PKT_BURST) 9758599ed31SRemy Horton rte_exit(EXIT_FAILURE, 9768599ed31SRemy Horton "PMD recommended burst size of %d" 9778599ed31SRemy Horton " exceeds maximum value of %d\n", 9788599ed31SRemy Horton rec_nb_pkts, MAX_PKT_BURST); 9798599ed31SRemy Horton printf("Using PMD-provided burst value of %d\n", 9808599ed31SRemy Horton rec_nb_pkts); 9818599ed31SRemy Horton nb_pkt_per_burst = rec_nb_pkts; 9828599ed31SRemy Horton } else if (n > MAX_PKT_BURST) 9838599ed31SRemy Horton rte_exit(EXIT_FAILURE, 9848599ed31SRemy Horton "burst must be between1 and %d\n", 985af75078fSIntel MAX_PKT_BURST); 9868599ed31SRemy Horton else 9878599ed31SRemy Horton nb_pkt_per_burst = (uint16_t) n; 988af75078fSIntel } 989af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbcache")) { 990af75078fSIntel n = atoi(optarg); 991af75078fSIntel if ((n >= 0) && 992af75078fSIntel (n <= RTE_MEMPOOL_CACHE_MAX_SIZE)) 993af75078fSIntel mb_mempool_cache = (uint16_t) n; 994af75078fSIntel else 995af75078fSIntel rte_exit(EXIT_FAILURE, 996af75078fSIntel "mbcache must be >= 0 and <= %d\n", 997af75078fSIntel RTE_MEMPOOL_CACHE_MAX_SIZE); 998af75078fSIntel } 999af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txfreet")) { 1000af75078fSIntel n = atoi(optarg); 1001af75078fSIntel if (n >= 0) 1002f2c5125aSPablo de Lara tx_free_thresh = (int16_t)n; 1003af75078fSIntel else 1004af75078fSIntel rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n"); 1005af75078fSIntel } 1006af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txrst")) { 1007af75078fSIntel n = atoi(optarg); 1008af75078fSIntel if (n >= 0) 1009f2c5125aSPablo de Lara tx_rs_thresh = (int16_t)n; 1010af75078fSIntel else 1011af75078fSIntel rte_exit(EXIT_FAILURE, "txrst must be >= 0\n"); 1012af75078fSIntel } 1013af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 1014af75078fSIntel n = atoi(optarg); 1015af75078fSIntel if (n > 0) { 1016af75078fSIntel if (rx_free_thresh >= n) 1017af75078fSIntel rte_exit(EXIT_FAILURE, 1018af75078fSIntel "rxd must be > " 1019af75078fSIntel "rx_free_thresh(%d)\n", 1020af75078fSIntel (int)rx_free_thresh); 1021af75078fSIntel else 1022af75078fSIntel nb_rxd = (uint16_t) n; 1023af75078fSIntel } else 1024af75078fSIntel rte_exit(EXIT_FAILURE, 1025af75078fSIntel "rxd(%d) invalid - must be > 0\n", 1026af75078fSIntel n); 1027af75078fSIntel } 1028af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 1029af75078fSIntel n = atoi(optarg); 1030af75078fSIntel if (n > 0) 1031af75078fSIntel nb_txd = (uint16_t) n; 1032af75078fSIntel else 1033af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 1034af75078fSIntel } 1035af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 1036af75078fSIntel n = atoi(optarg); 1037af75078fSIntel if (n >= 0) 1038f2c5125aSPablo de Lara tx_pthresh = (int8_t)n; 1039af75078fSIntel else 1040af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 1041af75078fSIntel } 1042af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 1043af75078fSIntel n = atoi(optarg); 1044af75078fSIntel if (n >= 0) 1045f2c5125aSPablo de Lara tx_hthresh = (int8_t)n; 1046af75078fSIntel else 1047af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 1048af75078fSIntel } 1049af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 1050af75078fSIntel n = atoi(optarg); 1051af75078fSIntel if (n >= 0) 1052f2c5125aSPablo de Lara tx_wthresh = (int8_t)n; 1053af75078fSIntel else 1054af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 1055af75078fSIntel } 1056af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 1057af75078fSIntel n = atoi(optarg); 1058af75078fSIntel if (n >= 0) 1059f2c5125aSPablo de Lara rx_pthresh = (int8_t)n; 1060af75078fSIntel else 1061af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 1062af75078fSIntel } 1063af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 1064af75078fSIntel n = atoi(optarg); 1065af75078fSIntel if (n >= 0) 1066f2c5125aSPablo de Lara rx_hthresh = (int8_t)n; 1067af75078fSIntel else 1068af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 1069af75078fSIntel } 1070af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 1071af75078fSIntel n = atoi(optarg); 1072af75078fSIntel if (n >= 0) 1073f2c5125aSPablo de Lara rx_wthresh = (int8_t)n; 1074af75078fSIntel else 1075af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 1076af75078fSIntel } 1077af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxfreet")) { 1078af75078fSIntel n = atoi(optarg); 1079af75078fSIntel if (n >= 0) 1080f2c5125aSPablo de Lara rx_free_thresh = (int16_t)n; 1081af75078fSIntel else 1082af75078fSIntel rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n"); 1083af75078fSIntel } 1084ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) { 1085ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, TX)) { 1086ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1087ed30d9b6SIntel "invalid TX queue statistics mapping config entered\n"); 1088ed30d9b6SIntel } 1089ed30d9b6SIntel } 1090ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) { 1091ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, RX)) { 1092ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1093ed30d9b6SIntel "invalid RX queue statistics mapping config entered\n"); 1094ed30d9b6SIntel } 1095ed30d9b6SIntel } 1096a7e7bb4eSCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "txpkts")) { 1097a7e7bb4eSCyril Chemparathy unsigned seg_lengths[RTE_MAX_SEGS_PER_PKT]; 1098a7e7bb4eSCyril Chemparathy unsigned int nb_segs; 1099a7e7bb4eSCyril Chemparathy 1100950d1516SBruce Richardson nb_segs = parse_item_list(optarg, "txpkt segments", 1101950d1516SBruce Richardson RTE_MAX_SEGS_PER_PKT, seg_lengths, 0); 1102a7e7bb4eSCyril Chemparathy if (nb_segs > 0) 1103a7e7bb4eSCyril Chemparathy set_tx_pkt_segments(seg_lengths, nb_segs); 1104a7e7bb4eSCyril Chemparathy else 1105a7e7bb4eSCyril Chemparathy rte_exit(EXIT_FAILURE, "bad txpkts\n"); 1106a7e7bb4eSCyril Chemparathy } 11077741e4cfSIntel if (!strcmp(lgopts[opt_idx].name, "no-flush-rx")) 11087741e4cfSIntel no_flush_rx = 1; 1109bc202406SDavid Marchand if (!strcmp(lgopts[opt_idx].name, "disable-link-check")) 1110bc202406SDavid Marchand no_link_check = 1; 11118ea656f8SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "no-lsc-interrupt")) 11128ea656f8SGaetan Rivet lsc_interrupt = 0; 1113284c908cSGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "no-rmv-interrupt")) 1114284c908cSGaetan Rivet rmv_interrupt = 0; 11157ee3e944SVasily Philipov if (!strcmp(lgopts[opt_idx].name, "flow-isolate-all")) 11167ee3e944SVasily Philipov flow_isolate_all = 1; 1117fd8c20aaSShahaf Shuler if (!strcmp(lgopts[opt_idx].name, "tx-offloads")) { 1118fd8c20aaSShahaf Shuler char *end = NULL; 1119fd8c20aaSShahaf Shuler n = strtoull(optarg, &end, 16); 1120fd8c20aaSShahaf Shuler if (n >= 0) 1121fd8c20aaSShahaf Shuler tx_offloads = (uint64_t)n; 1122fd8c20aaSShahaf Shuler else 1123fd8c20aaSShahaf Shuler rte_exit(EXIT_FAILURE, 1124fd8c20aaSShahaf Shuler "tx-offloads must be >= 0\n"); 1125fd8c20aaSShahaf Shuler } 11263af72783SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "print-event")) 11273af72783SGaetan Rivet if (parse_event_printing_config(optarg, 1)) { 11283af72783SGaetan Rivet rte_exit(EXIT_FAILURE, 11293af72783SGaetan Rivet "invalid print-event argument\n"); 11303af72783SGaetan Rivet } 11313af72783SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "mask-event")) 11323af72783SGaetan Rivet if (parse_event_printing_config(optarg, 0)) { 11333af72783SGaetan Rivet rte_exit(EXIT_FAILURE, 11343af72783SGaetan Rivet "invalid mask-event argument\n"); 11353af72783SGaetan Rivet } 1136fb73e096SJeff Guo if (!strcmp(lgopts[opt_idx].name, "hot-plug")) 1137fb73e096SJeff Guo hot_plug = 1; 1138af75078fSIntel break; 1139af75078fSIntel case 'h': 1140af75078fSIntel usage(argv[0]); 1141af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 1142af75078fSIntel break; 1143af75078fSIntel default: 1144af75078fSIntel usage(argv[0]); 1145af75078fSIntel rte_exit(EXIT_FAILURE, 1146af75078fSIntel "Command line is incomplete or incorrect\n"); 1147af75078fSIntel break; 1148af75078fSIntel } 1149af75078fSIntel } 11500074d02fSShahaf Shuler 11510074d02fSShahaf Shuler /* Set offload configuration from command line parameters. */ 11520074d02fSShahaf Shuler rx_mode.offloads = rx_offloads; 1153fd8c20aaSShahaf Shuler tx_mode.offloads = tx_offloads; 1154af75078fSIntel } 1155