1af75078fSIntel /*- 2af75078fSIntel * BSD LICENSE 3af75078fSIntel * 4e9d48c00SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5af75078fSIntel * All rights reserved. 6af75078fSIntel * 7af75078fSIntel * Redistribution and use in source and binary forms, with or without 8af75078fSIntel * modification, are permitted provided that the following conditions 9af75078fSIntel * are met: 10af75078fSIntel * 11af75078fSIntel * * Redistributions of source code must retain the above copyright 12af75078fSIntel * notice, this list of conditions and the following disclaimer. 13af75078fSIntel * * Redistributions in binary form must reproduce the above copyright 14af75078fSIntel * notice, this list of conditions and the following disclaimer in 15af75078fSIntel * the documentation and/or other materials provided with the 16af75078fSIntel * distribution. 17af75078fSIntel * * Neither the name of Intel Corporation nor the names of its 18af75078fSIntel * contributors may be used to endorse or promote products derived 19af75078fSIntel * from this software without specific prior written permission. 20af75078fSIntel * 21af75078fSIntel * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22af75078fSIntel * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23af75078fSIntel * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24af75078fSIntel * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25af75078fSIntel * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26af75078fSIntel * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27af75078fSIntel * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28af75078fSIntel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29af75078fSIntel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30af75078fSIntel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31af75078fSIntel * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32af75078fSIntel */ 33af75078fSIntel 34af75078fSIntel #include <errno.h> 35af75078fSIntel #include <getopt.h> 36af75078fSIntel #include <stdarg.h> 37af75078fSIntel #include <stdio.h> 38af75078fSIntel #include <stdlib.h> 39af75078fSIntel #include <signal.h> 40af75078fSIntel #include <string.h> 41af75078fSIntel #include <time.h> 42af75078fSIntel #include <fcntl.h> 43af75078fSIntel #include <sys/types.h> 44af75078fSIntel #include <errno.h> 45af75078fSIntel 46af75078fSIntel #include <sys/queue.h> 47af75078fSIntel #include <sys/stat.h> 48af75078fSIntel 49af75078fSIntel #include <stdint.h> 50af75078fSIntel #include <unistd.h> 51af75078fSIntel #include <inttypes.h> 52af75078fSIntel 53af75078fSIntel #include <rte_common.h> 54af75078fSIntel #include <rte_byteorder.h> 55af75078fSIntel #include <rte_log.h> 56af75078fSIntel #include <rte_debug.h> 57af75078fSIntel #include <rte_cycles.h> 58af75078fSIntel #include <rte_memory.h> 59af75078fSIntel #include <rte_memzone.h> 60af75078fSIntel #include <rte_launch.h> 61af75078fSIntel #include <rte_tailq.h> 62af75078fSIntel #include <rte_eal.h> 63af75078fSIntel #include <rte_per_lcore.h> 64af75078fSIntel #include <rte_lcore.h> 65af75078fSIntel #include <rte_atomic.h> 66af75078fSIntel #include <rte_branch_prediction.h> 67af75078fSIntel #include <rte_ring.h> 68af75078fSIntel #include <rte_mempool.h> 69af75078fSIntel #include <rte_interrupts.h> 70af75078fSIntel #include <rte_pci.h> 71af75078fSIntel #include <rte_ether.h> 72af75078fSIntel #include <rte_ethdev.h> 73af75078fSIntel #include <rte_string_fns.h> 740d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 75af75078fSIntel #include <cmdline_parse.h> 76af75078fSIntel #include <cmdline_parse_etheraddr.h> 770d56cb81SThomas Monjalon #endif 782950a769SDeclan Doherty #ifdef RTE_LIBRTE_PMD_BOND 792950a769SDeclan Doherty #include <rte_eth_bond.h> 802950a769SDeclan Doherty #endif 81af75078fSIntel 82af75078fSIntel #include "testpmd.h" 83af75078fSIntel 84af75078fSIntel static void 85af75078fSIntel usage(char* progname) 86af75078fSIntel { 870d56cb81SThomas Monjalon printf("usage: %s " 880d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 890d56cb81SThomas Monjalon "[--interactive|-i] " 900d56cb81SThomas Monjalon #endif 91ca7feb22SCyril Chemparathy "[--help|-h] | [--auto-start|-a] | [" 92af75078fSIntel "--coremask=COREMASK --portmask=PORTMASK --numa " 93c8798818SIntel "--mbuf-size= | --total-num-mbufs= | " 943be52ffcSIntel "--nb-cores= | --nb-ports= | " 950d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 96af75078fSIntel "--eth-peers-configfile= | " 973be52ffcSIntel "--eth-peer=X,M:M:M:M:M:M | " 980d56cb81SThomas Monjalon #endif 99af75078fSIntel "--pkt-filter-mode= |" 100af75078fSIntel "--rss-ip | --rss-udp | " 101af75078fSIntel "--rxpt= | --rxht= | --rxwt= | --rxfreet= | " 102af75078fSIntel "--txpt= | --txht= | --txwt= | --txfreet= | " 103ce8d5614SIntel "--txrst= | --txqflags= ]\n", 104af75078fSIntel progname); 1050d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1063be52ffcSIntel printf(" --interactive: run in interactive mode.\n"); 1070d56cb81SThomas Monjalon #endif 108ca7feb22SCyril Chemparathy printf(" --auto-start: start forwarding on init " 109ca7feb22SCyril Chemparathy "[always when non-interactive].\n"); 1103be52ffcSIntel printf(" --help: display this message and quit.\n"); 1113be52ffcSIntel printf(" --nb-cores=N: set the number of forwarding cores " 1123be52ffcSIntel "(1 <= N <= %d).\n", nb_lcores); 1133be52ffcSIntel printf(" --nb-ports=N: set the number of forwarding ports " 1143be52ffcSIntel "(1 <= N <= %d).\n", nb_ports); 115af75078fSIntel printf(" --coremask=COREMASK: hexadecimal bitmask of cores running " 116013af9b6SIntel "the packet forwarding test. The master lcore is reserved for " 1173be52ffcSIntel "command line parsing only, and cannot be masked on for " 1183be52ffcSIntel "packet forwarding.\n"); 119af75078fSIntel printf(" --portmask=PORTMASK: hexadecimal bitmask of ports used " 1203be52ffcSIntel "by the packet forwarding test.\n"); 121af75078fSIntel printf(" --numa: enable NUMA-aware allocation of RX/TX rings and of " 1223be52ffcSIntel "RX memory buffers (mbufs).\n"); 123b6ea6408SIntel printf(" --port-numa-config=(port,socket)[,(port,socket)]: " 124b6ea6408SIntel "specify the socket on which the memory pool " 125b6ea6408SIntel "used by the port will be allocated.\n"); 126b6ea6408SIntel printf(" --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: " 127b6ea6408SIntel "specify the socket on which the TX/RX rings for " 128b6ea6408SIntel "the port will be allocated " 129b6ea6408SIntel "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n"); 130b6ea6408SIntel printf(" --socket-num=N: set socket from which all memory is allocated " 131b6ea6408SIntel "in NUMA mode.\n"); 1323be52ffcSIntel printf(" --mbuf-size=N: set the data size of mbuf to N bytes.\n"); 1333be52ffcSIntel printf(" --total-num-mbufs=N: set the number of mbufs to be allocated " 1343be52ffcSIntel "in mbuf pools.\n"); 1353be52ffcSIntel printf(" --max-pkt-len=N: set the maximum size of packet to N bytes.\n"); 1360d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1373be52ffcSIntel printf(" --eth-peers-configfile=name: config file with ethernet addresses " 1383be52ffcSIntel "of peer ports.\n"); 1393be52ffcSIntel printf(" --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer " 1403be52ffcSIntel "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS); 1410d56cb81SThomas Monjalon #endif 1423be52ffcSIntel printf(" --pkt-filter-mode=N: set Flow Director mode " 1433be52ffcSIntel "(N: none (default mode) or signature or perfect).\n"); 1443be52ffcSIntel printf(" --pkt-filter-report-hash=N: set Flow Director report mode " 1453be52ffcSIntel "(N: none or match (default) or always).\n"); 1463be52ffcSIntel printf(" --pkt-filter-size=N: set Flow Director mode " 1473be52ffcSIntel "(N: 64K (default mode) or 128K or 256K).\n"); 148af75078fSIntel printf(" --pkt-filter-flexbytes-offset=N: set flexbytes-offset. " 149af75078fSIntel "The offset is defined in word units counted from the " 150af75078fSIntel "first byte of the destination Ethernet MAC address. " 1513be52ffcSIntel "0 <= N <= 32.\n"); 152af75078fSIntel printf(" --pkt-filter-drop-queue=N: set drop-queue. " 1533be52ffcSIntel "In perfect mode, when you add a rule with queue = -1 " 154af75078fSIntel "the packet will be enqueued into the rx drop-queue. " 155af75078fSIntel "If the drop-queue doesn't exist, the packet is dropped. " 1563be52ffcSIntel "By default drop-queue=127.\n"); 1573be52ffcSIntel printf(" --crc-strip: enable CRC stripping by hardware.\n"); 1583be52ffcSIntel printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n"); 1593be52ffcSIntel printf(" --disable-hw-vlan: disable hardware vlan.\n"); 1603be52ffcSIntel printf(" --enable-drop-en: enable per queue packet drop.\n"); 1613be52ffcSIntel printf(" --disable-rss: disable rss.\n"); 162af75078fSIntel printf(" --port-topology=N: set port topology (N: paired (default) or " 1633be52ffcSIntel "chained).\n"); 164769ce6b1SThomas Monjalon printf(" --forward-mode=N: set forwarding mode (N: %s).\n", 165769ce6b1SThomas Monjalon list_pkt_forwarding_modes()); 1663be52ffcSIntel printf(" --rss-ip: set RSS functions to IPv4/IPv6 only .\n"); 1673be52ffcSIntel printf(" --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n"); 1683be52ffcSIntel printf(" --rxq=N: set the number of RX queues per port to N.\n"); 1693be52ffcSIntel printf(" --rxd=N: set the number of descriptors in RX rings to N.\n"); 1703be52ffcSIntel printf(" --txq=N: set the number of TX queues per port to N.\n"); 1713be52ffcSIntel printf(" --txd=N: set the number of descriptors in TX rings to N.\n"); 1723be52ffcSIntel printf(" --burst=N: set the number of packets per burst to N.\n"); 1733be52ffcSIntel printf(" --mbcache=N: set the cache of mbuf memory pool to N.\n"); 1743be52ffcSIntel printf(" --rxpt=N: set prefetch threshold register of RX rings to N " 1753be52ffcSIntel "(0 <= N <= 16).\n"); 1763be52ffcSIntel printf(" --rxht=N: set the host threshold register of RX rings to N " 1773be52ffcSIntel "(0 <= N <= 16).\n"); 1783be52ffcSIntel printf(" --rxfreet=N: set the free threshold of RX descriptors to N " 1793be52ffcSIntel "(0 <= N < value of rxd).\n"); 1803be52ffcSIntel printf(" --rxwt=N: set the write-back threshold register of RX rings " 1813be52ffcSIntel "to N (0 <= N <= 16).\n"); 1823be52ffcSIntel printf(" --txpt=N: set the prefetch threshold register of TX rings " 1833be52ffcSIntel "to N (0 <= N <= 16).\n"); 1843be52ffcSIntel printf(" --txht=N: set the nhost threshold register of TX rings to N " 1853be52ffcSIntel "(0 <= N <= 16).\n"); 1863be52ffcSIntel printf(" --txwt=N: set the write-back threshold register of TX rings " 1873be52ffcSIntel "to N (0 <= N <= 16).\n"); 1883be52ffcSIntel printf(" --txfreet=N: set the transmit free threshold of TX rings to N " 1893be52ffcSIntel "(0 <= N <= value of txd).\n"); 1903be52ffcSIntel printf(" --txrst=N: set the transmit RS bit threshold of TX rings to N " 1913be52ffcSIntel "(0 <= N <= value of txd).\n"); 1923be52ffcSIntel printf(" --txqflags=0xXXXXXXXX: hexadecimal bitmask of TX queue flags " 1933be52ffcSIntel "(0 <= N <= 0x7FFFFFFF).\n"); 1943be52ffcSIntel printf(" --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 195ed30d9b6SIntel "tx queues statistics counters mapping " 1963be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1973be52ffcSIntel printf(" --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 198ed30d9b6SIntel "rx queues statistics counters mapping " 1993be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 2005e2ee196SIntel printf(" --no-flush-rx: Don't flush RX streams before forwarding." 2015e2ee196SIntel " Used mainly with PCAP drivers.\n"); 202a7e7bb4eSCyril Chemparathy printf(" --txpkts=X[,Y]*: set TX segment sizes.\n"); 203bc202406SDavid Marchand printf(" --disable-link-check: disable check on link status when " 204bc202406SDavid Marchand "starting/stopping ports.\n"); 205af75078fSIntel } 206af75078fSIntel 2070d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 208af75078fSIntel static int 209af75078fSIntel init_peer_eth_addrs(char *config_filename) 210af75078fSIntel { 211af75078fSIntel FILE *config_file; 212af75078fSIntel portid_t i; 213af75078fSIntel char buf[50]; 214af75078fSIntel 215af75078fSIntel config_file = fopen(config_filename, "r"); 216af75078fSIntel if (config_file == NULL) { 2173be52ffcSIntel perror("Failed to open eth config file\n"); 218af75078fSIntel return -1; 219af75078fSIntel } 220af75078fSIntel 221af75078fSIntel for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 222af75078fSIntel 223af75078fSIntel if (fgets(buf, sizeof(buf), config_file) == NULL) 224af75078fSIntel break; 225af75078fSIntel 226aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i], 227aaa662e7SAlan Carew sizeof(peer_eth_addrs[i])) < 0) { 2283be52ffcSIntel printf("Bad MAC address format on line %d\n", i+1); 229af75078fSIntel fclose(config_file); 230af75078fSIntel return -1; 231af75078fSIntel } 232af75078fSIntel } 233af75078fSIntel fclose(config_file); 234af75078fSIntel nb_peer_eth_addrs = (portid_t) i; 235af75078fSIntel return 0; 236af75078fSIntel } 2370d56cb81SThomas Monjalon #endif 238af75078fSIntel 239af75078fSIntel /* 240af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 241af75078fSIntel * the global configuration of forwarding cores. 242af75078fSIntel */ 243af75078fSIntel static void 244af75078fSIntel parse_fwd_coremask(const char *coremask) 245af75078fSIntel { 246af75078fSIntel char *end; 247af75078fSIntel unsigned long long int cm; 248af75078fSIntel 249af75078fSIntel /* parse hexadecimal string */ 250af75078fSIntel end = NULL; 251af75078fSIntel cm = strtoull(coremask, &end, 16); 252af75078fSIntel if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0')) 253af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n"); 254013af9b6SIntel else if (set_fwd_lcores_mask((uint64_t) cm) < 0) 255013af9b6SIntel rte_exit(EXIT_FAILURE, "coremask is not valid\n"); 256af75078fSIntel } 257af75078fSIntel 258af75078fSIntel /* 259af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 260af75078fSIntel * the global configuration of forwarding cores. 261af75078fSIntel */ 262af75078fSIntel static void 263af75078fSIntel parse_fwd_portmask(const char *portmask) 264af75078fSIntel { 265af75078fSIntel char *end; 266af75078fSIntel unsigned long long int pm; 267af75078fSIntel 268af75078fSIntel /* parse hexadecimal string */ 269af75078fSIntel end = NULL; 270af75078fSIntel pm = strtoull(portmask, &end, 16); 271af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 272af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n"); 273af75078fSIntel else 274af75078fSIntel set_fwd_ports_mask((uint64_t) pm); 275af75078fSIntel } 276af75078fSIntel 277ed30d9b6SIntel 278ed30d9b6SIntel static int 279ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx) 280ed30d9b6SIntel { 281ed30d9b6SIntel char s[256]; 282ed30d9b6SIntel const char *p, *p0 = q_arg; 283ed30d9b6SIntel char *end; 284ed30d9b6SIntel enum fieldnames { 285ed30d9b6SIntel FLD_PORT = 0, 286ed30d9b6SIntel FLD_QUEUE, 287ed30d9b6SIntel FLD_STATS_COUNTER, 288ed30d9b6SIntel _NUM_FLD 289ed30d9b6SIntel }; 290ed30d9b6SIntel unsigned long int_fld[_NUM_FLD]; 291ed30d9b6SIntel char *str_fld[_NUM_FLD]; 292ed30d9b6SIntel int i; 293ed30d9b6SIntel unsigned size; 294ed30d9b6SIntel 295ed30d9b6SIntel /* reset from value set at definition */ 296ed30d9b6SIntel is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0); 297ed30d9b6SIntel 298ed30d9b6SIntel while ((p = strchr(p0,'(')) != NULL) { 299ed30d9b6SIntel ++p; 300ed30d9b6SIntel if((p0 = strchr(p,')')) == NULL) 301ed30d9b6SIntel return -1; 302ed30d9b6SIntel 303ed30d9b6SIntel size = p0 - p; 304ed30d9b6SIntel if(size >= sizeof(s)) 305ed30d9b6SIntel return -1; 306ed30d9b6SIntel 3076f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 308ed30d9b6SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 309ed30d9b6SIntel return -1; 310ed30d9b6SIntel for (i = 0; i < _NUM_FLD; i++){ 311ed30d9b6SIntel errno = 0; 312ed30d9b6SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 313ed30d9b6SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 314ed30d9b6SIntel return -1; 315ed30d9b6SIntel } 316ed30d9b6SIntel /* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */ 317ed30d9b6SIntel if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) { 318ed30d9b6SIntel printf("Stats counter not in the correct range 0..%d\n", 319ed30d9b6SIntel RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 320ed30d9b6SIntel return -1; 321ed30d9b6SIntel } 322ed30d9b6SIntel 3234dccdc78SBruce Richardson if (!is_rx) { 3244dccdc78SBruce Richardson if ((nb_tx_queue_stats_mappings >= 3254dccdc78SBruce Richardson MAX_TX_QUEUE_STATS_MAPPINGS)) { 3264dccdc78SBruce Richardson printf("exceeded max number of TX queue " 3274dccdc78SBruce Richardson "statistics mappings: %hu\n", 3284dccdc78SBruce Richardson nb_tx_queue_stats_mappings); 329ed30d9b6SIntel return -1; 330ed30d9b6SIntel } 331ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id = 332ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 333ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id = 334ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 335ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id = 336ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 337ed30d9b6SIntel ++nb_tx_queue_stats_mappings; 338ed30d9b6SIntel } 339ed30d9b6SIntel else { 3404dccdc78SBruce Richardson if ((nb_rx_queue_stats_mappings >= 3414dccdc78SBruce Richardson MAX_RX_QUEUE_STATS_MAPPINGS)) { 3424dccdc78SBruce Richardson printf("exceeded max number of RX queue " 3434dccdc78SBruce Richardson "statistics mappings: %hu\n", 3444dccdc78SBruce Richardson nb_rx_queue_stats_mappings); 3454dccdc78SBruce Richardson return -1; 3464dccdc78SBruce Richardson } 347ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id = 348ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 349ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id = 350ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 351ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id = 352ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 353ed30d9b6SIntel ++nb_rx_queue_stats_mappings; 354ed30d9b6SIntel } 355ed30d9b6SIntel 356ed30d9b6SIntel } 357ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */ 358ed30d9b6SIntel /* than to the default array (that was set at its definition) */ 359ed30d9b6SIntel is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) : 360ed30d9b6SIntel (tx_queue_stats_mappings = tx_queue_stats_mappings_array); 361ed30d9b6SIntel return 0; 362ed30d9b6SIntel } 363ed30d9b6SIntel 364b6ea6408SIntel static int 365b6ea6408SIntel parse_portnuma_config(const char *q_arg) 366b6ea6408SIntel { 367b6ea6408SIntel char s[256]; 368b6ea6408SIntel const char *p, *p0 = q_arg; 369b6ea6408SIntel char *end; 370b6ea6408SIntel uint8_t i,port_id,socket_id; 371b6ea6408SIntel unsigned size; 372b6ea6408SIntel enum fieldnames { 373b6ea6408SIntel FLD_PORT = 0, 374b6ea6408SIntel FLD_SOCKET, 375b6ea6408SIntel _NUM_FLD 376b6ea6408SIntel }; 377b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 378b6ea6408SIntel char *str_fld[_NUM_FLD]; 379b6ea6408SIntel 380b6ea6408SIntel /* reset from value set at definition */ 381b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 382b6ea6408SIntel ++p; 383b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 384b6ea6408SIntel return -1; 385b6ea6408SIntel 386b6ea6408SIntel size = p0 - p; 387b6ea6408SIntel if(size >= sizeof(s)) 388b6ea6408SIntel return -1; 389b6ea6408SIntel 3906f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 391b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 392b6ea6408SIntel return -1; 393b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 394b6ea6408SIntel errno = 0; 395b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 396b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 397b6ea6408SIntel return -1; 398b6ea6408SIntel } 399b6ea6408SIntel port_id = (uint8_t)int_fld[FLD_PORT]; 400b6ea6408SIntel if (port_id >= nb_ports) { 401b6ea6408SIntel printf("Invalid port, range is [0, %d]\n", nb_ports - 1); 402b6ea6408SIntel return -1; 403b6ea6408SIntel } 404b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 405b6ea6408SIntel if(socket_id >= MAX_SOCKET) { 406b6ea6408SIntel printf("Invalid socket id, range is [0, %d]\n", 407b6ea6408SIntel MAX_SOCKET - 1); 408b6ea6408SIntel return -1; 409b6ea6408SIntel } 410b6ea6408SIntel port_numa[port_id] = socket_id; 411b6ea6408SIntel } 412b6ea6408SIntel 413b6ea6408SIntel return 0; 414b6ea6408SIntel } 415b6ea6408SIntel 416b6ea6408SIntel static int 417b6ea6408SIntel parse_ringnuma_config(const char *q_arg) 418b6ea6408SIntel { 419b6ea6408SIntel char s[256]; 420b6ea6408SIntel const char *p, *p0 = q_arg; 421b6ea6408SIntel char *end; 422b6ea6408SIntel uint8_t i,port_id,ring_flag,socket_id; 423b6ea6408SIntel unsigned size; 424b6ea6408SIntel enum fieldnames { 425b6ea6408SIntel FLD_PORT = 0, 426b6ea6408SIntel FLD_FLAG, 427b6ea6408SIntel FLD_SOCKET, 428b6ea6408SIntel _NUM_FLD 429b6ea6408SIntel }; 430b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 431b6ea6408SIntel char *str_fld[_NUM_FLD]; 432b6ea6408SIntel #define RX_RING_ONLY 0x1 433b6ea6408SIntel #define TX_RING_ONLY 0x2 434b6ea6408SIntel #define RXTX_RING 0x3 435b6ea6408SIntel 436b6ea6408SIntel /* reset from value set at definition */ 437b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 438b6ea6408SIntel ++p; 439b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 440b6ea6408SIntel return -1; 441b6ea6408SIntel 442b6ea6408SIntel size = p0 - p; 443b6ea6408SIntel if(size >= sizeof(s)) 444b6ea6408SIntel return -1; 445b6ea6408SIntel 4466f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 447b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 448b6ea6408SIntel return -1; 449b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 450b6ea6408SIntel errno = 0; 451b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 452b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 453b6ea6408SIntel return -1; 454b6ea6408SIntel } 455b6ea6408SIntel port_id = (uint8_t)int_fld[FLD_PORT]; 456b6ea6408SIntel if (port_id >= nb_ports) { 457b6ea6408SIntel printf("Invalid port, range is [0, %d]\n", nb_ports - 1); 458b6ea6408SIntel return -1; 459b6ea6408SIntel } 460b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 461b6ea6408SIntel if (socket_id >= MAX_SOCKET) { 462b6ea6408SIntel printf("Invalid socket id, range is [0, %d]\n", 463b6ea6408SIntel MAX_SOCKET - 1); 464b6ea6408SIntel return -1; 465b6ea6408SIntel } 466b6ea6408SIntel ring_flag = (uint8_t)int_fld[FLD_FLAG]; 467b6ea6408SIntel if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) { 468b6ea6408SIntel printf("Invalid ring-flag=%d config for port =%d\n", 469b6ea6408SIntel ring_flag,port_id); 470b6ea6408SIntel return -1; 471b6ea6408SIntel } 472b6ea6408SIntel 473b6ea6408SIntel switch (ring_flag & RXTX_RING) { 474b6ea6408SIntel case RX_RING_ONLY: 475b6ea6408SIntel rxring_numa[port_id] = socket_id; 476b6ea6408SIntel break; 477b6ea6408SIntel case TX_RING_ONLY: 478b6ea6408SIntel txring_numa[port_id] = socket_id; 479b6ea6408SIntel break; 480b6ea6408SIntel case RXTX_RING: 481b6ea6408SIntel rxring_numa[port_id] = socket_id; 482b6ea6408SIntel txring_numa[port_id] = socket_id; 483b6ea6408SIntel break; 484b6ea6408SIntel default: 485b6ea6408SIntel printf("Invalid ring-flag=%d config for port=%d\n", 486b6ea6408SIntel ring_flag,port_id); 487b6ea6408SIntel break; 488b6ea6408SIntel } 489b6ea6408SIntel } 490b6ea6408SIntel 491b6ea6408SIntel return 0; 492b6ea6408SIntel } 493ed30d9b6SIntel 494af75078fSIntel void 495af75078fSIntel launch_args_parse(int argc, char** argv) 496af75078fSIntel { 497af75078fSIntel int n, opt; 498af75078fSIntel char **argvopt; 499af75078fSIntel int opt_idx; 500013af9b6SIntel enum { TX, RX }; 501013af9b6SIntel 502af75078fSIntel static struct option lgopts[] = { 503af75078fSIntel { "help", 0, 0, 0 }, 5040d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 505af75078fSIntel { "interactive", 0, 0, 0 }, 506ca7feb22SCyril Chemparathy { "auto-start", 0, 0, 0 }, 507af75078fSIntel { "eth-peers-configfile", 1, 0, 0 }, 508af75078fSIntel { "eth-peer", 1, 0, 0 }, 5090d56cb81SThomas Monjalon #endif 510af75078fSIntel { "ports", 1, 0, 0 }, 511af75078fSIntel { "nb-cores", 1, 0, 0 }, 512af75078fSIntel { "nb-ports", 1, 0, 0 }, 513af75078fSIntel { "coremask", 1, 0, 0 }, 514af75078fSIntel { "portmask", 1, 0, 0 }, 515af75078fSIntel { "numa", 0, 0, 0 }, 516148f963fSBruce Richardson { "mp-anon", 0, 0, 0 }, 517b6ea6408SIntel { "port-numa-config", 1, 0, 0 }, 518b6ea6408SIntel { "ring-numa-config", 1, 0, 0 }, 519b6ea6408SIntel { "socket-num", 1, 0, 0 }, 520af75078fSIntel { "mbuf-size", 1, 0, 0 }, 521c8798818SIntel { "total-num-mbufs", 1, 0, 0 }, 522af75078fSIntel { "max-pkt-len", 1, 0, 0 }, 523af75078fSIntel { "pkt-filter-mode", 1, 0, 0 }, 524af75078fSIntel { "pkt-filter-report-hash", 1, 0, 0 }, 525af75078fSIntel { "pkt-filter-size", 1, 0, 0 }, 526af75078fSIntel { "pkt-filter-flexbytes-offset",1, 0, 0 }, 527af75078fSIntel { "pkt-filter-drop-queue", 1, 0, 0 }, 528af75078fSIntel { "crc-strip", 0, 0, 0 }, 529013af9b6SIntel { "enable-rx-cksum", 0, 0, 0 }, 530af75078fSIntel { "disable-hw-vlan", 0, 0, 0 }, 531013af9b6SIntel { "enable-drop-en", 0, 0, 0 }, 532af75078fSIntel { "disable-rss", 0, 0, 0 }, 533af75078fSIntel { "port-topology", 1, 0, 0 }, 534ce9b9fb0SCyril Chemparathy { "forward-mode", 1, 0, 0 }, 535af75078fSIntel { "rss-ip", 0, 0, 0 }, 536af75078fSIntel { "rss-udp", 0, 0, 0 }, 537af75078fSIntel { "rxq", 1, 0, 0 }, 538af75078fSIntel { "txq", 1, 0, 0 }, 539af75078fSIntel { "rxd", 1, 0, 0 }, 540af75078fSIntel { "txd", 1, 0, 0 }, 541af75078fSIntel { "burst", 1, 0, 0 }, 542af75078fSIntel { "mbcache", 1, 0, 0 }, 543af75078fSIntel { "txpt", 1, 0, 0 }, 544af75078fSIntel { "txht", 1, 0, 0 }, 545af75078fSIntel { "txwt", 1, 0, 0 }, 546af75078fSIntel { "txfreet", 1, 0, 0 }, 547af75078fSIntel { "txrst", 1, 0, 0 }, 548ce8d5614SIntel { "txqflags", 1, 0, 0 }, 549af75078fSIntel { "rxpt", 1, 0, 0 }, 550af75078fSIntel { "rxht", 1, 0, 0 }, 551af75078fSIntel { "rxwt", 1, 0, 0 }, 552af75078fSIntel { "rxfreet", 1, 0, 0 }, 553ed30d9b6SIntel { "tx-queue-stats-mapping", 1, 0, 0 }, 554ed30d9b6SIntel { "rx-queue-stats-mapping", 1, 0, 0 }, 5557741e4cfSIntel { "no-flush-rx", 0, 0, 0 }, 556a7e7bb4eSCyril Chemparathy { "txpkts", 1, 0, 0 }, 557bc202406SDavid Marchand { "disable-link-check", 0, 0, 0 }, 558af75078fSIntel { 0, 0, 0, 0 }, 559af75078fSIntel }; 560af75078fSIntel 561af75078fSIntel argvopt = argv; 562af75078fSIntel 5630d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 564ca7feb22SCyril Chemparathy #define SHORTOPTS "i" 5650d56cb81SThomas Monjalon #else 566ca7feb22SCyril Chemparathy #define SHORTOPTS "" 5670d56cb81SThomas Monjalon #endif 568ca7feb22SCyril Chemparathy while ((opt = getopt_long(argc, argvopt, SHORTOPTS "ah", 569af75078fSIntel lgopts, &opt_idx)) != EOF) { 570af75078fSIntel switch (opt) { 5710d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 572af75078fSIntel case 'i': 573af75078fSIntel printf("Interactive-mode selected\n"); 574af75078fSIntel interactive = 1; 575af75078fSIntel break; 5760d56cb81SThomas Monjalon #endif 577ca7feb22SCyril Chemparathy case 'a': 578ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 579ca7feb22SCyril Chemparathy auto_start = 1; 580ca7feb22SCyril Chemparathy break; 581ca7feb22SCyril Chemparathy 582af75078fSIntel case 0: /*long options */ 583af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "help")) { 584af75078fSIntel usage(argv[0]); 585af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 586af75078fSIntel } 5870d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 588af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "interactive")) { 589af75078fSIntel printf("Interactive-mode selected\n"); 590af75078fSIntel interactive = 1; 591af75078fSIntel } 592ca7feb22SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "auto-start")) { 593ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 594ca7feb22SCyril Chemparathy auto_start = 1; 595ca7feb22SCyril Chemparathy } 596af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 597af75078fSIntel "eth-peers-configfile")) { 598af75078fSIntel if (init_peer_eth_addrs(optarg) != 0) 599af75078fSIntel rte_exit(EXIT_FAILURE, 600af75078fSIntel "Cannot open logfile\n"); 601af75078fSIntel } 602af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "eth-peer")) { 603af75078fSIntel char *port_end; 604af75078fSIntel uint8_t c, peer_addr[6]; 605af75078fSIntel 606af75078fSIntel errno = 0; 607af75078fSIntel n = strtoul(optarg, &port_end, 10); 608af75078fSIntel if (errno != 0 || port_end == optarg || *port_end++ != ',') 609af75078fSIntel rte_exit(EXIT_FAILURE, 610af75078fSIntel "Invalid eth-peer: %s", optarg); 611af75078fSIntel if (n >= RTE_MAX_ETHPORTS) 612af75078fSIntel rte_exit(EXIT_FAILURE, 613af75078fSIntel "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n", 614af75078fSIntel n, RTE_MAX_ETHPORTS); 615af75078fSIntel 616aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, port_end, 617aaa662e7SAlan Carew &peer_addr, sizeof(peer_addr)) < 0) 618af75078fSIntel rte_exit(EXIT_FAILURE, 619af75078fSIntel "Invalid ethernet address: %s\n", 620af75078fSIntel port_end); 621af75078fSIntel for (c = 0; c < 6; c++) 622af75078fSIntel peer_eth_addrs[n].addr_bytes[c] = 623af75078fSIntel peer_addr[c]; 624af75078fSIntel nb_peer_eth_addrs++; 625af75078fSIntel } 6260d56cb81SThomas Monjalon #endif 627af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-ports")) { 628af75078fSIntel n = atoi(optarg); 629af75078fSIntel if (n > 0 && n <= nb_ports) 630af75078fSIntel nb_fwd_ports = (uint8_t) n; 631af75078fSIntel else 632af75078fSIntel rte_exit(EXIT_FAILURE, 633af75078fSIntel "nb-ports should be > 0 and <= %d\n", 634af75078fSIntel nb_ports); 635af75078fSIntel } 636af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-cores")) { 637af75078fSIntel n = atoi(optarg); 638af75078fSIntel if (n > 0 && n <= nb_lcores) 639af75078fSIntel nb_fwd_lcores = (uint8_t) n; 640af75078fSIntel else 641af75078fSIntel rte_exit(EXIT_FAILURE, 642af75078fSIntel "nb-cores should be > 0 and <= %d\n", 643af75078fSIntel nb_lcores); 644af75078fSIntel } 645af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "coremask")) 646af75078fSIntel parse_fwd_coremask(optarg); 647af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "portmask")) 648af75078fSIntel parse_fwd_portmask(optarg); 649b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "numa")) { 650af75078fSIntel numa_support = 1; 651b6ea6408SIntel memset(port_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 652b6ea6408SIntel memset(rxring_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 653b6ea6408SIntel memset(txring_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 654b6ea6408SIntel } 655148f963fSBruce Richardson if (!strcmp(lgopts[opt_idx].name, "mp-anon")) { 656148f963fSBruce Richardson mp_anon = 1; 657148f963fSBruce Richardson } 658b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) { 659b6ea6408SIntel if (parse_portnuma_config(optarg)) 660b6ea6408SIntel rte_exit(EXIT_FAILURE, 661b6ea6408SIntel "invalid port-numa configuration\n"); 662b6ea6408SIntel } 663b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "ring-numa-config")) 664b6ea6408SIntel if (parse_ringnuma_config(optarg)) 665b6ea6408SIntel rte_exit(EXIT_FAILURE, 666b6ea6408SIntel "invalid ring-numa configuration\n"); 667b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "socket-num")) { 668b6ea6408SIntel n = atoi(optarg); 669b6ea6408SIntel if(n < MAX_SOCKET) 670b6ea6408SIntel socket_num = (uint8_t)n; 671b6ea6408SIntel else 672b6ea6408SIntel rte_exit(EXIT_FAILURE, 673b6ea6408SIntel "The socket number should be < %d\n", 674b6ea6408SIntel MAX_SOCKET); 675b6ea6408SIntel } 676af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) { 677af75078fSIntel n = atoi(optarg); 678af75078fSIntel if (n > 0 && n <= 0xFFFF) 679af75078fSIntel mbuf_data_size = (uint16_t) n; 680af75078fSIntel else 681af75078fSIntel rte_exit(EXIT_FAILURE, 682af75078fSIntel "mbuf-size should be > 0 and < 65536\n"); 683af75078fSIntel } 684c8798818SIntel if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) { 685c8798818SIntel n = atoi(optarg); 686c8798818SIntel if (n > 1024) 687c8798818SIntel param_total_num_mbufs = (unsigned)n; 688c8798818SIntel else 689c8798818SIntel rte_exit(EXIT_FAILURE, 690c8798818SIntel "total-num-mbufs should be > 1024\n"); 691c8798818SIntel } 692af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) { 693af75078fSIntel n = atoi(optarg); 694af75078fSIntel if (n >= ETHER_MIN_LEN) { 695af75078fSIntel rx_mode.max_rx_pkt_len = (uint32_t) n; 696af75078fSIntel if (n > ETHER_MAX_LEN) 697af75078fSIntel rx_mode.jumbo_frame = 1; 698af75078fSIntel } else 699af75078fSIntel rte_exit(EXIT_FAILURE, 700af75078fSIntel "Invalid max-pkt-len=%d - should be > %d\n", 701af75078fSIntel n, ETHER_MIN_LEN); 702af75078fSIntel } 703af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) { 704af75078fSIntel if (!strcmp(optarg, "signature")) 705af75078fSIntel fdir_conf.mode = 706af75078fSIntel RTE_FDIR_MODE_SIGNATURE; 707af75078fSIntel else if (!strcmp(optarg, "perfect")) 708af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_PERFECT; 709af75078fSIntel else if (!strcmp(optarg, "none")) 710af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_NONE; 711af75078fSIntel else 712af75078fSIntel rte_exit(EXIT_FAILURE, 713af75078fSIntel "pkt-mode-invalid %s invalid - must be: " 714af75078fSIntel "none, signature or perfect\n", 715af75078fSIntel optarg); 716af75078fSIntel } 717af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 718af75078fSIntel "pkt-filter-report-hash")) { 719af75078fSIntel if (!strcmp(optarg, "none")) 720af75078fSIntel fdir_conf.status = 721af75078fSIntel RTE_FDIR_NO_REPORT_STATUS; 722af75078fSIntel else if (!strcmp(optarg, "match")) 723af75078fSIntel fdir_conf.status = 724af75078fSIntel RTE_FDIR_REPORT_STATUS; 725af75078fSIntel else if (!strcmp(optarg, "always")) 726af75078fSIntel fdir_conf.status = 727af75078fSIntel RTE_FDIR_REPORT_STATUS_ALWAYS; 728af75078fSIntel else 729af75078fSIntel rte_exit(EXIT_FAILURE, 730af75078fSIntel "pkt-filter-report-hash %s invalid " 731af75078fSIntel "- must be: none or match or always\n", 732af75078fSIntel optarg); 733af75078fSIntel } 734af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) { 735af75078fSIntel if (!strcmp(optarg, "64K")) 736af75078fSIntel fdir_conf.pballoc = 737af75078fSIntel RTE_FDIR_PBALLOC_64K; 738af75078fSIntel else if (!strcmp(optarg, "128K")) 739af75078fSIntel fdir_conf.pballoc = 740af75078fSIntel RTE_FDIR_PBALLOC_128K; 741af75078fSIntel else if (!strcmp(optarg, "256K")) 742af75078fSIntel fdir_conf.pballoc = 743af75078fSIntel RTE_FDIR_PBALLOC_256K; 744af75078fSIntel else 745af75078fSIntel rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -" 746af75078fSIntel " must be: 64K or 128K or 256K\n", 747af75078fSIntel optarg); 748af75078fSIntel } 749af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 750af75078fSIntel "pkt-filter-flexbytes-offset")) { 751af75078fSIntel n = atoi(optarg); 752af75078fSIntel if ( n >= 0 && n <= (int) 32) 753af75078fSIntel fdir_conf.flexbytes_offset = 754af75078fSIntel (uint8_t) n; 755af75078fSIntel else 756af75078fSIntel rte_exit(EXIT_FAILURE, 757af75078fSIntel "flexbytes %d invalid - must" 758af75078fSIntel "be >= 0 && <= 32\n", n); 759af75078fSIntel } 760af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 761af75078fSIntel "pkt-filter-drop-queue")) { 762af75078fSIntel n = atoi(optarg); 763af75078fSIntel if (n >= 0) 764af75078fSIntel fdir_conf.drop_queue = (uint8_t) n; 765af75078fSIntel else 766af75078fSIntel rte_exit(EXIT_FAILURE, 767af75078fSIntel "drop queue %d invalid - must" 768af75078fSIntel "be >= 0 \n", n); 769af75078fSIntel } 770af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "crc-strip")) 771af75078fSIntel rx_mode.hw_strip_crc = 1; 772af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum")) 773af75078fSIntel rx_mode.hw_ip_checksum = 1; 774a47aa8b9SIntel 775a47aa8b9SIntel if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) { 776af75078fSIntel rx_mode.hw_vlan_filter = 0; 777a47aa8b9SIntel rx_mode.hw_vlan_strip = 0; 778a47aa8b9SIntel rx_mode.hw_vlan_extend = 0; 779a47aa8b9SIntel } 780a47aa8b9SIntel 781ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "enable-drop-en")) 782ce8d5614SIntel rx_drop_en = 1; 783ce8d5614SIntel 784af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "disable-rss")) 785af75078fSIntel rss_hf = 0; 786af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "port-topology")) { 787af75078fSIntel if (!strcmp(optarg, "paired")) 788af75078fSIntel port_topology = PORT_TOPOLOGY_PAIRED; 789af75078fSIntel else if (!strcmp(optarg, "chained")) 790af75078fSIntel port_topology = PORT_TOPOLOGY_CHAINED; 7913e2006d6SCyril Chemparathy else if (!strcmp(optarg, "loop")) 7923e2006d6SCyril Chemparathy port_topology = PORT_TOPOLOGY_LOOP; 793af75078fSIntel else 794af75078fSIntel rte_exit(EXIT_FAILURE, "port-topology %s invalid -" 795af75078fSIntel " must be: paired or chained \n", 796af75078fSIntel optarg); 797af75078fSIntel } 798ce9b9fb0SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "forward-mode")) 799ce9b9fb0SCyril Chemparathy set_pkt_forwarding_mode(optarg); 800af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-ip")) 8018a387fa8SHelin Zhang rss_hf = ETH_RSS_IP; 802af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-udp")) 8038a387fa8SHelin Zhang rss_hf = ETH_RSS_UDP; 804af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxq")) { 805af75078fSIntel n = atoi(optarg); 806af75078fSIntel if (n >= 1 && n <= (int) MAX_QUEUE_ID) 807af75078fSIntel nb_rxq = (queueid_t) n; 808af75078fSIntel else 809af75078fSIntel rte_exit(EXIT_FAILURE, "rxq %d invalid - must be" 810af75078fSIntel " >= 1 && <= %d\n", n, 811af75078fSIntel (int) MAX_QUEUE_ID); 812af75078fSIntel } 813af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txq")) { 814af75078fSIntel n = atoi(optarg); 815af75078fSIntel if (n >= 1 && n <= (int) MAX_QUEUE_ID) 816af75078fSIntel nb_txq = (queueid_t) n; 817af75078fSIntel else 818af75078fSIntel rte_exit(EXIT_FAILURE, "txq %d invalid - must be" 819af75078fSIntel " >= 1 && <= %d\n", n, 820af75078fSIntel (int) MAX_QUEUE_ID); 821af75078fSIntel } 822af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 823af75078fSIntel n = atoi(optarg); 824af75078fSIntel if (n > 0) 825af75078fSIntel nb_rxd = (uint16_t) n; 826af75078fSIntel else 827af75078fSIntel rte_exit(EXIT_FAILURE, "rxd must be > 0\n"); 828af75078fSIntel } 829af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 830af75078fSIntel n = atoi(optarg); 831af75078fSIntel if (n > 0) 832af75078fSIntel nb_txd = (uint16_t) n; 833af75078fSIntel else 834af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 835af75078fSIntel } 836af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "burst")) { 837af75078fSIntel n = atoi(optarg); 838af75078fSIntel if ((n >= 1) && (n <= MAX_PKT_BURST)) 839af75078fSIntel nb_pkt_per_burst = (uint16_t) n; 840af75078fSIntel else 841af75078fSIntel rte_exit(EXIT_FAILURE, 842af75078fSIntel "burst must >= 1 and <= %d]", 843af75078fSIntel MAX_PKT_BURST); 844af75078fSIntel } 845af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbcache")) { 846af75078fSIntel n = atoi(optarg); 847af75078fSIntel if ((n >= 0) && 848af75078fSIntel (n <= RTE_MEMPOOL_CACHE_MAX_SIZE)) 849af75078fSIntel mb_mempool_cache = (uint16_t) n; 850af75078fSIntel else 851af75078fSIntel rte_exit(EXIT_FAILURE, 852af75078fSIntel "mbcache must be >= 0 and <= %d\n", 853af75078fSIntel RTE_MEMPOOL_CACHE_MAX_SIZE); 854af75078fSIntel } 855af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 856af75078fSIntel n = atoi(optarg); 857af75078fSIntel if (n >= 0) 858af75078fSIntel tx_thresh.pthresh = (uint8_t)n; 859af75078fSIntel else 860af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 861af75078fSIntel } 862af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 863af75078fSIntel n = atoi(optarg); 864af75078fSIntel if (n >= 0) 865af75078fSIntel tx_thresh.hthresh = (uint8_t)n; 866af75078fSIntel else 867af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 868af75078fSIntel } 869af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 870af75078fSIntel n = atoi(optarg); 871af75078fSIntel if (n >= 0) 872af75078fSIntel tx_thresh.wthresh = (uint8_t)n; 873af75078fSIntel else 874af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 875af75078fSIntel } 876af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txfreet")) { 877af75078fSIntel n = atoi(optarg); 878af75078fSIntel if (n >= 0) 879af75078fSIntel tx_free_thresh = (uint16_t)n; 880af75078fSIntel else 881af75078fSIntel rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n"); 882af75078fSIntel } 883af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txrst")) { 884af75078fSIntel n = atoi(optarg); 885af75078fSIntel if (n >= 0) 886af75078fSIntel tx_rs_thresh = (uint16_t)n; 887af75078fSIntel else 888af75078fSIntel rte_exit(EXIT_FAILURE, "txrst must be >= 0\n"); 889af75078fSIntel } 890ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "txqflags")) { 891ce8d5614SIntel char *end = NULL; 892ce8d5614SIntel n = strtoul(optarg, &end, 16); 893ce8d5614SIntel if (n >= 0) 894ce8d5614SIntel txq_flags = (uint32_t)n; 895ce8d5614SIntel else 896ce8d5614SIntel rte_exit(EXIT_FAILURE, 897ce8d5614SIntel "txqflags must be >= 0\n"); 898ce8d5614SIntel } 899af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 900af75078fSIntel n = atoi(optarg); 901af75078fSIntel if (n >= 0) 902af75078fSIntel rx_thresh.pthresh = (uint8_t)n; 903af75078fSIntel else 904af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 905af75078fSIntel } 906af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 907af75078fSIntel n = atoi(optarg); 908af75078fSIntel if (n >= 0) 909af75078fSIntel rx_thresh.hthresh = (uint8_t)n; 910af75078fSIntel else 911af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 912af75078fSIntel } 913af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 914af75078fSIntel n = atoi(optarg); 915af75078fSIntel if (n >= 0) 916af75078fSIntel rx_thresh.wthresh = (uint8_t)n; 917af75078fSIntel else 918af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 919af75078fSIntel } 920af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 921af75078fSIntel n = atoi(optarg); 922af75078fSIntel if (n > 0) { 923af75078fSIntel if (rx_free_thresh >= n) 924af75078fSIntel rte_exit(EXIT_FAILURE, 925af75078fSIntel "rxd must be > " 926af75078fSIntel "rx_free_thresh(%d)\n", 927af75078fSIntel (int)rx_free_thresh); 928af75078fSIntel else 929af75078fSIntel nb_rxd = (uint16_t) n; 930af75078fSIntel } else 931af75078fSIntel rte_exit(EXIT_FAILURE, 932af75078fSIntel "rxd(%d) invalid - must be > 0\n", 933af75078fSIntel n); 934af75078fSIntel } 935af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 936af75078fSIntel n = atoi(optarg); 937af75078fSIntel if (n > 0) 938af75078fSIntel nb_txd = (uint16_t) n; 939af75078fSIntel else 940af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 941af75078fSIntel } 942af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 943af75078fSIntel n = atoi(optarg); 944af75078fSIntel if (n >= 0) 945af75078fSIntel tx_thresh.pthresh = (uint8_t)n; 946af75078fSIntel else 947af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 948af75078fSIntel } 949af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 950af75078fSIntel n = atoi(optarg); 951af75078fSIntel if (n >= 0) 952af75078fSIntel tx_thresh.hthresh = (uint8_t)n; 953af75078fSIntel else 954af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 955af75078fSIntel } 956af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 957af75078fSIntel n = atoi(optarg); 958af75078fSIntel if (n >= 0) 959af75078fSIntel tx_thresh.wthresh = (uint8_t)n; 960af75078fSIntel else 961af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 962af75078fSIntel } 963af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 964af75078fSIntel n = atoi(optarg); 965af75078fSIntel if (n >= 0) 966af75078fSIntel rx_thresh.pthresh = (uint8_t)n; 967af75078fSIntel else 968af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 969af75078fSIntel } 970af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 971af75078fSIntel n = atoi(optarg); 972af75078fSIntel if (n >= 0) 973af75078fSIntel rx_thresh.hthresh = (uint8_t)n; 974af75078fSIntel else 975af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 976af75078fSIntel } 977af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 978af75078fSIntel n = atoi(optarg); 979af75078fSIntel if (n >= 0) 980af75078fSIntel rx_thresh.wthresh = (uint8_t)n; 981af75078fSIntel else 982af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 983af75078fSIntel } 984af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxfreet")) { 985af75078fSIntel n = atoi(optarg); 986af75078fSIntel if (n >= 0) 987af75078fSIntel rx_free_thresh = (uint16_t)n; 988af75078fSIntel else 989af75078fSIntel rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n"); 990af75078fSIntel } 991ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) { 992ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, TX)) { 993ed30d9b6SIntel rte_exit(EXIT_FAILURE, 994ed30d9b6SIntel "invalid TX queue statistics mapping config entered\n"); 995ed30d9b6SIntel } 996ed30d9b6SIntel } 997ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) { 998ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, RX)) { 999ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1000ed30d9b6SIntel "invalid RX queue statistics mapping config entered\n"); 1001ed30d9b6SIntel } 1002ed30d9b6SIntel } 1003a7e7bb4eSCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "txpkts")) { 1004a7e7bb4eSCyril Chemparathy unsigned seg_lengths[RTE_MAX_SEGS_PER_PKT]; 1005a7e7bb4eSCyril Chemparathy unsigned int nb_segs; 1006a7e7bb4eSCyril Chemparathy 1007*950d1516SBruce Richardson nb_segs = parse_item_list(optarg, "txpkt segments", 1008*950d1516SBruce Richardson RTE_MAX_SEGS_PER_PKT, seg_lengths, 0); 1009a7e7bb4eSCyril Chemparathy if (nb_segs > 0) 1010a7e7bb4eSCyril Chemparathy set_tx_pkt_segments(seg_lengths, nb_segs); 1011a7e7bb4eSCyril Chemparathy else 1012a7e7bb4eSCyril Chemparathy rte_exit(EXIT_FAILURE, "bad txpkts\n"); 1013a7e7bb4eSCyril Chemparathy } 10147741e4cfSIntel if (!strcmp(lgopts[opt_idx].name, "no-flush-rx")) 10157741e4cfSIntel no_flush_rx = 1; 1016bc202406SDavid Marchand if (!strcmp(lgopts[opt_idx].name, "disable-link-check")) 1017bc202406SDavid Marchand no_link_check = 1; 10187741e4cfSIntel 1019af75078fSIntel break; 1020af75078fSIntel case 'h': 1021af75078fSIntel usage(argv[0]); 1022af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 1023af75078fSIntel break; 1024af75078fSIntel default: 1025af75078fSIntel usage(argv[0]); 1026af75078fSIntel rte_exit(EXIT_FAILURE, 1027af75078fSIntel "Command line is incomplete or incorrect\n"); 1028af75078fSIntel break; 1029af75078fSIntel } 1030af75078fSIntel } 1031af75078fSIntel } 1032