1af75078fSIntel /*- 2af75078fSIntel * BSD LICENSE 3af75078fSIntel * 462d3216dSReshma Pattan * Copyright(c) 2010-2017 Intel Corporation. All rights reserved. 5af75078fSIntel * All rights reserved. 6af75078fSIntel * 7af75078fSIntel * Redistribution and use in source and binary forms, with or without 8af75078fSIntel * modification, are permitted provided that the following conditions 9af75078fSIntel * are met: 10af75078fSIntel * 11af75078fSIntel * * Redistributions of source code must retain the above copyright 12af75078fSIntel * notice, this list of conditions and the following disclaimer. 13af75078fSIntel * * Redistributions in binary form must reproduce the above copyright 14af75078fSIntel * notice, this list of conditions and the following disclaimer in 15af75078fSIntel * the documentation and/or other materials provided with the 16af75078fSIntel * distribution. 17af75078fSIntel * * Neither the name of Intel Corporation nor the names of its 18af75078fSIntel * contributors may be used to endorse or promote products derived 19af75078fSIntel * from this software without specific prior written permission. 20af75078fSIntel * 21af75078fSIntel * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22af75078fSIntel * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23af75078fSIntel * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24af75078fSIntel * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25af75078fSIntel * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26af75078fSIntel * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27af75078fSIntel * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28af75078fSIntel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29af75078fSIntel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30af75078fSIntel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31af75078fSIntel * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32af75078fSIntel */ 33af75078fSIntel 34af75078fSIntel #include <errno.h> 35af75078fSIntel #include <getopt.h> 36af75078fSIntel #include <stdarg.h> 37af75078fSIntel #include <stdio.h> 38af75078fSIntel #include <stdlib.h> 39af75078fSIntel #include <signal.h> 40af75078fSIntel #include <string.h> 41af75078fSIntel #include <time.h> 42af75078fSIntel #include <fcntl.h> 43af75078fSIntel #include <sys/types.h> 44af75078fSIntel 45af75078fSIntel #include <sys/queue.h> 46af75078fSIntel #include <sys/stat.h> 47af75078fSIntel 48af75078fSIntel #include <stdint.h> 49af75078fSIntel #include <unistd.h> 50af75078fSIntel #include <inttypes.h> 51af75078fSIntel 52af75078fSIntel #include <rte_common.h> 53af75078fSIntel #include <rte_byteorder.h> 54af75078fSIntel #include <rte_log.h> 55af75078fSIntel #include <rte_debug.h> 56af75078fSIntel #include <rte_cycles.h> 57af75078fSIntel #include <rte_memory.h> 58af75078fSIntel #include <rte_memzone.h> 59af75078fSIntel #include <rte_launch.h> 60af75078fSIntel #include <rte_eal.h> 61af75078fSIntel #include <rte_per_lcore.h> 62af75078fSIntel #include <rte_lcore.h> 63af75078fSIntel #include <rte_atomic.h> 64af75078fSIntel #include <rte_branch_prediction.h> 65af75078fSIntel #include <rte_mempool.h> 66af75078fSIntel #include <rte_interrupts.h> 67af75078fSIntel #include <rte_pci.h> 68af75078fSIntel #include <rte_ether.h> 69af75078fSIntel #include <rte_ethdev.h> 70af75078fSIntel #include <rte_string_fns.h> 710d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 72af75078fSIntel #include <cmdline_parse.h> 73af75078fSIntel #include <cmdline_parse_etheraddr.h> 740d56cb81SThomas Monjalon #endif 752950a769SDeclan Doherty #ifdef RTE_LIBRTE_PMD_BOND 762950a769SDeclan Doherty #include <rte_eth_bond.h> 772950a769SDeclan Doherty #endif 78938a184aSAdrien Mazarguil #include <rte_flow.h> 79af75078fSIntel 80af75078fSIntel #include "testpmd.h" 81af75078fSIntel 82af75078fSIntel static void 83af75078fSIntel usage(char* progname) 84af75078fSIntel { 850d56cb81SThomas Monjalon printf("usage: %s " 860d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 870d56cb81SThomas Monjalon "[--interactive|-i] " 8881ef862bSAllain Legacy "[--cmdline-file=FILENAME] " 890d56cb81SThomas Monjalon #endif 90ca7feb22SCyril Chemparathy "[--help|-h] | [--auto-start|-a] | [" 91cfea1f30SPablo de Lara "--tx-first | --stats-period=PERIOD | " 92af75078fSIntel "--coremask=COREMASK --portmask=PORTMASK --numa " 93c8798818SIntel "--mbuf-size= | --total-num-mbufs= | " 943be52ffcSIntel "--nb-cores= | --nb-ports= | " 950d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 96af75078fSIntel "--eth-peers-configfile= | " 973be52ffcSIntel "--eth-peer=X,M:M:M:M:M:M | " 980d56cb81SThomas Monjalon #endif 99af75078fSIntel "--pkt-filter-mode= |" 100af75078fSIntel "--rss-ip | --rss-udp | " 101af75078fSIntel "--rxpt= | --rxht= | --rxwt= | --rxfreet= | " 102af75078fSIntel "--txpt= | --txht= | --txwt= | --txfreet= | " 103ce8d5614SIntel "--txrst= | --txqflags= ]\n", 104af75078fSIntel progname); 1050d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1063be52ffcSIntel printf(" --interactive: run in interactive mode.\n"); 10781ef862bSAllain Legacy printf(" --cmdline-file: execute cli commands before startup.\n"); 1080d56cb81SThomas Monjalon #endif 109ca7feb22SCyril Chemparathy printf(" --auto-start: start forwarding on init " 110ca7feb22SCyril Chemparathy "[always when non-interactive].\n"); 1113be52ffcSIntel printf(" --help: display this message and quit.\n"); 11299cabef0SPablo de Lara printf(" --tx-first: start forwarding sending a burst first " 11399cabef0SPablo de Lara "(only if interactive is disabled).\n"); 114cfea1f30SPablo de Lara printf(" --stats-period=PERIOD: statistics will be shown " 115cfea1f30SPablo de Lara "every PERIOD seconds (only if interactive is disabled).\n"); 1163be52ffcSIntel printf(" --nb-cores=N: set the number of forwarding cores " 1173be52ffcSIntel "(1 <= N <= %d).\n", nb_lcores); 1183be52ffcSIntel printf(" --nb-ports=N: set the number of forwarding ports " 1193be52ffcSIntel "(1 <= N <= %d).\n", nb_ports); 120af75078fSIntel printf(" --coremask=COREMASK: hexadecimal bitmask of cores running " 121013af9b6SIntel "the packet forwarding test. The master lcore is reserved for " 1223be52ffcSIntel "command line parsing only, and cannot be masked on for " 1233be52ffcSIntel "packet forwarding.\n"); 124af75078fSIntel printf(" --portmask=PORTMASK: hexadecimal bitmask of ports used " 1253be52ffcSIntel "by the packet forwarding test.\n"); 126af75078fSIntel printf(" --numa: enable NUMA-aware allocation of RX/TX rings and of " 1273be52ffcSIntel "RX memory buffers (mbufs).\n"); 128b6ea6408SIntel printf(" --port-numa-config=(port,socket)[,(port,socket)]: " 129b6ea6408SIntel "specify the socket on which the memory pool " 130b6ea6408SIntel "used by the port will be allocated.\n"); 131b6ea6408SIntel printf(" --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: " 132b6ea6408SIntel "specify the socket on which the TX/RX rings for " 133b6ea6408SIntel "the port will be allocated " 134b6ea6408SIntel "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n"); 135b6ea6408SIntel printf(" --socket-num=N: set socket from which all memory is allocated " 136b6ea6408SIntel "in NUMA mode.\n"); 1373be52ffcSIntel printf(" --mbuf-size=N: set the data size of mbuf to N bytes.\n"); 1383be52ffcSIntel printf(" --total-num-mbufs=N: set the number of mbufs to be allocated " 1393be52ffcSIntel "in mbuf pools.\n"); 1403be52ffcSIntel printf(" --max-pkt-len=N: set the maximum size of packet to N bytes.\n"); 1410d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1423be52ffcSIntel printf(" --eth-peers-configfile=name: config file with ethernet addresses " 1433be52ffcSIntel "of peer ports.\n"); 1443be52ffcSIntel printf(" --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer " 1453be52ffcSIntel "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS); 1460d56cb81SThomas Monjalon #endif 1473be52ffcSIntel printf(" --pkt-filter-mode=N: set Flow Director mode " 1483be52ffcSIntel "(N: none (default mode) or signature or perfect).\n"); 1493be52ffcSIntel printf(" --pkt-filter-report-hash=N: set Flow Director report mode " 1503be52ffcSIntel "(N: none or match (default) or always).\n"); 1513be52ffcSIntel printf(" --pkt-filter-size=N: set Flow Director mode " 1523be52ffcSIntel "(N: 64K (default mode) or 128K or 256K).\n"); 153af75078fSIntel printf(" --pkt-filter-drop-queue=N: set drop-queue. " 1543be52ffcSIntel "In perfect mode, when you add a rule with queue = -1 " 155af75078fSIntel "the packet will be enqueued into the rx drop-queue. " 156af75078fSIntel "If the drop-queue doesn't exist, the packet is dropped. " 1573be52ffcSIntel "By default drop-queue=127.\n"); 15862d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 15962d3216dSReshma Pattan printf(" --latencystats=N: enable latency and jitter statistcs " 16062d3216dSReshma Pattan "monitoring on forwarding lcore id N.\n"); 16162d3216dSReshma Pattan #endif 16279dd163fSJeff Guo printf(" --disable-crc-strip: disable CRC stripping by hardware.\n"); 1634c3ea508SOlivier Matz printf(" --enable-lro: enable large receive offload.\n"); 1643be52ffcSIntel printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n"); 165*912267a3SRaslan Darawsheh printf(" --enable-rx-timestamp: enable rx hardware timestamp offload.\n"); 1663be52ffcSIntel printf(" --disable-hw-vlan: disable hardware vlan.\n"); 167c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-filter: disable hardware vlan filter.\n"); 168c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-strip: disable hardware vlan strip.\n"); 169c9dd4aadSOuyang Changchun printf(" --disable-hw-vlan-extend: disable hardware vlan extend.\n"); 1703be52ffcSIntel printf(" --enable-drop-en: enable per queue packet drop.\n"); 1713be52ffcSIntel printf(" --disable-rss: disable rss.\n"); 172af75078fSIntel printf(" --port-topology=N: set port topology (N: paired (default) or " 1733be52ffcSIntel "chained).\n"); 174769ce6b1SThomas Monjalon printf(" --forward-mode=N: set forwarding mode (N: %s).\n", 175769ce6b1SThomas Monjalon list_pkt_forwarding_modes()); 1763be52ffcSIntel printf(" --rss-ip: set RSS functions to IPv4/IPv6 only .\n"); 1773be52ffcSIntel printf(" --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n"); 1783be52ffcSIntel printf(" --rxq=N: set the number of RX queues per port to N.\n"); 1793be52ffcSIntel printf(" --rxd=N: set the number of descriptors in RX rings to N.\n"); 1803be52ffcSIntel printf(" --txq=N: set the number of TX queues per port to N.\n"); 1813be52ffcSIntel printf(" --txd=N: set the number of descriptors in TX rings to N.\n"); 1823be52ffcSIntel printf(" --burst=N: set the number of packets per burst to N.\n"); 1833be52ffcSIntel printf(" --mbcache=N: set the cache of mbuf memory pool to N.\n"); 18457af3415SPablo de Lara printf(" --rxpt=N: set prefetch threshold register of RX rings to N.\n"); 18557af3415SPablo de Lara printf(" --rxht=N: set the host threshold register of RX rings to N.\n"); 1863be52ffcSIntel printf(" --rxfreet=N: set the free threshold of RX descriptors to N " 1873be52ffcSIntel "(0 <= N < value of rxd).\n"); 18857af3415SPablo de Lara printf(" --rxwt=N: set the write-back threshold register of RX rings to N.\n"); 18957af3415SPablo de Lara printf(" --txpt=N: set the prefetch threshold register of TX rings to N.\n"); 19057af3415SPablo de Lara printf(" --txht=N: set the nhost threshold register of TX rings to N.\n"); 19157af3415SPablo de Lara printf(" --txwt=N: set the write-back threshold register of TX rings to N.\n"); 1923be52ffcSIntel printf(" --txfreet=N: set the transmit free threshold of TX rings to N " 1933be52ffcSIntel "(0 <= N <= value of txd).\n"); 1943be52ffcSIntel printf(" --txrst=N: set the transmit RS bit threshold of TX rings to N " 1953be52ffcSIntel "(0 <= N <= value of txd).\n"); 1963be52ffcSIntel printf(" --txqflags=0xXXXXXXXX: hexadecimal bitmask of TX queue flags " 1973be52ffcSIntel "(0 <= N <= 0x7FFFFFFF).\n"); 1983be52ffcSIntel printf(" --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 199ed30d9b6SIntel "tx queues statistics counters mapping " 2003be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 2013be52ffcSIntel printf(" --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 202ed30d9b6SIntel "rx queues statistics counters mapping " 2033be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 2045e2ee196SIntel printf(" --no-flush-rx: Don't flush RX streams before forwarding." 2055e2ee196SIntel " Used mainly with PCAP drivers.\n"); 2062ebacaa7SMaciej Czekaj printf(" --txpkts=X[,Y]*: set TX segment sizes" 2072ebacaa7SMaciej Czekaj " or total packet length.\n"); 208bc202406SDavid Marchand printf(" --disable-link-check: disable check on link status when " 209bc202406SDavid Marchand "starting/stopping ports.\n"); 2108ea656f8SGaetan Rivet printf(" --no-lsc-interrupt: disable link status change interrupt.\n"); 211e25e6c70SRemy Horton printf(" --no-rmv-interrupt: disable device removal interrupt.\n"); 212e25e6c70SRemy Horton printf(" --bitrate-stats=N: set the logical core N to perform " 213e25e6c70SRemy Horton "bit-rate calculation.\n"); 214b6b63dfdSGaetan Rivet printf(" --print-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: " 215776ecd42SWenzhuo Lu "enable print of designated event or all of them.\n"); 216b6b63dfdSGaetan Rivet printf(" --mask-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: " 217776ecd42SWenzhuo Lu "disable print of designated event or all of them.\n"); 2187ee3e944SVasily Philipov printf(" --flow-isolate-all: " 219776ecd42SWenzhuo Lu "requests flow API isolated mode on all ports at initialization time.\n"); 220af75078fSIntel } 221af75078fSIntel 2220d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 223af75078fSIntel static int 224af75078fSIntel init_peer_eth_addrs(char *config_filename) 225af75078fSIntel { 226af75078fSIntel FILE *config_file; 227af75078fSIntel portid_t i; 228af75078fSIntel char buf[50]; 229af75078fSIntel 230af75078fSIntel config_file = fopen(config_filename, "r"); 231af75078fSIntel if (config_file == NULL) { 2323be52ffcSIntel perror("Failed to open eth config file\n"); 233af75078fSIntel return -1; 234af75078fSIntel } 235af75078fSIntel 236af75078fSIntel for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 237af75078fSIntel 238af75078fSIntel if (fgets(buf, sizeof(buf), config_file) == NULL) 239af75078fSIntel break; 240af75078fSIntel 241aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i], 242aaa662e7SAlan Carew sizeof(peer_eth_addrs[i])) < 0) { 2433be52ffcSIntel printf("Bad MAC address format on line %d\n", i+1); 244af75078fSIntel fclose(config_file); 245af75078fSIntel return -1; 246af75078fSIntel } 247af75078fSIntel } 248af75078fSIntel fclose(config_file); 249af75078fSIntel nb_peer_eth_addrs = (portid_t) i; 250af75078fSIntel return 0; 251af75078fSIntel } 2520d56cb81SThomas Monjalon #endif 253af75078fSIntel 254af75078fSIntel /* 255af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 256af75078fSIntel * the global configuration of forwarding cores. 257af75078fSIntel */ 258af75078fSIntel static void 259af75078fSIntel parse_fwd_coremask(const char *coremask) 260af75078fSIntel { 261af75078fSIntel char *end; 262af75078fSIntel unsigned long long int cm; 263af75078fSIntel 264af75078fSIntel /* parse hexadecimal string */ 265af75078fSIntel end = NULL; 266af75078fSIntel cm = strtoull(coremask, &end, 16); 267af75078fSIntel if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0')) 268af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n"); 269013af9b6SIntel else if (set_fwd_lcores_mask((uint64_t) cm) < 0) 270013af9b6SIntel rte_exit(EXIT_FAILURE, "coremask is not valid\n"); 271af75078fSIntel } 272af75078fSIntel 273af75078fSIntel /* 274af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 275af75078fSIntel * the global configuration of forwarding cores. 276af75078fSIntel */ 277af75078fSIntel static void 278af75078fSIntel parse_fwd_portmask(const char *portmask) 279af75078fSIntel { 280af75078fSIntel char *end; 281af75078fSIntel unsigned long long int pm; 282af75078fSIntel 283af75078fSIntel /* parse hexadecimal string */ 284af75078fSIntel end = NULL; 285af75078fSIntel pm = strtoull(portmask, &end, 16); 286af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 287af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n"); 288af75078fSIntel else 289af75078fSIntel set_fwd_ports_mask((uint64_t) pm); 290af75078fSIntel } 291af75078fSIntel 292ed30d9b6SIntel 293ed30d9b6SIntel static int 294ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx) 295ed30d9b6SIntel { 296ed30d9b6SIntel char s[256]; 297ed30d9b6SIntel const char *p, *p0 = q_arg; 298ed30d9b6SIntel char *end; 299ed30d9b6SIntel enum fieldnames { 300ed30d9b6SIntel FLD_PORT = 0, 301ed30d9b6SIntel FLD_QUEUE, 302ed30d9b6SIntel FLD_STATS_COUNTER, 303ed30d9b6SIntel _NUM_FLD 304ed30d9b6SIntel }; 305ed30d9b6SIntel unsigned long int_fld[_NUM_FLD]; 306ed30d9b6SIntel char *str_fld[_NUM_FLD]; 307ed30d9b6SIntel int i; 308ed30d9b6SIntel unsigned size; 309ed30d9b6SIntel 310ed30d9b6SIntel /* reset from value set at definition */ 311ed30d9b6SIntel is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0); 312ed30d9b6SIntel 313ed30d9b6SIntel while ((p = strchr(p0,'(')) != NULL) { 314ed30d9b6SIntel ++p; 315ed30d9b6SIntel if((p0 = strchr(p,')')) == NULL) 316ed30d9b6SIntel return -1; 317ed30d9b6SIntel 318ed30d9b6SIntel size = p0 - p; 319ed30d9b6SIntel if(size >= sizeof(s)) 320ed30d9b6SIntel return -1; 321ed30d9b6SIntel 3226f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 323ed30d9b6SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 324ed30d9b6SIntel return -1; 325ed30d9b6SIntel for (i = 0; i < _NUM_FLD; i++){ 326ed30d9b6SIntel errno = 0; 327ed30d9b6SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 328ed30d9b6SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 329ed30d9b6SIntel return -1; 330ed30d9b6SIntel } 331ed30d9b6SIntel /* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */ 332ed30d9b6SIntel if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) { 333ed30d9b6SIntel printf("Stats counter not in the correct range 0..%d\n", 334ed30d9b6SIntel RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 335ed30d9b6SIntel return -1; 336ed30d9b6SIntel } 337ed30d9b6SIntel 3384dccdc78SBruce Richardson if (!is_rx) { 3394dccdc78SBruce Richardson if ((nb_tx_queue_stats_mappings >= 3404dccdc78SBruce Richardson MAX_TX_QUEUE_STATS_MAPPINGS)) { 3414dccdc78SBruce Richardson printf("exceeded max number of TX queue " 3424dccdc78SBruce Richardson "statistics mappings: %hu\n", 3434dccdc78SBruce Richardson nb_tx_queue_stats_mappings); 344ed30d9b6SIntel return -1; 345ed30d9b6SIntel } 346ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id = 347ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 348ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id = 349ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 350ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id = 351ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 352ed30d9b6SIntel ++nb_tx_queue_stats_mappings; 353ed30d9b6SIntel } 354ed30d9b6SIntel else { 3554dccdc78SBruce Richardson if ((nb_rx_queue_stats_mappings >= 3564dccdc78SBruce Richardson MAX_RX_QUEUE_STATS_MAPPINGS)) { 3574dccdc78SBruce Richardson printf("exceeded max number of RX queue " 3584dccdc78SBruce Richardson "statistics mappings: %hu\n", 3594dccdc78SBruce Richardson nb_rx_queue_stats_mappings); 3604dccdc78SBruce Richardson return -1; 3614dccdc78SBruce Richardson } 362ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id = 363ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 364ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id = 365ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 366ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id = 367ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 368ed30d9b6SIntel ++nb_rx_queue_stats_mappings; 369ed30d9b6SIntel } 370ed30d9b6SIntel 371ed30d9b6SIntel } 372ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */ 373ed30d9b6SIntel /* than to the default array (that was set at its definition) */ 374ed30d9b6SIntel is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) : 375ed30d9b6SIntel (tx_queue_stats_mappings = tx_queue_stats_mappings_array); 376ed30d9b6SIntel return 0; 377ed30d9b6SIntel } 378ed30d9b6SIntel 379c9cafcc8SShahaf Shuler static void 380c9cafcc8SShahaf Shuler print_invalid_socket_id_error(void) 381c9cafcc8SShahaf Shuler { 382c9cafcc8SShahaf Shuler unsigned int i = 0; 383c9cafcc8SShahaf Shuler 384c9cafcc8SShahaf Shuler printf("Invalid socket id, options are: "); 385c9cafcc8SShahaf Shuler for (i = 0; i < num_sockets; i++) { 386c9cafcc8SShahaf Shuler printf("%u%s", socket_ids[i], 387c9cafcc8SShahaf Shuler (i == num_sockets - 1) ? "\n" : ","); 388c9cafcc8SShahaf Shuler } 389c9cafcc8SShahaf Shuler } 390c9cafcc8SShahaf Shuler 391b6ea6408SIntel static int 392b6ea6408SIntel parse_portnuma_config(const char *q_arg) 393b6ea6408SIntel { 394b6ea6408SIntel char s[256]; 395b6ea6408SIntel const char *p, *p0 = q_arg; 396b6ea6408SIntel char *end; 397d1f1a0fdSLi Han uint8_t i, socket_id; 398d1f1a0fdSLi Han portid_t port_id; 399b6ea6408SIntel unsigned size; 400b6ea6408SIntel enum fieldnames { 401b6ea6408SIntel FLD_PORT = 0, 402b6ea6408SIntel FLD_SOCKET, 403b6ea6408SIntel _NUM_FLD 404b6ea6408SIntel }; 405b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 406b6ea6408SIntel char *str_fld[_NUM_FLD]; 407edab33b1STetsuya Mukawa portid_t pid; 408b6ea6408SIntel 409b6ea6408SIntel /* reset from value set at definition */ 410b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 411b6ea6408SIntel ++p; 412b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 413b6ea6408SIntel return -1; 414b6ea6408SIntel 415b6ea6408SIntel size = p0 - p; 416b6ea6408SIntel if(size >= sizeof(s)) 417b6ea6408SIntel return -1; 418b6ea6408SIntel 4196f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 420b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 421b6ea6408SIntel return -1; 422b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 423b6ea6408SIntel errno = 0; 424b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 425b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 426b6ea6408SIntel return -1; 427b6ea6408SIntel } 428d1f1a0fdSLi Han port_id = (portid_t)int_fld[FLD_PORT]; 429d1f1a0fdSLi Han if (port_id_is_invalid(port_id, ENABLED_WARN) || 430d1f1a0fdSLi Han port_id == (portid_t)RTE_PORT_ALL) { 431edab33b1STetsuya Mukawa printf("Valid port range is [0"); 4327d89b261SGaetan Rivet RTE_ETH_FOREACH_DEV(pid) 433edab33b1STetsuya Mukawa printf(", %d", pid); 434edab33b1STetsuya Mukawa printf("]\n"); 435b6ea6408SIntel return -1; 436b6ea6408SIntel } 437b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 438c9cafcc8SShahaf Shuler if (new_socket_id(socket_id)) { 439c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 440b6ea6408SIntel return -1; 441b6ea6408SIntel } 442b6ea6408SIntel port_numa[port_id] = socket_id; 443b6ea6408SIntel } 444b6ea6408SIntel 445b6ea6408SIntel return 0; 446b6ea6408SIntel } 447b6ea6408SIntel 448b6ea6408SIntel static int 449b6ea6408SIntel parse_ringnuma_config(const char *q_arg) 450b6ea6408SIntel { 451b6ea6408SIntel char s[256]; 452b6ea6408SIntel const char *p, *p0 = q_arg; 453b6ea6408SIntel char *end; 454d1f1a0fdSLi Han uint8_t i, ring_flag, socket_id; 455d1f1a0fdSLi Han portid_t port_id; 456b6ea6408SIntel unsigned size; 457b6ea6408SIntel enum fieldnames { 458b6ea6408SIntel FLD_PORT = 0, 459b6ea6408SIntel FLD_FLAG, 460b6ea6408SIntel FLD_SOCKET, 461b6ea6408SIntel _NUM_FLD 462b6ea6408SIntel }; 463b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 464b6ea6408SIntel char *str_fld[_NUM_FLD]; 465edab33b1STetsuya Mukawa portid_t pid; 466b6ea6408SIntel #define RX_RING_ONLY 0x1 467b6ea6408SIntel #define TX_RING_ONLY 0x2 468b6ea6408SIntel #define RXTX_RING 0x3 469b6ea6408SIntel 470b6ea6408SIntel /* reset from value set at definition */ 471b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 472b6ea6408SIntel ++p; 473b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 474b6ea6408SIntel return -1; 475b6ea6408SIntel 476b6ea6408SIntel size = p0 - p; 477b6ea6408SIntel if(size >= sizeof(s)) 478b6ea6408SIntel return -1; 479b6ea6408SIntel 4806f41fe75SStephen Hemminger snprintf(s, sizeof(s), "%.*s", size, p); 481b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 482b6ea6408SIntel return -1; 483b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 484b6ea6408SIntel errno = 0; 485b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 486b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 487b6ea6408SIntel return -1; 488b6ea6408SIntel } 489d1f1a0fdSLi Han port_id = (portid_t)int_fld[FLD_PORT]; 490d1f1a0fdSLi Han if (port_id_is_invalid(port_id, ENABLED_WARN) || 491d1f1a0fdSLi Han port_id == (portid_t)RTE_PORT_ALL) { 492edab33b1STetsuya Mukawa printf("Valid port range is [0"); 4937d89b261SGaetan Rivet RTE_ETH_FOREACH_DEV(pid) 494edab33b1STetsuya Mukawa printf(", %d", pid); 495edab33b1STetsuya Mukawa printf("]\n"); 496b6ea6408SIntel return -1; 497b6ea6408SIntel } 498b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 499c9cafcc8SShahaf Shuler if (new_socket_id(socket_id)) { 500c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 501b6ea6408SIntel return -1; 502b6ea6408SIntel } 503b6ea6408SIntel ring_flag = (uint8_t)int_fld[FLD_FLAG]; 504b6ea6408SIntel if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) { 505b6ea6408SIntel printf("Invalid ring-flag=%d config for port =%d\n", 506b6ea6408SIntel ring_flag,port_id); 507b6ea6408SIntel return -1; 508b6ea6408SIntel } 509b6ea6408SIntel 510b6ea6408SIntel switch (ring_flag & RXTX_RING) { 511b6ea6408SIntel case RX_RING_ONLY: 512b6ea6408SIntel rxring_numa[port_id] = socket_id; 513b6ea6408SIntel break; 514b6ea6408SIntel case TX_RING_ONLY: 515b6ea6408SIntel txring_numa[port_id] = socket_id; 516b6ea6408SIntel break; 517b6ea6408SIntel case RXTX_RING: 518b6ea6408SIntel rxring_numa[port_id] = socket_id; 519b6ea6408SIntel txring_numa[port_id] = socket_id; 520b6ea6408SIntel break; 521b6ea6408SIntel default: 522b6ea6408SIntel printf("Invalid ring-flag=%d config for port=%d\n", 523b6ea6408SIntel ring_flag,port_id); 524b6ea6408SIntel break; 525b6ea6408SIntel } 526b6ea6408SIntel } 527b6ea6408SIntel 528b6ea6408SIntel return 0; 529b6ea6408SIntel } 530ed30d9b6SIntel 5313af72783SGaetan Rivet static int 5323af72783SGaetan Rivet parse_event_printing_config(const char *optarg, int enable) 5333af72783SGaetan Rivet { 5343af72783SGaetan Rivet uint32_t mask = 0; 5353af72783SGaetan Rivet 5363af72783SGaetan Rivet if (!strcmp(optarg, "unknown")) 5373af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_UNKNOWN; 5383af72783SGaetan Rivet else if (!strcmp(optarg, "intr_lsc")) 5393af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_LSC; 5403af72783SGaetan Rivet else if (!strcmp(optarg, "queue_state")) 5413af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_QUEUE_STATE; 5423af72783SGaetan Rivet else if (!strcmp(optarg, "intr_reset")) 5433af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RESET; 5443af72783SGaetan Rivet else if (!strcmp(optarg, "vf_mbox")) 5453af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_VF_MBOX; 5463af72783SGaetan Rivet else if (!strcmp(optarg, "macsec")) 5473af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_MACSEC; 5483af72783SGaetan Rivet else if (!strcmp(optarg, "intr_rmv")) 5493af72783SGaetan Rivet mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RMV; 550b6b63dfdSGaetan Rivet else if (!strcmp(optarg, "all")) 551b6b63dfdSGaetan Rivet mask = ~UINT32_C(0); 5523af72783SGaetan Rivet else { 5533af72783SGaetan Rivet fprintf(stderr, "Invalid event: %s\n", optarg); 5543af72783SGaetan Rivet return -1; 5553af72783SGaetan Rivet } 5563af72783SGaetan Rivet if (enable) 5573af72783SGaetan Rivet event_print_mask |= mask; 5583af72783SGaetan Rivet else 5593af72783SGaetan Rivet event_print_mask &= ~mask; 5603af72783SGaetan Rivet return 0; 5613af72783SGaetan Rivet } 5623af72783SGaetan Rivet 563af75078fSIntel void 564af75078fSIntel launch_args_parse(int argc, char** argv) 565af75078fSIntel { 566af75078fSIntel int n, opt; 567af75078fSIntel char **argvopt; 568af75078fSIntel int opt_idx; 569013af9b6SIntel enum { TX, RX }; 570013af9b6SIntel 571af75078fSIntel static struct option lgopts[] = { 572af75078fSIntel { "help", 0, 0, 0 }, 5730d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 574af75078fSIntel { "interactive", 0, 0, 0 }, 57581ef862bSAllain Legacy { "cmdline-file", 1, 0, 0 }, 576ca7feb22SCyril Chemparathy { "auto-start", 0, 0, 0 }, 577af75078fSIntel { "eth-peers-configfile", 1, 0, 0 }, 578af75078fSIntel { "eth-peer", 1, 0, 0 }, 5790d56cb81SThomas Monjalon #endif 58099cabef0SPablo de Lara { "tx-first", 0, 0, 0 }, 581cfea1f30SPablo de Lara { "stats-period", 1, 0, 0 }, 582af75078fSIntel { "ports", 1, 0, 0 }, 583af75078fSIntel { "nb-cores", 1, 0, 0 }, 584af75078fSIntel { "nb-ports", 1, 0, 0 }, 585af75078fSIntel { "coremask", 1, 0, 0 }, 586af75078fSIntel { "portmask", 1, 0, 0 }, 587af75078fSIntel { "numa", 0, 0, 0 }, 588999b2ee0SBruce Richardson { "no-numa", 0, 0, 0 }, 589148f963fSBruce Richardson { "mp-anon", 0, 0, 0 }, 590b6ea6408SIntel { "port-numa-config", 1, 0, 0 }, 591b6ea6408SIntel { "ring-numa-config", 1, 0, 0 }, 592b6ea6408SIntel { "socket-num", 1, 0, 0 }, 593af75078fSIntel { "mbuf-size", 1, 0, 0 }, 594c8798818SIntel { "total-num-mbufs", 1, 0, 0 }, 595af75078fSIntel { "max-pkt-len", 1, 0, 0 }, 596af75078fSIntel { "pkt-filter-mode", 1, 0, 0 }, 597af75078fSIntel { "pkt-filter-report-hash", 1, 0, 0 }, 598af75078fSIntel { "pkt-filter-size", 1, 0, 0 }, 599af75078fSIntel { "pkt-filter-drop-queue", 1, 0, 0 }, 60062d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 60162d3216dSReshma Pattan { "latencystats", 1, 0, 0 }, 60262d3216dSReshma Pattan #endif 603e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE 604e25e6c70SRemy Horton { "bitrate-stats", 1, 0, 0 }, 605e25e6c70SRemy Horton #endif 60679dd163fSJeff Guo { "disable-crc-strip", 0, 0, 0 }, 6074c3ea508SOlivier Matz { "enable-lro", 0, 0, 0 }, 608013af9b6SIntel { "enable-rx-cksum", 0, 0, 0 }, 609*912267a3SRaslan Darawsheh { "enable-rx-timestamp", 0, 0, 0 }, 61004997938SMaciej Czekaj { "enable-scatter", 0, 0, 0 }, 611af75078fSIntel { "disable-hw-vlan", 0, 0, 0 }, 612c9dd4aadSOuyang Changchun { "disable-hw-vlan-filter", 0, 0, 0 }, 613c9dd4aadSOuyang Changchun { "disable-hw-vlan-strip", 0, 0, 0 }, 614c9dd4aadSOuyang Changchun { "disable-hw-vlan-extend", 0, 0, 0 }, 615013af9b6SIntel { "enable-drop-en", 0, 0, 0 }, 616af75078fSIntel { "disable-rss", 0, 0, 0 }, 617af75078fSIntel { "port-topology", 1, 0, 0 }, 618ce9b9fb0SCyril Chemparathy { "forward-mode", 1, 0, 0 }, 619af75078fSIntel { "rss-ip", 0, 0, 0 }, 620af75078fSIntel { "rss-udp", 0, 0, 0 }, 621af75078fSIntel { "rxq", 1, 0, 0 }, 622af75078fSIntel { "txq", 1, 0, 0 }, 623af75078fSIntel { "rxd", 1, 0, 0 }, 624af75078fSIntel { "txd", 1, 0, 0 }, 625af75078fSIntel { "burst", 1, 0, 0 }, 626af75078fSIntel { "mbcache", 1, 0, 0 }, 627af75078fSIntel { "txpt", 1, 0, 0 }, 628af75078fSIntel { "txht", 1, 0, 0 }, 629af75078fSIntel { "txwt", 1, 0, 0 }, 630af75078fSIntel { "txfreet", 1, 0, 0 }, 631af75078fSIntel { "txrst", 1, 0, 0 }, 632ce8d5614SIntel { "txqflags", 1, 0, 0 }, 633af75078fSIntel { "rxpt", 1, 0, 0 }, 634af75078fSIntel { "rxht", 1, 0, 0 }, 635af75078fSIntel { "rxwt", 1, 0, 0 }, 636af75078fSIntel { "rxfreet", 1, 0, 0 }, 637ed30d9b6SIntel { "tx-queue-stats-mapping", 1, 0, 0 }, 638ed30d9b6SIntel { "rx-queue-stats-mapping", 1, 0, 0 }, 6397741e4cfSIntel { "no-flush-rx", 0, 0, 0 }, 6407ee3e944SVasily Philipov { "flow-isolate-all", 0, 0, 0 }, 641a7e7bb4eSCyril Chemparathy { "txpkts", 1, 0, 0 }, 642bc202406SDavid Marchand { "disable-link-check", 0, 0, 0 }, 6438ea656f8SGaetan Rivet { "no-lsc-interrupt", 0, 0, 0 }, 644284c908cSGaetan Rivet { "no-rmv-interrupt", 0, 0, 0 }, 6453af72783SGaetan Rivet { "print-event", 1, 0, 0 }, 6463af72783SGaetan Rivet { "mask-event", 1, 0, 0 }, 647af75078fSIntel { 0, 0, 0, 0 }, 648af75078fSIntel }; 649af75078fSIntel 650af75078fSIntel argvopt = argv; 651af75078fSIntel 6520d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 653ca7feb22SCyril Chemparathy #define SHORTOPTS "i" 6540d56cb81SThomas Monjalon #else 655ca7feb22SCyril Chemparathy #define SHORTOPTS "" 6560d56cb81SThomas Monjalon #endif 657ca7feb22SCyril Chemparathy while ((opt = getopt_long(argc, argvopt, SHORTOPTS "ah", 658af75078fSIntel lgopts, &opt_idx)) != EOF) { 659af75078fSIntel switch (opt) { 6600d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 661af75078fSIntel case 'i': 662af75078fSIntel printf("Interactive-mode selected\n"); 663af75078fSIntel interactive = 1; 664af75078fSIntel break; 6650d56cb81SThomas Monjalon #endif 666ca7feb22SCyril Chemparathy case 'a': 667ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 668ca7feb22SCyril Chemparathy auto_start = 1; 669ca7feb22SCyril Chemparathy break; 670ca7feb22SCyril Chemparathy 671af75078fSIntel case 0: /*long options */ 672af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "help")) { 673af75078fSIntel usage(argv[0]); 674af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 675af75078fSIntel } 6760d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 677af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "interactive")) { 678af75078fSIntel printf("Interactive-mode selected\n"); 679af75078fSIntel interactive = 1; 680af75078fSIntel } 68181ef862bSAllain Legacy if (!strcmp(lgopts[opt_idx].name, "cmdline-file")) { 68281ef862bSAllain Legacy printf("CLI commands to be read from %s\n", 68381ef862bSAllain Legacy optarg); 68481ef862bSAllain Legacy snprintf(cmdline_filename, 68581ef862bSAllain Legacy sizeof(cmdline_filename), "%s", 68681ef862bSAllain Legacy optarg); 68781ef862bSAllain Legacy } 688ca7feb22SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "auto-start")) { 689ca7feb22SCyril Chemparathy printf("Auto-start selected\n"); 690ca7feb22SCyril Chemparathy auto_start = 1; 691ca7feb22SCyril Chemparathy } 69299cabef0SPablo de Lara if (!strcmp(lgopts[opt_idx].name, "tx-first")) { 69399cabef0SPablo de Lara printf("Ports to start sending a burst of " 69499cabef0SPablo de Lara "packets first\n"); 69599cabef0SPablo de Lara tx_first = 1; 69699cabef0SPablo de Lara } 697cfea1f30SPablo de Lara if (!strcmp(lgopts[opt_idx].name, "stats-period")) { 698cfea1f30SPablo de Lara char *end = NULL; 699cfea1f30SPablo de Lara unsigned int n; 700cfea1f30SPablo de Lara 701cfea1f30SPablo de Lara n = strtoul(optarg, &end, 10); 702cfea1f30SPablo de Lara if ((optarg[0] == '\0') || (end == NULL) || 703cfea1f30SPablo de Lara (*end != '\0')) 704cfea1f30SPablo de Lara break; 705cfea1f30SPablo de Lara 706cfea1f30SPablo de Lara stats_period = n; 707cfea1f30SPablo de Lara break; 708cfea1f30SPablo de Lara } 709af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 710af75078fSIntel "eth-peers-configfile")) { 711af75078fSIntel if (init_peer_eth_addrs(optarg) != 0) 712af75078fSIntel rte_exit(EXIT_FAILURE, 713af75078fSIntel "Cannot open logfile\n"); 714af75078fSIntel } 715af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "eth-peer")) { 716af75078fSIntel char *port_end; 717af75078fSIntel uint8_t c, peer_addr[6]; 718af75078fSIntel 719af75078fSIntel errno = 0; 720af75078fSIntel n = strtoul(optarg, &port_end, 10); 721af75078fSIntel if (errno != 0 || port_end == optarg || *port_end++ != ',') 722af75078fSIntel rte_exit(EXIT_FAILURE, 723af75078fSIntel "Invalid eth-peer: %s", optarg); 724af75078fSIntel if (n >= RTE_MAX_ETHPORTS) 725af75078fSIntel rte_exit(EXIT_FAILURE, 726af75078fSIntel "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n", 727af75078fSIntel n, RTE_MAX_ETHPORTS); 728af75078fSIntel 729aaa662e7SAlan Carew if (cmdline_parse_etheraddr(NULL, port_end, 730aaa662e7SAlan Carew &peer_addr, sizeof(peer_addr)) < 0) 731af75078fSIntel rte_exit(EXIT_FAILURE, 732af75078fSIntel "Invalid ethernet address: %s\n", 733af75078fSIntel port_end); 734af75078fSIntel for (c = 0; c < 6; c++) 735af75078fSIntel peer_eth_addrs[n].addr_bytes[c] = 736af75078fSIntel peer_addr[c]; 737af75078fSIntel nb_peer_eth_addrs++; 738af75078fSIntel } 7390d56cb81SThomas Monjalon #endif 740af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-ports")) { 741af75078fSIntel n = atoi(optarg); 7420a530f0dSYong Liu if (n > 0 && n <= nb_ports) 743f8244c63SZhiyong Yang nb_fwd_ports = n; 744af75078fSIntel else 745af75078fSIntel rte_exit(EXIT_FAILURE, 746edab33b1STetsuya Mukawa "Invalid port %d\n", n); 747af75078fSIntel } 748af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-cores")) { 749af75078fSIntel n = atoi(optarg); 750af75078fSIntel if (n > 0 && n <= nb_lcores) 751af75078fSIntel nb_fwd_lcores = (uint8_t) n; 752af75078fSIntel else 753af75078fSIntel rte_exit(EXIT_FAILURE, 754af75078fSIntel "nb-cores should be > 0 and <= %d\n", 755af75078fSIntel nb_lcores); 756af75078fSIntel } 757af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "coremask")) 758af75078fSIntel parse_fwd_coremask(optarg); 759af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "portmask")) 760af75078fSIntel parse_fwd_portmask(optarg); 761999b2ee0SBruce Richardson if (!strcmp(lgopts[opt_idx].name, "no-numa")) 762999b2ee0SBruce Richardson numa_support = 0; 763487f9a59SYulong Pei if (!strcmp(lgopts[opt_idx].name, "numa")) 764af75078fSIntel numa_support = 1; 765148f963fSBruce Richardson if (!strcmp(lgopts[opt_idx].name, "mp-anon")) { 766148f963fSBruce Richardson mp_anon = 1; 767148f963fSBruce Richardson } 768b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) { 769b6ea6408SIntel if (parse_portnuma_config(optarg)) 770b6ea6408SIntel rte_exit(EXIT_FAILURE, 771b6ea6408SIntel "invalid port-numa configuration\n"); 772b6ea6408SIntel } 773b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "ring-numa-config")) 774b6ea6408SIntel if (parse_ringnuma_config(optarg)) 775b6ea6408SIntel rte_exit(EXIT_FAILURE, 776b6ea6408SIntel "invalid ring-numa configuration\n"); 777b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "socket-num")) { 778b6ea6408SIntel n = atoi(optarg); 779c9cafcc8SShahaf Shuler if (!new_socket_id((uint8_t)n)) { 780b6ea6408SIntel socket_num = (uint8_t)n; 781c9cafcc8SShahaf Shuler } else { 782c9cafcc8SShahaf Shuler print_invalid_socket_id_error(); 783b6ea6408SIntel rte_exit(EXIT_FAILURE, 784c9cafcc8SShahaf Shuler "Invalid socket id"); 785c9cafcc8SShahaf Shuler } 786b6ea6408SIntel } 787af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) { 788af75078fSIntel n = atoi(optarg); 789af75078fSIntel if (n > 0 && n <= 0xFFFF) 790af75078fSIntel mbuf_data_size = (uint16_t) n; 791af75078fSIntel else 792af75078fSIntel rte_exit(EXIT_FAILURE, 793af75078fSIntel "mbuf-size should be > 0 and < 65536\n"); 794af75078fSIntel } 795c8798818SIntel if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) { 796c8798818SIntel n = atoi(optarg); 797c8798818SIntel if (n > 1024) 798c8798818SIntel param_total_num_mbufs = (unsigned)n; 799c8798818SIntel else 800c8798818SIntel rte_exit(EXIT_FAILURE, 801c8798818SIntel "total-num-mbufs should be > 1024\n"); 802c8798818SIntel } 803af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) { 804af75078fSIntel n = atoi(optarg); 805af75078fSIntel if (n >= ETHER_MIN_LEN) { 806af75078fSIntel rx_mode.max_rx_pkt_len = (uint32_t) n; 807af75078fSIntel if (n > ETHER_MAX_LEN) 808af75078fSIntel rx_mode.jumbo_frame = 1; 809af75078fSIntel } else 810af75078fSIntel rte_exit(EXIT_FAILURE, 811af75078fSIntel "Invalid max-pkt-len=%d - should be > %d\n", 812af75078fSIntel n, ETHER_MIN_LEN); 813af75078fSIntel } 814af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) { 815af75078fSIntel if (!strcmp(optarg, "signature")) 816af75078fSIntel fdir_conf.mode = 817af75078fSIntel RTE_FDIR_MODE_SIGNATURE; 818af75078fSIntel else if (!strcmp(optarg, "perfect")) 819af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_PERFECT; 8209276b982SWenzhuo Lu else if (!strcmp(optarg, "perfect-mac-vlan")) 8219276b982SWenzhuo Lu fdir_conf.mode = RTE_FDIR_MODE_PERFECT_MAC_VLAN; 8229276b982SWenzhuo Lu else if (!strcmp(optarg, "perfect-tunnel")) 8239276b982SWenzhuo Lu fdir_conf.mode = RTE_FDIR_MODE_PERFECT_TUNNEL; 824af75078fSIntel else if (!strcmp(optarg, "none")) 825af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_NONE; 826af75078fSIntel else 827af75078fSIntel rte_exit(EXIT_FAILURE, 828af75078fSIntel "pkt-mode-invalid %s invalid - must be: " 8299276b982SWenzhuo Lu "none, signature, perfect, perfect-mac-vlan" 8309276b982SWenzhuo Lu " or perfect-tunnel\n", 831af75078fSIntel optarg); 832af75078fSIntel } 833af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 834af75078fSIntel "pkt-filter-report-hash")) { 835af75078fSIntel if (!strcmp(optarg, "none")) 836af75078fSIntel fdir_conf.status = 837af75078fSIntel RTE_FDIR_NO_REPORT_STATUS; 838af75078fSIntel else if (!strcmp(optarg, "match")) 839af75078fSIntel fdir_conf.status = 840af75078fSIntel RTE_FDIR_REPORT_STATUS; 841af75078fSIntel else if (!strcmp(optarg, "always")) 842af75078fSIntel fdir_conf.status = 843af75078fSIntel RTE_FDIR_REPORT_STATUS_ALWAYS; 844af75078fSIntel else 845af75078fSIntel rte_exit(EXIT_FAILURE, 846af75078fSIntel "pkt-filter-report-hash %s invalid " 847af75078fSIntel "- must be: none or match or always\n", 848af75078fSIntel optarg); 849af75078fSIntel } 850af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) { 851af75078fSIntel if (!strcmp(optarg, "64K")) 852af75078fSIntel fdir_conf.pballoc = 853af75078fSIntel RTE_FDIR_PBALLOC_64K; 854af75078fSIntel else if (!strcmp(optarg, "128K")) 855af75078fSIntel fdir_conf.pballoc = 856af75078fSIntel RTE_FDIR_PBALLOC_128K; 857af75078fSIntel else if (!strcmp(optarg, "256K")) 858af75078fSIntel fdir_conf.pballoc = 859af75078fSIntel RTE_FDIR_PBALLOC_256K; 860af75078fSIntel else 861af75078fSIntel rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -" 862af75078fSIntel " must be: 64K or 128K or 256K\n", 863af75078fSIntel optarg); 864af75078fSIntel } 865af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 866af75078fSIntel "pkt-filter-drop-queue")) { 867af75078fSIntel n = atoi(optarg); 868af75078fSIntel if (n >= 0) 869af75078fSIntel fdir_conf.drop_queue = (uint8_t) n; 870af75078fSIntel else 871af75078fSIntel rte_exit(EXIT_FAILURE, 872af75078fSIntel "drop queue %d invalid - must" 873af75078fSIntel "be >= 0 \n", n); 874af75078fSIntel } 87562d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS 87662d3216dSReshma Pattan if (!strcmp(lgopts[opt_idx].name, 87762d3216dSReshma Pattan "latencystats")) { 87862d3216dSReshma Pattan n = atoi(optarg); 87962d3216dSReshma Pattan if (n >= 0) { 88062d3216dSReshma Pattan latencystats_lcore_id = (lcoreid_t) n; 88162d3216dSReshma Pattan latencystats_enabled = 1; 88262d3216dSReshma Pattan } else 88362d3216dSReshma Pattan rte_exit(EXIT_FAILURE, 88462d3216dSReshma Pattan "invalid lcore id %d for latencystats" 88562d3216dSReshma Pattan " must be >= 0\n", n); 88662d3216dSReshma Pattan } 88762d3216dSReshma Pattan #endif 888e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE 889e25e6c70SRemy Horton if (!strcmp(lgopts[opt_idx].name, "bitrate-stats")) { 890e25e6c70SRemy Horton n = atoi(optarg); 891e25e6c70SRemy Horton if (n >= 0) { 892e25e6c70SRemy Horton bitrate_lcore_id = (lcoreid_t) n; 893e25e6c70SRemy Horton bitrate_enabled = 1; 894e25e6c70SRemy Horton } else 895e25e6c70SRemy Horton rte_exit(EXIT_FAILURE, 896e25e6c70SRemy Horton "invalid lcore id %d for bitrate stats" 897e25e6c70SRemy Horton " must be >= 0\n", n); 898e25e6c70SRemy Horton } 899e25e6c70SRemy Horton #endif 90079dd163fSJeff Guo if (!strcmp(lgopts[opt_idx].name, "disable-crc-strip")) 90179dd163fSJeff Guo rx_mode.hw_strip_crc = 0; 9024c3ea508SOlivier Matz if (!strcmp(lgopts[opt_idx].name, "enable-lro")) 9034c3ea508SOlivier Matz rx_mode.enable_lro = 1; 90404997938SMaciej Czekaj if (!strcmp(lgopts[opt_idx].name, "enable-scatter")) 90504997938SMaciej Czekaj rx_mode.enable_scatter = 1; 906af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum")) 907af75078fSIntel rx_mode.hw_ip_checksum = 1; 908*912267a3SRaslan Darawsheh if (!strcmp(lgopts[opt_idx].name, 909*912267a3SRaslan Darawsheh "enable-rx-timestamp")) 910*912267a3SRaslan Darawsheh rx_mode.hw_timestamp = 1; 911a47aa8b9SIntel 912a47aa8b9SIntel if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) { 913af75078fSIntel rx_mode.hw_vlan_filter = 0; 914a47aa8b9SIntel rx_mode.hw_vlan_strip = 0; 915a47aa8b9SIntel rx_mode.hw_vlan_extend = 0; 916a47aa8b9SIntel } 917a47aa8b9SIntel 918c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 919c9dd4aadSOuyang Changchun "disable-hw-vlan-filter")) 920c9dd4aadSOuyang Changchun rx_mode.hw_vlan_filter = 0; 921c9dd4aadSOuyang Changchun 922c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 923c9dd4aadSOuyang Changchun "disable-hw-vlan-strip")) 924c9dd4aadSOuyang Changchun rx_mode.hw_vlan_strip = 0; 925c9dd4aadSOuyang Changchun 926c9dd4aadSOuyang Changchun if (!strcmp(lgopts[opt_idx].name, 927c9dd4aadSOuyang Changchun "disable-hw-vlan-extend")) 928c9dd4aadSOuyang Changchun rx_mode.hw_vlan_extend = 0; 929c9dd4aadSOuyang Changchun 930ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "enable-drop-en")) 931ce8d5614SIntel rx_drop_en = 1; 932ce8d5614SIntel 933af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "disable-rss")) 934af75078fSIntel rss_hf = 0; 935af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "port-topology")) { 936af75078fSIntel if (!strcmp(optarg, "paired")) 937af75078fSIntel port_topology = PORT_TOPOLOGY_PAIRED; 938af75078fSIntel else if (!strcmp(optarg, "chained")) 939af75078fSIntel port_topology = PORT_TOPOLOGY_CHAINED; 9403e2006d6SCyril Chemparathy else if (!strcmp(optarg, "loop")) 9413e2006d6SCyril Chemparathy port_topology = PORT_TOPOLOGY_LOOP; 942af75078fSIntel else 943af75078fSIntel rte_exit(EXIT_FAILURE, "port-topology %s invalid -" 944af75078fSIntel " must be: paired or chained \n", 945af75078fSIntel optarg); 946af75078fSIntel } 947ce9b9fb0SCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "forward-mode")) 948ce9b9fb0SCyril Chemparathy set_pkt_forwarding_mode(optarg); 949af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-ip")) 9508a387fa8SHelin Zhang rss_hf = ETH_RSS_IP; 951af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-udp")) 9528a387fa8SHelin Zhang rss_hf = ETH_RSS_UDP; 953af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxq")) { 954af75078fSIntel n = atoi(optarg); 9555a8fb55cSReshma Pattan if (n >= 0 && n <= (int) MAX_QUEUE_ID) 956af75078fSIntel nb_rxq = (queueid_t) n; 957af75078fSIntel else 958af75078fSIntel rte_exit(EXIT_FAILURE, "rxq %d invalid - must be" 9595a8fb55cSReshma Pattan " >= 0 && <= %d\n", n, 960af75078fSIntel (int) MAX_QUEUE_ID); 961af75078fSIntel } 962af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txq")) { 963af75078fSIntel n = atoi(optarg); 9645a8fb55cSReshma Pattan if (n >= 0 && n <= (int) MAX_QUEUE_ID) 965af75078fSIntel nb_txq = (queueid_t) n; 966af75078fSIntel else 967af75078fSIntel rte_exit(EXIT_FAILURE, "txq %d invalid - must be" 9685a8fb55cSReshma Pattan " >= 0 && <= %d\n", n, 969af75078fSIntel (int) MAX_QUEUE_ID); 970af75078fSIntel } 9715a8fb55cSReshma Pattan if (!nb_rxq && !nb_txq) { 9725a8fb55cSReshma Pattan rte_exit(EXIT_FAILURE, "Either rx or tx queues should " 9735a8fb55cSReshma Pattan "be non-zero\n"); 9745a8fb55cSReshma Pattan } 975af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "burst")) { 976af75078fSIntel n = atoi(optarg); 977af75078fSIntel if ((n >= 1) && (n <= MAX_PKT_BURST)) 978af75078fSIntel nb_pkt_per_burst = (uint16_t) n; 979af75078fSIntel else 980af75078fSIntel rte_exit(EXIT_FAILURE, 981af75078fSIntel "burst must >= 1 and <= %d]", 982af75078fSIntel MAX_PKT_BURST); 983af75078fSIntel } 984af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbcache")) { 985af75078fSIntel n = atoi(optarg); 986af75078fSIntel if ((n >= 0) && 987af75078fSIntel (n <= RTE_MEMPOOL_CACHE_MAX_SIZE)) 988af75078fSIntel mb_mempool_cache = (uint16_t) n; 989af75078fSIntel else 990af75078fSIntel rte_exit(EXIT_FAILURE, 991af75078fSIntel "mbcache must be >= 0 and <= %d\n", 992af75078fSIntel RTE_MEMPOOL_CACHE_MAX_SIZE); 993af75078fSIntel } 994af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txfreet")) { 995af75078fSIntel n = atoi(optarg); 996af75078fSIntel if (n >= 0) 997f2c5125aSPablo de Lara tx_free_thresh = (int16_t)n; 998af75078fSIntel else 999af75078fSIntel rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n"); 1000af75078fSIntel } 1001af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txrst")) { 1002af75078fSIntel n = atoi(optarg); 1003af75078fSIntel if (n >= 0) 1004f2c5125aSPablo de Lara tx_rs_thresh = (int16_t)n; 1005af75078fSIntel else 1006af75078fSIntel rte_exit(EXIT_FAILURE, "txrst must be >= 0\n"); 1007af75078fSIntel } 1008ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "txqflags")) { 1009ce8d5614SIntel char *end = NULL; 1010ce8d5614SIntel n = strtoul(optarg, &end, 16); 1011ce8d5614SIntel if (n >= 0) 1012f2c5125aSPablo de Lara txq_flags = (int32_t)n; 1013ce8d5614SIntel else 1014ce8d5614SIntel rte_exit(EXIT_FAILURE, 1015ce8d5614SIntel "txqflags must be >= 0\n"); 1016ce8d5614SIntel } 1017af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 1018af75078fSIntel n = atoi(optarg); 1019af75078fSIntel if (n > 0) { 1020af75078fSIntel if (rx_free_thresh >= n) 1021af75078fSIntel rte_exit(EXIT_FAILURE, 1022af75078fSIntel "rxd must be > " 1023af75078fSIntel "rx_free_thresh(%d)\n", 1024af75078fSIntel (int)rx_free_thresh); 1025af75078fSIntel else 1026af75078fSIntel nb_rxd = (uint16_t) n; 1027af75078fSIntel } else 1028af75078fSIntel rte_exit(EXIT_FAILURE, 1029af75078fSIntel "rxd(%d) invalid - must be > 0\n", 1030af75078fSIntel n); 1031af75078fSIntel } 1032af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 1033af75078fSIntel n = atoi(optarg); 1034af75078fSIntel if (n > 0) 1035af75078fSIntel nb_txd = (uint16_t) n; 1036af75078fSIntel else 1037af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 1038af75078fSIntel } 1039af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 1040af75078fSIntel n = atoi(optarg); 1041af75078fSIntel if (n >= 0) 1042f2c5125aSPablo de Lara tx_pthresh = (int8_t)n; 1043af75078fSIntel else 1044af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 1045af75078fSIntel } 1046af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 1047af75078fSIntel n = atoi(optarg); 1048af75078fSIntel if (n >= 0) 1049f2c5125aSPablo de Lara tx_hthresh = (int8_t)n; 1050af75078fSIntel else 1051af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 1052af75078fSIntel } 1053af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 1054af75078fSIntel n = atoi(optarg); 1055af75078fSIntel if (n >= 0) 1056f2c5125aSPablo de Lara tx_wthresh = (int8_t)n; 1057af75078fSIntel else 1058af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 1059af75078fSIntel } 1060af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 1061af75078fSIntel n = atoi(optarg); 1062af75078fSIntel if (n >= 0) 1063f2c5125aSPablo de Lara rx_pthresh = (int8_t)n; 1064af75078fSIntel else 1065af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 1066af75078fSIntel } 1067af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 1068af75078fSIntel n = atoi(optarg); 1069af75078fSIntel if (n >= 0) 1070f2c5125aSPablo de Lara rx_hthresh = (int8_t)n; 1071af75078fSIntel else 1072af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 1073af75078fSIntel } 1074af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 1075af75078fSIntel n = atoi(optarg); 1076af75078fSIntel if (n >= 0) 1077f2c5125aSPablo de Lara rx_wthresh = (int8_t)n; 1078af75078fSIntel else 1079af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 1080af75078fSIntel } 1081af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxfreet")) { 1082af75078fSIntel n = atoi(optarg); 1083af75078fSIntel if (n >= 0) 1084f2c5125aSPablo de Lara rx_free_thresh = (int16_t)n; 1085af75078fSIntel else 1086af75078fSIntel rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n"); 1087af75078fSIntel } 1088ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) { 1089ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, TX)) { 1090ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1091ed30d9b6SIntel "invalid TX queue statistics mapping config entered\n"); 1092ed30d9b6SIntel } 1093ed30d9b6SIntel } 1094ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) { 1095ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, RX)) { 1096ed30d9b6SIntel rte_exit(EXIT_FAILURE, 1097ed30d9b6SIntel "invalid RX queue statistics mapping config entered\n"); 1098ed30d9b6SIntel } 1099ed30d9b6SIntel } 1100a7e7bb4eSCyril Chemparathy if (!strcmp(lgopts[opt_idx].name, "txpkts")) { 1101a7e7bb4eSCyril Chemparathy unsigned seg_lengths[RTE_MAX_SEGS_PER_PKT]; 1102a7e7bb4eSCyril Chemparathy unsigned int nb_segs; 1103a7e7bb4eSCyril Chemparathy 1104950d1516SBruce Richardson nb_segs = parse_item_list(optarg, "txpkt segments", 1105950d1516SBruce Richardson RTE_MAX_SEGS_PER_PKT, seg_lengths, 0); 1106a7e7bb4eSCyril Chemparathy if (nb_segs > 0) 1107a7e7bb4eSCyril Chemparathy set_tx_pkt_segments(seg_lengths, nb_segs); 1108a7e7bb4eSCyril Chemparathy else 1109a7e7bb4eSCyril Chemparathy rte_exit(EXIT_FAILURE, "bad txpkts\n"); 1110a7e7bb4eSCyril Chemparathy } 11117741e4cfSIntel if (!strcmp(lgopts[opt_idx].name, "no-flush-rx")) 11127741e4cfSIntel no_flush_rx = 1; 1113bc202406SDavid Marchand if (!strcmp(lgopts[opt_idx].name, "disable-link-check")) 1114bc202406SDavid Marchand no_link_check = 1; 11158ea656f8SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "no-lsc-interrupt")) 11168ea656f8SGaetan Rivet lsc_interrupt = 0; 1117284c908cSGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "no-rmv-interrupt")) 1118284c908cSGaetan Rivet rmv_interrupt = 0; 11197ee3e944SVasily Philipov if (!strcmp(lgopts[opt_idx].name, "flow-isolate-all")) 11207ee3e944SVasily Philipov flow_isolate_all = 1; 11213af72783SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "print-event")) 11223af72783SGaetan Rivet if (parse_event_printing_config(optarg, 1)) { 11233af72783SGaetan Rivet rte_exit(EXIT_FAILURE, 11243af72783SGaetan Rivet "invalid print-event argument\n"); 11253af72783SGaetan Rivet } 11263af72783SGaetan Rivet if (!strcmp(lgopts[opt_idx].name, "mask-event")) 11273af72783SGaetan Rivet if (parse_event_printing_config(optarg, 0)) { 11283af72783SGaetan Rivet rte_exit(EXIT_FAILURE, 11293af72783SGaetan Rivet "invalid mask-event argument\n"); 11303af72783SGaetan Rivet } 11317741e4cfSIntel 1132af75078fSIntel break; 1133af75078fSIntel case 'h': 1134af75078fSIntel usage(argv[0]); 1135af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 1136af75078fSIntel break; 1137af75078fSIntel default: 1138af75078fSIntel usage(argv[0]); 1139af75078fSIntel rte_exit(EXIT_FAILURE, 1140af75078fSIntel "Command line is incomplete or incorrect\n"); 1141af75078fSIntel break; 1142af75078fSIntel } 1143af75078fSIntel } 1144af75078fSIntel } 1145