xref: /dpdk/app/test-pmd/parameters.c (revision 36db4f6c70b43f307dd2a1ece19d910a3548349d)
1174a1631SBruce Richardson /* SPDX-License-Identifier: BSD-3-Clause
2174a1631SBruce Richardson  * Copyright(c) 2010-2017 Intel Corporation
3af75078fSIntel  */
4af75078fSIntel 
5af75078fSIntel #include <errno.h>
6af75078fSIntel #include <getopt.h>
7af75078fSIntel #include <stdarg.h>
8af75078fSIntel #include <stdio.h>
9af75078fSIntel #include <stdlib.h>
10af75078fSIntel #include <signal.h>
11af75078fSIntel #include <string.h>
12af75078fSIntel #include <time.h>
13af75078fSIntel #include <fcntl.h>
14af75078fSIntel #include <sys/types.h>
15af75078fSIntel 
16af75078fSIntel #include <sys/queue.h>
17af75078fSIntel #include <sys/stat.h>
18af75078fSIntel 
19af75078fSIntel #include <stdint.h>
20af75078fSIntel #include <unistd.h>
21af75078fSIntel #include <inttypes.h>
22af75078fSIntel 
23af75078fSIntel #include <rte_common.h>
24af75078fSIntel #include <rte_byteorder.h>
25af75078fSIntel #include <rte_log.h>
26af75078fSIntel #include <rte_debug.h>
27af75078fSIntel #include <rte_cycles.h>
28af75078fSIntel #include <rte_memory.h>
29af75078fSIntel #include <rte_launch.h>
30af75078fSIntel #include <rte_eal.h>
31af75078fSIntel #include <rte_per_lcore.h>
32af75078fSIntel #include <rte_lcore.h>
33af75078fSIntel #include <rte_atomic.h>
34af75078fSIntel #include <rte_branch_prediction.h>
35af75078fSIntel #include <rte_mempool.h>
36af75078fSIntel #include <rte_interrupts.h>
37af75078fSIntel #include <rte_pci.h>
38af75078fSIntel #include <rte_ether.h>
39af75078fSIntel #include <rte_ethdev.h>
40af75078fSIntel #include <rte_string_fns.h>
410d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
42af75078fSIntel #include <cmdline_parse.h>
43af75078fSIntel #include <cmdline_parse_etheraddr.h>
440d56cb81SThomas Monjalon #endif
452950a769SDeclan Doherty #ifdef RTE_LIBRTE_PMD_BOND
462950a769SDeclan Doherty #include <rte_eth_bond.h>
472950a769SDeclan Doherty #endif
48938a184aSAdrien Mazarguil #include <rte_flow.h>
49af75078fSIntel 
50af75078fSIntel #include "testpmd.h"
51af75078fSIntel 
52af75078fSIntel static void
53af75078fSIntel usage(char* progname)
54af75078fSIntel {
550d56cb81SThomas Monjalon 	printf("usage: %s "
560d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
570d56cb81SThomas Monjalon 	       "[--interactive|-i] "
5881ef862bSAllain Legacy 	       "[--cmdline-file=FILENAME] "
590d56cb81SThomas Monjalon #endif
60ca7feb22SCyril Chemparathy 	       "[--help|-h] | [--auto-start|-a] | ["
61cfea1f30SPablo de Lara 	       "--tx-first | --stats-period=PERIOD | "
62af75078fSIntel 	       "--coremask=COREMASK --portmask=PORTMASK --numa "
63c8798818SIntel 	       "--mbuf-size= | --total-num-mbufs= | "
643be52ffcSIntel 	       "--nb-cores= | --nb-ports= | "
650d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
66af75078fSIntel 	       "--eth-peers-configfile= | "
673be52ffcSIntel 	       "--eth-peer=X,M:M:M:M:M:M | "
680d56cb81SThomas Monjalon #endif
69af75078fSIntel 	       "--pkt-filter-mode= |"
70af75078fSIntel 	       "--rss-ip | --rss-udp | "
71af75078fSIntel 	       "--rxpt= | --rxht= | --rxwt= | --rxfreet= | "
72af75078fSIntel 	       "--txpt= | --txht= | --txwt= | --txfreet= | "
7328da7d75SShahaf Shuler 	       "--txrst= | --tx-offloads ]\n",
74af75078fSIntel 	       progname);
750d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
763be52ffcSIntel 	printf("  --interactive: run in interactive mode.\n");
7781ef862bSAllain Legacy 	printf("  --cmdline-file: execute cli commands before startup.\n");
780d56cb81SThomas Monjalon #endif
79ca7feb22SCyril Chemparathy 	printf("  --auto-start: start forwarding on init "
80ca7feb22SCyril Chemparathy 	       "[always when non-interactive].\n");
813be52ffcSIntel 	printf("  --help: display this message and quit.\n");
8299cabef0SPablo de Lara 	printf("  --tx-first: start forwarding sending a burst first "
8399cabef0SPablo de Lara 	       "(only if interactive is disabled).\n");
84cfea1f30SPablo de Lara 	printf("  --stats-period=PERIOD: statistics will be shown "
85cfea1f30SPablo de Lara 	       "every PERIOD seconds (only if interactive is disabled).\n");
863be52ffcSIntel 	printf("  --nb-cores=N: set the number of forwarding cores "
873be52ffcSIntel 	       "(1 <= N <= %d).\n", nb_lcores);
883be52ffcSIntel 	printf("  --nb-ports=N: set the number of forwarding ports "
893be52ffcSIntel 	       "(1 <= N <= %d).\n", nb_ports);
90af75078fSIntel 	printf("  --coremask=COREMASK: hexadecimal bitmask of cores running "
91013af9b6SIntel 	       "the packet forwarding test. The master lcore is reserved for "
923be52ffcSIntel 	       "command line parsing only, and cannot be masked on for "
933be52ffcSIntel 	       "packet forwarding.\n");
94af75078fSIntel 	printf("  --portmask=PORTMASK: hexadecimal bitmask of ports used "
953be52ffcSIntel 	       "by the packet forwarding test.\n");
96af75078fSIntel 	printf("  --numa: enable NUMA-aware allocation of RX/TX rings and of "
973be52ffcSIntel 	       "RX memory buffers (mbufs).\n");
98b6ea6408SIntel 	printf("  --port-numa-config=(port,socket)[,(port,socket)]: "
99b6ea6408SIntel 	       "specify the socket on which the memory pool "
100b6ea6408SIntel 	       "used by the port will be allocated.\n");
101b6ea6408SIntel 	printf("  --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: "
102b6ea6408SIntel 	       "specify the socket on which the TX/RX rings for "
103b6ea6408SIntel 	       "the port will be allocated "
104b6ea6408SIntel 	       "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n");
105b6ea6408SIntel 	printf("  --socket-num=N: set socket from which all memory is allocated "
106b6ea6408SIntel 	       "in NUMA mode.\n");
1073be52ffcSIntel 	printf("  --mbuf-size=N: set the data size of mbuf to N bytes.\n");
1083be52ffcSIntel 	printf("  --total-num-mbufs=N: set the number of mbufs to be allocated "
1093be52ffcSIntel 	       "in mbuf pools.\n");
1103be52ffcSIntel 	printf("  --max-pkt-len=N: set the maximum size of packet to N bytes.\n");
1110d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
1123be52ffcSIntel 	printf("  --eth-peers-configfile=name: config file with ethernet addresses "
1133be52ffcSIntel 	       "of peer ports.\n");
1143be52ffcSIntel 	printf("  --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer "
1153be52ffcSIntel 	       "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS);
1160d56cb81SThomas Monjalon #endif
1173be52ffcSIntel 	printf("  --pkt-filter-mode=N: set Flow Director mode "
1183be52ffcSIntel 	       "(N: none (default mode) or signature or perfect).\n");
1193be52ffcSIntel 	printf("  --pkt-filter-report-hash=N: set Flow Director report mode "
1203be52ffcSIntel 	       "(N: none  or match (default) or always).\n");
1213be52ffcSIntel 	printf("  --pkt-filter-size=N: set Flow Director mode "
1223be52ffcSIntel 	       "(N: 64K (default mode) or 128K or 256K).\n");
123af75078fSIntel 	printf("  --pkt-filter-drop-queue=N: set drop-queue. "
1243be52ffcSIntel 	       "In perfect mode, when you add a rule with queue = -1 "
125af75078fSIntel 	       "the packet will be enqueued into the rx drop-queue. "
126af75078fSIntel 	       "If the drop-queue doesn't exist, the packet is dropped. "
1273be52ffcSIntel 	       "By default drop-queue=127.\n");
12862d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS
12962d3216dSReshma Pattan 	printf("  --latencystats=N: enable latency and jitter statistcs "
13062d3216dSReshma Pattan 	       "monitoring on forwarding lcore id N.\n");
13162d3216dSReshma Pattan #endif
13279dd163fSJeff Guo 	printf("  --disable-crc-strip: disable CRC stripping by hardware.\n");
1334c3ea508SOlivier Matz 	printf("  --enable-lro: enable large receive offload.\n");
1343be52ffcSIntel 	printf("  --enable-rx-cksum: enable rx hardware checksum offload.\n");
135912267a3SRaslan Darawsheh 	printf("  --enable-rx-timestamp: enable rx hardware timestamp offload.\n");
1363be52ffcSIntel 	printf("  --disable-hw-vlan: disable hardware vlan.\n");
137c9dd4aadSOuyang Changchun 	printf("  --disable-hw-vlan-filter: disable hardware vlan filter.\n");
138c9dd4aadSOuyang Changchun 	printf("  --disable-hw-vlan-strip: disable hardware vlan strip.\n");
139c9dd4aadSOuyang Changchun 	printf("  --disable-hw-vlan-extend: disable hardware vlan extend.\n");
1403be52ffcSIntel 	printf("  --enable-drop-en: enable per queue packet drop.\n");
1413be52ffcSIntel 	printf("  --disable-rss: disable rss.\n");
142af75078fSIntel 	printf("  --port-topology=N: set port topology (N: paired (default) or "
1433be52ffcSIntel 	       "chained).\n");
144769ce6b1SThomas Monjalon 	printf("  --forward-mode=N: set forwarding mode (N: %s).\n",
145769ce6b1SThomas Monjalon 	       list_pkt_forwarding_modes());
1463be52ffcSIntel 	printf("  --rss-ip: set RSS functions to IPv4/IPv6 only .\n");
1473be52ffcSIntel 	printf("  --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n");
1483be52ffcSIntel 	printf("  --rxq=N: set the number of RX queues per port to N.\n");
1493be52ffcSIntel 	printf("  --rxd=N: set the number of descriptors in RX rings to N.\n");
1503be52ffcSIntel 	printf("  --txq=N: set the number of TX queues per port to N.\n");
1513be52ffcSIntel 	printf("  --txd=N: set the number of descriptors in TX rings to N.\n");
1523be52ffcSIntel 	printf("  --burst=N: set the number of packets per burst to N.\n");
1533be52ffcSIntel 	printf("  --mbcache=N: set the cache of mbuf memory pool to N.\n");
15457af3415SPablo de Lara 	printf("  --rxpt=N: set prefetch threshold register of RX rings to N.\n");
15557af3415SPablo de Lara 	printf("  --rxht=N: set the host threshold register of RX rings to N.\n");
1563be52ffcSIntel 	printf("  --rxfreet=N: set the free threshold of RX descriptors to N "
1573be52ffcSIntel 	       "(0 <= N < value of rxd).\n");
15857af3415SPablo de Lara 	printf("  --rxwt=N: set the write-back threshold register of RX rings to N.\n");
15957af3415SPablo de Lara 	printf("  --txpt=N: set the prefetch threshold register of TX rings to N.\n");
16057af3415SPablo de Lara 	printf("  --txht=N: set the nhost threshold register of TX rings to N.\n");
16157af3415SPablo de Lara 	printf("  --txwt=N: set the write-back threshold register of TX rings to N.\n");
1623be52ffcSIntel 	printf("  --txfreet=N: set the transmit free threshold of TX rings to N "
1633be52ffcSIntel 	       "(0 <= N <= value of txd).\n");
1643be52ffcSIntel 	printf("  --txrst=N: set the transmit RS bit threshold of TX rings to N "
1653be52ffcSIntel 	       "(0 <= N <= value of txd).\n");
1663be52ffcSIntel 	printf("  --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: "
167ed30d9b6SIntel 	       "tx queues statistics counters mapping "
1683be52ffcSIntel 	       "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1693be52ffcSIntel 	printf("  --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: "
170ed30d9b6SIntel 	       "rx queues statistics counters mapping "
1713be52ffcSIntel 	       "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
1725e2ee196SIntel 	printf("  --no-flush-rx: Don't flush RX streams before forwarding."
1735e2ee196SIntel 	       " Used mainly with PCAP drivers.\n");
1742ebacaa7SMaciej Czekaj 	printf("  --txpkts=X[,Y]*: set TX segment sizes"
1752ebacaa7SMaciej Czekaj 		" or total packet length.\n");
176bc202406SDavid Marchand 	printf("  --disable-link-check: disable check on link status when "
177bc202406SDavid Marchand 	       "starting/stopping ports.\n");
1788ea656f8SGaetan Rivet 	printf("  --no-lsc-interrupt: disable link status change interrupt.\n");
179e25e6c70SRemy Horton 	printf("  --no-rmv-interrupt: disable device removal interrupt.\n");
180e25e6c70SRemy Horton 	printf("  --bitrate-stats=N: set the logical core N to perform "
181e25e6c70SRemy Horton 		"bit-rate calculation.\n");
182b6b63dfdSGaetan Rivet 	printf("  --print-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: "
183776ecd42SWenzhuo Lu 	       "enable print of designated event or all of them.\n");
184b6b63dfdSGaetan Rivet 	printf("  --mask-event <unknown|intr_lsc|queue_state|intr_reset|vf_mbox|macsec|intr_rmv|all>: "
185776ecd42SWenzhuo Lu 	       "disable print of designated event or all of them.\n");
1867ee3e944SVasily Philipov 	printf("  --flow-isolate-all: "
187776ecd42SWenzhuo Lu 	       "requests flow API isolated mode on all ports at initialization time.\n");
188fd8c20aaSShahaf Shuler 	printf("  --tx-offloads=0xXXXXXXXX: hexadecimal bitmask of TX queue offloads\n");
189af75078fSIntel }
190af75078fSIntel 
1910d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
192af75078fSIntel static int
193af75078fSIntel init_peer_eth_addrs(char *config_filename)
194af75078fSIntel {
195af75078fSIntel 	FILE *config_file;
196af75078fSIntel 	portid_t i;
197af75078fSIntel 	char buf[50];
198af75078fSIntel 
199af75078fSIntel 	config_file = fopen(config_filename, "r");
200af75078fSIntel 	if (config_file == NULL) {
2013be52ffcSIntel 		perror("Failed to open eth config file\n");
202af75078fSIntel 		return -1;
203af75078fSIntel 	}
204af75078fSIntel 
205af75078fSIntel 	for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
206af75078fSIntel 
207af75078fSIntel 		if (fgets(buf, sizeof(buf), config_file) == NULL)
208af75078fSIntel 			break;
209af75078fSIntel 
210aaa662e7SAlan Carew 		if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i],
211aaa662e7SAlan Carew 				sizeof(peer_eth_addrs[i])) < 0) {
2123be52ffcSIntel 			printf("Bad MAC address format on line %d\n", i+1);
213af75078fSIntel 			fclose(config_file);
214af75078fSIntel 			return -1;
215af75078fSIntel 		}
216af75078fSIntel 	}
217af75078fSIntel 	fclose(config_file);
218af75078fSIntel 	nb_peer_eth_addrs = (portid_t) i;
219af75078fSIntel 	return 0;
220af75078fSIntel }
2210d56cb81SThomas Monjalon #endif
222af75078fSIntel 
223af75078fSIntel /*
224af75078fSIntel  * Parse the coremask given as argument (hexadecimal string) and set
225af75078fSIntel  * the global configuration of forwarding cores.
226af75078fSIntel  */
227af75078fSIntel static void
228af75078fSIntel parse_fwd_coremask(const char *coremask)
229af75078fSIntel {
230af75078fSIntel 	char *end;
231af75078fSIntel 	unsigned long long int cm;
232af75078fSIntel 
233af75078fSIntel 	/* parse hexadecimal string */
234af75078fSIntel 	end = NULL;
235af75078fSIntel 	cm = strtoull(coremask, &end, 16);
236af75078fSIntel 	if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0'))
237af75078fSIntel 		rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n");
238013af9b6SIntel 	else if (set_fwd_lcores_mask((uint64_t) cm) < 0)
239013af9b6SIntel 		rte_exit(EXIT_FAILURE, "coremask is not valid\n");
240af75078fSIntel }
241af75078fSIntel 
242af75078fSIntel /*
243af75078fSIntel  * Parse the coremask given as argument (hexadecimal string) and set
244af75078fSIntel  * the global configuration of forwarding cores.
245af75078fSIntel  */
246af75078fSIntel static void
247af75078fSIntel parse_fwd_portmask(const char *portmask)
248af75078fSIntel {
249af75078fSIntel 	char *end;
250af75078fSIntel 	unsigned long long int pm;
251af75078fSIntel 
252af75078fSIntel 	/* parse hexadecimal string */
253af75078fSIntel 	end = NULL;
254af75078fSIntel 	pm = strtoull(portmask, &end, 16);
255af75078fSIntel 	if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
256af75078fSIntel 		rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n");
257af75078fSIntel 	else
258af75078fSIntel 		set_fwd_ports_mask((uint64_t) pm);
259af75078fSIntel }
260af75078fSIntel 
261ed30d9b6SIntel 
262ed30d9b6SIntel static int
263ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx)
264ed30d9b6SIntel {
265ed30d9b6SIntel 	char s[256];
266ed30d9b6SIntel 	const char *p, *p0 = q_arg;
267ed30d9b6SIntel 	char *end;
268ed30d9b6SIntel 	enum fieldnames {
269ed30d9b6SIntel 		FLD_PORT = 0,
270ed30d9b6SIntel 		FLD_QUEUE,
271ed30d9b6SIntel 		FLD_STATS_COUNTER,
272ed30d9b6SIntel 		_NUM_FLD
273ed30d9b6SIntel 	};
274ed30d9b6SIntel 	unsigned long int_fld[_NUM_FLD];
275ed30d9b6SIntel 	char *str_fld[_NUM_FLD];
276ed30d9b6SIntel 	int i;
277ed30d9b6SIntel 	unsigned size;
278ed30d9b6SIntel 
279ed30d9b6SIntel 	/* reset from value set at definition */
280ed30d9b6SIntel 	is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0);
281ed30d9b6SIntel 
282ed30d9b6SIntel 	while ((p = strchr(p0,'(')) != NULL) {
283ed30d9b6SIntel 		++p;
284ed30d9b6SIntel 		if((p0 = strchr(p,')')) == NULL)
285ed30d9b6SIntel 			return -1;
286ed30d9b6SIntel 
287ed30d9b6SIntel 		size = p0 - p;
288ed30d9b6SIntel 		if(size >= sizeof(s))
289ed30d9b6SIntel 			return -1;
290ed30d9b6SIntel 
2916f41fe75SStephen Hemminger 		snprintf(s, sizeof(s), "%.*s", size, p);
292ed30d9b6SIntel 		if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD)
293ed30d9b6SIntel 			return -1;
294ed30d9b6SIntel 		for (i = 0; i < _NUM_FLD; i++){
295ed30d9b6SIntel 			errno = 0;
296ed30d9b6SIntel 			int_fld[i] = strtoul(str_fld[i], &end, 0);
297ed30d9b6SIntel 			if (errno != 0 || end == str_fld[i] || int_fld[i] > 255)
298ed30d9b6SIntel 				return -1;
299ed30d9b6SIntel 		}
300ed30d9b6SIntel 		/* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */
301ed30d9b6SIntel 		if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) {
302ed30d9b6SIntel 			printf("Stats counter not in the correct range 0..%d\n",
303ed30d9b6SIntel 					RTE_ETHDEV_QUEUE_STAT_CNTRS - 1);
304ed30d9b6SIntel 			return -1;
305ed30d9b6SIntel 		}
306ed30d9b6SIntel 
3074dccdc78SBruce Richardson 		if (!is_rx) {
3084dccdc78SBruce Richardson 			if ((nb_tx_queue_stats_mappings >=
3094dccdc78SBruce Richardson 						MAX_TX_QUEUE_STATS_MAPPINGS)) {
3104dccdc78SBruce Richardson 				printf("exceeded max number of TX queue "
3114dccdc78SBruce Richardson 						"statistics mappings: %hu\n",
3124dccdc78SBruce Richardson 						nb_tx_queue_stats_mappings);
313ed30d9b6SIntel 				return -1;
314ed30d9b6SIntel 			}
315ed30d9b6SIntel 			tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id =
316ed30d9b6SIntel 				(uint8_t)int_fld[FLD_PORT];
317ed30d9b6SIntel 			tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id =
318ed30d9b6SIntel 				(uint8_t)int_fld[FLD_QUEUE];
319ed30d9b6SIntel 			tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id =
320ed30d9b6SIntel 				(uint8_t)int_fld[FLD_STATS_COUNTER];
321ed30d9b6SIntel 			++nb_tx_queue_stats_mappings;
322ed30d9b6SIntel 		}
323ed30d9b6SIntel 		else {
3244dccdc78SBruce Richardson 			if ((nb_rx_queue_stats_mappings >=
3254dccdc78SBruce Richardson 						MAX_RX_QUEUE_STATS_MAPPINGS)) {
3264dccdc78SBruce Richardson 				printf("exceeded max number of RX queue "
3274dccdc78SBruce Richardson 						"statistics mappings: %hu\n",
3284dccdc78SBruce Richardson 						nb_rx_queue_stats_mappings);
3294dccdc78SBruce Richardson 				return -1;
3304dccdc78SBruce Richardson 			}
331ed30d9b6SIntel 			rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id =
332ed30d9b6SIntel 				(uint8_t)int_fld[FLD_PORT];
333ed30d9b6SIntel 			rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id =
334ed30d9b6SIntel 				(uint8_t)int_fld[FLD_QUEUE];
335ed30d9b6SIntel 			rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id =
336ed30d9b6SIntel 				(uint8_t)int_fld[FLD_STATS_COUNTER];
337ed30d9b6SIntel 			++nb_rx_queue_stats_mappings;
338ed30d9b6SIntel 		}
339ed30d9b6SIntel 
340ed30d9b6SIntel 	}
341ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */
342ed30d9b6SIntel /* than to the default array (that was set at its definition) */
343ed30d9b6SIntel 	is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) :
344ed30d9b6SIntel 		(tx_queue_stats_mappings = tx_queue_stats_mappings_array);
345ed30d9b6SIntel 	return 0;
346ed30d9b6SIntel }
347ed30d9b6SIntel 
348c9cafcc8SShahaf Shuler static void
349c9cafcc8SShahaf Shuler print_invalid_socket_id_error(void)
350c9cafcc8SShahaf Shuler {
351c9cafcc8SShahaf Shuler 	unsigned int i = 0;
352c9cafcc8SShahaf Shuler 
353c9cafcc8SShahaf Shuler 	printf("Invalid socket id, options are: ");
354c9cafcc8SShahaf Shuler 	for (i = 0; i < num_sockets; i++) {
355c9cafcc8SShahaf Shuler 		printf("%u%s", socket_ids[i],
356c9cafcc8SShahaf Shuler 		      (i == num_sockets - 1) ? "\n" : ",");
357c9cafcc8SShahaf Shuler 	}
358c9cafcc8SShahaf Shuler }
359c9cafcc8SShahaf Shuler 
360b6ea6408SIntel static int
361b6ea6408SIntel parse_portnuma_config(const char *q_arg)
362b6ea6408SIntel {
363b6ea6408SIntel 	char s[256];
364b6ea6408SIntel 	const char *p, *p0 = q_arg;
365b6ea6408SIntel 	char *end;
366d1f1a0fdSLi Han 	uint8_t i, socket_id;
367d1f1a0fdSLi Han 	portid_t port_id;
368b6ea6408SIntel 	unsigned size;
369b6ea6408SIntel 	enum fieldnames {
370b6ea6408SIntel 		FLD_PORT = 0,
371b6ea6408SIntel 		FLD_SOCKET,
372b6ea6408SIntel 		_NUM_FLD
373b6ea6408SIntel 	};
374b6ea6408SIntel 	unsigned long int_fld[_NUM_FLD];
375b6ea6408SIntel 	char *str_fld[_NUM_FLD];
376edab33b1STetsuya Mukawa 	portid_t pid;
377b6ea6408SIntel 
378b6ea6408SIntel 	/* reset from value set at definition */
379b6ea6408SIntel 	while ((p = strchr(p0,'(')) != NULL) {
380b6ea6408SIntel 		++p;
381b6ea6408SIntel 		if((p0 = strchr(p,')')) == NULL)
382b6ea6408SIntel 			return -1;
383b6ea6408SIntel 
384b6ea6408SIntel 		size = p0 - p;
385b6ea6408SIntel 		if(size >= sizeof(s))
386b6ea6408SIntel 			return -1;
387b6ea6408SIntel 
3886f41fe75SStephen Hemminger 		snprintf(s, sizeof(s), "%.*s", size, p);
389b6ea6408SIntel 		if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD)
390b6ea6408SIntel 			return -1;
391b6ea6408SIntel 		for (i = 0; i < _NUM_FLD; i++) {
392b6ea6408SIntel 			errno = 0;
393b6ea6408SIntel 			int_fld[i] = strtoul(str_fld[i], &end, 0);
394b6ea6408SIntel 			if (errno != 0 || end == str_fld[i] || int_fld[i] > 255)
395b6ea6408SIntel 				return -1;
396b6ea6408SIntel 		}
397d1f1a0fdSLi Han 		port_id = (portid_t)int_fld[FLD_PORT];
398d1f1a0fdSLi Han 		if (port_id_is_invalid(port_id, ENABLED_WARN) ||
399d1f1a0fdSLi Han 			port_id == (portid_t)RTE_PORT_ALL) {
400edab33b1STetsuya Mukawa 			printf("Valid port range is [0");
4017d89b261SGaetan Rivet 			RTE_ETH_FOREACH_DEV(pid)
402edab33b1STetsuya Mukawa 				printf(", %d", pid);
403edab33b1STetsuya Mukawa 			printf("]\n");
404b6ea6408SIntel 			return -1;
405b6ea6408SIntel 		}
406b6ea6408SIntel 		socket_id = (uint8_t)int_fld[FLD_SOCKET];
407c9cafcc8SShahaf Shuler 		if (new_socket_id(socket_id)) {
408c9cafcc8SShahaf Shuler 			print_invalid_socket_id_error();
409b6ea6408SIntel 			return -1;
410b6ea6408SIntel 		}
411b6ea6408SIntel 		port_numa[port_id] = socket_id;
412b6ea6408SIntel 	}
413b6ea6408SIntel 
414b6ea6408SIntel 	return 0;
415b6ea6408SIntel }
416b6ea6408SIntel 
417b6ea6408SIntel static int
418b6ea6408SIntel parse_ringnuma_config(const char *q_arg)
419b6ea6408SIntel {
420b6ea6408SIntel 	char s[256];
421b6ea6408SIntel 	const char *p, *p0 = q_arg;
422b6ea6408SIntel 	char *end;
423d1f1a0fdSLi Han 	uint8_t i, ring_flag, socket_id;
424d1f1a0fdSLi Han 	portid_t port_id;
425b6ea6408SIntel 	unsigned size;
426b6ea6408SIntel 	enum fieldnames {
427b6ea6408SIntel 		FLD_PORT = 0,
428b6ea6408SIntel 		FLD_FLAG,
429b6ea6408SIntel 		FLD_SOCKET,
430b6ea6408SIntel 		_NUM_FLD
431b6ea6408SIntel 	};
432b6ea6408SIntel 	unsigned long int_fld[_NUM_FLD];
433b6ea6408SIntel 	char *str_fld[_NUM_FLD];
434edab33b1STetsuya Mukawa 	portid_t pid;
435b6ea6408SIntel 	#define RX_RING_ONLY 0x1
436b6ea6408SIntel 	#define TX_RING_ONLY 0x2
437b6ea6408SIntel 	#define RXTX_RING    0x3
438b6ea6408SIntel 
439b6ea6408SIntel 	/* reset from value set at definition */
440b6ea6408SIntel 	while ((p = strchr(p0,'(')) != NULL) {
441b6ea6408SIntel 		++p;
442b6ea6408SIntel 		if((p0 = strchr(p,')')) == NULL)
443b6ea6408SIntel 			return -1;
444b6ea6408SIntel 
445b6ea6408SIntel 		size = p0 - p;
446b6ea6408SIntel 		if(size >= sizeof(s))
447b6ea6408SIntel 			return -1;
448b6ea6408SIntel 
4496f41fe75SStephen Hemminger 		snprintf(s, sizeof(s), "%.*s", size, p);
450b6ea6408SIntel 		if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD)
451b6ea6408SIntel 			return -1;
452b6ea6408SIntel 		for (i = 0; i < _NUM_FLD; i++) {
453b6ea6408SIntel 			errno = 0;
454b6ea6408SIntel 			int_fld[i] = strtoul(str_fld[i], &end, 0);
455b6ea6408SIntel 			if (errno != 0 || end == str_fld[i] || int_fld[i] > 255)
456b6ea6408SIntel 				return -1;
457b6ea6408SIntel 		}
458d1f1a0fdSLi Han 		port_id = (portid_t)int_fld[FLD_PORT];
459d1f1a0fdSLi Han 		if (port_id_is_invalid(port_id, ENABLED_WARN) ||
460d1f1a0fdSLi Han 			port_id == (portid_t)RTE_PORT_ALL) {
461edab33b1STetsuya Mukawa 			printf("Valid port range is [0");
4627d89b261SGaetan Rivet 			RTE_ETH_FOREACH_DEV(pid)
463edab33b1STetsuya Mukawa 				printf(", %d", pid);
464edab33b1STetsuya Mukawa 			printf("]\n");
465b6ea6408SIntel 			return -1;
466b6ea6408SIntel 		}
467b6ea6408SIntel 		socket_id = (uint8_t)int_fld[FLD_SOCKET];
468c9cafcc8SShahaf Shuler 		if (new_socket_id(socket_id)) {
469c9cafcc8SShahaf Shuler 			print_invalid_socket_id_error();
470b6ea6408SIntel 			return -1;
471b6ea6408SIntel 		}
472b6ea6408SIntel 		ring_flag = (uint8_t)int_fld[FLD_FLAG];
473b6ea6408SIntel 		if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) {
474b6ea6408SIntel 			printf("Invalid ring-flag=%d config for port =%d\n",
475b6ea6408SIntel 				ring_flag,port_id);
476b6ea6408SIntel 			return -1;
477b6ea6408SIntel 		}
478b6ea6408SIntel 
479b6ea6408SIntel 		switch (ring_flag & RXTX_RING) {
480b6ea6408SIntel 		case RX_RING_ONLY:
481b6ea6408SIntel 			rxring_numa[port_id] = socket_id;
482b6ea6408SIntel 			break;
483b6ea6408SIntel 		case TX_RING_ONLY:
484b6ea6408SIntel 			txring_numa[port_id] = socket_id;
485b6ea6408SIntel 			break;
486b6ea6408SIntel 		case RXTX_RING:
487b6ea6408SIntel 			rxring_numa[port_id] = socket_id;
488b6ea6408SIntel 			txring_numa[port_id] = socket_id;
489b6ea6408SIntel 			break;
490b6ea6408SIntel 		default:
491b6ea6408SIntel 			printf("Invalid ring-flag=%d config for port=%d\n",
492b6ea6408SIntel 				ring_flag,port_id);
493b6ea6408SIntel 			break;
494b6ea6408SIntel 		}
495b6ea6408SIntel 	}
496b6ea6408SIntel 
497b6ea6408SIntel 	return 0;
498b6ea6408SIntel }
499ed30d9b6SIntel 
5003af72783SGaetan Rivet static int
5013af72783SGaetan Rivet parse_event_printing_config(const char *optarg, int enable)
5023af72783SGaetan Rivet {
5033af72783SGaetan Rivet 	uint32_t mask = 0;
5043af72783SGaetan Rivet 
5053af72783SGaetan Rivet 	if (!strcmp(optarg, "unknown"))
5063af72783SGaetan Rivet 		mask = UINT32_C(1) << RTE_ETH_EVENT_UNKNOWN;
5073af72783SGaetan Rivet 	else if (!strcmp(optarg, "intr_lsc"))
5083af72783SGaetan Rivet 		mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_LSC;
5093af72783SGaetan Rivet 	else if (!strcmp(optarg, "queue_state"))
5103af72783SGaetan Rivet 		mask = UINT32_C(1) << RTE_ETH_EVENT_QUEUE_STATE;
5113af72783SGaetan Rivet 	else if (!strcmp(optarg, "intr_reset"))
5123af72783SGaetan Rivet 		mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RESET;
5133af72783SGaetan Rivet 	else if (!strcmp(optarg, "vf_mbox"))
5143af72783SGaetan Rivet 		mask = UINT32_C(1) << RTE_ETH_EVENT_VF_MBOX;
5153af72783SGaetan Rivet 	else if (!strcmp(optarg, "macsec"))
5163af72783SGaetan Rivet 		mask = UINT32_C(1) << RTE_ETH_EVENT_MACSEC;
5173af72783SGaetan Rivet 	else if (!strcmp(optarg, "intr_rmv"))
5183af72783SGaetan Rivet 		mask = UINT32_C(1) << RTE_ETH_EVENT_INTR_RMV;
5194fb82244SMatan Azrad 	else if (!strcmp(optarg, "dev_probed"))
5204fb82244SMatan Azrad 		mask = UINT32_C(1) << RTE_ETH_EVENT_NEW;
5214fb82244SMatan Azrad 	else if (!strcmp(optarg, "dev_released"))
5224fb82244SMatan Azrad 		mask = UINT32_C(1) << RTE_ETH_EVENT_DESTROY;
523b6b63dfdSGaetan Rivet 	else if (!strcmp(optarg, "all"))
524b6b63dfdSGaetan Rivet 		mask = ~UINT32_C(0);
5253af72783SGaetan Rivet 	else {
5263af72783SGaetan Rivet 		fprintf(stderr, "Invalid event: %s\n", optarg);
5273af72783SGaetan Rivet 		return -1;
5283af72783SGaetan Rivet 	}
5293af72783SGaetan Rivet 	if (enable)
5303af72783SGaetan Rivet 		event_print_mask |= mask;
5313af72783SGaetan Rivet 	else
5323af72783SGaetan Rivet 		event_print_mask &= ~mask;
5333af72783SGaetan Rivet 	return 0;
5343af72783SGaetan Rivet }
5353af72783SGaetan Rivet 
536af75078fSIntel void
537af75078fSIntel launch_args_parse(int argc, char** argv)
538af75078fSIntel {
539af75078fSIntel 	int n, opt;
540af75078fSIntel 	char **argvopt;
541af75078fSIntel 	int opt_idx;
5423f7311baSWei Dai 	portid_t pid;
543013af9b6SIntel 	enum { TX, RX };
544fd8c20aaSShahaf Shuler 	/* Default offloads for all ports. */
5450074d02fSShahaf Shuler 	uint64_t rx_offloads = rx_mode.offloads;
546fd8c20aaSShahaf Shuler 	uint64_t tx_offloads = tx_mode.offloads;
547013af9b6SIntel 
548af75078fSIntel 	static struct option lgopts[] = {
549af75078fSIntel 		{ "help",			0, 0, 0 },
5500d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
551af75078fSIntel 		{ "interactive",		0, 0, 0 },
55281ef862bSAllain Legacy 		{ "cmdline-file",		1, 0, 0 },
553ca7feb22SCyril Chemparathy 		{ "auto-start",			0, 0, 0 },
554af75078fSIntel 		{ "eth-peers-configfile",	1, 0, 0 },
555af75078fSIntel 		{ "eth-peer",			1, 0, 0 },
5560d56cb81SThomas Monjalon #endif
55799cabef0SPablo de Lara 		{ "tx-first",			0, 0, 0 },
558cfea1f30SPablo de Lara 		{ "stats-period",		1, 0, 0 },
559af75078fSIntel 		{ "ports",			1, 0, 0 },
560af75078fSIntel 		{ "nb-cores",			1, 0, 0 },
561af75078fSIntel 		{ "nb-ports",			1, 0, 0 },
562af75078fSIntel 		{ "coremask",			1, 0, 0 },
563af75078fSIntel 		{ "portmask",			1, 0, 0 },
564af75078fSIntel 		{ "numa",			0, 0, 0 },
565999b2ee0SBruce Richardson 		{ "no-numa",			0, 0, 0 },
566148f963fSBruce Richardson 		{ "mp-anon",			0, 0, 0 },
567b6ea6408SIntel 		{ "port-numa-config",           1, 0, 0 },
568b6ea6408SIntel 		{ "ring-numa-config",           1, 0, 0 },
569b6ea6408SIntel 		{ "socket-num",			1, 0, 0 },
570af75078fSIntel 		{ "mbuf-size",			1, 0, 0 },
571c8798818SIntel 		{ "total-num-mbufs",		1, 0, 0 },
572af75078fSIntel 		{ "max-pkt-len",		1, 0, 0 },
573af75078fSIntel 		{ "pkt-filter-mode",            1, 0, 0 },
574af75078fSIntel 		{ "pkt-filter-report-hash",     1, 0, 0 },
575af75078fSIntel 		{ "pkt-filter-size",            1, 0, 0 },
576af75078fSIntel 		{ "pkt-filter-drop-queue",      1, 0, 0 },
57762d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS
57862d3216dSReshma Pattan 		{ "latencystats",               1, 0, 0 },
57962d3216dSReshma Pattan #endif
580e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE
581e25e6c70SRemy Horton 		{ "bitrate-stats",              1, 0, 0 },
582e25e6c70SRemy Horton #endif
58379dd163fSJeff Guo 		{ "disable-crc-strip",          0, 0, 0 },
5844c3ea508SOlivier Matz 		{ "enable-lro",                 0, 0, 0 },
585013af9b6SIntel 		{ "enable-rx-cksum",            0, 0, 0 },
586912267a3SRaslan Darawsheh 		{ "enable-rx-timestamp",        0, 0, 0 },
58704997938SMaciej Czekaj 		{ "enable-scatter",             0, 0, 0 },
588af75078fSIntel 		{ "disable-hw-vlan",            0, 0, 0 },
589c9dd4aadSOuyang Changchun 		{ "disable-hw-vlan-filter",     0, 0, 0 },
590c9dd4aadSOuyang Changchun 		{ "disable-hw-vlan-strip",      0, 0, 0 },
591c9dd4aadSOuyang Changchun 		{ "disable-hw-vlan-extend",     0, 0, 0 },
592013af9b6SIntel 		{ "enable-drop-en",            0, 0, 0 },
593af75078fSIntel 		{ "disable-rss",                0, 0, 0 },
594af75078fSIntel 		{ "port-topology",              1, 0, 0 },
595ce9b9fb0SCyril Chemparathy 		{ "forward-mode",               1, 0, 0 },
596af75078fSIntel 		{ "rss-ip",			0, 0, 0 },
597af75078fSIntel 		{ "rss-udp",			0, 0, 0 },
598af75078fSIntel 		{ "rxq",			1, 0, 0 },
599af75078fSIntel 		{ "txq",			1, 0, 0 },
600af75078fSIntel 		{ "rxd",			1, 0, 0 },
601af75078fSIntel 		{ "txd",			1, 0, 0 },
602af75078fSIntel 		{ "burst",			1, 0, 0 },
603af75078fSIntel 		{ "mbcache",			1, 0, 0 },
604af75078fSIntel 		{ "txpt",			1, 0, 0 },
605af75078fSIntel 		{ "txht",			1, 0, 0 },
606af75078fSIntel 		{ "txwt",			1, 0, 0 },
607af75078fSIntel 		{ "txfreet",			1, 0, 0 },
608af75078fSIntel 		{ "txrst",			1, 0, 0 },
609af75078fSIntel 		{ "rxpt",			1, 0, 0 },
610af75078fSIntel 		{ "rxht",			1, 0, 0 },
611af75078fSIntel 		{ "rxwt",			1, 0, 0 },
612af75078fSIntel 		{ "rxfreet",                    1, 0, 0 },
613ed30d9b6SIntel 		{ "tx-queue-stats-mapping",	1, 0, 0 },
614ed30d9b6SIntel 		{ "rx-queue-stats-mapping",	1, 0, 0 },
6157741e4cfSIntel 		{ "no-flush-rx",	0, 0, 0 },
6167ee3e944SVasily Philipov 		{ "flow-isolate-all",	        0, 0, 0 },
617a7e7bb4eSCyril Chemparathy 		{ "txpkts",			1, 0, 0 },
618bc202406SDavid Marchand 		{ "disable-link-check",		0, 0, 0 },
6198ea656f8SGaetan Rivet 		{ "no-lsc-interrupt",		0, 0, 0 },
620284c908cSGaetan Rivet 		{ "no-rmv-interrupt",		0, 0, 0 },
6213af72783SGaetan Rivet 		{ "print-event",		1, 0, 0 },
6223af72783SGaetan Rivet 		{ "mask-event",			1, 0, 0 },
623fd8c20aaSShahaf Shuler 		{ "tx-offloads",		1, 0, 0 },
624af75078fSIntel 		{ 0, 0, 0, 0 },
625af75078fSIntel 	};
626af75078fSIntel 
627af75078fSIntel 	argvopt = argv;
628af75078fSIntel 
6290d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
630ca7feb22SCyril Chemparathy #define SHORTOPTS "i"
6310d56cb81SThomas Monjalon #else
632ca7feb22SCyril Chemparathy #define SHORTOPTS ""
6330d56cb81SThomas Monjalon #endif
634ca7feb22SCyril Chemparathy 	while ((opt = getopt_long(argc, argvopt, SHORTOPTS "ah",
635af75078fSIntel 				 lgopts, &opt_idx)) != EOF) {
636af75078fSIntel 		switch (opt) {
6370d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
638af75078fSIntel 		case 'i':
639af75078fSIntel 			printf("Interactive-mode selected\n");
640af75078fSIntel 			interactive = 1;
641af75078fSIntel 			break;
6420d56cb81SThomas Monjalon #endif
643ca7feb22SCyril Chemparathy 		case 'a':
644ca7feb22SCyril Chemparathy 			printf("Auto-start selected\n");
645ca7feb22SCyril Chemparathy 			auto_start = 1;
646ca7feb22SCyril Chemparathy 			break;
647ca7feb22SCyril Chemparathy 
648af75078fSIntel 		case 0: /*long options */
649af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "help")) {
650af75078fSIntel 				usage(argv[0]);
651af75078fSIntel 				rte_exit(EXIT_SUCCESS, "Displayed help\n");
652af75078fSIntel 			}
6530d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE
654af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "interactive")) {
655af75078fSIntel 				printf("Interactive-mode selected\n");
656af75078fSIntel 				interactive = 1;
657af75078fSIntel 			}
65881ef862bSAllain Legacy 			if (!strcmp(lgopts[opt_idx].name, "cmdline-file")) {
65981ef862bSAllain Legacy 				printf("CLI commands to be read from %s\n",
66081ef862bSAllain Legacy 				       optarg);
66181ef862bSAllain Legacy 				snprintf(cmdline_filename,
66281ef862bSAllain Legacy 					 sizeof(cmdline_filename), "%s",
66381ef862bSAllain Legacy 					 optarg);
66481ef862bSAllain Legacy 			}
665ca7feb22SCyril Chemparathy 			if (!strcmp(lgopts[opt_idx].name, "auto-start")) {
666ca7feb22SCyril Chemparathy 				printf("Auto-start selected\n");
667ca7feb22SCyril Chemparathy 				auto_start = 1;
668ca7feb22SCyril Chemparathy 			}
66999cabef0SPablo de Lara 			if (!strcmp(lgopts[opt_idx].name, "tx-first")) {
67099cabef0SPablo de Lara 				printf("Ports to start sending a burst of "
67199cabef0SPablo de Lara 						"packets first\n");
67299cabef0SPablo de Lara 				tx_first = 1;
67399cabef0SPablo de Lara 			}
674cfea1f30SPablo de Lara 			if (!strcmp(lgopts[opt_idx].name, "stats-period")) {
675cfea1f30SPablo de Lara 				char *end = NULL;
676cfea1f30SPablo de Lara 				unsigned int n;
677cfea1f30SPablo de Lara 
678cfea1f30SPablo de Lara 				n = strtoul(optarg, &end, 10);
679cfea1f30SPablo de Lara 				if ((optarg[0] == '\0') || (end == NULL) ||
680cfea1f30SPablo de Lara 						(*end != '\0'))
681cfea1f30SPablo de Lara 					break;
682cfea1f30SPablo de Lara 
683cfea1f30SPablo de Lara 				stats_period = n;
684cfea1f30SPablo de Lara 				break;
685cfea1f30SPablo de Lara 			}
686af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name,
687af75078fSIntel 				    "eth-peers-configfile")) {
688af75078fSIntel 				if (init_peer_eth_addrs(optarg) != 0)
689af75078fSIntel 					rte_exit(EXIT_FAILURE,
690af75078fSIntel 						 "Cannot open logfile\n");
691af75078fSIntel 			}
692af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "eth-peer")) {
693af75078fSIntel 				char *port_end;
694af75078fSIntel 				uint8_t c, peer_addr[6];
695af75078fSIntel 
696af75078fSIntel 				errno = 0;
697af75078fSIntel 				n = strtoul(optarg, &port_end, 10);
698af75078fSIntel 				if (errno != 0 || port_end == optarg || *port_end++ != ',')
699af75078fSIntel 					rte_exit(EXIT_FAILURE,
700af75078fSIntel 						 "Invalid eth-peer: %s", optarg);
701af75078fSIntel 				if (n >= RTE_MAX_ETHPORTS)
702af75078fSIntel 					rte_exit(EXIT_FAILURE,
703af75078fSIntel 						 "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n",
704af75078fSIntel 						 n, RTE_MAX_ETHPORTS);
705af75078fSIntel 
706aaa662e7SAlan Carew 				if (cmdline_parse_etheraddr(NULL, port_end,
707aaa662e7SAlan Carew 						&peer_addr, sizeof(peer_addr)) < 0)
708af75078fSIntel 					rte_exit(EXIT_FAILURE,
709af75078fSIntel 						 "Invalid ethernet address: %s\n",
710af75078fSIntel 						 port_end);
711af75078fSIntel 				for (c = 0; c < 6; c++)
712af75078fSIntel 					peer_eth_addrs[n].addr_bytes[c] =
713af75078fSIntel 						peer_addr[c];
714af75078fSIntel 				nb_peer_eth_addrs++;
715af75078fSIntel 			}
7160d56cb81SThomas Monjalon #endif
717af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "nb-ports")) {
718af75078fSIntel 				n = atoi(optarg);
7190a530f0dSYong Liu 				if (n > 0 && n <= nb_ports)
720f8244c63SZhiyong Yang 					nb_fwd_ports = n;
721af75078fSIntel 				else
722af75078fSIntel 					rte_exit(EXIT_FAILURE,
723edab33b1STetsuya Mukawa 						 "Invalid port %d\n", n);
724af75078fSIntel 			}
725af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "nb-cores")) {
726af75078fSIntel 				n = atoi(optarg);
727af75078fSIntel 				if (n > 0 && n <= nb_lcores)
728af75078fSIntel 					nb_fwd_lcores = (uint8_t) n;
729af75078fSIntel 				else
730af75078fSIntel 					rte_exit(EXIT_FAILURE,
731af75078fSIntel 						 "nb-cores should be > 0 and <= %d\n",
732af75078fSIntel 						 nb_lcores);
733af75078fSIntel 			}
734af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "coremask"))
735af75078fSIntel 				parse_fwd_coremask(optarg);
736af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "portmask"))
737af75078fSIntel 				parse_fwd_portmask(optarg);
738999b2ee0SBruce Richardson 			if (!strcmp(lgopts[opt_idx].name, "no-numa"))
739999b2ee0SBruce Richardson 				numa_support = 0;
740487f9a59SYulong Pei 			if (!strcmp(lgopts[opt_idx].name, "numa"))
741af75078fSIntel 				numa_support = 1;
742148f963fSBruce Richardson 			if (!strcmp(lgopts[opt_idx].name, "mp-anon")) {
743148f963fSBruce Richardson 				mp_anon = 1;
744148f963fSBruce Richardson 			}
745b6ea6408SIntel 			if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) {
746b6ea6408SIntel 				if (parse_portnuma_config(optarg))
747b6ea6408SIntel 					rte_exit(EXIT_FAILURE,
748b6ea6408SIntel 					   "invalid port-numa configuration\n");
749b6ea6408SIntel 			}
750b6ea6408SIntel 			if (!strcmp(lgopts[opt_idx].name, "ring-numa-config"))
751b6ea6408SIntel 				if (parse_ringnuma_config(optarg))
752b6ea6408SIntel 					rte_exit(EXIT_FAILURE,
753b6ea6408SIntel 					   "invalid ring-numa configuration\n");
754b6ea6408SIntel 			if (!strcmp(lgopts[opt_idx].name, "socket-num")) {
755b6ea6408SIntel 				n = atoi(optarg);
756c9cafcc8SShahaf Shuler 				if (!new_socket_id((uint8_t)n)) {
757b6ea6408SIntel 					socket_num = (uint8_t)n;
758c9cafcc8SShahaf Shuler 				} else {
759c9cafcc8SShahaf Shuler 					print_invalid_socket_id_error();
760b6ea6408SIntel 					rte_exit(EXIT_FAILURE,
761c9cafcc8SShahaf Shuler 						"Invalid socket id");
762c9cafcc8SShahaf Shuler 				}
763b6ea6408SIntel 			}
764af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) {
765af75078fSIntel 				n = atoi(optarg);
766af75078fSIntel 				if (n > 0 && n <= 0xFFFF)
767af75078fSIntel 					mbuf_data_size = (uint16_t) n;
768af75078fSIntel 				else
769af75078fSIntel 					rte_exit(EXIT_FAILURE,
770af75078fSIntel 						 "mbuf-size should be > 0 and < 65536\n");
771af75078fSIntel 			}
772c8798818SIntel 			if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) {
773c8798818SIntel 				n = atoi(optarg);
774c8798818SIntel 				if (n > 1024)
775c8798818SIntel 					param_total_num_mbufs = (unsigned)n;
776c8798818SIntel 				else
777c8798818SIntel 					rte_exit(EXIT_FAILURE,
778c8798818SIntel 						 "total-num-mbufs should be > 1024\n");
779c8798818SIntel 			}
780af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) {
781af75078fSIntel 				n = atoi(optarg);
782af75078fSIntel 				if (n >= ETHER_MIN_LEN) {
783af75078fSIntel 					rx_mode.max_rx_pkt_len = (uint32_t) n;
784af75078fSIntel 					if (n > ETHER_MAX_LEN)
7850074d02fSShahaf Shuler 						rx_offloads |=
7860074d02fSShahaf Shuler 							DEV_RX_OFFLOAD_JUMBO_FRAME;
787af75078fSIntel 				} else
788af75078fSIntel 					rte_exit(EXIT_FAILURE,
789af75078fSIntel 						 "Invalid max-pkt-len=%d - should be > %d\n",
790af75078fSIntel 						 n, ETHER_MIN_LEN);
791af75078fSIntel 			}
792af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) {
793af75078fSIntel 				if (!strcmp(optarg, "signature"))
794af75078fSIntel 					fdir_conf.mode =
795af75078fSIntel 						RTE_FDIR_MODE_SIGNATURE;
796af75078fSIntel 				else if (!strcmp(optarg, "perfect"))
797af75078fSIntel 					fdir_conf.mode = RTE_FDIR_MODE_PERFECT;
7989276b982SWenzhuo Lu 				else if (!strcmp(optarg, "perfect-mac-vlan"))
7999276b982SWenzhuo Lu 					fdir_conf.mode = RTE_FDIR_MODE_PERFECT_MAC_VLAN;
8009276b982SWenzhuo Lu 				else if (!strcmp(optarg, "perfect-tunnel"))
8019276b982SWenzhuo Lu 					fdir_conf.mode = RTE_FDIR_MODE_PERFECT_TUNNEL;
802af75078fSIntel 				else if (!strcmp(optarg, "none"))
803af75078fSIntel 					fdir_conf.mode = RTE_FDIR_MODE_NONE;
804af75078fSIntel 				else
805af75078fSIntel 					rte_exit(EXIT_FAILURE,
806af75078fSIntel 						 "pkt-mode-invalid %s invalid - must be: "
8079276b982SWenzhuo Lu 						 "none, signature, perfect, perfect-mac-vlan"
8089276b982SWenzhuo Lu 						 " or perfect-tunnel\n",
809af75078fSIntel 						 optarg);
810af75078fSIntel 			}
811af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name,
812af75078fSIntel 				    "pkt-filter-report-hash")) {
813af75078fSIntel 				if (!strcmp(optarg, "none"))
814af75078fSIntel 					fdir_conf.status =
815af75078fSIntel 						RTE_FDIR_NO_REPORT_STATUS;
816af75078fSIntel 				else if (!strcmp(optarg, "match"))
817af75078fSIntel 					fdir_conf.status =
818af75078fSIntel 						RTE_FDIR_REPORT_STATUS;
819af75078fSIntel 				else if (!strcmp(optarg, "always"))
820af75078fSIntel 					fdir_conf.status =
821af75078fSIntel 						RTE_FDIR_REPORT_STATUS_ALWAYS;
822af75078fSIntel 				else
823af75078fSIntel 					rte_exit(EXIT_FAILURE,
824af75078fSIntel 						 "pkt-filter-report-hash %s invalid "
825af75078fSIntel 						 "- must be: none or match or always\n",
826af75078fSIntel 						 optarg);
827af75078fSIntel 			}
828af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) {
829af75078fSIntel 				if (!strcmp(optarg, "64K"))
830af75078fSIntel 					fdir_conf.pballoc =
831af75078fSIntel 						RTE_FDIR_PBALLOC_64K;
832af75078fSIntel 				else if (!strcmp(optarg, "128K"))
833af75078fSIntel 					fdir_conf.pballoc =
834af75078fSIntel 						RTE_FDIR_PBALLOC_128K;
835af75078fSIntel 				else if (!strcmp(optarg, "256K"))
836af75078fSIntel 					fdir_conf.pballoc =
837af75078fSIntel 						RTE_FDIR_PBALLOC_256K;
838af75078fSIntel 				else
839af75078fSIntel 					rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -"
840af75078fSIntel 						 " must be: 64K or 128K or 256K\n",
841af75078fSIntel 						 optarg);
842af75078fSIntel 			}
843af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name,
844af75078fSIntel 				    "pkt-filter-drop-queue")) {
845af75078fSIntel 				n = atoi(optarg);
846af75078fSIntel 				if (n >= 0)
847af75078fSIntel 					fdir_conf.drop_queue = (uint8_t) n;
848af75078fSIntel 				else
849af75078fSIntel 					rte_exit(EXIT_FAILURE,
850af75078fSIntel 						 "drop queue %d invalid - must"
851af75078fSIntel 						 "be >= 0 \n", n);
852af75078fSIntel 			}
85362d3216dSReshma Pattan #ifdef RTE_LIBRTE_LATENCY_STATS
85462d3216dSReshma Pattan 			if (!strcmp(lgopts[opt_idx].name,
85562d3216dSReshma Pattan 				    "latencystats")) {
85662d3216dSReshma Pattan 				n = atoi(optarg);
85762d3216dSReshma Pattan 				if (n >= 0) {
85862d3216dSReshma Pattan 					latencystats_lcore_id = (lcoreid_t) n;
85962d3216dSReshma Pattan 					latencystats_enabled = 1;
86062d3216dSReshma Pattan 				} else
86162d3216dSReshma Pattan 					rte_exit(EXIT_FAILURE,
86262d3216dSReshma Pattan 						 "invalid lcore id %d for latencystats"
86362d3216dSReshma Pattan 						 " must be >= 0\n", n);
86462d3216dSReshma Pattan 			}
86562d3216dSReshma Pattan #endif
866e25e6c70SRemy Horton #ifdef RTE_LIBRTE_BITRATE
867e25e6c70SRemy Horton 			if (!strcmp(lgopts[opt_idx].name, "bitrate-stats")) {
868e25e6c70SRemy Horton 				n = atoi(optarg);
869e25e6c70SRemy Horton 				if (n >= 0) {
870e25e6c70SRemy Horton 					bitrate_lcore_id = (lcoreid_t) n;
871e25e6c70SRemy Horton 					bitrate_enabled = 1;
872e25e6c70SRemy Horton 				} else
873e25e6c70SRemy Horton 					rte_exit(EXIT_FAILURE,
874e25e6c70SRemy Horton 						 "invalid lcore id %d for bitrate stats"
875e25e6c70SRemy Horton 						 " must be >= 0\n", n);
876e25e6c70SRemy Horton 			}
877e25e6c70SRemy Horton #endif
87879dd163fSJeff Guo 			if (!strcmp(lgopts[opt_idx].name, "disable-crc-strip"))
8790074d02fSShahaf Shuler 				rx_offloads &= ~DEV_RX_OFFLOAD_CRC_STRIP;
8804c3ea508SOlivier Matz 			if (!strcmp(lgopts[opt_idx].name, "enable-lro"))
8810074d02fSShahaf Shuler 				rx_offloads |= DEV_RX_OFFLOAD_TCP_LRO;
88204997938SMaciej Czekaj 			if (!strcmp(lgopts[opt_idx].name, "enable-scatter"))
8830074d02fSShahaf Shuler 				rx_offloads |= DEV_RX_OFFLOAD_SCATTER;
884af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum"))
8850074d02fSShahaf Shuler 				rx_offloads |= DEV_RX_OFFLOAD_CHECKSUM;
886912267a3SRaslan Darawsheh 			if (!strcmp(lgopts[opt_idx].name,
887912267a3SRaslan Darawsheh 					"enable-rx-timestamp"))
8880074d02fSShahaf Shuler 				rx_offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
8890074d02fSShahaf Shuler 			if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan"))
8900074d02fSShahaf Shuler 				rx_offloads &= ~DEV_RX_OFFLOAD_VLAN;
891a47aa8b9SIntel 
892c9dd4aadSOuyang Changchun 			if (!strcmp(lgopts[opt_idx].name,
893c9dd4aadSOuyang Changchun 					"disable-hw-vlan-filter"))
8940074d02fSShahaf Shuler 				rx_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
895c9dd4aadSOuyang Changchun 
896c9dd4aadSOuyang Changchun 			if (!strcmp(lgopts[opt_idx].name,
897c9dd4aadSOuyang Changchun 					"disable-hw-vlan-strip"))
8980074d02fSShahaf Shuler 				rx_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
899c9dd4aadSOuyang Changchun 
900c9dd4aadSOuyang Changchun 			if (!strcmp(lgopts[opt_idx].name,
901c9dd4aadSOuyang Changchun 					"disable-hw-vlan-extend"))
9020074d02fSShahaf Shuler 				rx_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
903c9dd4aadSOuyang Changchun 
904ce8d5614SIntel 			if (!strcmp(lgopts[opt_idx].name, "enable-drop-en"))
905ce8d5614SIntel 				rx_drop_en = 1;
906ce8d5614SIntel 
907af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "disable-rss"))
908af75078fSIntel 				rss_hf = 0;
909af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "port-topology")) {
910af75078fSIntel 				if (!strcmp(optarg, "paired"))
911af75078fSIntel 					port_topology = PORT_TOPOLOGY_PAIRED;
912af75078fSIntel 				else if (!strcmp(optarg, "chained"))
913af75078fSIntel 					port_topology = PORT_TOPOLOGY_CHAINED;
9143e2006d6SCyril Chemparathy 				else if (!strcmp(optarg, "loop"))
9153e2006d6SCyril Chemparathy 					port_topology = PORT_TOPOLOGY_LOOP;
916af75078fSIntel 				else
917af75078fSIntel 					rte_exit(EXIT_FAILURE, "port-topology %s invalid -"
91875358833SPablo de Lara 						 " must be: paired, chained or loop\n",
919af75078fSIntel 						 optarg);
920af75078fSIntel 			}
921ce9b9fb0SCyril Chemparathy 			if (!strcmp(lgopts[opt_idx].name, "forward-mode"))
922ce9b9fb0SCyril Chemparathy 				set_pkt_forwarding_mode(optarg);
923af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rss-ip"))
9248a387fa8SHelin Zhang 				rss_hf = ETH_RSS_IP;
925af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rss-udp"))
9268a387fa8SHelin Zhang 				rss_hf = ETH_RSS_UDP;
927af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxq")) {
928af75078fSIntel 				n = atoi(optarg);
9293f7311baSWei Dai 				if (n >= 0 && check_nb_rxq((queueid_t)n) == 0)
930af75078fSIntel 					nb_rxq = (queueid_t) n;
931af75078fSIntel 				else
932af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxq %d invalid - must be"
9333f7311baSWei Dai 						  " >= 0 && <= %u\n", n,
9343f7311baSWei Dai 						  get_allowed_max_nb_rxq(&pid));
935af75078fSIntel 			}
936af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txq")) {
937af75078fSIntel 				n = atoi(optarg);
938*36db4f6cSWei Dai 				if (n >= 0 && check_nb_txq((queueid_t)n) == 0)
939af75078fSIntel 					nb_txq = (queueid_t) n;
940af75078fSIntel 				else
941af75078fSIntel 					rte_exit(EXIT_FAILURE, "txq %d invalid - must be"
942*36db4f6cSWei Dai 						  " >= 0 && <= %u\n", n,
943*36db4f6cSWei Dai 						  get_allowed_max_nb_txq(&pid));
944af75078fSIntel 			}
9455a8fb55cSReshma Pattan 			if (!nb_rxq && !nb_txq) {
9465a8fb55cSReshma Pattan 				rte_exit(EXIT_FAILURE, "Either rx or tx queues should "
9475a8fb55cSReshma Pattan 						"be non-zero\n");
9485a8fb55cSReshma Pattan 			}
949af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "burst")) {
950af75078fSIntel 				n = atoi(optarg);
951af75078fSIntel 				if ((n >= 1) && (n <= MAX_PKT_BURST))
952af75078fSIntel 					nb_pkt_per_burst = (uint16_t) n;
953af75078fSIntel 				else
954af75078fSIntel 					rte_exit(EXIT_FAILURE,
955af75078fSIntel 						 "burst must >= 1 and <= %d]",
956af75078fSIntel 						 MAX_PKT_BURST);
957af75078fSIntel 			}
958af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "mbcache")) {
959af75078fSIntel 				n = atoi(optarg);
960af75078fSIntel 				if ((n >= 0) &&
961af75078fSIntel 				    (n <= RTE_MEMPOOL_CACHE_MAX_SIZE))
962af75078fSIntel 					mb_mempool_cache = (uint16_t) n;
963af75078fSIntel 				else
964af75078fSIntel 					rte_exit(EXIT_FAILURE,
965af75078fSIntel 						 "mbcache must be >= 0 and <= %d\n",
966af75078fSIntel 						 RTE_MEMPOOL_CACHE_MAX_SIZE);
967af75078fSIntel 			}
968af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txfreet")) {
969af75078fSIntel 				n = atoi(optarg);
970af75078fSIntel 				if (n >= 0)
971f2c5125aSPablo de Lara 					tx_free_thresh = (int16_t)n;
972af75078fSIntel 				else
973af75078fSIntel 					rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n");
974af75078fSIntel 			}
975af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txrst")) {
976af75078fSIntel 				n = atoi(optarg);
977af75078fSIntel 				if (n >= 0)
978f2c5125aSPablo de Lara 					tx_rs_thresh = (int16_t)n;
979af75078fSIntel 				else
980af75078fSIntel 					rte_exit(EXIT_FAILURE, "txrst must be >= 0\n");
981af75078fSIntel 			}
982af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxd")) {
983af75078fSIntel 				n = atoi(optarg);
984af75078fSIntel 				if (n > 0) {
985af75078fSIntel 					if (rx_free_thresh >= n)
986af75078fSIntel 						rte_exit(EXIT_FAILURE,
987af75078fSIntel 							 "rxd must be > "
988af75078fSIntel 							 "rx_free_thresh(%d)\n",
989af75078fSIntel 							 (int)rx_free_thresh);
990af75078fSIntel 					else
991af75078fSIntel 						nb_rxd = (uint16_t) n;
992af75078fSIntel 				} else
993af75078fSIntel 					rte_exit(EXIT_FAILURE,
994af75078fSIntel 						 "rxd(%d) invalid - must be > 0\n",
995af75078fSIntel 						 n);
996af75078fSIntel 			}
997af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txd")) {
998af75078fSIntel 				n = atoi(optarg);
999af75078fSIntel 				if (n > 0)
1000af75078fSIntel 					nb_txd = (uint16_t) n;
1001af75078fSIntel 				else
1002af75078fSIntel 					rte_exit(EXIT_FAILURE, "txd must be in > 0\n");
1003af75078fSIntel 			}
1004af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txpt")) {
1005af75078fSIntel 				n = atoi(optarg);
1006af75078fSIntel 				if (n >= 0)
1007f2c5125aSPablo de Lara 					tx_pthresh = (int8_t)n;
1008af75078fSIntel 				else
1009af75078fSIntel 					rte_exit(EXIT_FAILURE, "txpt must be >= 0\n");
1010af75078fSIntel 			}
1011af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txht")) {
1012af75078fSIntel 				n = atoi(optarg);
1013af75078fSIntel 				if (n >= 0)
1014f2c5125aSPablo de Lara 					tx_hthresh = (int8_t)n;
1015af75078fSIntel 				else
1016af75078fSIntel 					rte_exit(EXIT_FAILURE, "txht must be >= 0\n");
1017af75078fSIntel 			}
1018af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "txwt")) {
1019af75078fSIntel 				n = atoi(optarg);
1020af75078fSIntel 				if (n >= 0)
1021f2c5125aSPablo de Lara 					tx_wthresh = (int8_t)n;
1022af75078fSIntel 				else
1023af75078fSIntel 					rte_exit(EXIT_FAILURE, "txwt must be >= 0\n");
1024af75078fSIntel 			}
1025af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxpt")) {
1026af75078fSIntel 				n = atoi(optarg);
1027af75078fSIntel 				if (n >= 0)
1028f2c5125aSPablo de Lara 					rx_pthresh = (int8_t)n;
1029af75078fSIntel 				else
1030af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n");
1031af75078fSIntel 			}
1032af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxht")) {
1033af75078fSIntel 				n = atoi(optarg);
1034af75078fSIntel 				if (n >= 0)
1035f2c5125aSPablo de Lara 					rx_hthresh = (int8_t)n;
1036af75078fSIntel 				else
1037af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxht must be >= 0\n");
1038af75078fSIntel 			}
1039af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxwt")) {
1040af75078fSIntel 				n = atoi(optarg);
1041af75078fSIntel 				if (n >= 0)
1042f2c5125aSPablo de Lara 					rx_wthresh = (int8_t)n;
1043af75078fSIntel 				else
1044af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n");
1045af75078fSIntel 			}
1046af75078fSIntel 			if (!strcmp(lgopts[opt_idx].name, "rxfreet")) {
1047af75078fSIntel 				n = atoi(optarg);
1048af75078fSIntel 				if (n >= 0)
1049f2c5125aSPablo de Lara 					rx_free_thresh = (int16_t)n;
1050af75078fSIntel 				else
1051af75078fSIntel 					rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n");
1052af75078fSIntel 			}
1053ed30d9b6SIntel 			if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) {
1054ed30d9b6SIntel 				if (parse_queue_stats_mapping_config(optarg, TX)) {
1055ed30d9b6SIntel 					rte_exit(EXIT_FAILURE,
1056ed30d9b6SIntel 						 "invalid TX queue statistics mapping config entered\n");
1057ed30d9b6SIntel 				}
1058ed30d9b6SIntel 			}
1059ed30d9b6SIntel 			if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) {
1060ed30d9b6SIntel 				if (parse_queue_stats_mapping_config(optarg, RX)) {
1061ed30d9b6SIntel 					rte_exit(EXIT_FAILURE,
1062ed30d9b6SIntel 						 "invalid RX queue statistics mapping config entered\n");
1063ed30d9b6SIntel 				}
1064ed30d9b6SIntel 			}
1065a7e7bb4eSCyril Chemparathy 			if (!strcmp(lgopts[opt_idx].name, "txpkts")) {
1066a7e7bb4eSCyril Chemparathy 				unsigned seg_lengths[RTE_MAX_SEGS_PER_PKT];
1067a7e7bb4eSCyril Chemparathy 				unsigned int nb_segs;
1068a7e7bb4eSCyril Chemparathy 
1069950d1516SBruce Richardson 				nb_segs = parse_item_list(optarg, "txpkt segments",
1070950d1516SBruce Richardson 						RTE_MAX_SEGS_PER_PKT, seg_lengths, 0);
1071a7e7bb4eSCyril Chemparathy 				if (nb_segs > 0)
1072a7e7bb4eSCyril Chemparathy 					set_tx_pkt_segments(seg_lengths, nb_segs);
1073a7e7bb4eSCyril Chemparathy 				else
1074a7e7bb4eSCyril Chemparathy 					rte_exit(EXIT_FAILURE, "bad txpkts\n");
1075a7e7bb4eSCyril Chemparathy 			}
10767741e4cfSIntel 			if (!strcmp(lgopts[opt_idx].name, "no-flush-rx"))
10777741e4cfSIntel 				no_flush_rx = 1;
1078bc202406SDavid Marchand 			if (!strcmp(lgopts[opt_idx].name, "disable-link-check"))
1079bc202406SDavid Marchand 				no_link_check = 1;
10808ea656f8SGaetan Rivet 			if (!strcmp(lgopts[opt_idx].name, "no-lsc-interrupt"))
10818ea656f8SGaetan Rivet 				lsc_interrupt = 0;
1082284c908cSGaetan Rivet 			if (!strcmp(lgopts[opt_idx].name, "no-rmv-interrupt"))
1083284c908cSGaetan Rivet 				rmv_interrupt = 0;
10847ee3e944SVasily Philipov 			if (!strcmp(lgopts[opt_idx].name, "flow-isolate-all"))
10857ee3e944SVasily Philipov 				flow_isolate_all = 1;
1086fd8c20aaSShahaf Shuler 			if (!strcmp(lgopts[opt_idx].name, "tx-offloads")) {
1087fd8c20aaSShahaf Shuler 				char *end = NULL;
1088fd8c20aaSShahaf Shuler 				n = strtoull(optarg, &end, 16);
1089fd8c20aaSShahaf Shuler 				if (n >= 0)
1090fd8c20aaSShahaf Shuler 					tx_offloads = (uint64_t)n;
1091fd8c20aaSShahaf Shuler 				else
1092fd8c20aaSShahaf Shuler 					rte_exit(EXIT_FAILURE,
1093fd8c20aaSShahaf Shuler 						 "tx-offloads must be >= 0\n");
1094fd8c20aaSShahaf Shuler 			}
10953af72783SGaetan Rivet 			if (!strcmp(lgopts[opt_idx].name, "print-event"))
10963af72783SGaetan Rivet 				if (parse_event_printing_config(optarg, 1)) {
10973af72783SGaetan Rivet 					rte_exit(EXIT_FAILURE,
10983af72783SGaetan Rivet 						 "invalid print-event argument\n");
10993af72783SGaetan Rivet 				}
11003af72783SGaetan Rivet 			if (!strcmp(lgopts[opt_idx].name, "mask-event"))
11013af72783SGaetan Rivet 				if (parse_event_printing_config(optarg, 0)) {
11023af72783SGaetan Rivet 					rte_exit(EXIT_FAILURE,
11033af72783SGaetan Rivet 						 "invalid mask-event argument\n");
11043af72783SGaetan Rivet 				}
11057741e4cfSIntel 
1106af75078fSIntel 			break;
1107af75078fSIntel 		case 'h':
1108af75078fSIntel 			usage(argv[0]);
1109af75078fSIntel 			rte_exit(EXIT_SUCCESS, "Displayed help\n");
1110af75078fSIntel 			break;
1111af75078fSIntel 		default:
1112af75078fSIntel 			usage(argv[0]);
1113af75078fSIntel 			rte_exit(EXIT_FAILURE,
1114af75078fSIntel 				 "Command line is incomplete or incorrect\n");
1115af75078fSIntel 			break;
1116af75078fSIntel 		}
1117af75078fSIntel 	}
11180074d02fSShahaf Shuler 
11190074d02fSShahaf Shuler 	/* Set offload configuration from command line parameters. */
11200074d02fSShahaf Shuler 	rx_mode.offloads = rx_offloads;
1121fd8c20aaSShahaf Shuler 	tx_mode.offloads = tx_offloads;
1122af75078fSIntel }
1123