1af75078fSIntel /*- 2af75078fSIntel * BSD LICENSE 3af75078fSIntel * 4e9d48c00SBruce Richardson * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. 5af75078fSIntel * All rights reserved. 6af75078fSIntel * 7af75078fSIntel * Redistribution and use in source and binary forms, with or without 8af75078fSIntel * modification, are permitted provided that the following conditions 9af75078fSIntel * are met: 10af75078fSIntel * 11af75078fSIntel * * Redistributions of source code must retain the above copyright 12af75078fSIntel * notice, this list of conditions and the following disclaimer. 13af75078fSIntel * * Redistributions in binary form must reproduce the above copyright 14af75078fSIntel * notice, this list of conditions and the following disclaimer in 15af75078fSIntel * the documentation and/or other materials provided with the 16af75078fSIntel * distribution. 17af75078fSIntel * * Neither the name of Intel Corporation nor the names of its 18af75078fSIntel * contributors may be used to endorse or promote products derived 19af75078fSIntel * from this software without specific prior written permission. 20af75078fSIntel * 21af75078fSIntel * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22af75078fSIntel * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23af75078fSIntel * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 24af75078fSIntel * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 25af75078fSIntel * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26af75078fSIntel * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27af75078fSIntel * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28af75078fSIntel * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29af75078fSIntel * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30af75078fSIntel * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31af75078fSIntel * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32af75078fSIntel */ 33af75078fSIntel 34af75078fSIntel #include <errno.h> 35af75078fSIntel #include <getopt.h> 36af75078fSIntel #include <stdarg.h> 37af75078fSIntel #include <stdio.h> 38af75078fSIntel #include <stdlib.h> 39af75078fSIntel #include <signal.h> 40af75078fSIntel #include <string.h> 41af75078fSIntel #include <time.h> 42af75078fSIntel #include <fcntl.h> 43af75078fSIntel #include <sys/types.h> 44af75078fSIntel #include <errno.h> 45af75078fSIntel 46af75078fSIntel #include <sys/queue.h> 47af75078fSIntel #include <sys/stat.h> 48af75078fSIntel 49af75078fSIntel #include <stdint.h> 50af75078fSIntel #include <unistd.h> 51af75078fSIntel #include <inttypes.h> 52af75078fSIntel 53af75078fSIntel #include <rte_common.h> 54af75078fSIntel #include <rte_byteorder.h> 55af75078fSIntel #include <rte_log.h> 56af75078fSIntel #include <rte_debug.h> 57af75078fSIntel #include <rte_cycles.h> 58af75078fSIntel #include <rte_memory.h> 59af75078fSIntel #include <rte_memzone.h> 60af75078fSIntel #include <rte_launch.h> 61af75078fSIntel #include <rte_tailq.h> 62af75078fSIntel #include <rte_eal.h> 63af75078fSIntel #include <rte_per_lcore.h> 64af75078fSIntel #include <rte_lcore.h> 65af75078fSIntel #include <rte_atomic.h> 66af75078fSIntel #include <rte_branch_prediction.h> 67af75078fSIntel #include <rte_ring.h> 68af75078fSIntel #include <rte_mempool.h> 69af75078fSIntel #include <rte_interrupts.h> 70af75078fSIntel #include <rte_pci.h> 71af75078fSIntel #include <rte_ether.h> 72af75078fSIntel #include <rte_ethdev.h> 73af75078fSIntel #include <rte_string_fns.h> 74*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 75af75078fSIntel #include <cmdline_parse.h> 76af75078fSIntel #include <cmdline_parse_etheraddr.h> 77*0d56cb81SThomas Monjalon #endif 78af75078fSIntel 79af75078fSIntel #include "testpmd.h" 80af75078fSIntel 81af75078fSIntel static void 82af75078fSIntel usage(char* progname) 83af75078fSIntel { 84*0d56cb81SThomas Monjalon printf("usage: %s " 85*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 86*0d56cb81SThomas Monjalon "[--interactive|-i] " 87*0d56cb81SThomas Monjalon #endif 88*0d56cb81SThomas Monjalon "[--help|-h] | [" 89af75078fSIntel "--coremask=COREMASK --portmask=PORTMASK --numa " 90c8798818SIntel "--mbuf-size= | --total-num-mbufs= | " 913be52ffcSIntel "--nb-cores= | --nb-ports= | " 92*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 93af75078fSIntel "--eth-peers-configfile= | " 943be52ffcSIntel "--eth-peer=X,M:M:M:M:M:M | " 95*0d56cb81SThomas Monjalon #endif 96af75078fSIntel "--pkt-filter-mode= |" 97af75078fSIntel "--rss-ip | --rss-udp | " 98af75078fSIntel "--rxpt= | --rxht= | --rxwt= | --rxfreet= | " 99af75078fSIntel "--txpt= | --txht= | --txwt= | --txfreet= | " 100ce8d5614SIntel "--txrst= | --txqflags= ]\n", 101af75078fSIntel progname); 102*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1033be52ffcSIntel printf(" --interactive: run in interactive mode.\n"); 104*0d56cb81SThomas Monjalon #endif 1053be52ffcSIntel printf(" --help: display this message and quit.\n"); 1063be52ffcSIntel printf(" --nb-cores=N: set the number of forwarding cores " 1073be52ffcSIntel "(1 <= N <= %d).\n", nb_lcores); 1083be52ffcSIntel printf(" --nb-ports=N: set the number of forwarding ports " 1093be52ffcSIntel "(1 <= N <= %d).\n", nb_ports); 110af75078fSIntel printf(" --coremask=COREMASK: hexadecimal bitmask of cores running " 111013af9b6SIntel "the packet forwarding test. The master lcore is reserved for " 1123be52ffcSIntel "command line parsing only, and cannot be masked on for " 1133be52ffcSIntel "packet forwarding.\n"); 114af75078fSIntel printf(" --portmask=PORTMASK: hexadecimal bitmask of ports used " 1153be52ffcSIntel "by the packet forwarding test.\n"); 116af75078fSIntel printf(" --numa: enable NUMA-aware allocation of RX/TX rings and of " 1173be52ffcSIntel "RX memory buffers (mbufs).\n"); 118b6ea6408SIntel printf(" --port-numa-config=(port,socket)[,(port,socket)]: " 119b6ea6408SIntel "specify the socket on which the memory pool " 120b6ea6408SIntel "used by the port will be allocated.\n"); 121b6ea6408SIntel printf(" --ring-numa-config=(port,flag,socket)[,(port,flag,socket)]: " 122b6ea6408SIntel "specify the socket on which the TX/RX rings for " 123b6ea6408SIntel "the port will be allocated " 124b6ea6408SIntel "(flag: 1 for RX; 2 for TX; 3 for RX and TX).\n"); 125b6ea6408SIntel printf(" --socket-num=N: set socket from which all memory is allocated " 126b6ea6408SIntel "in NUMA mode.\n"); 1273be52ffcSIntel printf(" --mbuf-size=N: set the data size of mbuf to N bytes.\n"); 1283be52ffcSIntel printf(" --total-num-mbufs=N: set the number of mbufs to be allocated " 1293be52ffcSIntel "in mbuf pools.\n"); 1303be52ffcSIntel printf(" --max-pkt-len=N: set the maximum size of packet to N bytes.\n"); 131*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 1323be52ffcSIntel printf(" --eth-peers-configfile=name: config file with ethernet addresses " 1333be52ffcSIntel "of peer ports.\n"); 1343be52ffcSIntel printf(" --eth-peer=X,M:M:M:M:M:M: set the MAC address of the X peer " 1353be52ffcSIntel "port (0 <= X < %d).\n", RTE_MAX_ETHPORTS); 136*0d56cb81SThomas Monjalon #endif 1373be52ffcSIntel printf(" --pkt-filter-mode=N: set Flow Director mode " 1383be52ffcSIntel "(N: none (default mode) or signature or perfect).\n"); 1393be52ffcSIntel printf(" --pkt-filter-report-hash=N: set Flow Director report mode " 1403be52ffcSIntel "(N: none or match (default) or always).\n"); 1413be52ffcSIntel printf(" --pkt-filter-size=N: set Flow Director mode " 1423be52ffcSIntel "(N: 64K (default mode) or 128K or 256K).\n"); 143af75078fSIntel printf(" --pkt-filter-flexbytes-offset=N: set flexbytes-offset. " 144af75078fSIntel "The offset is defined in word units counted from the " 145af75078fSIntel "first byte of the destination Ethernet MAC address. " 1463be52ffcSIntel "0 <= N <= 32.\n"); 147af75078fSIntel printf(" --pkt-filter-drop-queue=N: set drop-queue. " 1483be52ffcSIntel "In perfect mode, when you add a rule with queue = -1 " 149af75078fSIntel "the packet will be enqueued into the rx drop-queue. " 150af75078fSIntel "If the drop-queue doesn't exist, the packet is dropped. " 1513be52ffcSIntel "By default drop-queue=127.\n"); 1523be52ffcSIntel printf(" --crc-strip: enable CRC stripping by hardware.\n"); 1533be52ffcSIntel printf(" --enable-rx-cksum: enable rx hardware checksum offload.\n"); 1543be52ffcSIntel printf(" --disable-hw-vlan: disable hardware vlan.\n"); 1553be52ffcSIntel printf(" --enable-drop-en: enable per queue packet drop.\n"); 1563be52ffcSIntel printf(" --disable-rss: disable rss.\n"); 157af75078fSIntel printf(" --port-topology=N: set port topology (N: paired (default) or " 1583be52ffcSIntel "chained).\n"); 1593be52ffcSIntel printf(" --rss-ip: set RSS functions to IPv4/IPv6 only .\n"); 1603be52ffcSIntel printf(" --rss-udp: set RSS functions to IPv4/IPv6 + UDP.\n"); 1613be52ffcSIntel printf(" --rxq=N: set the number of RX queues per port to N.\n"); 1623be52ffcSIntel printf(" --rxd=N: set the number of descriptors in RX rings to N.\n"); 1633be52ffcSIntel printf(" --txq=N: set the number of TX queues per port to N.\n"); 1643be52ffcSIntel printf(" --txd=N: set the number of descriptors in TX rings to N.\n"); 1653be52ffcSIntel printf(" --burst=N: set the number of packets per burst to N.\n"); 1663be52ffcSIntel printf(" --mbcache=N: set the cache of mbuf memory pool to N.\n"); 1673be52ffcSIntel printf(" --rxpt=N: set prefetch threshold register of RX rings to N " 1683be52ffcSIntel "(0 <= N <= 16).\n"); 1693be52ffcSIntel printf(" --rxht=N: set the host threshold register of RX rings to N " 1703be52ffcSIntel "(0 <= N <= 16).\n"); 1713be52ffcSIntel printf(" --rxfreet=N: set the free threshold of RX descriptors to N " 1723be52ffcSIntel "(0 <= N < value of rxd).\n"); 1733be52ffcSIntel printf(" --rxwt=N: set the write-back threshold register of RX rings " 1743be52ffcSIntel "to N (0 <= N <= 16).\n"); 1753be52ffcSIntel printf(" --txpt=N: set the prefetch threshold register of TX rings " 1763be52ffcSIntel "to N (0 <= N <= 16).\n"); 1773be52ffcSIntel printf(" --txht=N: set the nhost threshold register of TX rings to N " 1783be52ffcSIntel "(0 <= N <= 16).\n"); 1793be52ffcSIntel printf(" --txwt=N: set the write-back threshold register of TX rings " 1803be52ffcSIntel "to N (0 <= N <= 16).\n"); 1813be52ffcSIntel printf(" --txfreet=N: set the transmit free threshold of TX rings to N " 1823be52ffcSIntel "(0 <= N <= value of txd).\n"); 1833be52ffcSIntel printf(" --txrst=N: set the transmit RS bit threshold of TX rings to N " 1843be52ffcSIntel "(0 <= N <= value of txd).\n"); 1853be52ffcSIntel printf(" --txqflags=0xXXXXXXXX: hexadecimal bitmask of TX queue flags " 1863be52ffcSIntel "(0 <= N <= 0x7FFFFFFF).\n"); 1873be52ffcSIntel printf(" --tx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 188ed30d9b6SIntel "tx queues statistics counters mapping " 1893be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1903be52ffcSIntel printf(" --rx-queue-stats-mapping=(port,queue,mapping)[,(port,queue,mapping]: " 191ed30d9b6SIntel "rx queues statistics counters mapping " 1923be52ffcSIntel "(0 <= mapping <= %d).\n", RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 1935e2ee196SIntel printf(" --no-flush-rx: Don't flush RX streams before forwarding." 1945e2ee196SIntel " Used mainly with PCAP drivers.\n"); 195af75078fSIntel } 196af75078fSIntel 197*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 198af75078fSIntel static int 199af75078fSIntel init_peer_eth_addrs(char *config_filename) 200af75078fSIntel { 201af75078fSIntel FILE *config_file; 202af75078fSIntel portid_t i; 203af75078fSIntel char buf[50]; 204af75078fSIntel 205af75078fSIntel config_file = fopen(config_filename, "r"); 206af75078fSIntel if (config_file == NULL) { 2073be52ffcSIntel perror("Failed to open eth config file\n"); 208af75078fSIntel return -1; 209af75078fSIntel } 210af75078fSIntel 211af75078fSIntel for (i = 0; i < RTE_MAX_ETHPORTS; i++) { 212af75078fSIntel 213af75078fSIntel if (fgets(buf, sizeof(buf), config_file) == NULL) 214af75078fSIntel break; 215af75078fSIntel 216af75078fSIntel if (cmdline_parse_etheraddr(NULL, buf, &peer_eth_addrs[i]) < 0 ){ 2173be52ffcSIntel printf("Bad MAC address format on line %d\n", i+1); 218af75078fSIntel fclose(config_file); 219af75078fSIntel return -1; 220af75078fSIntel } 221af75078fSIntel } 222af75078fSIntel fclose(config_file); 223af75078fSIntel nb_peer_eth_addrs = (portid_t) i; 224af75078fSIntel return 0; 225af75078fSIntel } 226*0d56cb81SThomas Monjalon #endif 227af75078fSIntel 228af75078fSIntel /* 229af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 230af75078fSIntel * the global configuration of forwarding cores. 231af75078fSIntel */ 232af75078fSIntel static void 233af75078fSIntel parse_fwd_coremask(const char *coremask) 234af75078fSIntel { 235af75078fSIntel char *end; 236af75078fSIntel unsigned long long int cm; 237af75078fSIntel 238af75078fSIntel /* parse hexadecimal string */ 239af75078fSIntel end = NULL; 240af75078fSIntel cm = strtoull(coremask, &end, 16); 241af75078fSIntel if ((coremask[0] == '\0') || (end == NULL) || (*end != '\0')) 242af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd core mask\n"); 243013af9b6SIntel else if (set_fwd_lcores_mask((uint64_t) cm) < 0) 244013af9b6SIntel rte_exit(EXIT_FAILURE, "coremask is not valid\n"); 245af75078fSIntel } 246af75078fSIntel 247af75078fSIntel /* 248af75078fSIntel * Parse the coremask given as argument (hexadecimal string) and set 249af75078fSIntel * the global configuration of forwarding cores. 250af75078fSIntel */ 251af75078fSIntel static void 252af75078fSIntel parse_fwd_portmask(const char *portmask) 253af75078fSIntel { 254af75078fSIntel char *end; 255af75078fSIntel unsigned long long int pm; 256af75078fSIntel 257af75078fSIntel /* parse hexadecimal string */ 258af75078fSIntel end = NULL; 259af75078fSIntel pm = strtoull(portmask, &end, 16); 260af75078fSIntel if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0')) 261af75078fSIntel rte_exit(EXIT_FAILURE, "Invalid fwd port mask\n"); 262af75078fSIntel else 263af75078fSIntel set_fwd_ports_mask((uint64_t) pm); 264af75078fSIntel } 265af75078fSIntel 266ed30d9b6SIntel 267ed30d9b6SIntel static int 268ed30d9b6SIntel parse_queue_stats_mapping_config(const char *q_arg, int is_rx) 269ed30d9b6SIntel { 270ed30d9b6SIntel char s[256]; 271ed30d9b6SIntel const char *p, *p0 = q_arg; 272ed30d9b6SIntel char *end; 273ed30d9b6SIntel enum fieldnames { 274ed30d9b6SIntel FLD_PORT = 0, 275ed30d9b6SIntel FLD_QUEUE, 276ed30d9b6SIntel FLD_STATS_COUNTER, 277ed30d9b6SIntel _NUM_FLD 278ed30d9b6SIntel }; 279ed30d9b6SIntel unsigned long int_fld[_NUM_FLD]; 280ed30d9b6SIntel char *str_fld[_NUM_FLD]; 281ed30d9b6SIntel int i; 282ed30d9b6SIntel unsigned size; 283ed30d9b6SIntel 284ed30d9b6SIntel /* reset from value set at definition */ 285ed30d9b6SIntel is_rx ? (nb_rx_queue_stats_mappings = 0) : (nb_tx_queue_stats_mappings = 0); 286ed30d9b6SIntel 287ed30d9b6SIntel while ((p = strchr(p0,'(')) != NULL) { 288ed30d9b6SIntel ++p; 289ed30d9b6SIntel if((p0 = strchr(p,')')) == NULL) 290ed30d9b6SIntel return -1; 291ed30d9b6SIntel 292ed30d9b6SIntel size = p0 - p; 293ed30d9b6SIntel if(size >= sizeof(s)) 294ed30d9b6SIntel return -1; 295ed30d9b6SIntel 296ed30d9b6SIntel rte_snprintf(s, sizeof(s), "%.*s", size, p); 297ed30d9b6SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 298ed30d9b6SIntel return -1; 299ed30d9b6SIntel for (i = 0; i < _NUM_FLD; i++){ 300ed30d9b6SIntel errno = 0; 301ed30d9b6SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 302ed30d9b6SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 303ed30d9b6SIntel return -1; 304ed30d9b6SIntel } 305ed30d9b6SIntel /* Check mapping field is in correct range (0..RTE_ETHDEV_QUEUE_STAT_CNTRS-1) */ 306ed30d9b6SIntel if (int_fld[FLD_STATS_COUNTER] >= RTE_ETHDEV_QUEUE_STAT_CNTRS) { 307ed30d9b6SIntel printf("Stats counter not in the correct range 0..%d\n", 308ed30d9b6SIntel RTE_ETHDEV_QUEUE_STAT_CNTRS - 1); 309ed30d9b6SIntel return -1; 310ed30d9b6SIntel } 311ed30d9b6SIntel 312ed30d9b6SIntel if (is_rx ? (nb_rx_queue_stats_mappings >= MAX_RX_QUEUE_STATS_MAPPINGS) : 313ed30d9b6SIntel (nb_tx_queue_stats_mappings >= MAX_TX_QUEUE_STATS_MAPPINGS)) { 314ed30d9b6SIntel printf("exceeded max number of %s queue statistics mappings: %hu\n", 315ed30d9b6SIntel is_rx ? "RX" : "TX", 316ed30d9b6SIntel is_rx ? nb_rx_queue_stats_mappings : nb_tx_queue_stats_mappings); 317ed30d9b6SIntel return -1; 318ed30d9b6SIntel } 319ed30d9b6SIntel if (!is_rx) { 320ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].port_id = 321ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 322ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].queue_id = 323ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 324ed30d9b6SIntel tx_queue_stats_mappings_array[nb_tx_queue_stats_mappings].stats_counter_id = 325ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 326ed30d9b6SIntel ++nb_tx_queue_stats_mappings; 327ed30d9b6SIntel } 328ed30d9b6SIntel else { 329ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].port_id = 330ed30d9b6SIntel (uint8_t)int_fld[FLD_PORT]; 331ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].queue_id = 332ed30d9b6SIntel (uint8_t)int_fld[FLD_QUEUE]; 333ed30d9b6SIntel rx_queue_stats_mappings_array[nb_rx_queue_stats_mappings].stats_counter_id = 334ed30d9b6SIntel (uint8_t)int_fld[FLD_STATS_COUNTER]; 335ed30d9b6SIntel ++nb_rx_queue_stats_mappings; 336ed30d9b6SIntel } 337ed30d9b6SIntel 338ed30d9b6SIntel } 339ed30d9b6SIntel /* Reassign the rx/tx_queue_stats_mappings pointer to point to this newly populated array rather */ 340ed30d9b6SIntel /* than to the default array (that was set at its definition) */ 341ed30d9b6SIntel is_rx ? (rx_queue_stats_mappings = rx_queue_stats_mappings_array) : 342ed30d9b6SIntel (tx_queue_stats_mappings = tx_queue_stats_mappings_array); 343ed30d9b6SIntel return 0; 344ed30d9b6SIntel } 345ed30d9b6SIntel 346b6ea6408SIntel static int 347b6ea6408SIntel parse_portnuma_config(const char *q_arg) 348b6ea6408SIntel { 349b6ea6408SIntel char s[256]; 350b6ea6408SIntel const char *p, *p0 = q_arg; 351b6ea6408SIntel char *end; 352b6ea6408SIntel uint8_t i,port_id,socket_id; 353b6ea6408SIntel unsigned size; 354b6ea6408SIntel enum fieldnames { 355b6ea6408SIntel FLD_PORT = 0, 356b6ea6408SIntel FLD_SOCKET, 357b6ea6408SIntel _NUM_FLD 358b6ea6408SIntel }; 359b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 360b6ea6408SIntel char *str_fld[_NUM_FLD]; 361b6ea6408SIntel 362b6ea6408SIntel /* reset from value set at definition */ 363b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 364b6ea6408SIntel ++p; 365b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 366b6ea6408SIntel return -1; 367b6ea6408SIntel 368b6ea6408SIntel size = p0 - p; 369b6ea6408SIntel if(size >= sizeof(s)) 370b6ea6408SIntel return -1; 371b6ea6408SIntel 372b6ea6408SIntel rte_snprintf(s, sizeof(s), "%.*s", size, p); 373b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 374b6ea6408SIntel return -1; 375b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 376b6ea6408SIntel errno = 0; 377b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 378b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 379b6ea6408SIntel return -1; 380b6ea6408SIntel } 381b6ea6408SIntel port_id = (uint8_t)int_fld[FLD_PORT]; 382b6ea6408SIntel if (port_id >= nb_ports) { 383b6ea6408SIntel printf("Invalid port, range is [0, %d]\n", nb_ports - 1); 384b6ea6408SIntel return -1; 385b6ea6408SIntel } 386b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 387b6ea6408SIntel if(socket_id >= MAX_SOCKET) { 388b6ea6408SIntel printf("Invalid socket id, range is [0, %d]\n", 389b6ea6408SIntel MAX_SOCKET - 1); 390b6ea6408SIntel return -1; 391b6ea6408SIntel } 392b6ea6408SIntel port_numa[port_id] = socket_id; 393b6ea6408SIntel } 394b6ea6408SIntel 395b6ea6408SIntel return 0; 396b6ea6408SIntel } 397b6ea6408SIntel 398b6ea6408SIntel static int 399b6ea6408SIntel parse_ringnuma_config(const char *q_arg) 400b6ea6408SIntel { 401b6ea6408SIntel char s[256]; 402b6ea6408SIntel const char *p, *p0 = q_arg; 403b6ea6408SIntel char *end; 404b6ea6408SIntel uint8_t i,port_id,ring_flag,socket_id; 405b6ea6408SIntel unsigned size; 406b6ea6408SIntel enum fieldnames { 407b6ea6408SIntel FLD_PORT = 0, 408b6ea6408SIntel FLD_FLAG, 409b6ea6408SIntel FLD_SOCKET, 410b6ea6408SIntel _NUM_FLD 411b6ea6408SIntel }; 412b6ea6408SIntel unsigned long int_fld[_NUM_FLD]; 413b6ea6408SIntel char *str_fld[_NUM_FLD]; 414b6ea6408SIntel #define RX_RING_ONLY 0x1 415b6ea6408SIntel #define TX_RING_ONLY 0x2 416b6ea6408SIntel #define RXTX_RING 0x3 417b6ea6408SIntel 418b6ea6408SIntel /* reset from value set at definition */ 419b6ea6408SIntel while ((p = strchr(p0,'(')) != NULL) { 420b6ea6408SIntel ++p; 421b6ea6408SIntel if((p0 = strchr(p,')')) == NULL) 422b6ea6408SIntel return -1; 423b6ea6408SIntel 424b6ea6408SIntel size = p0 - p; 425b6ea6408SIntel if(size >= sizeof(s)) 426b6ea6408SIntel return -1; 427b6ea6408SIntel 428b6ea6408SIntel rte_snprintf(s, sizeof(s), "%.*s", size, p); 429b6ea6408SIntel if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD) 430b6ea6408SIntel return -1; 431b6ea6408SIntel for (i = 0; i < _NUM_FLD; i++) { 432b6ea6408SIntel errno = 0; 433b6ea6408SIntel int_fld[i] = strtoul(str_fld[i], &end, 0); 434b6ea6408SIntel if (errno != 0 || end == str_fld[i] || int_fld[i] > 255) 435b6ea6408SIntel return -1; 436b6ea6408SIntel } 437b6ea6408SIntel port_id = (uint8_t)int_fld[FLD_PORT]; 438b6ea6408SIntel if (port_id >= nb_ports) { 439b6ea6408SIntel printf("Invalid port, range is [0, %d]\n", nb_ports - 1); 440b6ea6408SIntel return -1; 441b6ea6408SIntel } 442b6ea6408SIntel socket_id = (uint8_t)int_fld[FLD_SOCKET]; 443b6ea6408SIntel if (socket_id >= MAX_SOCKET) { 444b6ea6408SIntel printf("Invalid socket id, range is [0, %d]\n", 445b6ea6408SIntel MAX_SOCKET - 1); 446b6ea6408SIntel return -1; 447b6ea6408SIntel } 448b6ea6408SIntel ring_flag = (uint8_t)int_fld[FLD_FLAG]; 449b6ea6408SIntel if ((ring_flag < RX_RING_ONLY) || (ring_flag > RXTX_RING)) { 450b6ea6408SIntel printf("Invalid ring-flag=%d config for port =%d\n", 451b6ea6408SIntel ring_flag,port_id); 452b6ea6408SIntel return -1; 453b6ea6408SIntel } 454b6ea6408SIntel 455b6ea6408SIntel switch (ring_flag & RXTX_RING) { 456b6ea6408SIntel case RX_RING_ONLY: 457b6ea6408SIntel rxring_numa[port_id] = socket_id; 458b6ea6408SIntel break; 459b6ea6408SIntel case TX_RING_ONLY: 460b6ea6408SIntel txring_numa[port_id] = socket_id; 461b6ea6408SIntel break; 462b6ea6408SIntel case RXTX_RING: 463b6ea6408SIntel rxring_numa[port_id] = socket_id; 464b6ea6408SIntel txring_numa[port_id] = socket_id; 465b6ea6408SIntel break; 466b6ea6408SIntel default: 467b6ea6408SIntel printf("Invalid ring-flag=%d config for port=%d\n", 468b6ea6408SIntel ring_flag,port_id); 469b6ea6408SIntel break; 470b6ea6408SIntel } 471b6ea6408SIntel } 472b6ea6408SIntel 473b6ea6408SIntel return 0; 474b6ea6408SIntel } 475ed30d9b6SIntel 476af75078fSIntel void 477af75078fSIntel launch_args_parse(int argc, char** argv) 478af75078fSIntel { 479af75078fSIntel int n, opt; 480af75078fSIntel char **argvopt; 481af75078fSIntel int opt_idx; 482013af9b6SIntel enum { TX, RX }; 483013af9b6SIntel 484af75078fSIntel static struct option lgopts[] = { 485af75078fSIntel { "help", 0, 0, 0 }, 486*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 487af75078fSIntel { "interactive", 0, 0, 0 }, 488af75078fSIntel { "eth-peers-configfile", 1, 0, 0 }, 489af75078fSIntel { "eth-peer", 1, 0, 0 }, 490*0d56cb81SThomas Monjalon #endif 491af75078fSIntel { "ports", 1, 0, 0 }, 492af75078fSIntel { "nb-cores", 1, 0, 0 }, 493af75078fSIntel { "nb-ports", 1, 0, 0 }, 494af75078fSIntel { "coremask", 1, 0, 0 }, 495af75078fSIntel { "portmask", 1, 0, 0 }, 496af75078fSIntel { "numa", 0, 0, 0 }, 497148f963fSBruce Richardson { "mp-anon", 0, 0, 0 }, 498b6ea6408SIntel { "port-numa-config", 1, 0, 0 }, 499b6ea6408SIntel { "ring-numa-config", 1, 0, 0 }, 500b6ea6408SIntel { "socket-num", 1, 0, 0 }, 501af75078fSIntel { "mbuf-size", 1, 0, 0 }, 502c8798818SIntel { "total-num-mbufs", 1, 0, 0 }, 503af75078fSIntel { "max-pkt-len", 1, 0, 0 }, 504af75078fSIntel { "pkt-filter-mode", 1, 0, 0 }, 505af75078fSIntel { "pkt-filter-report-hash", 1, 0, 0 }, 506af75078fSIntel { "pkt-filter-size", 1, 0, 0 }, 507af75078fSIntel { "pkt-filter-flexbytes-offset",1, 0, 0 }, 508af75078fSIntel { "pkt-filter-drop-queue", 1, 0, 0 }, 509af75078fSIntel { "crc-strip", 0, 0, 0 }, 510013af9b6SIntel { "enable-rx-cksum", 0, 0, 0 }, 511af75078fSIntel { "disable-hw-vlan", 0, 0, 0 }, 512013af9b6SIntel { "enable-drop-en", 0, 0, 0 }, 513af75078fSIntel { "disable-rss", 0, 0, 0 }, 514af75078fSIntel { "port-topology", 1, 0, 0 }, 515af75078fSIntel { "rss-ip", 0, 0, 0 }, 516af75078fSIntel { "rss-udp", 0, 0, 0 }, 517af75078fSIntel { "rxq", 1, 0, 0 }, 518af75078fSIntel { "txq", 1, 0, 0 }, 519af75078fSIntel { "rxd", 1, 0, 0 }, 520af75078fSIntel { "txd", 1, 0, 0 }, 521af75078fSIntel { "burst", 1, 0, 0 }, 522af75078fSIntel { "mbcache", 1, 0, 0 }, 523af75078fSIntel { "txpt", 1, 0, 0 }, 524af75078fSIntel { "txht", 1, 0, 0 }, 525af75078fSIntel { "txwt", 1, 0, 0 }, 526af75078fSIntel { "txfreet", 1, 0, 0 }, 527af75078fSIntel { "txrst", 1, 0, 0 }, 528ce8d5614SIntel { "txqflags", 1, 0, 0 }, 529af75078fSIntel { "rxpt", 1, 0, 0 }, 530af75078fSIntel { "rxht", 1, 0, 0 }, 531af75078fSIntel { "rxwt", 1, 0, 0 }, 532af75078fSIntel { "rxfreet", 1, 0, 0 }, 533ed30d9b6SIntel { "tx-queue-stats-mapping", 1, 0, 0 }, 534ed30d9b6SIntel { "rx-queue-stats-mapping", 1, 0, 0 }, 5357741e4cfSIntel { "no-flush-rx", 0, 0, 0 }, 536af75078fSIntel { 0, 0, 0, 0 }, 537af75078fSIntel }; 538af75078fSIntel 539af75078fSIntel argvopt = argv; 540af75078fSIntel 541*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 542*0d56cb81SThomas Monjalon #define SHORTOPTS "ih" 543*0d56cb81SThomas Monjalon #else 544*0d56cb81SThomas Monjalon #define SHORTOPTS "h" 545*0d56cb81SThomas Monjalon #endif 546*0d56cb81SThomas Monjalon while ((opt = getopt_long(argc, argvopt, SHORTOPTS, 547af75078fSIntel lgopts, &opt_idx)) != EOF) { 548af75078fSIntel switch (opt) { 549*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 550af75078fSIntel case 'i': 551af75078fSIntel printf("Interactive-mode selected\n"); 552af75078fSIntel interactive = 1; 553af75078fSIntel break; 554*0d56cb81SThomas Monjalon #endif 555af75078fSIntel case 0: /*long options */ 556af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "help")) { 557af75078fSIntel usage(argv[0]); 558af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 559af75078fSIntel } 560*0d56cb81SThomas Monjalon #ifdef RTE_LIBRTE_CMDLINE 561af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "interactive")) { 562af75078fSIntel printf("Interactive-mode selected\n"); 563af75078fSIntel interactive = 1; 564af75078fSIntel } 565af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 566af75078fSIntel "eth-peers-configfile")) { 567af75078fSIntel if (init_peer_eth_addrs(optarg) != 0) 568af75078fSIntel rte_exit(EXIT_FAILURE, 569af75078fSIntel "Cannot open logfile\n"); 570af75078fSIntel } 571af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "eth-peer")) { 572af75078fSIntel char *port_end; 573af75078fSIntel uint8_t c, peer_addr[6]; 574af75078fSIntel 575af75078fSIntel errno = 0; 576af75078fSIntel n = strtoul(optarg, &port_end, 10); 577af75078fSIntel if (errno != 0 || port_end == optarg || *port_end++ != ',') 578af75078fSIntel rte_exit(EXIT_FAILURE, 579af75078fSIntel "Invalid eth-peer: %s", optarg); 580af75078fSIntel if (n >= RTE_MAX_ETHPORTS) 581af75078fSIntel rte_exit(EXIT_FAILURE, 582af75078fSIntel "eth-peer: port %d >= RTE_MAX_ETHPORTS(%d)\n", 583af75078fSIntel n, RTE_MAX_ETHPORTS); 584af75078fSIntel 585af75078fSIntel if (cmdline_parse_etheraddr(NULL, port_end, &peer_addr) < 0 ) 586af75078fSIntel rte_exit(EXIT_FAILURE, 587af75078fSIntel "Invalid ethernet address: %s\n", 588af75078fSIntel port_end); 589af75078fSIntel for (c = 0; c < 6; c++) 590af75078fSIntel peer_eth_addrs[n].addr_bytes[c] = 591af75078fSIntel peer_addr[c]; 592af75078fSIntel nb_peer_eth_addrs++; 593af75078fSIntel } 594*0d56cb81SThomas Monjalon #endif 595af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-ports")) { 596af75078fSIntel n = atoi(optarg); 597af75078fSIntel if (n > 0 && n <= nb_ports) 598af75078fSIntel nb_fwd_ports = (uint8_t) n; 599af75078fSIntel else 600af75078fSIntel rte_exit(EXIT_FAILURE, 601af75078fSIntel "nb-ports should be > 0 and <= %d\n", 602af75078fSIntel nb_ports); 603af75078fSIntel } 604af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "nb-cores")) { 605af75078fSIntel n = atoi(optarg); 606af75078fSIntel if (n > 0 && n <= nb_lcores) 607af75078fSIntel nb_fwd_lcores = (uint8_t) n; 608af75078fSIntel else 609af75078fSIntel rte_exit(EXIT_FAILURE, 610af75078fSIntel "nb-cores should be > 0 and <= %d\n", 611af75078fSIntel nb_lcores); 612af75078fSIntel } 613af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "coremask")) 614af75078fSIntel parse_fwd_coremask(optarg); 615af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "portmask")) 616af75078fSIntel parse_fwd_portmask(optarg); 617b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "numa")) { 618af75078fSIntel numa_support = 1; 619b6ea6408SIntel memset(port_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 620b6ea6408SIntel memset(rxring_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 621b6ea6408SIntel memset(txring_numa,NUMA_NO_CONFIG,RTE_MAX_ETHPORTS); 622b6ea6408SIntel } 623148f963fSBruce Richardson if (!strcmp(lgopts[opt_idx].name, "mp-anon")) { 624148f963fSBruce Richardson mp_anon = 1; 625148f963fSBruce Richardson } 626b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "port-numa-config")) { 627b6ea6408SIntel if (parse_portnuma_config(optarg)) 628b6ea6408SIntel rte_exit(EXIT_FAILURE, 629b6ea6408SIntel "invalid port-numa configuration\n"); 630b6ea6408SIntel } 631b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "ring-numa-config")) 632b6ea6408SIntel if (parse_ringnuma_config(optarg)) 633b6ea6408SIntel rte_exit(EXIT_FAILURE, 634b6ea6408SIntel "invalid ring-numa configuration\n"); 635b6ea6408SIntel if (!strcmp(lgopts[opt_idx].name, "socket-num")) { 636b6ea6408SIntel n = atoi(optarg); 637b6ea6408SIntel if(n < MAX_SOCKET) 638b6ea6408SIntel socket_num = (uint8_t)n; 639b6ea6408SIntel else 640b6ea6408SIntel rte_exit(EXIT_FAILURE, 641b6ea6408SIntel "The socket number should be < %d\n", 642b6ea6408SIntel MAX_SOCKET); 643b6ea6408SIntel } 644af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbuf-size")) { 645af75078fSIntel n = atoi(optarg); 646af75078fSIntel if (n > 0 && n <= 0xFFFF) 647af75078fSIntel mbuf_data_size = (uint16_t) n; 648af75078fSIntel else 649af75078fSIntel rte_exit(EXIT_FAILURE, 650af75078fSIntel "mbuf-size should be > 0 and < 65536\n"); 651af75078fSIntel } 652c8798818SIntel if (!strcmp(lgopts[opt_idx].name, "total-num-mbufs")) { 653c8798818SIntel n = atoi(optarg); 654c8798818SIntel if (n > 1024) 655c8798818SIntel param_total_num_mbufs = (unsigned)n; 656c8798818SIntel else 657c8798818SIntel rte_exit(EXIT_FAILURE, 658c8798818SIntel "total-num-mbufs should be > 1024\n"); 659c8798818SIntel } 660af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "max-pkt-len")) { 661af75078fSIntel n = atoi(optarg); 662af75078fSIntel if (n >= ETHER_MIN_LEN) { 663af75078fSIntel rx_mode.max_rx_pkt_len = (uint32_t) n; 664af75078fSIntel if (n > ETHER_MAX_LEN) 665af75078fSIntel rx_mode.jumbo_frame = 1; 666af75078fSIntel } else 667af75078fSIntel rte_exit(EXIT_FAILURE, 668af75078fSIntel "Invalid max-pkt-len=%d - should be > %d\n", 669af75078fSIntel n, ETHER_MIN_LEN); 670af75078fSIntel } 671af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-mode")) { 672af75078fSIntel if (!strcmp(optarg, "signature")) 673af75078fSIntel fdir_conf.mode = 674af75078fSIntel RTE_FDIR_MODE_SIGNATURE; 675af75078fSIntel else if (!strcmp(optarg, "perfect")) 676af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_PERFECT; 677af75078fSIntel else if (!strcmp(optarg, "none")) 678af75078fSIntel fdir_conf.mode = RTE_FDIR_MODE_NONE; 679af75078fSIntel else 680af75078fSIntel rte_exit(EXIT_FAILURE, 681af75078fSIntel "pkt-mode-invalid %s invalid - must be: " 682af75078fSIntel "none, signature or perfect\n", 683af75078fSIntel optarg); 684af75078fSIntel } 685af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 686af75078fSIntel "pkt-filter-report-hash")) { 687af75078fSIntel if (!strcmp(optarg, "none")) 688af75078fSIntel fdir_conf.status = 689af75078fSIntel RTE_FDIR_NO_REPORT_STATUS; 690af75078fSIntel else if (!strcmp(optarg, "match")) 691af75078fSIntel fdir_conf.status = 692af75078fSIntel RTE_FDIR_REPORT_STATUS; 693af75078fSIntel else if (!strcmp(optarg, "always")) 694af75078fSIntel fdir_conf.status = 695af75078fSIntel RTE_FDIR_REPORT_STATUS_ALWAYS; 696af75078fSIntel else 697af75078fSIntel rte_exit(EXIT_FAILURE, 698af75078fSIntel "pkt-filter-report-hash %s invalid " 699af75078fSIntel "- must be: none or match or always\n", 700af75078fSIntel optarg); 701af75078fSIntel } 702af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "pkt-filter-size")) { 703af75078fSIntel if (!strcmp(optarg, "64K")) 704af75078fSIntel fdir_conf.pballoc = 705af75078fSIntel RTE_FDIR_PBALLOC_64K; 706af75078fSIntel else if (!strcmp(optarg, "128K")) 707af75078fSIntel fdir_conf.pballoc = 708af75078fSIntel RTE_FDIR_PBALLOC_128K; 709af75078fSIntel else if (!strcmp(optarg, "256K")) 710af75078fSIntel fdir_conf.pballoc = 711af75078fSIntel RTE_FDIR_PBALLOC_256K; 712af75078fSIntel else 713af75078fSIntel rte_exit(EXIT_FAILURE, "pkt-filter-size %s invalid -" 714af75078fSIntel " must be: 64K or 128K or 256K\n", 715af75078fSIntel optarg); 716af75078fSIntel } 717af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 718af75078fSIntel "pkt-filter-flexbytes-offset")) { 719af75078fSIntel n = atoi(optarg); 720af75078fSIntel if ( n >= 0 && n <= (int) 32) 721af75078fSIntel fdir_conf.flexbytes_offset = 722af75078fSIntel (uint8_t) n; 723af75078fSIntel else 724af75078fSIntel rte_exit(EXIT_FAILURE, 725af75078fSIntel "flexbytes %d invalid - must" 726af75078fSIntel "be >= 0 && <= 32\n", n); 727af75078fSIntel } 728af75078fSIntel if (!strcmp(lgopts[opt_idx].name, 729af75078fSIntel "pkt-filter-drop-queue")) { 730af75078fSIntel n = atoi(optarg); 731af75078fSIntel if (n >= 0) 732af75078fSIntel fdir_conf.drop_queue = (uint8_t) n; 733af75078fSIntel else 734af75078fSIntel rte_exit(EXIT_FAILURE, 735af75078fSIntel "drop queue %d invalid - must" 736af75078fSIntel "be >= 0 \n", n); 737af75078fSIntel } 738af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "crc-strip")) 739af75078fSIntel rx_mode.hw_strip_crc = 1; 740af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "enable-rx-cksum")) 741af75078fSIntel rx_mode.hw_ip_checksum = 1; 742a47aa8b9SIntel 743a47aa8b9SIntel if (!strcmp(lgopts[opt_idx].name, "disable-hw-vlan")) { 744af75078fSIntel rx_mode.hw_vlan_filter = 0; 745a47aa8b9SIntel rx_mode.hw_vlan_strip = 0; 746a47aa8b9SIntel rx_mode.hw_vlan_extend = 0; 747a47aa8b9SIntel } 748a47aa8b9SIntel 749ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "enable-drop-en")) 750ce8d5614SIntel rx_drop_en = 1; 751ce8d5614SIntel 752af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "disable-rss")) 753af75078fSIntel rss_hf = 0; 754af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "port-topology")) { 755af75078fSIntel if (!strcmp(optarg, "paired")) 756af75078fSIntel port_topology = PORT_TOPOLOGY_PAIRED; 757af75078fSIntel else if (!strcmp(optarg, "chained")) 758af75078fSIntel port_topology = PORT_TOPOLOGY_CHAINED; 759af75078fSIntel else 760af75078fSIntel rte_exit(EXIT_FAILURE, "port-topology %s invalid -" 761af75078fSIntel " must be: paired or chained \n", 762af75078fSIntel optarg); 763af75078fSIntel } 764af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-ip")) 765af75078fSIntel rss_hf = ETH_RSS_IPV4 | ETH_RSS_IPV6; 766af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rss-udp")) 767013af9b6SIntel rss_hf = ETH_RSS_IPV4 | 768013af9b6SIntel ETH_RSS_IPV6 | ETH_RSS_IPV4_UDP; 769af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxq")) { 770af75078fSIntel n = atoi(optarg); 771af75078fSIntel if (n >= 1 && n <= (int) MAX_QUEUE_ID) 772af75078fSIntel nb_rxq = (queueid_t) n; 773af75078fSIntel else 774af75078fSIntel rte_exit(EXIT_FAILURE, "rxq %d invalid - must be" 775af75078fSIntel " >= 1 && <= %d\n", n, 776af75078fSIntel (int) MAX_QUEUE_ID); 777af75078fSIntel } 778af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txq")) { 779af75078fSIntel n = atoi(optarg); 780af75078fSIntel if (n >= 1 && n <= (int) MAX_QUEUE_ID) 781af75078fSIntel nb_txq = (queueid_t) n; 782af75078fSIntel else 783af75078fSIntel rte_exit(EXIT_FAILURE, "txq %d invalid - must be" 784af75078fSIntel " >= 1 && <= %d\n", n, 785af75078fSIntel (int) MAX_QUEUE_ID); 786af75078fSIntel } 787af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 788af75078fSIntel n = atoi(optarg); 789af75078fSIntel if (n > 0) 790af75078fSIntel nb_rxd = (uint16_t) n; 791af75078fSIntel else 792af75078fSIntel rte_exit(EXIT_FAILURE, "rxd must be > 0\n"); 793af75078fSIntel } 794af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 795af75078fSIntel n = atoi(optarg); 796af75078fSIntel if (n > 0) 797af75078fSIntel nb_txd = (uint16_t) n; 798af75078fSIntel else 799af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 800af75078fSIntel } 801af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "burst")) { 802af75078fSIntel n = atoi(optarg); 803af75078fSIntel if ((n >= 1) && (n <= MAX_PKT_BURST)) 804af75078fSIntel nb_pkt_per_burst = (uint16_t) n; 805af75078fSIntel else 806af75078fSIntel rte_exit(EXIT_FAILURE, 807af75078fSIntel "burst must >= 1 and <= %d]", 808af75078fSIntel MAX_PKT_BURST); 809af75078fSIntel } 810af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "mbcache")) { 811af75078fSIntel n = atoi(optarg); 812af75078fSIntel if ((n >= 0) && 813af75078fSIntel (n <= RTE_MEMPOOL_CACHE_MAX_SIZE)) 814af75078fSIntel mb_mempool_cache = (uint16_t) n; 815af75078fSIntel else 816af75078fSIntel rte_exit(EXIT_FAILURE, 817af75078fSIntel "mbcache must be >= 0 and <= %d\n", 818af75078fSIntel RTE_MEMPOOL_CACHE_MAX_SIZE); 819af75078fSIntel } 820af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 821af75078fSIntel n = atoi(optarg); 822af75078fSIntel if (n >= 0) 823af75078fSIntel tx_thresh.pthresh = (uint8_t)n; 824af75078fSIntel else 825af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 826af75078fSIntel } 827af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 828af75078fSIntel n = atoi(optarg); 829af75078fSIntel if (n >= 0) 830af75078fSIntel tx_thresh.hthresh = (uint8_t)n; 831af75078fSIntel else 832af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 833af75078fSIntel } 834af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 835af75078fSIntel n = atoi(optarg); 836af75078fSIntel if (n >= 0) 837af75078fSIntel tx_thresh.wthresh = (uint8_t)n; 838af75078fSIntel else 839af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 840af75078fSIntel } 841af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txfreet")) { 842af75078fSIntel n = atoi(optarg); 843af75078fSIntel if (n >= 0) 844af75078fSIntel tx_free_thresh = (uint16_t)n; 845af75078fSIntel else 846af75078fSIntel rte_exit(EXIT_FAILURE, "txfreet must be >= 0\n"); 847af75078fSIntel } 848af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txrst")) { 849af75078fSIntel n = atoi(optarg); 850af75078fSIntel if (n >= 0) 851af75078fSIntel tx_rs_thresh = (uint16_t)n; 852af75078fSIntel else 853af75078fSIntel rte_exit(EXIT_FAILURE, "txrst must be >= 0\n"); 854af75078fSIntel } 855ce8d5614SIntel if (!strcmp(lgopts[opt_idx].name, "txqflags")) { 856ce8d5614SIntel char *end = NULL; 857ce8d5614SIntel n = strtoul(optarg, &end, 16); 858ce8d5614SIntel if (n >= 0) 859ce8d5614SIntel txq_flags = (uint32_t)n; 860ce8d5614SIntel else 861ce8d5614SIntel rte_exit(EXIT_FAILURE, 862ce8d5614SIntel "txqflags must be >= 0\n"); 863ce8d5614SIntel } 864af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 865af75078fSIntel n = atoi(optarg); 866af75078fSIntel if (n >= 0) 867af75078fSIntel rx_thresh.pthresh = (uint8_t)n; 868af75078fSIntel else 869af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 870af75078fSIntel } 871af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 872af75078fSIntel n = atoi(optarg); 873af75078fSIntel if (n >= 0) 874af75078fSIntel rx_thresh.hthresh = (uint8_t)n; 875af75078fSIntel else 876af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 877af75078fSIntel } 878af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 879af75078fSIntel n = atoi(optarg); 880af75078fSIntel if (n >= 0) 881af75078fSIntel rx_thresh.wthresh = (uint8_t)n; 882af75078fSIntel else 883af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 884af75078fSIntel } 885af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxd")) { 886af75078fSIntel n = atoi(optarg); 887af75078fSIntel if (n > 0) { 888af75078fSIntel if (rx_free_thresh >= n) 889af75078fSIntel rte_exit(EXIT_FAILURE, 890af75078fSIntel "rxd must be > " 891af75078fSIntel "rx_free_thresh(%d)\n", 892af75078fSIntel (int)rx_free_thresh); 893af75078fSIntel else 894af75078fSIntel nb_rxd = (uint16_t) n; 895af75078fSIntel } else 896af75078fSIntel rte_exit(EXIT_FAILURE, 897af75078fSIntel "rxd(%d) invalid - must be > 0\n", 898af75078fSIntel n); 899af75078fSIntel } 900af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txd")) { 901af75078fSIntel n = atoi(optarg); 902af75078fSIntel if (n > 0) 903af75078fSIntel nb_txd = (uint16_t) n; 904af75078fSIntel else 905af75078fSIntel rte_exit(EXIT_FAILURE, "txd must be in > 0\n"); 906af75078fSIntel } 907af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txpt")) { 908af75078fSIntel n = atoi(optarg); 909af75078fSIntel if (n >= 0) 910af75078fSIntel tx_thresh.pthresh = (uint8_t)n; 911af75078fSIntel else 912af75078fSIntel rte_exit(EXIT_FAILURE, "txpt must be >= 0\n"); 913af75078fSIntel } 914af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txht")) { 915af75078fSIntel n = atoi(optarg); 916af75078fSIntel if (n >= 0) 917af75078fSIntel tx_thresh.hthresh = (uint8_t)n; 918af75078fSIntel else 919af75078fSIntel rte_exit(EXIT_FAILURE, "txht must be >= 0\n"); 920af75078fSIntel } 921af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "txwt")) { 922af75078fSIntel n = atoi(optarg); 923af75078fSIntel if (n >= 0) 924af75078fSIntel tx_thresh.wthresh = (uint8_t)n; 925af75078fSIntel else 926af75078fSIntel rte_exit(EXIT_FAILURE, "txwt must be >= 0\n"); 927af75078fSIntel } 928af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxpt")) { 929af75078fSIntel n = atoi(optarg); 930af75078fSIntel if (n >= 0) 931af75078fSIntel rx_thresh.pthresh = (uint8_t)n; 932af75078fSIntel else 933af75078fSIntel rte_exit(EXIT_FAILURE, "rxpt must be >= 0\n"); 934af75078fSIntel } 935af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxht")) { 936af75078fSIntel n = atoi(optarg); 937af75078fSIntel if (n >= 0) 938af75078fSIntel rx_thresh.hthresh = (uint8_t)n; 939af75078fSIntel else 940af75078fSIntel rte_exit(EXIT_FAILURE, "rxht must be >= 0\n"); 941af75078fSIntel } 942af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxwt")) { 943af75078fSIntel n = atoi(optarg); 944af75078fSIntel if (n >= 0) 945af75078fSIntel rx_thresh.wthresh = (uint8_t)n; 946af75078fSIntel else 947af75078fSIntel rte_exit(EXIT_FAILURE, "rxwt must be >= 0\n"); 948af75078fSIntel } 949af75078fSIntel if (!strcmp(lgopts[opt_idx].name, "rxfreet")) { 950af75078fSIntel n = atoi(optarg); 951af75078fSIntel if (n >= 0) 952af75078fSIntel rx_free_thresh = (uint16_t)n; 953af75078fSIntel else 954af75078fSIntel rte_exit(EXIT_FAILURE, "rxfreet must be >= 0\n"); 955af75078fSIntel } 956ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "tx-queue-stats-mapping")) { 957ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, TX)) { 958ed30d9b6SIntel rte_exit(EXIT_FAILURE, 959ed30d9b6SIntel "invalid TX queue statistics mapping config entered\n"); 960ed30d9b6SIntel } 961ed30d9b6SIntel } 962ed30d9b6SIntel if (!strcmp(lgopts[opt_idx].name, "rx-queue-stats-mapping")) { 963ed30d9b6SIntel if (parse_queue_stats_mapping_config(optarg, RX)) { 964ed30d9b6SIntel rte_exit(EXIT_FAILURE, 965ed30d9b6SIntel "invalid RX queue statistics mapping config entered\n"); 966ed30d9b6SIntel } 967ed30d9b6SIntel } 9687741e4cfSIntel if (!strcmp(lgopts[opt_idx].name, "no-flush-rx")) 9697741e4cfSIntel no_flush_rx = 1; 9707741e4cfSIntel 971af75078fSIntel break; 972af75078fSIntel case 'h': 973af75078fSIntel usage(argv[0]); 974af75078fSIntel rte_exit(EXIT_SUCCESS, "Displayed help\n"); 975af75078fSIntel break; 976af75078fSIntel default: 977af75078fSIntel usage(argv[0]); 978af75078fSIntel rte_exit(EXIT_FAILURE, 979af75078fSIntel "Command line is incomplete or incorrect\n"); 980af75078fSIntel break; 981af75078fSIntel } 982af75078fSIntel } 983af75078fSIntel } 984