xref: /dpdk/app/test-pipeline/pipeline_lpm_ipv6.c (revision 6f41fe75e2dd8dd38f7bea7b9501edd4f9b72fa5)
1 /*-
2  *   BSD LICENSE
3  *
4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5  *   All rights reserved.
6  *
7  *   Redistribution and use in source and binary forms, with or without
8  *   modification, are permitted provided that the following conditions
9  *   are met:
10  *
11  *     * Redistributions of source code must retain the above copyright
12  *       notice, this list of conditions and the following disclaimer.
13  *     * Redistributions in binary form must reproduce the above copyright
14  *       notice, this list of conditions and the following disclaimer in
15  *       the documentation and/or other materials provided with the
16  *       distribution.
17  *     * Neither the name of Intel Corporation nor the names of its
18  *       contributors may be used to endorse or promote products derived
19  *       from this software without specific prior written permission.
20  *
21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <stdio.h>
35 #include <stdlib.h>
36 #include <stdint.h>
37 
38 #include <rte_log.h>
39 #include <rte_ethdev.h>
40 #include <rte_ether.h>
41 #include <rte_ip.h>
42 #include <rte_byteorder.h>
43 
44 #include <rte_port_ring.h>
45 #include <rte_table_lpm_ipv6.h>
46 #include <rte_pipeline.h>
47 
48 #include "main.h"
49 
50 void
51 app_main_loop_worker_pipeline_lpm_ipv6(void) {
52 	struct rte_pipeline_params pipeline_params = {
53 		.name = "pipeline",
54 		.socket_id = rte_socket_id(),
55 	};
56 
57 	struct rte_pipeline *p;
58 	uint32_t port_in_id[APP_MAX_PORTS];
59 	uint32_t port_out_id[APP_MAX_PORTS];
60 	uint32_t table_id;
61 	uint32_t i;
62 
63 	RTE_LOG(INFO, USER1,
64 		"Core %u is doing work (pipeline with IPv6 LPM table)\n",
65 		rte_lcore_id());
66 
67 	/* Pipeline configuration */
68 	p = rte_pipeline_create(&pipeline_params);
69 	if (p == NULL)
70 		rte_panic("Unable to configure the pipeline\n");
71 
72 	/* Input port configuration */
73 	for (i = 0; i < app.n_ports; i++) {
74 		struct rte_port_ring_reader_params port_ring_params = {
75 			.ring = app.rings_rx[i],
76 		};
77 
78 		struct rte_pipeline_port_in_params port_params = {
79 			.ops = &rte_port_ring_reader_ops,
80 			.arg_create = (void *) &port_ring_params,
81 			.f_action = NULL,
82 			.arg_ah = NULL,
83 			.burst_size = app.burst_size_worker_read,
84 		};
85 
86 		if (rte_pipeline_port_in_create(p, &port_params,
87 			&port_in_id[i]))
88 			rte_panic("Unable to configure input port for "
89 				"ring %d\n", i);
90 	}
91 
92 	/* Output port configuration */
93 	for (i = 0; i < app.n_ports; i++) {
94 		struct rte_port_ring_writer_params port_ring_params = {
95 			.ring = app.rings_tx[i],
96 			.tx_burst_sz = app.burst_size_worker_write,
97 		};
98 
99 		struct rte_pipeline_port_out_params port_params = {
100 			.ops = &rte_port_ring_writer_ops,
101 			.arg_create = (void *) &port_ring_params,
102 			.f_action = NULL,
103 			.f_action_bulk = NULL,
104 			.arg_ah = NULL,
105 		};
106 
107 		if (rte_pipeline_port_out_create(p, &port_params,
108 			&port_out_id[i]))
109 			rte_panic("Unable to configure output port for "
110 				"ring %d\n", i);
111 	}
112 
113 	/* Table configuration */
114 	{
115 		struct rte_table_lpm_ipv6_params table_lpm_ipv6_params = {
116 			.n_rules = 1 << 24,
117 			.number_tbl8s = 1 << 21,
118 			.entry_unique_size =
119 				sizeof(struct rte_pipeline_table_entry),
120 			.offset = 32,
121 		};
122 
123 		struct rte_pipeline_table_params table_params = {
124 			.ops = &rte_table_lpm_ipv6_ops,
125 			.arg_create = &table_lpm_ipv6_params,
126 			.f_action_hit = NULL,
127 			.f_action_miss = NULL,
128 			.arg_ah = NULL,
129 			.action_data_size = 0,
130 		};
131 
132 		if (rte_pipeline_table_create(p, &table_params, &table_id))
133 			rte_panic("Unable to configure the IPv6 LPM table\n");
134 	}
135 
136 	/* Interconnecting ports and tables */
137 	for (i = 0; i < app.n_ports; i++)
138 		if (rte_pipeline_port_in_connect_to_table(p, port_in_id[i],
139 			table_id))
140 			rte_panic("Unable to connect input port %u to "
141 				"table %u\n", port_in_id[i],  table_id);
142 
143 	/* Add entries to tables */
144 	for (i = 0; i < app.n_ports; i++) {
145 		struct rte_pipeline_table_entry entry = {
146 			.action = RTE_PIPELINE_ACTION_PORT,
147 			{.port_id = port_out_id[i & (app.n_ports - 1)]},
148 		};
149 
150 		struct rte_table_lpm_ipv6_key key;
151 		struct rte_pipeline_table_entry *entry_ptr;
152 		uint32_t ip;
153 		int key_found, status;
154 
155 		key.depth = 8 + __builtin_popcount(app.n_ports - 1);
156 
157 		ip = rte_bswap32(i << (24 -
158 			__builtin_popcount(app.n_ports - 1)));
159 		memcpy(key.ip, &ip, sizeof(uint32_t));
160 
161 		printf("Adding rule to IPv6 LPM table (IPv6 destination = "
162 			"%.2x%.2x:%.2x%.2x:%.2x%.2x:%.2x%.2x:"
163 			"%.2x%.2x:%.2x%.2x:%.2x%.2x:%.2x%.2x/%u => "
164 			"port out = %u)\n",
165 			key.ip[0], key.ip[1], key.ip[2], key.ip[3],
166 			key.ip[4], key.ip[5], key.ip[6], key.ip[7],
167 			key.ip[8], key.ip[9], key.ip[10], key.ip[11],
168 			key.ip[12], key.ip[13], key.ip[14], key.ip[15],
169 			key.depth, i);
170 
171 		status = rte_pipeline_table_entry_add(p, table_id, &key, &entry,
172 			&key_found, &entry_ptr);
173 		if (status < 0)
174 			rte_panic("Unable to add entry to table %u (%d)\n",
175 				table_id, status);
176 	}
177 
178 	/* Enable input ports */
179 	for (i = 0; i < app.n_ports; i++)
180 		if (rte_pipeline_port_in_enable(p, port_in_id[i]))
181 			rte_panic("Unable to enable input port %u\n",
182 				port_in_id[i]);
183 
184 	/* Check pipeline consistency */
185 	if (rte_pipeline_check(p) < 0)
186 		rte_panic("Pipeline consistency check failed\n");
187 
188 	/* Run-time */
189 #if APP_FLUSH == 0
190 	for ( ; ; )
191 		rte_pipeline_run(p);
192 #else
193 	for (i = 0; ; i++) {
194 		rte_pipeline_run(p);
195 
196 		if ((i & APP_FLUSH) == 0)
197 			rte_pipeline_flush(p);
198 	}
199 #endif
200 }
201