161e9524aSPavan Nikhilesh /* 261e9524aSPavan Nikhilesh * SPDX-License-Identifier: BSD-3-Clause 361e9524aSPavan Nikhilesh * Copyright 2017 Cavium, Inc. 461e9524aSPavan Nikhilesh */ 561e9524aSPavan Nikhilesh 661e9524aSPavan Nikhilesh #ifndef _TEST_PIPELINE_COMMON_ 761e9524aSPavan Nikhilesh #define _TEST_PIPELINE_COMMON_ 861e9524aSPavan Nikhilesh 961e9524aSPavan Nikhilesh #include <stdio.h> 1061e9524aSPavan Nikhilesh #include <stdbool.h> 1161e9524aSPavan Nikhilesh #include <unistd.h> 1261e9524aSPavan Nikhilesh 1361e9524aSPavan Nikhilesh #include <rte_cycles.h> 1461e9524aSPavan Nikhilesh #include <rte_ethdev.h> 1561e9524aSPavan Nikhilesh #include <rte_eventdev.h> 1661e9524aSPavan Nikhilesh #include <rte_event_eth_rx_adapter.h> 17*032a965aSPavan Nikhilesh #include <rte_event_eth_tx_adapter.h> 1861e9524aSPavan Nikhilesh #include <rte_lcore.h> 1961e9524aSPavan Nikhilesh #include <rte_malloc.h> 2061e9524aSPavan Nikhilesh #include <rte_mempool.h> 2161e9524aSPavan Nikhilesh #include <rte_prefetch.h> 2261e9524aSPavan Nikhilesh #include <rte_spinlock.h> 23f853a011SPavan Nikhilesh #include <rte_service.h> 24f853a011SPavan Nikhilesh #include <rte_service_component.h> 2561e9524aSPavan Nikhilesh 2661e9524aSPavan Nikhilesh #include "evt_common.h" 2761e9524aSPavan Nikhilesh #include "evt_options.h" 2861e9524aSPavan Nikhilesh #include "evt_test.h" 2961e9524aSPavan Nikhilesh 3061e9524aSPavan Nikhilesh struct test_pipeline; 3161e9524aSPavan Nikhilesh 3261e9524aSPavan Nikhilesh struct worker_data { 3361e9524aSPavan Nikhilesh uint64_t processed_pkts; 3461e9524aSPavan Nikhilesh uint8_t dev_id; 3561e9524aSPavan Nikhilesh uint8_t port_id; 3661e9524aSPavan Nikhilesh struct test_pipeline *t; 3761e9524aSPavan Nikhilesh } __rte_cache_aligned; 3861e9524aSPavan Nikhilesh 3961e9524aSPavan Nikhilesh struct test_pipeline { 4061e9524aSPavan Nikhilesh /* Don't change the offset of "done". Signal handler use this memory 4161e9524aSPavan Nikhilesh * to terminate all lcores work. 4261e9524aSPavan Nikhilesh */ 4361e9524aSPavan Nikhilesh int done; 4461e9524aSPavan Nikhilesh uint8_t nb_workers; 45*032a965aSPavan Nikhilesh uint8_t internal_port; 46*032a965aSPavan Nikhilesh uint8_t tx_evqueue_id[RTE_MAX_ETHPORTS]; 4761e9524aSPavan Nikhilesh enum evt_test_result result; 4861e9524aSPavan Nikhilesh uint32_t nb_flows; 4961e9524aSPavan Nikhilesh uint64_t outstand_pkts; 5061e9524aSPavan Nikhilesh struct rte_mempool *pool; 5161e9524aSPavan Nikhilesh struct worker_data worker[EVT_MAX_PORTS]; 5261e9524aSPavan Nikhilesh struct evt_options *opt; 5361e9524aSPavan Nikhilesh uint8_t sched_type_list[EVT_MAX_STAGES] __rte_cache_aligned; 5461e9524aSPavan Nikhilesh } __rte_cache_aligned; 5561e9524aSPavan Nikhilesh 56f853a011SPavan Nikhilesh #define BURST_SIZE 16 57f853a011SPavan Nikhilesh 58f26320a6SPavan Nikhilesh #define PIPELINE_WORKER_SINGLE_STAGE_INIT \ 59314bcf58SPavan Nikhilesh struct worker_data *w = arg; \ 60314bcf58SPavan Nikhilesh struct test_pipeline *t = w->t; \ 61314bcf58SPavan Nikhilesh const uint8_t dev = w->dev_id; \ 62314bcf58SPavan Nikhilesh const uint8_t port = w->port_id; \ 63*032a965aSPavan Nikhilesh struct rte_event ev __rte_cache_aligned 64314bcf58SPavan Nikhilesh 65f26320a6SPavan Nikhilesh #define PIPELINE_WORKER_SINGLE_STAGE_BURST_INIT \ 66314bcf58SPavan Nikhilesh int i; \ 67314bcf58SPavan Nikhilesh struct worker_data *w = arg; \ 68314bcf58SPavan Nikhilesh struct test_pipeline *t = w->t; \ 69314bcf58SPavan Nikhilesh const uint8_t dev = w->dev_id; \ 70314bcf58SPavan Nikhilesh const uint8_t port = w->port_id; \ 71*032a965aSPavan Nikhilesh struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned 72314bcf58SPavan Nikhilesh 73f26320a6SPavan Nikhilesh #define PIPELINE_WORKER_MULTI_STAGE_INIT \ 74314bcf58SPavan Nikhilesh struct worker_data *w = arg; \ 75314bcf58SPavan Nikhilesh struct test_pipeline *t = w->t; \ 76314bcf58SPavan Nikhilesh uint8_t cq_id; \ 77314bcf58SPavan Nikhilesh const uint8_t dev = w->dev_id; \ 78314bcf58SPavan Nikhilesh const uint8_t port = w->port_id; \ 79314bcf58SPavan Nikhilesh const uint8_t last_queue = t->opt->nb_stages - 1; \ 80314bcf58SPavan Nikhilesh uint8_t *const sched_type_list = &t->sched_type_list[0]; \ 81*032a965aSPavan Nikhilesh const uint8_t nb_stages = t->opt->nb_stages + 1; \ 82*032a965aSPavan Nikhilesh struct rte_event ev __rte_cache_aligned 83314bcf58SPavan Nikhilesh 84f26320a6SPavan Nikhilesh #define PIPELINE_WORKER_MULTI_STAGE_BURST_INIT \ 85314bcf58SPavan Nikhilesh int i; \ 86314bcf58SPavan Nikhilesh struct worker_data *w = arg; \ 87314bcf58SPavan Nikhilesh struct test_pipeline *t = w->t; \ 88314bcf58SPavan Nikhilesh uint8_t cq_id; \ 89314bcf58SPavan Nikhilesh const uint8_t dev = w->dev_id; \ 90314bcf58SPavan Nikhilesh const uint8_t port = w->port_id; \ 91314bcf58SPavan Nikhilesh const uint8_t last_queue = t->opt->nb_stages - 1; \ 92314bcf58SPavan Nikhilesh uint8_t *const sched_type_list = &t->sched_type_list[0]; \ 93*032a965aSPavan Nikhilesh const uint8_t nb_stages = t->opt->nb_stages + 1; \ 94*032a965aSPavan Nikhilesh struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned 95314bcf58SPavan Nikhilesh 96314bcf58SPavan Nikhilesh static __rte_always_inline void 97314bcf58SPavan Nikhilesh pipeline_fwd_event(struct rte_event *ev, uint8_t sched) 98314bcf58SPavan Nikhilesh { 99314bcf58SPavan Nikhilesh ev->event_type = RTE_EVENT_TYPE_CPU; 100314bcf58SPavan Nikhilesh ev->op = RTE_EVENT_OP_FORWARD; 101314bcf58SPavan Nikhilesh ev->sched_type = sched; 102314bcf58SPavan Nikhilesh } 103314bcf58SPavan Nikhilesh 104314bcf58SPavan Nikhilesh static __rte_always_inline void 105*032a965aSPavan Nikhilesh pipeline_event_tx(const uint8_t dev, const uint8_t port, 106*032a965aSPavan Nikhilesh struct rte_event * const ev) 107*032a965aSPavan Nikhilesh { 108*032a965aSPavan Nikhilesh rte_event_eth_tx_adapter_txq_set(ev->mbuf, 0); 109*032a965aSPavan Nikhilesh while (!rte_event_eth_tx_adapter_enqueue(dev, port, ev, 1)) 110*032a965aSPavan Nikhilesh rte_pause(); 111*032a965aSPavan Nikhilesh } 112*032a965aSPavan Nikhilesh 113*032a965aSPavan Nikhilesh static __rte_always_inline void 114*032a965aSPavan Nikhilesh pipeline_event_tx_burst(const uint8_t dev, const uint8_t port, 115*032a965aSPavan Nikhilesh struct rte_event *ev, const uint16_t nb_rx) 116*032a965aSPavan Nikhilesh { 117*032a965aSPavan Nikhilesh uint16_t enq; 118*032a965aSPavan Nikhilesh 119*032a965aSPavan Nikhilesh enq = rte_event_eth_tx_adapter_enqueue(dev, port, ev, nb_rx); 120*032a965aSPavan Nikhilesh while (enq < nb_rx) { 121*032a965aSPavan Nikhilesh enq += rte_event_eth_tx_adapter_enqueue(dev, port, 122*032a965aSPavan Nikhilesh ev + enq, nb_rx - enq); 123*032a965aSPavan Nikhilesh } 124*032a965aSPavan Nikhilesh } 125*032a965aSPavan Nikhilesh 126*032a965aSPavan Nikhilesh static __rte_always_inline void 127314bcf58SPavan Nikhilesh pipeline_event_enqueue(const uint8_t dev, const uint8_t port, 128314bcf58SPavan Nikhilesh struct rte_event *ev) 129314bcf58SPavan Nikhilesh { 130314bcf58SPavan Nikhilesh while (rte_event_enqueue_burst(dev, port, ev, 1) != 1) 131314bcf58SPavan Nikhilesh rte_pause(); 132314bcf58SPavan Nikhilesh } 133314bcf58SPavan Nikhilesh 134314bcf58SPavan Nikhilesh static __rte_always_inline void 135314bcf58SPavan Nikhilesh pipeline_event_enqueue_burst(const uint8_t dev, const uint8_t port, 136314bcf58SPavan Nikhilesh struct rte_event *ev, const uint16_t nb_rx) 137314bcf58SPavan Nikhilesh { 138314bcf58SPavan Nikhilesh uint16_t enq; 139314bcf58SPavan Nikhilesh 140314bcf58SPavan Nikhilesh enq = rte_event_enqueue_burst(dev, port, ev, nb_rx); 141314bcf58SPavan Nikhilesh while (enq < nb_rx) { 142314bcf58SPavan Nikhilesh enq += rte_event_enqueue_burst(dev, port, 143314bcf58SPavan Nikhilesh ev + enq, nb_rx - enq); 144314bcf58SPavan Nikhilesh } 145314bcf58SPavan Nikhilesh } 146314bcf58SPavan Nikhilesh 14738f842bcSPavan Nikhilesh static inline int 14838f842bcSPavan Nikhilesh pipeline_nb_event_ports(struct evt_options *opt) 14938f842bcSPavan Nikhilesh { 15038f842bcSPavan Nikhilesh return evt_nr_active_lcores(opt->wlcores); 15138f842bcSPavan Nikhilesh } 15238f842bcSPavan Nikhilesh 15338f842bcSPavan Nikhilesh int pipeline_test_result(struct evt_test *test, struct evt_options *opt); 15438f842bcSPavan Nikhilesh int pipeline_opt_check(struct evt_options *opt, uint64_t nb_queues); 15561e9524aSPavan Nikhilesh int pipeline_test_setup(struct evt_test *test, struct evt_options *opt); 15676f98e02SPavan Nikhilesh int pipeline_ethdev_setup(struct evt_test *test, struct evt_options *opt); 157385cefd9SPavan Nikhilesh int pipeline_event_rx_adapter_setup(struct evt_options *opt, uint8_t stride, 158385cefd9SPavan Nikhilesh struct rte_event_port_conf prod_conf); 159*032a965aSPavan Nikhilesh int pipeline_event_tx_adapter_setup(struct evt_options *opt, 160*032a965aSPavan Nikhilesh struct rte_event_port_conf prod_conf); 161e4131b79SPavan Nikhilesh int pipeline_mempool_setup(struct evt_test *test, struct evt_options *opt); 162385cefd9SPavan Nikhilesh int pipeline_event_port_setup(struct evt_test *test, struct evt_options *opt, 163385cefd9SPavan Nikhilesh uint8_t *queue_arr, uint8_t nb_queues, 164385cefd9SPavan Nikhilesh const struct rte_event_port_conf p_conf); 165d4c003f5SPavan Nikhilesh int pipeline_launch_lcores(struct evt_test *test, struct evt_options *opt, 166d4c003f5SPavan Nikhilesh int (*worker)(void *)); 16738f842bcSPavan Nikhilesh void pipeline_opt_dump(struct evt_options *opt, uint8_t nb_queues); 16861e9524aSPavan Nikhilesh void pipeline_test_destroy(struct evt_test *test, struct evt_options *opt); 16976f98e02SPavan Nikhilesh void pipeline_eventdev_destroy(struct evt_test *test, struct evt_options *opt); 17076f98e02SPavan Nikhilesh void pipeline_ethdev_destroy(struct evt_test *test, struct evt_options *opt); 171e4131b79SPavan Nikhilesh void pipeline_mempool_destroy(struct evt_test *test, struct evt_options *opt); 17261e9524aSPavan Nikhilesh 17361e9524aSPavan Nikhilesh #endif /* _TEST_PIPELINE_COMMON_ */ 174