1 /* 2 * SPDX-License-Identifier: BSD-3-Clause 3 * Copyright 2017 Cavium, Inc. 4 */ 5 6 #include "test_pipeline_common.h" 7 8 int 9 pipeline_test_result(struct evt_test *test, struct evt_options *opt) 10 { 11 RTE_SET_USED(opt); 12 int i; 13 uint64_t total = 0; 14 struct test_pipeline *t = evt_test_priv(test); 15 16 evt_info("Packet distribution across worker cores :"); 17 for (i = 0; i < t->nb_workers; i++) 18 total += t->worker[i].processed_pkts; 19 for (i = 0; i < t->nb_workers; i++) 20 evt_info("Worker %d packets: "CLGRN"%"PRIx64""CLNRM" percentage:" 21 CLGRN" %3.2f"CLNRM, i, 22 t->worker[i].processed_pkts, 23 (((double)t->worker[i].processed_pkts)/total) 24 * 100); 25 return t->result; 26 } 27 28 void 29 pipeline_opt_dump(struct evt_options *opt, uint8_t nb_queues) 30 { 31 evt_dump("nb_worker_lcores", "%d", evt_nr_active_lcores(opt->wlcores)); 32 evt_dump_worker_lcores(opt); 33 evt_dump_nb_stages(opt); 34 evt_dump("nb_evdev_ports", "%d", pipeline_nb_event_ports(opt)); 35 evt_dump("nb_evdev_queues", "%d", nb_queues); 36 evt_dump_queue_priority(opt); 37 evt_dump_sched_type_list(opt); 38 evt_dump_producer_type(opt); 39 } 40 41 static inline uint64_t 42 processed_pkts(struct test_pipeline *t) 43 { 44 uint8_t i; 45 uint64_t total = 0; 46 47 rte_smp_rmb(); 48 for (i = 0; i < t->nb_workers; i++) 49 total += t->worker[i].processed_pkts; 50 51 return total; 52 } 53 54 int 55 pipeline_launch_lcores(struct evt_test *test, struct evt_options *opt, 56 int (*worker)(void *)) 57 { 58 int ret, lcore_id; 59 struct test_pipeline *t = evt_test_priv(test); 60 61 int port_idx = 0; 62 /* launch workers */ 63 RTE_LCORE_FOREACH_SLAVE(lcore_id) { 64 if (!(opt->wlcores[lcore_id])) 65 continue; 66 67 ret = rte_eal_remote_launch(worker, 68 &t->worker[port_idx], lcore_id); 69 if (ret) { 70 evt_err("failed to launch worker %d", lcore_id); 71 return ret; 72 } 73 port_idx++; 74 } 75 76 uint64_t perf_cycles = rte_get_timer_cycles(); 77 const uint64_t perf_sample = rte_get_timer_hz(); 78 79 static float total_mpps; 80 static uint64_t samples; 81 82 uint64_t prev_pkts = 0; 83 84 while (t->done == false) { 85 const uint64_t new_cycles = rte_get_timer_cycles(); 86 87 if ((new_cycles - perf_cycles) > perf_sample) { 88 const uint64_t curr_pkts = processed_pkts(t); 89 90 float mpps = (float)(curr_pkts - prev_pkts)/1000000; 91 92 prev_pkts = curr_pkts; 93 perf_cycles = new_cycles; 94 total_mpps += mpps; 95 ++samples; 96 printf(CLGRN"\r%.3f mpps avg %.3f mpps"CLNRM, 97 mpps, total_mpps/samples); 98 fflush(stdout); 99 } 100 } 101 printf("\n"); 102 return 0; 103 } 104 105 int 106 pipeline_opt_check(struct evt_options *opt, uint64_t nb_queues) 107 { 108 unsigned int lcores; 109 /* 110 * N worker + 1 master 111 */ 112 lcores = 2; 113 114 if (opt->prod_type != EVT_PROD_TYPE_ETH_RX_ADPTR) { 115 evt_err("Invalid producer type '%s' valid producer '%s'", 116 evt_prod_id_to_name(opt->prod_type), 117 evt_prod_id_to_name(EVT_PROD_TYPE_ETH_RX_ADPTR)); 118 return -1; 119 } 120 121 if (!rte_eth_dev_count_avail()) { 122 evt_err("test needs minimum 1 ethernet dev"); 123 return -1; 124 } 125 126 if (rte_lcore_count() < lcores) { 127 evt_err("test need minimum %d lcores", lcores); 128 return -1; 129 } 130 131 /* Validate worker lcores */ 132 if (evt_lcores_has_overlap(opt->wlcores, rte_get_master_lcore())) { 133 evt_err("worker lcores overlaps with master lcore"); 134 return -1; 135 } 136 if (evt_has_disabled_lcore(opt->wlcores)) { 137 evt_err("one or more workers lcores are not enabled"); 138 return -1; 139 } 140 if (!evt_has_active_lcore(opt->wlcores)) { 141 evt_err("minimum one worker is required"); 142 return -1; 143 } 144 145 if (nb_queues > EVT_MAX_QUEUES) { 146 evt_err("number of queues exceeds %d", EVT_MAX_QUEUES); 147 return -1; 148 } 149 if (pipeline_nb_event_ports(opt) > EVT_MAX_PORTS) { 150 evt_err("number of ports exceeds %d", EVT_MAX_PORTS); 151 return -1; 152 } 153 154 if (evt_has_invalid_stage(opt)) 155 return -1; 156 157 if (evt_has_invalid_sched_type(opt)) 158 return -1; 159 160 return 0; 161 } 162 163 #define NB_RX_DESC 128 164 #define NB_TX_DESC 512 165 int 166 pipeline_ethdev_setup(struct evt_test *test, struct evt_options *opt) 167 { 168 uint16_t i; 169 int ret; 170 uint8_t nb_queues = 1; 171 struct test_pipeline *t = evt_test_priv(test); 172 struct rte_eth_rxconf rx_conf; 173 struct rte_eth_conf port_conf = { 174 .rxmode = { 175 .mq_mode = ETH_MQ_RX_RSS, 176 }, 177 .rx_adv_conf = { 178 .rss_conf = { 179 .rss_key = NULL, 180 .rss_hf = ETH_RSS_IP, 181 }, 182 }, 183 }; 184 185 if (!rte_eth_dev_count_avail()) { 186 evt_err("No ethernet ports found."); 187 return -ENODEV; 188 } 189 190 if (opt->max_pkt_sz < RTE_ETHER_MIN_LEN) { 191 evt_err("max_pkt_sz can not be less than %d", 192 RTE_ETHER_MIN_LEN); 193 return -EINVAL; 194 } 195 196 port_conf.rxmode.max_rx_pkt_len = opt->max_pkt_sz; 197 if (opt->max_pkt_sz > RTE_ETHER_MAX_LEN) 198 port_conf.rxmode.offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME; 199 200 t->internal_port = 1; 201 RTE_ETH_FOREACH_DEV(i) { 202 struct rte_eth_dev_info dev_info; 203 struct rte_eth_conf local_port_conf = port_conf; 204 uint32_t caps = 0; 205 206 ret = rte_event_eth_tx_adapter_caps_get(opt->dev_id, i, &caps); 207 if (ret != 0) { 208 evt_err("failed to get event tx adapter[%d] caps", i); 209 return ret; 210 } 211 212 if (!(caps & RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT)) 213 t->internal_port = 0; 214 215 ret = rte_eth_dev_info_get(i, &dev_info); 216 if (ret != 0) { 217 evt_err("Error during getting device (port %u) info: %s\n", 218 i, strerror(-ret)); 219 return ret; 220 } 221 222 rx_conf = dev_info.default_rxconf; 223 rx_conf.offloads = port_conf.rxmode.offloads; 224 225 local_port_conf.rx_adv_conf.rss_conf.rss_hf &= 226 dev_info.flow_type_rss_offloads; 227 if (local_port_conf.rx_adv_conf.rss_conf.rss_hf != 228 port_conf.rx_adv_conf.rss_conf.rss_hf) { 229 evt_info("Port %u modified RSS hash function based on hardware support," 230 "requested:%#"PRIx64" configured:%#"PRIx64"", 231 i, 232 port_conf.rx_adv_conf.rss_conf.rss_hf, 233 local_port_conf.rx_adv_conf.rss_conf.rss_hf); 234 } 235 236 if (rte_eth_dev_configure(i, nb_queues, nb_queues, 237 &local_port_conf) 238 < 0) { 239 evt_err("Failed to configure eth port [%d]", i); 240 return -EINVAL; 241 } 242 243 if (rte_eth_rx_queue_setup(i, 0, NB_RX_DESC, 244 rte_socket_id(), &rx_conf, t->pool) < 0) { 245 evt_err("Failed to setup eth port [%d] rx_queue: %d.", 246 i, 0); 247 return -EINVAL; 248 } 249 if (rte_eth_tx_queue_setup(i, 0, NB_TX_DESC, 250 rte_socket_id(), NULL) < 0) { 251 evt_err("Failed to setup eth port [%d] tx_queue: %d.", 252 i, 0); 253 return -EINVAL; 254 } 255 256 ret = rte_eth_promiscuous_enable(i); 257 if (ret != 0) { 258 evt_err("Failed to enable promiscuous mode for eth port [%d]: %s", 259 i, rte_strerror(-ret)); 260 return ret; 261 } 262 } 263 264 return 0; 265 } 266 267 int 268 pipeline_event_port_setup(struct evt_test *test, struct evt_options *opt, 269 uint8_t *queue_arr, uint8_t nb_queues, 270 const struct rte_event_port_conf p_conf) 271 { 272 int ret; 273 uint8_t port; 274 struct test_pipeline *t = evt_test_priv(test); 275 276 277 /* setup one port per worker, linking to all queues */ 278 for (port = 0; port < evt_nr_active_lcores(opt->wlcores); port++) { 279 struct worker_data *w = &t->worker[port]; 280 281 w->dev_id = opt->dev_id; 282 w->port_id = port; 283 w->t = t; 284 w->processed_pkts = 0; 285 286 ret = rte_event_port_setup(opt->dev_id, port, &p_conf); 287 if (ret) { 288 evt_err("failed to setup port %d", port); 289 return ret; 290 } 291 292 if (rte_event_port_link(opt->dev_id, port, queue_arr, NULL, 293 nb_queues) != nb_queues) 294 goto link_fail; 295 } 296 297 return 0; 298 299 link_fail: 300 evt_err("failed to link queues to port %d", port); 301 return -EINVAL; 302 } 303 304 int 305 pipeline_event_rx_adapter_setup(struct evt_options *opt, uint8_t stride, 306 struct rte_event_port_conf prod_conf) 307 { 308 int ret = 0; 309 uint16_t prod; 310 struct rte_event_eth_rx_adapter_queue_conf queue_conf; 311 312 memset(&queue_conf, 0, 313 sizeof(struct rte_event_eth_rx_adapter_queue_conf)); 314 queue_conf.ev.sched_type = opt->sched_type_list[0]; 315 RTE_ETH_FOREACH_DEV(prod) { 316 uint32_t cap; 317 318 ret = rte_event_eth_rx_adapter_caps_get(opt->dev_id, 319 prod, &cap); 320 if (ret) { 321 evt_err("failed to get event rx adapter[%d]" 322 " capabilities", 323 opt->dev_id); 324 return ret; 325 } 326 queue_conf.ev.queue_id = prod * stride; 327 ret = rte_event_eth_rx_adapter_create(prod, opt->dev_id, 328 &prod_conf); 329 if (ret) { 330 evt_err("failed to create rx adapter[%d]", prod); 331 return ret; 332 } 333 ret = rte_event_eth_rx_adapter_queue_add(prod, prod, -1, 334 &queue_conf); 335 if (ret) { 336 evt_err("failed to add rx queues to adapter[%d]", prod); 337 return ret; 338 } 339 340 if (!(cap & RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT)) { 341 uint32_t service_id = -1U; 342 343 rte_event_eth_rx_adapter_service_id_get(prod, 344 &service_id); 345 ret = evt_service_setup(service_id); 346 if (ret) { 347 evt_err("Failed to setup service core" 348 " for Rx adapter"); 349 return ret; 350 } 351 } 352 353 evt_info("Port[%d] using Rx adapter[%d] configured", prod, 354 prod); 355 } 356 357 return ret; 358 } 359 360 int 361 pipeline_event_tx_adapter_setup(struct evt_options *opt, 362 struct rte_event_port_conf port_conf) 363 { 364 int ret = 0; 365 uint16_t consm; 366 367 RTE_ETH_FOREACH_DEV(consm) { 368 uint32_t cap; 369 370 ret = rte_event_eth_tx_adapter_caps_get(opt->dev_id, 371 consm, &cap); 372 if (ret) { 373 evt_err("failed to get event tx adapter[%d] caps", 374 consm); 375 return ret; 376 } 377 378 ret = rte_event_eth_tx_adapter_create(consm, opt->dev_id, 379 &port_conf); 380 if (ret) { 381 evt_err("failed to create tx adapter[%d]", consm); 382 return ret; 383 } 384 385 ret = rte_event_eth_tx_adapter_queue_add(consm, consm, -1); 386 if (ret) { 387 evt_err("failed to add tx queues to adapter[%d]", 388 consm); 389 return ret; 390 } 391 392 if (!(cap & RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT)) { 393 uint32_t service_id = -1U; 394 395 rte_event_eth_tx_adapter_service_id_get(consm, 396 &service_id); 397 ret = evt_service_setup(service_id); 398 if (ret) { 399 evt_err("Failed to setup service core" 400 " for Tx adapter\n"); 401 return ret; 402 } 403 } 404 405 evt_info("Port[%d] using Tx adapter[%d] Configured", consm, 406 consm); 407 } 408 409 return ret; 410 } 411 412 void 413 pipeline_ethdev_destroy(struct evt_test *test, struct evt_options *opt) 414 { 415 uint16_t i; 416 RTE_SET_USED(test); 417 RTE_SET_USED(opt); 418 419 RTE_ETH_FOREACH_DEV(i) { 420 rte_event_eth_rx_adapter_stop(i); 421 rte_event_eth_tx_adapter_stop(i); 422 rte_eth_dev_stop(i); 423 } 424 } 425 426 void 427 pipeline_eventdev_destroy(struct evt_test *test, struct evt_options *opt) 428 { 429 RTE_SET_USED(test); 430 431 rte_event_dev_stop(opt->dev_id); 432 rte_event_dev_close(opt->dev_id); 433 } 434 435 int 436 pipeline_mempool_setup(struct evt_test *test, struct evt_options *opt) 437 { 438 struct test_pipeline *t = evt_test_priv(test); 439 int i, ret; 440 441 if (!opt->mbuf_sz) 442 opt->mbuf_sz = RTE_MBUF_DEFAULT_BUF_SIZE; 443 444 if (!opt->max_pkt_sz) 445 opt->max_pkt_sz = RTE_ETHER_MAX_LEN; 446 447 RTE_ETH_FOREACH_DEV(i) { 448 struct rte_eth_dev_info dev_info; 449 uint16_t data_size = 0; 450 451 memset(&dev_info, 0, sizeof(dev_info)); 452 ret = rte_eth_dev_info_get(i, &dev_info); 453 if (ret != 0) { 454 evt_err("Error during getting device (port %u) info: %s\n", 455 i, strerror(-ret)); 456 return ret; 457 } 458 459 if (dev_info.rx_desc_lim.nb_mtu_seg_max != UINT16_MAX && 460 dev_info.rx_desc_lim.nb_mtu_seg_max != 0) { 461 data_size = opt->max_pkt_sz / 462 dev_info.rx_desc_lim.nb_mtu_seg_max; 463 data_size += RTE_PKTMBUF_HEADROOM; 464 465 if (data_size > opt->mbuf_sz) 466 opt->mbuf_sz = data_size; 467 } 468 } 469 470 t->pool = rte_pktmbuf_pool_create(test->name, /* mempool name */ 471 opt->pool_sz, /* number of elements*/ 472 512, /* cache size*/ 473 0, 474 opt->mbuf_sz, 475 opt->socket_id); /* flags */ 476 477 if (t->pool == NULL) { 478 evt_err("failed to create mempool"); 479 return -ENOMEM; 480 } 481 482 return 0; 483 } 484 485 void 486 pipeline_mempool_destroy(struct evt_test *test, struct evt_options *opt) 487 { 488 RTE_SET_USED(opt); 489 struct test_pipeline *t = evt_test_priv(test); 490 491 rte_mempool_free(t->pool); 492 } 493 494 int 495 pipeline_test_setup(struct evt_test *test, struct evt_options *opt) 496 { 497 void *test_pipeline; 498 499 test_pipeline = rte_zmalloc_socket(test->name, 500 sizeof(struct test_pipeline), RTE_CACHE_LINE_SIZE, 501 opt->socket_id); 502 if (test_pipeline == NULL) { 503 evt_err("failed to allocate test_pipeline memory"); 504 goto nomem; 505 } 506 test->test_priv = test_pipeline; 507 508 struct test_pipeline *t = evt_test_priv(test); 509 510 t->nb_workers = evt_nr_active_lcores(opt->wlcores); 511 t->outstand_pkts = opt->nb_pkts * evt_nr_active_lcores(opt->wlcores); 512 t->done = false; 513 t->nb_flows = opt->nb_flows; 514 t->result = EVT_TEST_FAILED; 515 t->opt = opt; 516 opt->prod_type = EVT_PROD_TYPE_ETH_RX_ADPTR; 517 memcpy(t->sched_type_list, opt->sched_type_list, 518 sizeof(opt->sched_type_list)); 519 return 0; 520 nomem: 521 return -ENOMEM; 522 } 523 524 void 525 pipeline_test_destroy(struct evt_test *test, struct evt_options *opt) 526 { 527 RTE_SET_USED(opt); 528 529 rte_free(test->test_priv); 530 } 531