1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <stdbool.h> 6 #include <stdlib.h> 7 8 #include <rte_crypto.h> 9 #include <rte_cryptodev.h> 10 #include <rte_cycles.h> 11 #include <rte_malloc.h> 12 13 #include "cperf_ops.h" 14 #include "cperf_test_pmd_cyclecount.h" 15 #include "cperf_test_common.h" 16 17 #define PRETTY_HDR_FMT "%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n" 18 #define PRETTY_LINE_FMT "%12u%12u%12u%12u%12u%12u%12u%12.0f%12.0f%12.0f\n" 19 #define CSV_HDR_FMT "%s,%s,%s,%s,%s,%s,%s,%s,%s,%s\n" 20 #define CSV_LINE_FMT "%10u,%10u,%u,%u,%u,%u,%u,%.3f,%.3f,%.3f\n" 21 22 struct cperf_pmd_cyclecount_ctx { 23 uint8_t dev_id; 24 uint16_t qp_id; 25 uint8_t lcore_id; 26 27 struct rte_mempool *pool; 28 struct rte_crypto_op **ops; 29 struct rte_crypto_op **ops_processed; 30 31 struct rte_cryptodev_sym_session *sess; 32 33 cperf_populate_ops_t populate_ops; 34 35 uint32_t src_buf_offset; 36 uint32_t dst_buf_offset; 37 38 const struct cperf_options *options; 39 const struct cperf_test_vector *test_vector; 40 }; 41 42 struct pmd_cyclecount_state { 43 struct cperf_pmd_cyclecount_ctx *ctx; 44 const struct cperf_options *opts; 45 uint32_t lcore; 46 uint64_t delay; 47 int linearize; 48 uint32_t ops_enqd; 49 uint32_t ops_deqd; 50 uint32_t ops_enq_retries; 51 uint32_t ops_deq_retries; 52 double cycles_per_build; 53 double cycles_per_enq; 54 double cycles_per_deq; 55 }; 56 57 static const uint16_t iv_offset = 58 sizeof(struct rte_crypto_op) + sizeof(struct rte_crypto_sym_op); 59 60 static void 61 cperf_pmd_cyclecount_test_free(struct cperf_pmd_cyclecount_ctx *ctx) 62 { 63 if (!ctx) 64 return; 65 66 if (ctx->sess) { 67 #ifdef RTE_LIB_SECURITY 68 if (ctx->options->op_type == CPERF_PDCP || 69 ctx->options->op_type == CPERF_DOCSIS) { 70 struct rte_security_ctx *sec_ctx = 71 (struct rte_security_ctx *) 72 rte_cryptodev_get_sec_ctx(ctx->dev_id); 73 rte_security_session_destroy(sec_ctx, 74 (struct rte_security_session *)ctx->sess); 75 } else 76 #endif 77 rte_cryptodev_sym_session_free(ctx->dev_id, ctx->sess); 78 } 79 80 rte_mempool_free(ctx->pool); 81 82 rte_free(ctx->ops); 83 84 rte_free(ctx->ops_processed); 85 86 rte_free(ctx); 87 } 88 89 void * 90 cperf_pmd_cyclecount_test_constructor(struct rte_mempool *sess_mp, 91 struct rte_mempool *sess_priv_mp, 92 uint8_t dev_id, uint16_t qp_id, 93 const struct cperf_options *options, 94 const struct cperf_test_vector *test_vector, 95 const struct cperf_op_fns *op_fns) 96 { 97 struct cperf_pmd_cyclecount_ctx *ctx = NULL; 98 99 /* preallocate buffers for crypto ops as they can get quite big */ 100 size_t alloc_sz = sizeof(struct rte_crypto_op *) * 101 options->nb_descriptors; 102 103 ctx = rte_malloc(NULL, sizeof(struct cperf_pmd_cyclecount_ctx), 0); 104 if (ctx == NULL) 105 goto err; 106 107 ctx->dev_id = dev_id; 108 ctx->qp_id = qp_id; 109 110 ctx->populate_ops = op_fns->populate_ops; 111 ctx->options = options; 112 ctx->test_vector = test_vector; 113 114 /* IV goes at the end of the crypto operation */ 115 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 116 sizeof(struct rte_crypto_sym_op); 117 118 ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options, 119 test_vector, iv_offset); 120 if (ctx->sess == NULL) 121 goto err; 122 123 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0, 124 &ctx->src_buf_offset, &ctx->dst_buf_offset, 125 &ctx->pool) < 0) 126 goto err; 127 128 ctx->ops = rte_malloc("ops", alloc_sz, 0); 129 if (!ctx->ops) 130 goto err; 131 132 ctx->ops_processed = rte_malloc("ops_processed", alloc_sz, 0); 133 if (!ctx->ops_processed) 134 goto err; 135 136 return ctx; 137 138 err: 139 cperf_pmd_cyclecount_test_free(ctx); 140 141 return NULL; 142 } 143 144 /* benchmark alloc-build-free of ops */ 145 static inline int 146 pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op, 147 uint16_t test_burst_size) 148 { 149 uint32_t iter_ops_left = state->opts->total_ops - cur_op; 150 uint32_t iter_ops_needed = 151 RTE_MIN(state->opts->nb_descriptors, iter_ops_left); 152 uint32_t cur_iter_op; 153 uint32_t imix_idx = 0; 154 155 for (cur_iter_op = 0; cur_iter_op < iter_ops_needed; 156 cur_iter_op += test_burst_size) { 157 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op, 158 test_burst_size); 159 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op]; 160 161 /* Allocate objects containing crypto operations and mbufs */ 162 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops, 163 burst_size) != 0) { 164 RTE_LOG(ERR, USER1, 165 "Failed to allocate more crypto operations " 166 "from the crypto operation pool.\n" 167 "Consider increasing the pool size " 168 "with --pool-sz\n"); 169 return -1; 170 } 171 172 /* Setup crypto op, attach mbuf etc */ 173 (state->ctx->populate_ops)(ops, 174 state->ctx->src_buf_offset, 175 state->ctx->dst_buf_offset, 176 burst_size, 177 state->ctx->sess, state->opts, 178 state->ctx->test_vector, iv_offset, 179 &imix_idx, NULL); 180 181 #ifdef CPERF_LINEARIZATION_ENABLE 182 /* Check if source mbufs require coalescing */ 183 if (state->linearize) { 184 uint8_t i; 185 for (i = 0; i < burst_size; i++) { 186 struct rte_mbuf *src = ops[i]->sym->m_src; 187 rte_pktmbuf_linearize(src); 188 } 189 } 190 #endif /* CPERF_LINEARIZATION_ENABLE */ 191 rte_mempool_put_bulk(state->ctx->pool, (void **)ops, 192 burst_size); 193 } 194 195 return 0; 196 } 197 198 /* allocate and build ops (no free) */ 199 static int 200 pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state, 201 uint32_t iter_ops_needed, uint16_t test_burst_size) 202 { 203 uint32_t cur_iter_op; 204 uint32_t imix_idx = 0; 205 206 for (cur_iter_op = 0; cur_iter_op < iter_ops_needed; 207 cur_iter_op += test_burst_size) { 208 uint32_t burst_size = RTE_MIN( 209 iter_ops_needed - cur_iter_op, test_burst_size); 210 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op]; 211 212 /* Allocate objects containing crypto operations and mbufs */ 213 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops, 214 burst_size) != 0) { 215 RTE_LOG(ERR, USER1, 216 "Failed to allocate more crypto operations " 217 "from the crypto operation pool.\n" 218 "Consider increasing the pool size " 219 "with --pool-sz\n"); 220 return -1; 221 } 222 223 /* Setup crypto op, attach mbuf etc */ 224 (state->ctx->populate_ops)(ops, 225 state->ctx->src_buf_offset, 226 state->ctx->dst_buf_offset, 227 burst_size, 228 state->ctx->sess, state->opts, 229 state->ctx->test_vector, iv_offset, 230 &imix_idx, NULL); 231 } 232 return 0; 233 } 234 235 /* benchmark enqueue, returns number of ops enqueued */ 236 static uint32_t 237 pmd_cyclecount_bench_enq(struct pmd_cyclecount_state *state, 238 uint32_t iter_ops_needed, uint16_t test_burst_size) 239 { 240 /* Enqueue full descriptor ring of ops on crypto device */ 241 uint32_t cur_iter_op = 0; 242 while (cur_iter_op < iter_ops_needed) { 243 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op, 244 test_burst_size); 245 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op]; 246 uint32_t burst_enqd; 247 248 burst_enqd = rte_cryptodev_enqueue_burst(state->ctx->dev_id, 249 state->ctx->qp_id, ops, burst_size); 250 251 /* if we couldn't enqueue anything, the queue is full */ 252 if (!burst_enqd) { 253 /* don't try to dequeue anything we didn't enqueue */ 254 return cur_iter_op; 255 } 256 257 if (burst_enqd < burst_size) 258 state->ops_enq_retries++; 259 state->ops_enqd += burst_enqd; 260 cur_iter_op += burst_enqd; 261 } 262 return iter_ops_needed; 263 } 264 265 /* benchmark dequeue */ 266 static void 267 pmd_cyclecount_bench_deq(struct pmd_cyclecount_state *state, 268 uint32_t iter_ops_needed, uint16_t test_burst_size) 269 { 270 /* Dequeue full descriptor ring of ops on crypto device */ 271 uint32_t cur_iter_op = 0; 272 while (cur_iter_op < iter_ops_needed) { 273 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op, 274 test_burst_size); 275 struct rte_crypto_op **ops_processed = 276 &state->ctx->ops[cur_iter_op]; 277 uint32_t burst_deqd; 278 279 burst_deqd = rte_cryptodev_dequeue_burst(state->ctx->dev_id, 280 state->ctx->qp_id, ops_processed, burst_size); 281 282 if (burst_deqd < burst_size) 283 state->ops_deq_retries++; 284 state->ops_deqd += burst_deqd; 285 cur_iter_op += burst_deqd; 286 } 287 } 288 289 /* run benchmark per burst size */ 290 static inline int 291 pmd_cyclecount_bench_burst_sz( 292 struct pmd_cyclecount_state *state, uint16_t test_burst_size) 293 { 294 uint64_t tsc_start; 295 uint64_t tsc_end; 296 uint64_t tsc_op; 297 uint64_t tsc_enq; 298 uint64_t tsc_deq; 299 uint32_t cur_op; 300 301 /* reset all counters */ 302 tsc_enq = 0; 303 tsc_deq = 0; 304 state->ops_enqd = 0; 305 state->ops_enq_retries = 0; 306 state->ops_deqd = 0; 307 state->ops_deq_retries = 0; 308 309 /* 310 * Benchmark crypto op alloc-build-free separately. 311 */ 312 tsc_start = rte_rdtsc_precise(); 313 314 for (cur_op = 0; cur_op < state->opts->total_ops; 315 cur_op += state->opts->nb_descriptors) { 316 if (unlikely(pmd_cyclecount_bench_ops( 317 state, cur_op, test_burst_size))) 318 return -1; 319 } 320 321 tsc_end = rte_rdtsc_precise(); 322 tsc_op = tsc_end - tsc_start; 323 324 325 /* 326 * Hardware acceleration cyclecount benchmarking loop. 327 * 328 * We're benchmarking raw enq/deq performance by filling up the device 329 * queue, so we never get any failed enqs unless the driver won't accept 330 * the exact number of descriptors we requested, or the driver won't 331 * wrap around the end of the TX ring. However, since we're only 332 * dequeuing once we've filled up the queue, we have to benchmark it 333 * piecemeal and then average out the results. 334 */ 335 cur_op = 0; 336 while (cur_op < state->opts->total_ops) { 337 uint32_t iter_ops_left = state->opts->total_ops - cur_op; 338 uint32_t iter_ops_needed = RTE_MIN( 339 state->opts->nb_descriptors, iter_ops_left); 340 uint32_t iter_ops_allocd = iter_ops_needed; 341 342 /* allocate and build ops */ 343 if (unlikely(pmd_cyclecount_build_ops(state, iter_ops_needed, 344 test_burst_size))) 345 return -1; 346 347 tsc_start = rte_rdtsc_precise(); 348 349 /* fill up TX ring */ 350 iter_ops_needed = pmd_cyclecount_bench_enq(state, 351 iter_ops_needed, test_burst_size); 352 353 tsc_end = rte_rdtsc_precise(); 354 355 tsc_enq += tsc_end - tsc_start; 356 357 /* allow for HW to catch up */ 358 if (state->delay) 359 rte_delay_us_block(state->delay); 360 361 tsc_start = rte_rdtsc_precise(); 362 363 /* drain RX ring */ 364 pmd_cyclecount_bench_deq(state, iter_ops_needed, 365 test_burst_size); 366 367 tsc_end = rte_rdtsc_precise(); 368 369 tsc_deq += tsc_end - tsc_start; 370 371 cur_op += iter_ops_needed; 372 373 /* 374 * we may not have processed all ops that we allocated, so 375 * free everything we've allocated. 376 */ 377 rte_mempool_put_bulk(state->ctx->pool, 378 (void **)state->ctx->ops, iter_ops_allocd); 379 } 380 381 state->cycles_per_build = (double)tsc_op / state->opts->total_ops; 382 state->cycles_per_enq = (double)tsc_enq / state->ops_enqd; 383 state->cycles_per_deq = (double)tsc_deq / state->ops_deqd; 384 385 return 0; 386 } 387 388 int 389 cperf_pmd_cyclecount_test_runner(void *test_ctx) 390 { 391 struct pmd_cyclecount_state state = {0}; 392 const struct cperf_options *opts; 393 uint16_t test_burst_size; 394 uint8_t burst_size_idx = 0; 395 396 state.ctx = test_ctx; 397 opts = state.ctx->options; 398 state.opts = opts; 399 state.lcore = rte_lcore_id(); 400 state.linearize = 0; 401 402 static uint16_t display_once; 403 static bool warmup = true; 404 405 /* 406 * We need a small delay to allow for hardware to process all the crypto 407 * operations. We can't automatically figure out what the delay should 408 * be, so we leave it up to the user (by default it's 0). 409 */ 410 state.delay = 1000 * opts->pmdcc_delay; 411 412 #ifdef CPERF_LINEARIZATION_ENABLE 413 struct rte_cryptodev_info dev_info; 414 415 /* Check if source mbufs require coalescing */ 416 if (opts->segments_sz < ctx->options->max_buffer_size) { 417 rte_cryptodev_info_get(state.ctx->dev_id, &dev_info); 418 if ((dev_info.feature_flags & 419 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 420 0) { 421 state.linearize = 1; 422 } 423 } 424 #endif /* CPERF_LINEARIZATION_ENABLE */ 425 426 state.ctx->lcore_id = state.lcore; 427 428 /* Get first size from range or list */ 429 if (opts->inc_burst_size != 0) 430 test_burst_size = opts->min_burst_size; 431 else 432 test_burst_size = opts->burst_size_list[0]; 433 434 while (test_burst_size <= opts->max_burst_size) { 435 /* do a benchmark run */ 436 if (pmd_cyclecount_bench_burst_sz(&state, test_burst_size)) 437 return -1; 438 439 /* 440 * First run is always a warm up run. 441 */ 442 if (warmup) { 443 warmup = false; 444 continue; 445 } 446 447 uint16_t exp = 0; 448 if (!opts->csv) { 449 if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, 450 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) 451 printf(PRETTY_HDR_FMT, "lcore id", "Buf Size", 452 "Burst Size", "Enqueued", 453 "Dequeued", "Enq Retries", 454 "Deq Retries", "Cycles/Op", 455 "Cycles/Enq", "Cycles/Deq"); 456 457 printf(PRETTY_LINE_FMT, state.ctx->lcore_id, 458 opts->test_buffer_size, test_burst_size, 459 state.ops_enqd, state.ops_deqd, 460 state.ops_enq_retries, 461 state.ops_deq_retries, 462 state.cycles_per_build, 463 state.cycles_per_enq, 464 state.cycles_per_deq); 465 } else { 466 if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, 467 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) 468 printf(CSV_HDR_FMT, "# lcore id", "Buf Size", 469 "Burst Size", "Enqueued", 470 "Dequeued", "Enq Retries", 471 "Deq Retries", "Cycles/Op", 472 "Cycles/Enq", "Cycles/Deq"); 473 474 printf(CSV_LINE_FMT, state.ctx->lcore_id, 475 opts->test_buffer_size, test_burst_size, 476 state.ops_enqd, state.ops_deqd, 477 state.ops_enq_retries, 478 state.ops_deq_retries, 479 state.cycles_per_build, 480 state.cycles_per_enq, 481 state.cycles_per_deq); 482 } 483 484 /* Get next size from range or list */ 485 if (opts->inc_burst_size != 0) 486 test_burst_size += opts->inc_burst_size; 487 else { 488 if (++burst_size_idx == opts->burst_size_count) 489 break; 490 test_burst_size = opts->burst_size_list[burst_size_idx]; 491 } 492 } 493 494 return 0; 495 } 496 497 void 498 cperf_pmd_cyclecount_test_destructor(void *arg) 499 { 500 struct cperf_pmd_cyclecount_ctx *ctx = arg; 501 502 if (ctx == NULL) 503 return; 504 505 cperf_pmd_cyclecount_test_free(ctx); 506 } 507