1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2017 Intel Corporation 3 */ 4 5 #include <stdbool.h> 6 #include <stdlib.h> 7 8 #include <rte_crypto.h> 9 #include <rte_cryptodev.h> 10 #include <rte_cycles.h> 11 #include <rte_malloc.h> 12 13 #include "cperf_ops.h" 14 #include "cperf_test_pmd_cyclecount.h" 15 #include "cperf_test_common.h" 16 17 #define PRETTY_HDR_FMT "%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n" 18 #define PRETTY_LINE_FMT "%12u%12u%12u%12u%12u%12u%12u%12.0f%12.0f%12.0f\n" 19 #define CSV_HDR_FMT "%s,%s,%s,%s,%s,%s,%s,%s,%s,%s\n" 20 #define CSV_LINE_FMT "%10u,%10u,%u,%u,%u,%u,%u,%.3f,%.3f,%.3f\n" 21 22 struct cperf_pmd_cyclecount_ctx { 23 uint8_t dev_id; 24 uint16_t qp_id; 25 uint8_t lcore_id; 26 27 struct rte_mempool *pool; 28 struct rte_crypto_op **ops; 29 struct rte_crypto_op **ops_processed; 30 31 struct rte_cryptodev_sym_session *sess; 32 33 cperf_populate_ops_t populate_ops; 34 35 uint32_t src_buf_offset; 36 uint32_t dst_buf_offset; 37 38 const struct cperf_options *options; 39 const struct cperf_test_vector *test_vector; 40 }; 41 42 struct pmd_cyclecount_state { 43 struct cperf_pmd_cyclecount_ctx *ctx; 44 const struct cperf_options *opts; 45 uint32_t lcore; 46 uint64_t delay; 47 int linearize; 48 uint32_t ops_enqd; 49 uint32_t ops_deqd; 50 uint32_t ops_enq_retries; 51 uint32_t ops_deq_retries; 52 double cycles_per_build; 53 double cycles_per_enq; 54 double cycles_per_deq; 55 }; 56 57 static const uint16_t iv_offset = 58 sizeof(struct rte_crypto_op) + sizeof(struct rte_crypto_sym_op); 59 60 static void 61 cperf_pmd_cyclecount_test_free(struct cperf_pmd_cyclecount_ctx *ctx) 62 { 63 if (!ctx) 64 return; 65 66 if (ctx->sess) { 67 #ifdef RTE_LIB_SECURITY 68 if (ctx->options->op_type == CPERF_PDCP || 69 ctx->options->op_type == CPERF_DOCSIS) { 70 struct rte_security_ctx *sec_ctx = 71 (struct rte_security_ctx *) 72 rte_cryptodev_get_sec_ctx(ctx->dev_id); 73 rte_security_session_destroy(sec_ctx, 74 (struct rte_security_session *)ctx->sess); 75 } else 76 #endif 77 { 78 rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess); 79 rte_cryptodev_sym_session_free(ctx->sess); 80 } 81 } 82 83 rte_mempool_free(ctx->pool); 84 85 rte_free(ctx->ops); 86 87 rte_free(ctx->ops_processed); 88 89 rte_free(ctx); 90 } 91 92 void * 93 cperf_pmd_cyclecount_test_constructor(struct rte_mempool *sess_mp, 94 struct rte_mempool *sess_priv_mp, 95 uint8_t dev_id, uint16_t qp_id, 96 const struct cperf_options *options, 97 const struct cperf_test_vector *test_vector, 98 const struct cperf_op_fns *op_fns) 99 { 100 struct cperf_pmd_cyclecount_ctx *ctx = NULL; 101 102 /* preallocate buffers for crypto ops as they can get quite big */ 103 size_t alloc_sz = sizeof(struct rte_crypto_op *) * 104 options->nb_descriptors; 105 106 ctx = rte_malloc(NULL, sizeof(struct cperf_pmd_cyclecount_ctx), 0); 107 if (ctx == NULL) 108 goto err; 109 110 ctx->dev_id = dev_id; 111 ctx->qp_id = qp_id; 112 113 ctx->populate_ops = op_fns->populate_ops; 114 ctx->options = options; 115 ctx->test_vector = test_vector; 116 117 /* IV goes at the end of the crypto operation */ 118 uint16_t iv_offset = sizeof(struct rte_crypto_op) + 119 sizeof(struct rte_crypto_sym_op); 120 121 ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options, 122 test_vector, iv_offset); 123 if (ctx->sess == NULL) 124 goto err; 125 126 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0, 127 &ctx->src_buf_offset, &ctx->dst_buf_offset, 128 &ctx->pool) < 0) 129 goto err; 130 131 ctx->ops = rte_malloc("ops", alloc_sz, 0); 132 if (!ctx->ops) 133 goto err; 134 135 ctx->ops_processed = rte_malloc("ops_processed", alloc_sz, 0); 136 if (!ctx->ops_processed) 137 goto err; 138 139 return ctx; 140 141 err: 142 cperf_pmd_cyclecount_test_free(ctx); 143 144 return NULL; 145 } 146 147 /* benchmark alloc-build-free of ops */ 148 static inline int 149 pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op, 150 uint16_t test_burst_size) 151 { 152 uint32_t iter_ops_left = state->opts->total_ops - cur_op; 153 uint32_t iter_ops_needed = 154 RTE_MIN(state->opts->nb_descriptors, iter_ops_left); 155 uint32_t cur_iter_op; 156 uint32_t imix_idx = 0; 157 158 for (cur_iter_op = 0; cur_iter_op < iter_ops_needed; 159 cur_iter_op += test_burst_size) { 160 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op, 161 test_burst_size); 162 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op]; 163 164 /* Allocate objects containing crypto operations and mbufs */ 165 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops, 166 burst_size) != 0) { 167 RTE_LOG(ERR, USER1, 168 "Failed to allocate more crypto operations " 169 "from the crypto operation pool.\n" 170 "Consider increasing the pool size " 171 "with --pool-sz\n"); 172 return -1; 173 } 174 175 /* Setup crypto op, attach mbuf etc */ 176 (state->ctx->populate_ops)(ops, 177 state->ctx->src_buf_offset, 178 state->ctx->dst_buf_offset, 179 burst_size, 180 state->ctx->sess, state->opts, 181 state->ctx->test_vector, iv_offset, 182 &imix_idx, NULL); 183 184 #ifdef CPERF_LINEARIZATION_ENABLE 185 /* Check if source mbufs require coalescing */ 186 if (state->linearize) { 187 uint8_t i; 188 for (i = 0; i < burst_size; i++) { 189 struct rte_mbuf *src = ops[i]->sym->m_src; 190 rte_pktmbuf_linearize(src); 191 } 192 } 193 #endif /* CPERF_LINEARIZATION_ENABLE */ 194 rte_mempool_put_bulk(state->ctx->pool, (void **)ops, 195 burst_size); 196 } 197 198 return 0; 199 } 200 201 /* allocate and build ops (no free) */ 202 static int 203 pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state, 204 uint32_t iter_ops_needed, uint16_t test_burst_size) 205 { 206 uint32_t cur_iter_op; 207 uint32_t imix_idx = 0; 208 209 for (cur_iter_op = 0; cur_iter_op < iter_ops_needed; 210 cur_iter_op += test_burst_size) { 211 uint32_t burst_size = RTE_MIN( 212 iter_ops_needed - cur_iter_op, test_burst_size); 213 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op]; 214 215 /* Allocate objects containing crypto operations and mbufs */ 216 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops, 217 burst_size) != 0) { 218 RTE_LOG(ERR, USER1, 219 "Failed to allocate more crypto operations " 220 "from the crypto operation pool.\n" 221 "Consider increasing the pool size " 222 "with --pool-sz\n"); 223 return -1; 224 } 225 226 /* Setup crypto op, attach mbuf etc */ 227 (state->ctx->populate_ops)(ops, 228 state->ctx->src_buf_offset, 229 state->ctx->dst_buf_offset, 230 burst_size, 231 state->ctx->sess, state->opts, 232 state->ctx->test_vector, iv_offset, 233 &imix_idx, NULL); 234 } 235 return 0; 236 } 237 238 /* benchmark enqueue, returns number of ops enqueued */ 239 static uint32_t 240 pmd_cyclecount_bench_enq(struct pmd_cyclecount_state *state, 241 uint32_t iter_ops_needed, uint16_t test_burst_size) 242 { 243 /* Enqueue full descriptor ring of ops on crypto device */ 244 uint32_t cur_iter_op = 0; 245 while (cur_iter_op < iter_ops_needed) { 246 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op, 247 test_burst_size); 248 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op]; 249 uint32_t burst_enqd; 250 251 burst_enqd = rte_cryptodev_enqueue_burst(state->ctx->dev_id, 252 state->ctx->qp_id, ops, burst_size); 253 254 /* if we couldn't enqueue anything, the queue is full */ 255 if (!burst_enqd) { 256 /* don't try to dequeue anything we didn't enqueue */ 257 return cur_iter_op; 258 } 259 260 if (burst_enqd < burst_size) 261 state->ops_enq_retries++; 262 state->ops_enqd += burst_enqd; 263 cur_iter_op += burst_enqd; 264 } 265 return iter_ops_needed; 266 } 267 268 /* benchmark dequeue */ 269 static void 270 pmd_cyclecount_bench_deq(struct pmd_cyclecount_state *state, 271 uint32_t iter_ops_needed, uint16_t test_burst_size) 272 { 273 /* Dequeue full descriptor ring of ops on crypto device */ 274 uint32_t cur_iter_op = 0; 275 while (cur_iter_op < iter_ops_needed) { 276 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op, 277 test_burst_size); 278 struct rte_crypto_op **ops_processed = 279 &state->ctx->ops[cur_iter_op]; 280 uint32_t burst_deqd; 281 282 burst_deqd = rte_cryptodev_dequeue_burst(state->ctx->dev_id, 283 state->ctx->qp_id, ops_processed, burst_size); 284 285 if (burst_deqd < burst_size) 286 state->ops_deq_retries++; 287 state->ops_deqd += burst_deqd; 288 cur_iter_op += burst_deqd; 289 } 290 } 291 292 /* run benchmark per burst size */ 293 static inline int 294 pmd_cyclecount_bench_burst_sz( 295 struct pmd_cyclecount_state *state, uint16_t test_burst_size) 296 { 297 uint64_t tsc_start; 298 uint64_t tsc_end; 299 uint64_t tsc_op; 300 uint64_t tsc_enq; 301 uint64_t tsc_deq; 302 uint32_t cur_op; 303 304 /* reset all counters */ 305 tsc_enq = 0; 306 tsc_deq = 0; 307 state->ops_enqd = 0; 308 state->ops_enq_retries = 0; 309 state->ops_deqd = 0; 310 state->ops_deq_retries = 0; 311 312 /* 313 * Benchmark crypto op alloc-build-free separately. 314 */ 315 tsc_start = rte_rdtsc_precise(); 316 317 for (cur_op = 0; cur_op < state->opts->total_ops; 318 cur_op += state->opts->nb_descriptors) { 319 if (unlikely(pmd_cyclecount_bench_ops( 320 state, cur_op, test_burst_size))) 321 return -1; 322 } 323 324 tsc_end = rte_rdtsc_precise(); 325 tsc_op = tsc_end - tsc_start; 326 327 328 /* 329 * Hardware acceleration cyclecount benchmarking loop. 330 * 331 * We're benchmarking raw enq/deq performance by filling up the device 332 * queue, so we never get any failed enqs unless the driver won't accept 333 * the exact number of descriptors we requested, or the driver won't 334 * wrap around the end of the TX ring. However, since we're only 335 * dequeuing once we've filled up the queue, we have to benchmark it 336 * piecemeal and then average out the results. 337 */ 338 cur_op = 0; 339 while (cur_op < state->opts->total_ops) { 340 uint32_t iter_ops_left = state->opts->total_ops - cur_op; 341 uint32_t iter_ops_needed = RTE_MIN( 342 state->opts->nb_descriptors, iter_ops_left); 343 uint32_t iter_ops_allocd = iter_ops_needed; 344 345 /* allocate and build ops */ 346 if (unlikely(pmd_cyclecount_build_ops(state, iter_ops_needed, 347 test_burst_size))) 348 return -1; 349 350 tsc_start = rte_rdtsc_precise(); 351 352 /* fill up TX ring */ 353 iter_ops_needed = pmd_cyclecount_bench_enq(state, 354 iter_ops_needed, test_burst_size); 355 356 tsc_end = rte_rdtsc_precise(); 357 358 tsc_enq += tsc_end - tsc_start; 359 360 /* allow for HW to catch up */ 361 if (state->delay) 362 rte_delay_us_block(state->delay); 363 364 tsc_start = rte_rdtsc_precise(); 365 366 /* drain RX ring */ 367 pmd_cyclecount_bench_deq(state, iter_ops_needed, 368 test_burst_size); 369 370 tsc_end = rte_rdtsc_precise(); 371 372 tsc_deq += tsc_end - tsc_start; 373 374 cur_op += iter_ops_needed; 375 376 /* 377 * we may not have processed all ops that we allocated, so 378 * free everything we've allocated. 379 */ 380 rte_mempool_put_bulk(state->ctx->pool, 381 (void **)state->ctx->ops, iter_ops_allocd); 382 } 383 384 state->cycles_per_build = (double)tsc_op / state->opts->total_ops; 385 state->cycles_per_enq = (double)tsc_enq / state->ops_enqd; 386 state->cycles_per_deq = (double)tsc_deq / state->ops_deqd; 387 388 return 0; 389 } 390 391 int 392 cperf_pmd_cyclecount_test_runner(void *test_ctx) 393 { 394 struct pmd_cyclecount_state state = {0}; 395 const struct cperf_options *opts; 396 uint16_t test_burst_size; 397 uint8_t burst_size_idx = 0; 398 399 state.ctx = test_ctx; 400 opts = state.ctx->options; 401 state.opts = opts; 402 state.lcore = rte_lcore_id(); 403 state.linearize = 0; 404 405 static uint16_t display_once; 406 static bool warmup = true; 407 408 /* 409 * We need a small delay to allow for hardware to process all the crypto 410 * operations. We can't automatically figure out what the delay should 411 * be, so we leave it up to the user (by default it's 0). 412 */ 413 state.delay = 1000 * opts->pmdcc_delay; 414 415 #ifdef CPERF_LINEARIZATION_ENABLE 416 struct rte_cryptodev_info dev_info; 417 418 /* Check if source mbufs require coalescing */ 419 if (opts->segments_sz < ctx->options->max_buffer_size) { 420 rte_cryptodev_info_get(state.ctx->dev_id, &dev_info); 421 if ((dev_info.feature_flags & 422 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 423 0) { 424 state.linearize = 1; 425 } 426 } 427 #endif /* CPERF_LINEARIZATION_ENABLE */ 428 429 state.ctx->lcore_id = state.lcore; 430 431 /* Get first size from range or list */ 432 if (opts->inc_burst_size != 0) 433 test_burst_size = opts->min_burst_size; 434 else 435 test_burst_size = opts->burst_size_list[0]; 436 437 while (test_burst_size <= opts->max_burst_size) { 438 /* do a benchmark run */ 439 if (pmd_cyclecount_bench_burst_sz(&state, test_burst_size)) 440 return -1; 441 442 /* 443 * First run is always a warm up run. 444 */ 445 if (warmup) { 446 warmup = false; 447 continue; 448 } 449 450 uint16_t exp = 0; 451 if (!opts->csv) { 452 if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, 453 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) 454 printf(PRETTY_HDR_FMT, "lcore id", "Buf Size", 455 "Burst Size", "Enqueued", 456 "Dequeued", "Enq Retries", 457 "Deq Retries", "Cycles/Op", 458 "Cycles/Enq", "Cycles/Deq"); 459 460 printf(PRETTY_LINE_FMT, state.ctx->lcore_id, 461 opts->test_buffer_size, test_burst_size, 462 state.ops_enqd, state.ops_deqd, 463 state.ops_enq_retries, 464 state.ops_deq_retries, 465 state.cycles_per_build, 466 state.cycles_per_enq, 467 state.cycles_per_deq); 468 } else { 469 if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, 470 __ATOMIC_RELAXED, __ATOMIC_RELAXED)) 471 printf(CSV_HDR_FMT, "# lcore id", "Buf Size", 472 "Burst Size", "Enqueued", 473 "Dequeued", "Enq Retries", 474 "Deq Retries", "Cycles/Op", 475 "Cycles/Enq", "Cycles/Deq"); 476 477 printf(CSV_LINE_FMT, state.ctx->lcore_id, 478 opts->test_buffer_size, test_burst_size, 479 state.ops_enqd, state.ops_deqd, 480 state.ops_enq_retries, 481 state.ops_deq_retries, 482 state.cycles_per_build, 483 state.cycles_per_enq, 484 state.cycles_per_deq); 485 } 486 487 /* Get next size from range or list */ 488 if (opts->inc_burst_size != 0) 489 test_burst_size += opts->inc_burst_size; 490 else { 491 if (++burst_size_idx == opts->burst_size_count) 492 break; 493 test_burst_size = opts->burst_size_list[burst_size_idx]; 494 } 495 } 496 497 return 0; 498 } 499 500 void 501 cperf_pmd_cyclecount_test_destructor(void *arg) 502 { 503 struct cperf_pmd_cyclecount_ctx *ctx = arg; 504 505 if (ctx == NULL) 506 return; 507 508 cperf_pmd_cyclecount_test_free(ctx); 509 } 510