12695db95SArtur Trybula /* SPDX-License-Identifier: BSD-3-Clause 22695db95SArtur Trybula * Copyright(c) 2019 Intel Corporation 32695db95SArtur Trybula */ 42695db95SArtur Trybula 52695db95SArtur Trybula #include <rte_malloc.h> 62695db95SArtur Trybula #include <rte_eal.h> 72695db95SArtur Trybula #include <rte_log.h> 82695db95SArtur Trybula #include <rte_cycles.h> 92695db95SArtur Trybula #include "rte_spinlock.h" 102695db95SArtur Trybula #include <rte_compressdev.h> 112695db95SArtur Trybula 122695db95SArtur Trybula #include "comp_perf_test_cyclecount.h" 132695db95SArtur Trybula 142695db95SArtur Trybula struct cperf_cyclecount_ctx { 152695db95SArtur Trybula struct cperf_verify_ctx ver; 162695db95SArtur Trybula 172695db95SArtur Trybula uint32_t ops_enq_retries; 182695db95SArtur Trybula uint32_t ops_deq_retries; 192695db95SArtur Trybula 202695db95SArtur Trybula uint64_t duration_op; 212695db95SArtur Trybula uint64_t duration_enq; 222695db95SArtur Trybula uint64_t duration_deq; 232695db95SArtur Trybula }; 242695db95SArtur Trybula 252695db95SArtur Trybula void 262695db95SArtur Trybula cperf_cyclecount_test_destructor(void *arg) 272695db95SArtur Trybula { 282695db95SArtur Trybula struct cperf_cyclecount_ctx *ctx = arg; 292695db95SArtur Trybula 302695db95SArtur Trybula if (arg) { 312695db95SArtur Trybula comp_perf_free_memory(ctx->ver.options, &ctx->ver.mem); 322695db95SArtur Trybula rte_free(arg); 332695db95SArtur Trybula } 342695db95SArtur Trybula } 352695db95SArtur Trybula 362695db95SArtur Trybula void * 372695db95SArtur Trybula cperf_cyclecount_test_constructor(uint8_t dev_id, uint16_t qp_id, 382695db95SArtur Trybula struct comp_test_data *options) 392695db95SArtur Trybula { 402695db95SArtur Trybula struct cperf_cyclecount_ctx *ctx = NULL; 412695db95SArtur Trybula 422695db95SArtur Trybula ctx = rte_malloc(NULL, sizeof(struct cperf_cyclecount_ctx), 0); 432695db95SArtur Trybula 442695db95SArtur Trybula if (ctx == NULL) 452695db95SArtur Trybula return NULL; 462695db95SArtur Trybula 472695db95SArtur Trybula ctx->ver.mem.dev_id = dev_id; 482695db95SArtur Trybula ctx->ver.mem.qp_id = qp_id; 492695db95SArtur Trybula ctx->ver.options = options; 502695db95SArtur Trybula ctx->ver.silent = 1; /* ver. part will be silent */ 512695db95SArtur Trybula 522695db95SArtur Trybula if (!comp_perf_allocate_memory(ctx->ver.options, &ctx->ver.mem) 532695db95SArtur Trybula && !prepare_bufs(ctx->ver.options, &ctx->ver.mem)) 542695db95SArtur Trybula return ctx; 552695db95SArtur Trybula 562695db95SArtur Trybula cperf_cyclecount_test_destructor(ctx); 572695db95SArtur Trybula return NULL; 582695db95SArtur Trybula } 592695db95SArtur Trybula 602695db95SArtur Trybula static int 612695db95SArtur Trybula cperf_cyclecount_op_setup(struct rte_comp_op **ops, 622695db95SArtur Trybula struct cperf_cyclecount_ctx *ctx, 632695db95SArtur Trybula struct rte_mbuf **input_bufs, 642695db95SArtur Trybula struct rte_mbuf **output_bufs, 652695db95SArtur Trybula void *priv_xform, 662695db95SArtur Trybula uint32_t out_seg_sz) 672695db95SArtur Trybula { 682695db95SArtur Trybula struct comp_test_data *test_data = ctx->ver.options; 692695db95SArtur Trybula struct cperf_mem_resources *mem = &ctx->ver.mem; 702695db95SArtur Trybula 712695db95SArtur Trybula uint32_t i, iter, num_iter; 722695db95SArtur Trybula int res = 0; 732695db95SArtur Trybula uint16_t ops_needed; 742695db95SArtur Trybula 752695db95SArtur Trybula num_iter = test_data->num_iter; 762695db95SArtur Trybula 772695db95SArtur Trybula for (iter = 0; iter < num_iter; iter++) { 782695db95SArtur Trybula uint32_t remaining_ops = mem->total_bufs; 792695db95SArtur Trybula uint32_t total_enq_ops = 0; 802695db95SArtur Trybula uint16_t num_enq = 0; 812695db95SArtur Trybula uint16_t num_deq = 0; 822695db95SArtur Trybula 832695db95SArtur Trybula while (remaining_ops > 0) { 842695db95SArtur Trybula uint16_t num_ops = RTE_MIN(remaining_ops, 852695db95SArtur Trybula test_data->burst_sz); 862695db95SArtur Trybula ops_needed = num_ops; 872695db95SArtur Trybula 882695db95SArtur Trybula /* Allocate compression operations */ 892695db95SArtur Trybula if (ops_needed && rte_mempool_get_bulk( 902695db95SArtur Trybula mem->op_pool, 912695db95SArtur Trybula (void **)ops, 922695db95SArtur Trybula ops_needed) != 0) { 932695db95SArtur Trybula RTE_LOG(ERR, USER1, 942695db95SArtur Trybula "Cyclecount: could not allocate enough operations\n"); 952695db95SArtur Trybula res = -1; 962695db95SArtur Trybula goto end; 972695db95SArtur Trybula } 982695db95SArtur Trybula 992695db95SArtur Trybula for (i = 0; i < ops_needed; i++) { 1002695db95SArtur Trybula 1012695db95SArtur Trybula /* Calculate next buffer to attach */ 1022695db95SArtur Trybula /* to operation */ 1032695db95SArtur Trybula uint32_t buf_id = total_enq_ops + i; 1042695db95SArtur Trybula uint16_t op_id = i; 1052695db95SArtur Trybula 1062695db95SArtur Trybula /* Reset all data in output buffers */ 1072695db95SArtur Trybula struct rte_mbuf *m = output_bufs[buf_id]; 1082695db95SArtur Trybula 1092695db95SArtur Trybula m->pkt_len = out_seg_sz * m->nb_segs; 1102695db95SArtur Trybula while (m) { 1112695db95SArtur Trybula m->data_len = m->buf_len - m->data_off; 1122695db95SArtur Trybula m = m->next; 1132695db95SArtur Trybula } 1142695db95SArtur Trybula ops[op_id]->m_src = input_bufs[buf_id]; 1152695db95SArtur Trybula ops[op_id]->m_dst = output_bufs[buf_id]; 1162695db95SArtur Trybula ops[op_id]->src.offset = 0; 1172695db95SArtur Trybula ops[op_id]->src.length = 1182695db95SArtur Trybula rte_pktmbuf_pkt_len(input_bufs[buf_id]); 1192695db95SArtur Trybula ops[op_id]->dst.offset = 0; 1202695db95SArtur Trybula ops[op_id]->flush_flag = RTE_COMP_FLUSH_FINAL; 1212695db95SArtur Trybula ops[op_id]->input_chksum = buf_id; 1222695db95SArtur Trybula ops[op_id]->private_xform = priv_xform; 1232695db95SArtur Trybula } 1242695db95SArtur Trybula 1252695db95SArtur Trybula /* E N Q U E U I N G */ 1262695db95SArtur Trybula /* assuming that all ops are enqueued */ 1272695db95SArtur Trybula /* instead of the real enqueue operation */ 1282695db95SArtur Trybula num_enq = num_ops; 1292695db95SArtur Trybula 1302695db95SArtur Trybula remaining_ops -= num_enq; 1312695db95SArtur Trybula total_enq_ops += num_enq; 1322695db95SArtur Trybula 1332695db95SArtur Trybula /* D E Q U E U I N G */ 1342695db95SArtur Trybula /* assuming that all ops dequeued */ 1352695db95SArtur Trybula /* instead of the real dequeue operation */ 1362695db95SArtur Trybula num_deq = num_ops; 1372695db95SArtur Trybula 1382695db95SArtur Trybula rte_mempool_put_bulk(mem->op_pool, 1392695db95SArtur Trybula (void **)ops, num_deq); 1402695db95SArtur Trybula } 1412695db95SArtur Trybula } 1422695db95SArtur Trybula return res; 1432695db95SArtur Trybula end: 1442695db95SArtur Trybula rte_mempool_put_bulk(mem->op_pool, (void **)ops, ops_needed); 1452695db95SArtur Trybula rte_free(ops); 1462695db95SArtur Trybula 1472695db95SArtur Trybula return res; 1482695db95SArtur Trybula } 1492695db95SArtur Trybula 1502695db95SArtur Trybula static int 1512695db95SArtur Trybula main_loop(struct cperf_cyclecount_ctx *ctx, enum rte_comp_xform_type type) 1522695db95SArtur Trybula { 1532695db95SArtur Trybula struct comp_test_data *test_data = ctx->ver.options; 1542695db95SArtur Trybula struct cperf_mem_resources *mem = &ctx->ver.mem; 1552695db95SArtur Trybula uint8_t dev_id = mem->dev_id; 1562695db95SArtur Trybula uint32_t i, iter, num_iter; 1572695db95SArtur Trybula struct rte_comp_op **ops, **deq_ops; 1582695db95SArtur Trybula void *priv_xform = NULL; 1592695db95SArtur Trybula struct rte_comp_xform xform; 1602695db95SArtur Trybula struct rte_mbuf **input_bufs, **output_bufs; 1612695db95SArtur Trybula int ret, res = 0; 1622695db95SArtur Trybula int allocated = 0; 1632695db95SArtur Trybula uint32_t out_seg_sz; 1642695db95SArtur Trybula 1652695db95SArtur Trybula uint64_t tsc_start, tsc_end, tsc_duration; 1662695db95SArtur Trybula 1672695db95SArtur Trybula if (test_data == NULL || !test_data->burst_sz) { 1682695db95SArtur Trybula RTE_LOG(ERR, USER1, "Unknown burst size\n"); 1692695db95SArtur Trybula return -1; 1702695db95SArtur Trybula } 1712695db95SArtur Trybula ctx->duration_enq = 0; 1722695db95SArtur Trybula ctx->duration_deq = 0; 1732695db95SArtur Trybula ctx->ops_enq_retries = 0; 1742695db95SArtur Trybula ctx->ops_deq_retries = 0; 1752695db95SArtur Trybula 1762695db95SArtur Trybula /* one array for both enqueue and dequeue */ 1772695db95SArtur Trybula ops = rte_zmalloc_socket(NULL, 1782695db95SArtur Trybula 2 * mem->total_bufs * sizeof(struct rte_comp_op *), 1792695db95SArtur Trybula 0, rte_socket_id()); 1802695db95SArtur Trybula 1812695db95SArtur Trybula if (ops == NULL) { 1822695db95SArtur Trybula RTE_LOG(ERR, USER1, 1832695db95SArtur Trybula "Can't allocate memory for ops strucures\n"); 1842695db95SArtur Trybula return -1; 1852695db95SArtur Trybula } 1862695db95SArtur Trybula 1872695db95SArtur Trybula deq_ops = &ops[mem->total_bufs]; 1882695db95SArtur Trybula 1892695db95SArtur Trybula if (type == RTE_COMP_COMPRESS) { 1902695db95SArtur Trybula xform = (struct rte_comp_xform) { 1912695db95SArtur Trybula .type = RTE_COMP_COMPRESS, 1922695db95SArtur Trybula .compress = { 1932695db95SArtur Trybula .algo = RTE_COMP_ALGO_DEFLATE, 1942695db95SArtur Trybula .deflate.huffman = test_data->huffman_enc, 1952695db95SArtur Trybula .level = test_data->level, 1962695db95SArtur Trybula .window_size = test_data->window_sz, 1972695db95SArtur Trybula .chksum = RTE_COMP_CHECKSUM_NONE, 1982695db95SArtur Trybula .hash_algo = RTE_COMP_HASH_ALGO_NONE 1992695db95SArtur Trybula } 2002695db95SArtur Trybula }; 2012695db95SArtur Trybula input_bufs = mem->decomp_bufs; 2022695db95SArtur Trybula output_bufs = mem->comp_bufs; 2032695db95SArtur Trybula out_seg_sz = test_data->out_seg_sz; 2042695db95SArtur Trybula } else { 2052695db95SArtur Trybula xform = (struct rte_comp_xform) { 2062695db95SArtur Trybula .type = RTE_COMP_DECOMPRESS, 2072695db95SArtur Trybula .decompress = { 2082695db95SArtur Trybula .algo = RTE_COMP_ALGO_DEFLATE, 2092695db95SArtur Trybula .chksum = RTE_COMP_CHECKSUM_NONE, 2102695db95SArtur Trybula .window_size = test_data->window_sz, 2112695db95SArtur Trybula .hash_algo = RTE_COMP_HASH_ALGO_NONE 2122695db95SArtur Trybula } 2132695db95SArtur Trybula }; 2142695db95SArtur Trybula input_bufs = mem->comp_bufs; 2152695db95SArtur Trybula output_bufs = mem->decomp_bufs; 2162695db95SArtur Trybula out_seg_sz = test_data->seg_sz; 2172695db95SArtur Trybula } 2182695db95SArtur Trybula 2192695db95SArtur Trybula /* Create private xform */ 2202695db95SArtur Trybula if (rte_compressdev_private_xform_create(dev_id, &xform, 2212695db95SArtur Trybula &priv_xform) < 0) { 2222695db95SArtur Trybula RTE_LOG(ERR, USER1, "Private xform could not be created\n"); 2232695db95SArtur Trybula res = -1; 2242695db95SArtur Trybula goto end; 2252695db95SArtur Trybula } 2262695db95SArtur Trybula 2272695db95SArtur Trybula tsc_start = rte_rdtsc_precise(); 2282695db95SArtur Trybula ret = cperf_cyclecount_op_setup(ops, 2292695db95SArtur Trybula ctx, 2302695db95SArtur Trybula input_bufs, 2312695db95SArtur Trybula output_bufs, 2322695db95SArtur Trybula priv_xform, 2332695db95SArtur Trybula out_seg_sz); 2342695db95SArtur Trybula 2352695db95SArtur Trybula tsc_end = rte_rdtsc_precise(); 2362695db95SArtur Trybula 2372695db95SArtur Trybula /* ret value check postponed a bit to cancel extra 'if' bias */ 2382695db95SArtur Trybula if (ret < 0) { 2392695db95SArtur Trybula RTE_LOG(ERR, USER1, "Setup function failed\n"); 2402695db95SArtur Trybula res = -1; 2412695db95SArtur Trybula goto end; 2422695db95SArtur Trybula } 2432695db95SArtur Trybula 2442695db95SArtur Trybula tsc_duration = tsc_end - tsc_start; 2452695db95SArtur Trybula ctx->duration_op = tsc_duration; 2462695db95SArtur Trybula 2472695db95SArtur Trybula num_iter = test_data->num_iter; 2482695db95SArtur Trybula for (iter = 0; iter < num_iter; iter++) { 2492695db95SArtur Trybula uint32_t total_ops = mem->total_bufs; 2502695db95SArtur Trybula uint32_t remaining_ops = mem->total_bufs; 2512695db95SArtur Trybula uint32_t total_deq_ops = 0; 2522695db95SArtur Trybula uint32_t total_enq_ops = 0; 2532695db95SArtur Trybula uint16_t ops_unused = 0; 2542695db95SArtur Trybula uint16_t num_enq = 0; 2552695db95SArtur Trybula uint16_t num_deq = 0; 2562695db95SArtur Trybula 2572695db95SArtur Trybula while (remaining_ops > 0) { 2582695db95SArtur Trybula uint16_t num_ops = RTE_MIN(remaining_ops, 2592695db95SArtur Trybula test_data->burst_sz); 2602695db95SArtur Trybula uint16_t ops_needed = num_ops - ops_unused; 2612695db95SArtur Trybula 2622695db95SArtur Trybula /* 2632695db95SArtur Trybula * Move the unused operations from the previous 2642695db95SArtur Trybula * enqueue_burst call to the front, to maintain order 2652695db95SArtur Trybula */ 2662695db95SArtur Trybula if ((ops_unused > 0) && (num_enq > 0)) { 2672695db95SArtur Trybula size_t nb_b_to_mov = 2682695db95SArtur Trybula ops_unused * sizeof(struct rte_comp_op *); 2692695db95SArtur Trybula 2702695db95SArtur Trybula memmove(ops, &ops[num_enq], nb_b_to_mov); 2712695db95SArtur Trybula } 2722695db95SArtur Trybula 2732695db95SArtur Trybula /* Allocate compression operations */ 2742695db95SArtur Trybula if (ops_needed && rte_mempool_get_bulk( 2752695db95SArtur Trybula mem->op_pool, 2762695db95SArtur Trybula (void **)ops, 2772695db95SArtur Trybula ops_needed) != 0) { 2782695db95SArtur Trybula RTE_LOG(ERR, USER1, 2792695db95SArtur Trybula "Could not allocate enough operations\n"); 2802695db95SArtur Trybula res = -1; 2812695db95SArtur Trybula goto end; 2822695db95SArtur Trybula } 2832695db95SArtur Trybula allocated += ops_needed; 2842695db95SArtur Trybula 2852695db95SArtur Trybula for (i = 0; i < ops_needed; i++) { 2862695db95SArtur Trybula /* 2872695db95SArtur Trybula * Calculate next buffer to attach to operation 2882695db95SArtur Trybula */ 2892695db95SArtur Trybula uint32_t buf_id = total_enq_ops + i + 2902695db95SArtur Trybula ops_unused; 2912695db95SArtur Trybula uint16_t op_id = ops_unused + i; 2922695db95SArtur Trybula /* Reset all data in output buffers */ 2932695db95SArtur Trybula struct rte_mbuf *m = output_bufs[buf_id]; 2942695db95SArtur Trybula 2952695db95SArtur Trybula m->pkt_len = out_seg_sz * m->nb_segs; 2962695db95SArtur Trybula while (m) { 2972695db95SArtur Trybula m->data_len = m->buf_len - m->data_off; 2982695db95SArtur Trybula m = m->next; 2992695db95SArtur Trybula } 3002695db95SArtur Trybula ops[op_id]->m_src = input_bufs[buf_id]; 3012695db95SArtur Trybula ops[op_id]->m_dst = output_bufs[buf_id]; 3022695db95SArtur Trybula ops[op_id]->src.offset = 0; 3032695db95SArtur Trybula ops[op_id]->src.length = 3042695db95SArtur Trybula rte_pktmbuf_pkt_len(input_bufs[buf_id]); 3052695db95SArtur Trybula ops[op_id]->dst.offset = 0; 3062695db95SArtur Trybula ops[op_id]->flush_flag = RTE_COMP_FLUSH_FINAL; 3072695db95SArtur Trybula ops[op_id]->input_chksum = buf_id; 3082695db95SArtur Trybula ops[op_id]->private_xform = priv_xform; 3092695db95SArtur Trybula } 3102695db95SArtur Trybula 3112695db95SArtur Trybula if (unlikely(test_data->perf_comp_force_stop)) 3122695db95SArtur Trybula goto end; 3132695db95SArtur Trybula 3142695db95SArtur Trybula tsc_start = rte_rdtsc_precise(); 3152695db95SArtur Trybula num_enq = rte_compressdev_enqueue_burst(dev_id, 3162695db95SArtur Trybula mem->qp_id, ops, 3172695db95SArtur Trybula num_ops); 3182695db95SArtur Trybula tsc_end = rte_rdtsc_precise(); 3192695db95SArtur Trybula tsc_duration = tsc_end - tsc_start; 3202695db95SArtur Trybula ctx->duration_enq += tsc_duration; 3212695db95SArtur Trybula 3222695db95SArtur Trybula if (num_enq < num_ops) 3232695db95SArtur Trybula ctx->ops_enq_retries++; 3242695db95SArtur Trybula 3252695db95SArtur Trybula if (test_data->cyclecount_delay) 3262695db95SArtur Trybula rte_delay_us_block(test_data->cyclecount_delay); 3272695db95SArtur Trybula 3282695db95SArtur Trybula if (num_enq == 0) { 3292695db95SArtur Trybula struct rte_compressdev_stats stats; 3302695db95SArtur Trybula 3312695db95SArtur Trybula rte_compressdev_stats_get(dev_id, &stats); 3322695db95SArtur Trybula if (stats.enqueue_err_count) { 3332695db95SArtur Trybula res = -1; 3342695db95SArtur Trybula goto end; 3352695db95SArtur Trybula } 3362695db95SArtur Trybula } 3372695db95SArtur Trybula 3382695db95SArtur Trybula ops_unused = num_ops - num_enq; 3392695db95SArtur Trybula remaining_ops -= num_enq; 3402695db95SArtur Trybula total_enq_ops += num_enq; 3412695db95SArtur Trybula 3422695db95SArtur Trybula tsc_start = rte_rdtsc_precise(); 3432695db95SArtur Trybula num_deq = rte_compressdev_dequeue_burst(dev_id, 3442695db95SArtur Trybula mem->qp_id, 3452695db95SArtur Trybula deq_ops, 3462695db95SArtur Trybula allocated); 3472695db95SArtur Trybula tsc_end = rte_rdtsc_precise(); 3482695db95SArtur Trybula tsc_duration = tsc_end - tsc_start; 3492695db95SArtur Trybula ctx->duration_deq += tsc_duration; 3502695db95SArtur Trybula 3512695db95SArtur Trybula if (num_deq < allocated) 3522695db95SArtur Trybula ctx->ops_deq_retries++; 3532695db95SArtur Trybula 3542695db95SArtur Trybula total_deq_ops += num_deq; 3552695db95SArtur Trybula 3562695db95SArtur Trybula if (iter == num_iter - 1) { 3572695db95SArtur Trybula for (i = 0; i < num_deq; i++) { 3582695db95SArtur Trybula struct rte_comp_op *op = deq_ops[i]; 3592695db95SArtur Trybula 3602695db95SArtur Trybula if (op->status != 3612695db95SArtur Trybula RTE_COMP_OP_STATUS_SUCCESS) { 3622695db95SArtur Trybula RTE_LOG(ERR, USER1, "Some operations were not successful\n"); 3632695db95SArtur Trybula goto end; 3642695db95SArtur Trybula } 3652695db95SArtur Trybula 3662695db95SArtur Trybula struct rte_mbuf *m = op->m_dst; 3672695db95SArtur Trybula 3682695db95SArtur Trybula m->pkt_len = op->produced; 3692695db95SArtur Trybula uint32_t remaining_data = op->produced; 3702695db95SArtur Trybula uint16_t data_to_append; 3712695db95SArtur Trybula 3722695db95SArtur Trybula while (remaining_data > 0) { 3732695db95SArtur Trybula data_to_append = 3742695db95SArtur Trybula RTE_MIN(remaining_data, 3752695db95SArtur Trybula out_seg_sz); 3762695db95SArtur Trybula m->data_len = data_to_append; 3772695db95SArtur Trybula remaining_data -= 3782695db95SArtur Trybula data_to_append; 3792695db95SArtur Trybula m = m->next; 3802695db95SArtur Trybula } 3812695db95SArtur Trybula } 3822695db95SArtur Trybula } 3832695db95SArtur Trybula rte_mempool_put_bulk(mem->op_pool, 3842695db95SArtur Trybula (void **)deq_ops, num_deq); 3852695db95SArtur Trybula allocated -= num_deq; 3862695db95SArtur Trybula } 3872695db95SArtur Trybula 3882695db95SArtur Trybula /* Dequeue the last operations */ 3892695db95SArtur Trybula while (total_deq_ops < total_ops) { 3902695db95SArtur Trybula if (unlikely(test_data->perf_comp_force_stop)) 3912695db95SArtur Trybula goto end; 3922695db95SArtur Trybula 3932695db95SArtur Trybula tsc_start = rte_rdtsc_precise(); 3942695db95SArtur Trybula num_deq = rte_compressdev_dequeue_burst(dev_id, 3952695db95SArtur Trybula mem->qp_id, 3962695db95SArtur Trybula deq_ops, 3972695db95SArtur Trybula test_data->burst_sz); 3982695db95SArtur Trybula tsc_end = rte_rdtsc_precise(); 3992695db95SArtur Trybula tsc_duration = tsc_end - tsc_start; 4002695db95SArtur Trybula ctx->duration_deq += tsc_duration; 4012695db95SArtur Trybula ctx->ops_deq_retries++; 4022695db95SArtur Trybula 4032695db95SArtur Trybula if (num_deq == 0) { 4042695db95SArtur Trybula struct rte_compressdev_stats stats; 4052695db95SArtur Trybula 4062695db95SArtur Trybula rte_compressdev_stats_get(dev_id, &stats); 4072695db95SArtur Trybula if (stats.dequeue_err_count) { 4082695db95SArtur Trybula res = -1; 4092695db95SArtur Trybula goto end; 4102695db95SArtur Trybula } 4112695db95SArtur Trybula } 4122695db95SArtur Trybula total_deq_ops += num_deq; 4132695db95SArtur Trybula 4142695db95SArtur Trybula if (iter == num_iter - 1) { 4152695db95SArtur Trybula for (i = 0; i < num_deq; i++) { 4162695db95SArtur Trybula struct rte_comp_op *op = deq_ops[i]; 4172695db95SArtur Trybula 4182695db95SArtur Trybula if (op->status != 4192695db95SArtur Trybula RTE_COMP_OP_STATUS_SUCCESS) { 4202695db95SArtur Trybula RTE_LOG(ERR, USER1, "Some operations were not successful\n"); 4212695db95SArtur Trybula goto end; 4222695db95SArtur Trybula } 4232695db95SArtur Trybula 4242695db95SArtur Trybula struct rte_mbuf *m = op->m_dst; 4252695db95SArtur Trybula 4262695db95SArtur Trybula m->pkt_len = op->produced; 4272695db95SArtur Trybula uint32_t remaining_data = op->produced; 4282695db95SArtur Trybula uint16_t data_to_append; 4292695db95SArtur Trybula 4302695db95SArtur Trybula while (remaining_data > 0) { 4312695db95SArtur Trybula data_to_append = 4322695db95SArtur Trybula RTE_MIN(remaining_data, 4332695db95SArtur Trybula out_seg_sz); 4342695db95SArtur Trybula m->data_len = data_to_append; 4352695db95SArtur Trybula remaining_data -= 4362695db95SArtur Trybula data_to_append; 4372695db95SArtur Trybula m = m->next; 4382695db95SArtur Trybula } 4392695db95SArtur Trybula } 4402695db95SArtur Trybula } 4412695db95SArtur Trybula rte_mempool_put_bulk(mem->op_pool, 4422695db95SArtur Trybula (void **)deq_ops, num_deq); 4432695db95SArtur Trybula allocated -= num_deq; 4442695db95SArtur Trybula } 4452695db95SArtur Trybula } 4462695db95SArtur Trybula allocated = 0; 4472695db95SArtur Trybula 4482695db95SArtur Trybula end: 4492695db95SArtur Trybula if (allocated) 4502695db95SArtur Trybula rte_mempool_put_bulk(mem->op_pool, (void **)ops, allocated); 4512695db95SArtur Trybula rte_compressdev_private_xform_free(dev_id, priv_xform); 4522695db95SArtur Trybula rte_free(ops); 4532695db95SArtur Trybula 4542695db95SArtur Trybula if (test_data->perf_comp_force_stop) { 4552695db95SArtur Trybula RTE_LOG(ERR, USER1, 4562695db95SArtur Trybula "lcore: %d Perf. test has been aborted by user\n", 4572695db95SArtur Trybula mem->lcore_id); 4582695db95SArtur Trybula res = -1; 4592695db95SArtur Trybula } 4602695db95SArtur Trybula return res; 4612695db95SArtur Trybula } 4622695db95SArtur Trybula 4632695db95SArtur Trybula int 4642695db95SArtur Trybula cperf_cyclecount_test_runner(void *test_ctx) 4652695db95SArtur Trybula { 4662695db95SArtur Trybula struct cperf_cyclecount_ctx *ctx = test_ctx; 4672695db95SArtur Trybula struct comp_test_data *test_data = ctx->ver.options; 4682695db95SArtur Trybula uint32_t lcore = rte_lcore_id(); 469*d3fcd87cSJoyce Kong static uint16_t display_once; 4702695db95SArtur Trybula static rte_spinlock_t print_spinlock; 4712695db95SArtur Trybula int i; 4722695db95SArtur Trybula 4732695db95SArtur Trybula uint32_t ops_enq_retries_comp; 4742695db95SArtur Trybula uint32_t ops_deq_retries_comp; 4752695db95SArtur Trybula 4762695db95SArtur Trybula uint32_t ops_enq_retries_decomp; 4772695db95SArtur Trybula uint32_t ops_deq_retries_decomp; 4782695db95SArtur Trybula 4792695db95SArtur Trybula uint32_t duration_setup_per_op; 4802695db95SArtur Trybula 4812695db95SArtur Trybula uint32_t duration_enq_per_op_comp; 4822695db95SArtur Trybula uint32_t duration_deq_per_op_comp; 4832695db95SArtur Trybula 4842695db95SArtur Trybula uint32_t duration_enq_per_op_decomp; 4852695db95SArtur Trybula uint32_t duration_deq_per_op_decomp; 4862695db95SArtur Trybula 4872695db95SArtur Trybula ctx->ver.mem.lcore_id = lcore; 4882695db95SArtur Trybula 489*d3fcd87cSJoyce Kong uint16_t exp = 0; 4902695db95SArtur Trybula /* 4912695db95SArtur Trybula * printing information about current compression thread 4922695db95SArtur Trybula */ 493*d3fcd87cSJoyce Kong if (__atomic_compare_exchange_n(&ctx->ver.mem.print_info_once, &exp, 494*d3fcd87cSJoyce Kong 1, 0, __ATOMIC_RELAXED, __ATOMIC_RELAXED)) 4952695db95SArtur Trybula printf(" lcore: %u," 4962695db95SArtur Trybula " driver name: %s," 4972695db95SArtur Trybula " device name: %s," 4982695db95SArtur Trybula " device id: %u," 4992695db95SArtur Trybula " socket id: %u," 5002695db95SArtur Trybula " queue pair id: %u\n", 5012695db95SArtur Trybula lcore, 5022695db95SArtur Trybula ctx->ver.options->driver_name, 5032695db95SArtur Trybula rte_compressdev_name_get(ctx->ver.mem.dev_id), 5042695db95SArtur Trybula ctx->ver.mem.dev_id, 5052695db95SArtur Trybula rte_compressdev_socket_id(ctx->ver.mem.dev_id), 5062695db95SArtur Trybula ctx->ver.mem.qp_id); 5072695db95SArtur Trybula 5082695db95SArtur Trybula /* 5092695db95SArtur Trybula * First the verification part is needed 5102695db95SArtur Trybula */ 5112695db95SArtur Trybula if (cperf_verify_test_runner(&ctx->ver)) 5122695db95SArtur Trybula return EXIT_FAILURE; 5132695db95SArtur Trybula 5142695db95SArtur Trybula /* 5152695db95SArtur Trybula * Run the tests twice, discarding the first performance 5162695db95SArtur Trybula * results, before the cache is warmed up 5172695db95SArtur Trybula */ 5182695db95SArtur Trybula 5192695db95SArtur Trybula /* C O M P R E S S */ 5202695db95SArtur Trybula for (i = 0; i < 2; i++) { 5212695db95SArtur Trybula if (main_loop(ctx, RTE_COMP_COMPRESS) < 0) 5222695db95SArtur Trybula return EXIT_FAILURE; 5232695db95SArtur Trybula } 5242695db95SArtur Trybula 5252695db95SArtur Trybula ops_enq_retries_comp = ctx->ops_enq_retries; 5262695db95SArtur Trybula ops_deq_retries_comp = ctx->ops_deq_retries; 5272695db95SArtur Trybula 5282695db95SArtur Trybula duration_enq_per_op_comp = ctx->duration_enq / 5292695db95SArtur Trybula (ctx->ver.mem.total_bufs * test_data->num_iter); 5302695db95SArtur Trybula duration_deq_per_op_comp = ctx->duration_deq / 5312695db95SArtur Trybula (ctx->ver.mem.total_bufs * test_data->num_iter); 5322695db95SArtur Trybula 5332695db95SArtur Trybula /* D E C O M P R E S S */ 5342695db95SArtur Trybula for (i = 0; i < 2; i++) { 5352695db95SArtur Trybula if (main_loop(ctx, RTE_COMP_DECOMPRESS) < 0) 5362695db95SArtur Trybula return EXIT_FAILURE; 5372695db95SArtur Trybula } 5382695db95SArtur Trybula 5392695db95SArtur Trybula ops_enq_retries_decomp = ctx->ops_enq_retries; 5402695db95SArtur Trybula ops_deq_retries_decomp = ctx->ops_deq_retries; 5412695db95SArtur Trybula 5422695db95SArtur Trybula duration_enq_per_op_decomp = ctx->duration_enq / 5432695db95SArtur Trybula (ctx->ver.mem.total_bufs * test_data->num_iter); 5442695db95SArtur Trybula duration_deq_per_op_decomp = ctx->duration_deq / 5452695db95SArtur Trybula (ctx->ver.mem.total_bufs * test_data->num_iter); 5462695db95SArtur Trybula 5472695db95SArtur Trybula duration_setup_per_op = ctx->duration_op / 5482695db95SArtur Trybula (ctx->ver.mem.total_bufs * test_data->num_iter); 5492695db95SArtur Trybula 5502695db95SArtur Trybula /* R E P O R T processing */ 5512695db95SArtur Trybula rte_spinlock_lock(&print_spinlock); 5522695db95SArtur Trybula 553*d3fcd87cSJoyce Kong if (display_once == 0) { 554*d3fcd87cSJoyce Kong display_once = 1; 555*d3fcd87cSJoyce Kong 5562695db95SArtur Trybula printf("\nLegend for the table\n" 5572695db95SArtur Trybula " - Retries section: number of retries for the following operations:\n" 5582695db95SArtur Trybula " [C-e] - compression enqueue\n" 5592695db95SArtur Trybula " [C-d] - compression dequeue\n" 5602695db95SArtur Trybula " [D-e] - decompression enqueue\n" 5612695db95SArtur Trybula " [D-d] - decompression dequeue\n" 5622695db95SArtur Trybula " - Cycles section: number of cycles per 'op' for the following operations:\n" 5632695db95SArtur Trybula " setup/op - memory allocation, op configuration and memory dealocation\n" 5642695db95SArtur Trybula " [C-e] - compression enqueue\n" 5652695db95SArtur Trybula " [C-d] - compression dequeue\n" 5662695db95SArtur Trybula " [D-e] - decompression enqueue\n" 5672695db95SArtur Trybula " [D-d] - decompression dequeue\n\n"); 5682695db95SArtur Trybula 5692695db95SArtur Trybula printf("\n%12s%6s%12s%17s", 5702695db95SArtur Trybula "lcore id", "Level", "Comp size", "Comp ratio [%]"); 5712695db95SArtur Trybula 5722695db95SArtur Trybula printf(" |%10s %6s %8s %6s %8s", 5732695db95SArtur Trybula " Retries:", 5742695db95SArtur Trybula "[C-e]", "[C-d]", 5752695db95SArtur Trybula "[D-e]", "[D-d]"); 5762695db95SArtur Trybula 5772695db95SArtur Trybula printf(" |%9s %9s %9s %9s %9s %9s\n", 5782695db95SArtur Trybula " Cycles:", 5792695db95SArtur Trybula "setup/op", 5802695db95SArtur Trybula "[C-e]", "[C-d]", 5812695db95SArtur Trybula "[D-e]", "[D-d]"); 5822695db95SArtur Trybula } 5832695db95SArtur Trybula 5842695db95SArtur Trybula printf("%12u" 5852695db95SArtur Trybula "%6u" 5862695db95SArtur Trybula "%12zu" 5872695db95SArtur Trybula "%17.2f", 5882695db95SArtur Trybula ctx->ver.mem.lcore_id, 5892695db95SArtur Trybula test_data->level, 5902695db95SArtur Trybula ctx->ver.comp_data_sz, 5912695db95SArtur Trybula ctx->ver.ratio); 5922695db95SArtur Trybula 5932695db95SArtur Trybula printf(" |%10s %6u %8u %6u %8u", 5942695db95SArtur Trybula " ", 5952695db95SArtur Trybula ops_enq_retries_comp, 5962695db95SArtur Trybula ops_deq_retries_comp, 5972695db95SArtur Trybula ops_enq_retries_decomp, 5982695db95SArtur Trybula ops_deq_retries_decomp); 5992695db95SArtur Trybula 6002695db95SArtur Trybula printf(" |%9s %9u %9u %9u %9u %9u\n", 6012695db95SArtur Trybula " ", 6022695db95SArtur Trybula duration_setup_per_op, 6032695db95SArtur Trybula duration_enq_per_op_comp, 6042695db95SArtur Trybula duration_deq_per_op_comp, 6052695db95SArtur Trybula duration_enq_per_op_decomp, 6062695db95SArtur Trybula duration_deq_per_op_decomp); 6072695db95SArtur Trybula 6082695db95SArtur Trybula rte_spinlock_unlock(&print_spinlock); 6092695db95SArtur Trybula 6102695db95SArtur Trybula return EXIT_SUCCESS; 6112695db95SArtur Trybula } 612