1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Intel Corporation 3 */ 4 5 #ifndef _COMP_PERF_OPS_ 6 #define _COMP_PERF_OPS_ 7 8 #define MAX_LIST 32 9 #define MIN_COMPRESSED_BUF_SIZE 8 10 #define EXPANSE_RATIO 1.1 11 #define MAX_MBUF_DATA_SIZE (UINT16_MAX - RTE_PKTMBUF_HEADROOM) 12 #define MAX_SEG_SIZE ((int)(MAX_MBUF_DATA_SIZE / EXPANSE_RATIO)) 13 14 extern const char *comp_perf_test_type_strs[]; 15 16 /* Cleanup state machine */ 17 enum cleanup_st { 18 ST_CLEAR = 0, 19 ST_TEST_DATA, 20 ST_COMPDEV, 21 ST_INPUT_DATA, 22 ST_MEMORY_ALLOC, 23 ST_DURING_TEST 24 }; 25 26 enum cperf_test_type { 27 CPERF_TEST_TYPE_THROUGHPUT, 28 CPERF_TEST_TYPE_VERIFY, 29 CPERF_TEST_TYPE_PMDCC 30 }; 31 32 enum comp_operation { 33 COMPRESS_ONLY, 34 DECOMPRESS_ONLY, 35 COMPRESS_DECOMPRESS 36 }; 37 38 struct range_list { 39 uint8_t min; 40 uint8_t max; 41 uint8_t inc; 42 uint8_t count; 43 uint8_t list[MAX_LIST]; 44 }; 45 46 struct comp_test_data { 47 char driver_name[RTE_DEV_NAME_MAX_LEN]; 48 char input_file[PATH_MAX]; 49 enum cperf_test_type test; 50 51 uint8_t *input_data; 52 size_t input_data_sz; 53 uint16_t nb_qps; 54 uint16_t seg_sz; 55 uint16_t out_seg_sz; 56 uint16_t burst_sz; 57 uint32_t pool_sz; 58 uint32_t num_iter; 59 uint16_t max_sgl_segs; 60 uint32_t total_segs; 61 62 enum rte_comp_huffman huffman_enc; 63 enum comp_operation test_op; 64 int window_sz; 65 struct range_list level_lst; 66 uint8_t level; 67 int use_external_mbufs; 68 69 double ratio; 70 enum cleanup_st cleanup; 71 int perf_comp_force_stop; 72 73 uint32_t cyclecount_delay; 74 }; 75 76 int 77 comp_perf_options_parse(struct comp_test_data *test_data, int argc, 78 char **argv); 79 80 void 81 comp_perf_options_default(struct comp_test_data *test_data); 82 83 int 84 comp_perf_options_check(struct comp_test_data *test_data); 85 86 #endif 87