1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Intel Corporation 3 */ 4 5 #ifndef _COMP_PERF_OPS_ 6 #define _COMP_PERF_OPS_ 7 8 #define MAX_DRIVER_NAME 64 9 #define MAX_INPUT_FILE_NAME 64 10 #define MAX_LIST 32 11 #define MIN_COMPRESSED_BUF_SIZE 8 12 #define EXPANSE_RATIO 1.05 13 #define MAX_MBUF_DATA_SIZE (UINT16_MAX - RTE_PKTMBUF_HEADROOM) 14 #define MAX_SEG_SIZE ((int)(MAX_MBUF_DATA_SIZE / EXPANSE_RATIO)) 15 16 enum comp_operation { 17 COMPRESS_ONLY, 18 DECOMPRESS_ONLY, 19 COMPRESS_DECOMPRESS 20 }; 21 22 struct range_list { 23 uint8_t min; 24 uint8_t max; 25 uint8_t inc; 26 uint8_t count; 27 uint8_t list[MAX_LIST]; 28 }; 29 30 struct comp_test_data { 31 char driver_name[64]; 32 char input_file[64]; 33 struct rte_mbuf **comp_bufs; 34 struct rte_mbuf **decomp_bufs; 35 uint32_t total_bufs; 36 uint8_t *input_data; 37 size_t input_data_sz; 38 uint8_t *compressed_data; 39 uint8_t *decompressed_data; 40 struct rte_mempool *comp_buf_pool; 41 struct rte_mempool *decomp_buf_pool; 42 struct rte_mempool *op_pool; 43 int8_t cdev_id; 44 uint16_t seg_sz; 45 uint16_t out_seg_sz; 46 uint16_t burst_sz; 47 uint32_t pool_sz; 48 uint32_t num_iter; 49 uint16_t max_sgl_segs; 50 enum rte_comp_huffman huffman_enc; 51 enum comp_operation test_op; 52 int window_sz; 53 struct range_list level; 54 /* Store TSC duration for all levels (including level 0) */ 55 uint64_t comp_tsc_duration[RTE_COMP_LEVEL_MAX + 1]; 56 uint64_t decomp_tsc_duration[RTE_COMP_LEVEL_MAX + 1]; 57 size_t comp_data_sz; 58 size_t decomp_data_sz; 59 double ratio; 60 double comp_gbps; 61 double decomp_gbps; 62 double comp_tsc_byte; 63 double decomp_tsc_byte; 64 }; 65 66 int 67 comp_perf_options_parse(struct comp_test_data *test_data, int argc, 68 char **argv); 69 70 void 71 comp_perf_options_default(struct comp_test_data *test_data); 72 73 int 74 comp_perf_options_check(struct comp_test_data *test_data); 75 76 #endif 77