10eadf8f8SRakesh Kudurumalla /* SPDX-License-Identifier: BSD-3-Clause 20eadf8f8SRakesh Kudurumalla * Copyright(c) 2023 Marvell. 30eadf8f8SRakesh Kudurumalla */ 40eadf8f8SRakesh Kudurumalla 50eadf8f8SRakesh Kudurumalla #ifndef APP_GRAPH_ETHDEV_RX_H 60eadf8f8SRakesh Kudurumalla #define APP_GRAPH_ETHDEV_RX_H 70eadf8f8SRakesh Kudurumalla 80eadf8f8SRakesh Kudurumalla #include <rte_graph.h> 90eadf8f8SRakesh Kudurumalla #include <rte_node_eth_api.h> 100eadf8f8SRakesh Kudurumalla 110eadf8f8SRakesh Kudurumalla #define ETHDEV_RX_LCORE_PARAMS_MAX 1024 120eadf8f8SRakesh Kudurumalla #define ETHDEV_RX_QUEUE_PER_LCORE_MAX 16 130eadf8f8SRakesh Kudurumalla 140eadf8f8SRakesh Kudurumalla struct lcore_rx_queue { 150eadf8f8SRakesh Kudurumalla uint16_t port_id; 160eadf8f8SRakesh Kudurumalla uint8_t queue_id; 170eadf8f8SRakesh Kudurumalla char node_name[RTE_NODE_NAMESIZE]; 180eadf8f8SRakesh Kudurumalla }; 190eadf8f8SRakesh Kudurumalla 20*0efea35aSTyler Retzlaff struct __rte_cache_aligned lcore_conf { 210eadf8f8SRakesh Kudurumalla uint16_t n_rx_queue; 220eadf8f8SRakesh Kudurumalla struct lcore_rx_queue rx_queue_list[ETHDEV_RX_QUEUE_PER_LCORE_MAX]; 230eadf8f8SRakesh Kudurumalla struct rte_graph *graph; 240eadf8f8SRakesh Kudurumalla char name[RTE_GRAPH_NAMESIZE]; 250eadf8f8SRakesh Kudurumalla rte_graph_t graph_id; 26*0efea35aSTyler Retzlaff }; 270eadf8f8SRakesh Kudurumalla 280eadf8f8SRakesh Kudurumalla uint8_t ethdev_rx_num_rx_queues_get(uint16_t port); 290eadf8f8SRakesh Kudurumalla 300eadf8f8SRakesh Kudurumalla extern struct rte_node_ethdev_config ethdev_conf[RTE_MAX_ETHPORTS]; 310eadf8f8SRakesh Kudurumalla extern struct lcore_conf lcore_conf[RTE_MAX_LCORE]; 320eadf8f8SRakesh Kudurumalla extern struct lcore_params *lcore_params; 330eadf8f8SRakesh Kudurumalla extern uint16_t nb_lcore_params; 340eadf8f8SRakesh Kudurumalla 350eadf8f8SRakesh Kudurumalla #endif 36