1 /* 2 * Copyright (c) 2009 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Sepherosa Ziehau <sepherosa@gmail.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/bus_dma.h> 38 39 static void 40 _bus_dmamem_coherent_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) 41 { 42 bus_addr_t *addr = arg; 43 44 if (error) 45 return; 46 47 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg)); 48 *addr = segs->ds_addr; 49 } 50 51 int 52 bus_dmamem_coherent(bus_dma_tag_t parent, 53 bus_size_t alignment, bus_size_t boundary, 54 bus_addr_t lowaddr, bus_addr_t highaddr, 55 bus_size_t maxsize, int flags, 56 bus_dmamem_t *dmem) 57 { 58 int error; 59 60 bzero(dmem, sizeof(*dmem)); 61 62 error = bus_dma_tag_create(parent, alignment, boundary, 63 lowaddr, highaddr, NULL, NULL, 64 maxsize, 1, maxsize, 0, 65 &dmem->dmem_tag); 66 if (error) 67 return error; 68 69 error = bus_dmamem_alloc(dmem->dmem_tag, &dmem->dmem_addr, 70 flags | BUS_DMA_COHERENT, &dmem->dmem_map); 71 if (error) { 72 bus_dma_tag_destroy(dmem->dmem_tag); 73 bzero(dmem, sizeof(*dmem)); 74 return error; 75 } 76 77 error = bus_dmamap_load(dmem->dmem_tag, dmem->dmem_map, 78 dmem->dmem_addr, maxsize, 79 _bus_dmamem_coherent_cb, &dmem->dmem_busaddr, 80 flags & BUS_DMA_NOWAIT); 81 if (error) { 82 if (error == EINPROGRESS) { 83 panic("DMA coherent memory loading is still " 84 "in progress\n"); 85 } 86 bus_dmamem_free(dmem->dmem_tag, dmem->dmem_addr, 87 dmem->dmem_map); 88 bus_dma_tag_destroy(dmem->dmem_tag); 89 bzero(dmem, sizeof(*dmem)); 90 return error; 91 } 92 return 0; 93 } 94