1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $ 34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.11 2004/01/11 16:45:17 joerg Exp $ 35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 36 * from: i386/isa sio.c,v 1.234 37 */ 38 39 #include "opt_comconsole.h" 40 #include "opt_compat.h" 41 #include "opt_ddb.h" 42 #include "opt_sio.h" 43 #include "use_pci.h" 44 #ifdef __i386__ 45 #include "use_puc.h" 46 #endif 47 #include "use_sio.h" 48 49 /* 50 * Serial driver, based on 386BSD-0.1 com driver. 51 * Mostly rewritten to use pseudo-DMA. 52 * Works for National Semiconductor NS8250-NS16550AF UARTs. 53 * COM driver, based on HP dca driver. 54 * 55 * Changes for PC-Card integration: 56 * - Added PC-Card driver table and handlers 57 */ 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/reboot.h> 61 #include <sys/malloc.h> 62 #include <sys/tty.h> 63 #include <sys/proc.h> 64 #include <sys/module.h> 65 #include <sys/conf.h> 66 #include <sys/dkstat.h> 67 #include <sys/fcntl.h> 68 #include <sys/interrupt.h> 69 #include <sys/kernel.h> 70 #include <sys/syslog.h> 71 #include <sys/sysctl.h> 72 #include <sys/bus.h> 73 #include <machine/bus_pio.h> 74 #include <machine/bus.h> 75 #include <sys/rman.h> 76 #include <sys/timepps.h> 77 78 #include <machine/limits.h> 79 80 #include <bus/isa/isareg.h> 81 #include <bus/isa/isavar.h> 82 #if NPCI > 0 83 #include <bus/pci/pcireg.h> 84 #include <bus/pci/pcivar.h> 85 #endif 86 #if NPUC > 0 87 #include <dev/misc/puc/pucvar.h> 88 #endif 89 #include <machine/lock.h> 90 91 #include <machine/clock.h> 92 #include <machine/ipl.h> 93 #ifndef SMP 94 #include <machine/lock.h> 95 #endif 96 #include <machine/resource.h> 97 98 #include "sioreg.h" 99 #include "sio_private.h" 100 101 #ifdef COM_ESP 102 #include "../ic_layer/esp.h" 103 #endif 104 #include "../ic_layer/ns16550.h" 105 106 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 107 108 #define CALLOUT_MASK 0x80 109 #define CONTROL_MASK 0x60 110 #define CONTROL_INIT_STATE 0x20 111 #define CONTROL_LOCK_STATE 0x40 112 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 113 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 114 | ((mynor) & 0x1f)) 115 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 116 | ((unit) & 0x1f)) 117 118 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 119 120 #define sio_getreg(com, off) \ 121 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 122 #define sio_setreg(com, off, value) \ 123 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 124 125 /* 126 * com state bits. 127 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 128 * than the other bits so that they can be tested as a group without masking 129 * off the low bits. 130 * 131 * The following com and tty flags correspond closely: 132 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 133 * comstop()) 134 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 135 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 136 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 137 * TS_FLUSH is not used. 138 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 139 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 140 */ 141 #define CS_BUSY 0x80 /* output in progress */ 142 #define CS_TTGO 0x40 /* output not stopped by XOFF */ 143 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 144 #define CS_CHECKMSR 1 /* check of MSR scheduled */ 145 #define CS_CTS_OFLOW 2 /* use CTS output flow control */ 146 #define CS_DTR_OFF 0x10 /* DTR held off */ 147 #define CS_ODONE 4 /* output completed */ 148 #define CS_RTS_IFLOW 8 /* use RTS input flow control */ 149 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 150 151 static char const * const error_desc[] = { 152 #define CE_OVERRUN 0 153 "silo overflow", 154 #define CE_INTERRUPT_BUF_OVERFLOW 1 155 "interrupt-level buffer overflow", 156 #define CE_TTY_BUF_OVERFLOW 2 157 "tty-level buffer overflow", 158 }; 159 160 #ifdef COM_ESP 161 static int espattach (struct com_s *com, Port_t esp_port); 162 #endif 163 static int sio_isa_attach (device_t dev); 164 165 static timeout_t siobusycheck; 166 static u_int siodivisor (u_long rclk, speed_t speed); 167 static timeout_t siodtrwakeup; 168 static void comhardclose (struct com_s *com); 169 static void sioinput (struct com_s *com); 170 static void siointr1 (struct com_s *com); 171 static void siointr (void *arg); 172 static int commctl (struct com_s *com, int bits, int how); 173 static int comparam (struct tty *tp, struct termios *t); 174 static inthand2_t siopoll; 175 static int sio_isa_probe (device_t dev); 176 static void siosettimeout (void); 177 static int siosetwater (struct com_s *com, speed_t speed); 178 static void comstart (struct tty *tp); 179 static void comstop (struct tty *tp, int rw); 180 static timeout_t comwakeup; 181 static void disc_optim (struct tty *tp, struct termios *t, 182 struct com_s *com); 183 184 #if NPCI > 0 185 static int sio_pci_attach (device_t dev); 186 static void sio_pci_kludge_unit (device_t dev); 187 static int sio_pci_probe (device_t dev); 188 #endif /* NPCI > 0 */ 189 190 #if NPUC > 0 191 static int sio_puc_attach (device_t dev); 192 static int sio_puc_probe (device_t dev); 193 #endif /* NPUC > 0 */ 194 195 static char driver_name[] = "sio"; 196 197 /* table and macro for fast conversion from a unit number to its com struct */ 198 devclass_t sio_devclass; 199 #define com_addr(unit) ((struct com_s *) \ 200 devclass_get_softc(sio_devclass, unit)) 201 202 static device_method_t sio_isa_methods[] = { 203 /* Device interface */ 204 DEVMETHOD(device_probe, sio_isa_probe), 205 DEVMETHOD(device_attach, sio_isa_attach), 206 207 { 0, 0 } 208 }; 209 210 static driver_t sio_isa_driver = { 211 driver_name, 212 sio_isa_methods, 213 sizeof(struct com_s), 214 }; 215 216 #if NPCI > 0 217 static device_method_t sio_pci_methods[] = { 218 /* Device interface */ 219 DEVMETHOD(device_probe, sio_pci_probe), 220 DEVMETHOD(device_attach, sio_pci_attach), 221 222 { 0, 0 } 223 }; 224 225 static driver_t sio_pci_driver = { 226 driver_name, 227 sio_pci_methods, 228 sizeof(struct com_s), 229 }; 230 #endif /* NPCI > 0 */ 231 232 #if NPUC > 0 233 static device_method_t sio_puc_methods[] = { 234 /* Device interface */ 235 DEVMETHOD(device_probe, sio_puc_probe), 236 DEVMETHOD(device_attach, sio_puc_attach), 237 238 { 0, 0 } 239 }; 240 241 static driver_t sio_puc_driver = { 242 driver_name, 243 sio_puc_methods, 244 sizeof(struct com_s), 245 }; 246 #endif /* NPUC > 0 */ 247 248 static d_open_t sioopen; 249 static d_close_t sioclose; 250 static d_read_t sioread; 251 static d_write_t siowrite; 252 static d_ioctl_t sioioctl; 253 254 #define CDEV_MAJOR 28 255 static struct cdevsw sio_cdevsw = { 256 /* name */ driver_name, 257 /* maj */ CDEV_MAJOR, 258 /* flags */ D_TTY | D_KQFILTER, 259 /* port */ NULL, 260 /* autoq */ 0, 261 262 /* open */ sioopen, 263 /* close */ sioclose, 264 /* read */ sioread, 265 /* write */ siowrite, 266 /* ioctl */ sioioctl, 267 /* poll */ ttypoll, 268 /* mmap */ nommap, 269 /* strategy */ nostrategy, 270 /* dump */ nodump, 271 /* psize */ nopsize, 272 /* kqfilter */ ttykqfilter 273 }; 274 275 int comconsole = -1; 276 static volatile speed_t comdefaultrate = CONSPEED; 277 static u_long comdefaultrclk = DEFAULT_RCLK; 278 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 279 #ifdef __alpha__ 280 static volatile speed_t gdbdefaultrate = CONSPEED; 281 #endif 282 static u_int com_events; /* input chars + weighted output completions */ 283 static Port_t siocniobase; 284 static int siocnunit; 285 static Port_t siogdbiobase; 286 static int siogdbunit = -1; 287 static bool_t sio_registered; 288 static int sio_timeout; 289 static int sio_timeouts_until_log; 290 static struct callout_handle sio_timeout_handle 291 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 292 static int sio_numunits; 293 294 #ifdef COM_ESP 295 /* XXX configure this properly. */ 296 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 297 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 298 #endif 299 300 /* 301 * handle sysctl read/write requests for console speed 302 * 303 * In addition to setting comdefaultrate for I/O through /dev/console, 304 * also set the initial and lock values for the /dev/ttyXX device 305 * if there is one associated with the console. Finally, if the /dev/tty 306 * device has already been open, change the speed on the open running port 307 * itself. 308 */ 309 310 static int 311 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 312 { 313 int error, s; 314 speed_t newspeed; 315 struct com_s *com; 316 struct tty *tp; 317 318 newspeed = comdefaultrate; 319 320 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 321 if (error || !req->newptr) 322 return (error); 323 324 comdefaultrate = newspeed; 325 326 if (comconsole < 0) /* serial console not selected? */ 327 return (0); 328 329 com = com_addr(comconsole); 330 if (com == NULL) 331 return (ENXIO); 332 333 /* 334 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 335 * (note, the lock rates really are boolean -- if non-zero, disallow 336 * speed changes) 337 */ 338 com->it_in.c_ispeed = com->it_in.c_ospeed = 339 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 340 com->it_out.c_ispeed = com->it_out.c_ospeed = 341 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 342 343 /* 344 * if we're open, change the running rate too 345 */ 346 tp = com->tp; 347 if (tp && (tp->t_state & TS_ISOPEN)) { 348 tp->t_termios.c_ispeed = 349 tp->t_termios.c_ospeed = comdefaultrate; 350 s = spltty(); 351 error = comparam(tp, &tp->t_termios); 352 splx(s); 353 } 354 return error; 355 } 356 357 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 358 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 359 360 #if NPCI > 0 361 struct pci_ids { 362 u_int32_t type; 363 const char *desc; 364 int rid; 365 }; 366 367 static struct pci_ids pci_ids[] = { 368 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 369 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 }, 370 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 371 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 372 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 }, 373 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 }, 374 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 }, 375 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 }, 376 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 }, 377 { 0x00000000, NULL, 0 } 378 }; 379 380 static int 381 sio_pci_attach(dev) 382 device_t dev; 383 { 384 u_int32_t type; 385 struct pci_ids *id; 386 387 type = pci_get_devid(dev); 388 id = pci_ids; 389 while (id->type && id->type != type) 390 id++; 391 if (id->desc == NULL) 392 return (ENXIO); 393 sio_pci_kludge_unit(dev); 394 return (sioattach(dev, id->rid, 0UL)); 395 } 396 397 /* 398 * Don't cut and paste this to other drivers. It is a horrible kludge 399 * which will fail to work and also be unnecessary in future versions. 400 */ 401 static void 402 sio_pci_kludge_unit(dev) 403 device_t dev; 404 { 405 devclass_t dc; 406 int err; 407 int start; 408 int unit; 409 410 unit = 0; 411 start = 0; 412 while (resource_int_value("sio", unit, "port", &start) == 0 && 413 start > 0) 414 unit++; 415 if (device_get_unit(dev) < unit) { 416 dc = device_get_devclass(dev); 417 while (devclass_get_device(dc, unit)) 418 unit++; 419 device_printf(dev, "moving to sio%d\n", unit); 420 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 421 if (err) 422 device_printf(dev, "error moving device %d\n", err); 423 } 424 } 425 426 static int 427 sio_pci_probe(dev) 428 device_t dev; 429 { 430 u_int32_t type; 431 struct pci_ids *id; 432 433 type = pci_get_devid(dev); 434 id = pci_ids; 435 while (id->type && id->type != type) 436 id++; 437 if (id->desc == NULL) 438 return (ENXIO); 439 device_set_desc(dev, id->desc); 440 return (sioprobe(dev, id->rid, 0UL)); 441 } 442 #endif /* NPCI > 0 */ 443 444 #if NPUC > 0 445 static int 446 sio_puc_attach(dev) 447 device_t dev; 448 { 449 u_int rclk; 450 451 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 452 &rclk) != 0) 453 rclk = DEFAULT_RCLK; 454 return (sioattach(dev, 0, rclk)); 455 } 456 457 static int 458 sio_puc_probe(dev) 459 device_t dev; 460 { 461 u_int rclk; 462 463 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 464 &rclk) != 0) 465 rclk = DEFAULT_RCLK; 466 return (sioprobe(dev, 0, rclk)); 467 } 468 #endif /* NPUC */ 469 470 static struct isa_pnp_id sio_ids[] = { 471 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 472 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 473 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 474 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 475 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 476 /* Devices that do not have a compatid */ 477 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */ 478 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 479 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 480 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */ 481 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 482 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 483 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/ 484 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 485 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 486 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 487 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 488 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */ 489 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 490 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 491 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 492 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */ 493 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 494 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */ 495 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 496 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 497 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 498 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 499 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */ 500 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 501 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 502 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 503 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */ 504 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/ 505 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 506 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 507 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 508 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 509 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 510 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */ 511 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 512 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 513 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */ 514 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 515 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 516 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */ 517 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 518 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */ 519 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */ 520 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 521 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 522 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 523 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 524 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 525 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 526 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */ 527 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 528 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 529 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 530 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 531 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 532 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 533 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 534 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 535 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 536 {0x11007256, NULL}, /* USR0011 - USR ? */ 537 {0x01017256, NULL}, /* USR0101 - USR ? */ 538 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 539 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 540 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 541 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 542 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 543 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 544 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 545 {0x90307256, NULL}, /* USR3090 - USR ? */ 546 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */ 547 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 548 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 549 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */ 550 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 551 {0} 552 }; 553 554 555 556 static int 557 sio_isa_probe(dev) 558 device_t dev; 559 { 560 /* Check isapnp ids */ 561 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 562 return (ENXIO); 563 return (sioprobe(dev, 0, 0UL)); 564 } 565 566 int 567 sioprobe(dev, xrid, rclk) 568 device_t dev; 569 int xrid; 570 u_long rclk; 571 { 572 #if 0 573 static bool_t already_init; 574 device_t xdev; 575 #endif 576 struct com_s *com; 577 u_int divisor; 578 bool_t failures[10]; 579 int fn; 580 device_t idev; 581 Port_t iobase; 582 intrmask_t irqmap[4]; 583 intrmask_t irqs; 584 u_char mcr_image; 585 int result; 586 u_long xirq; 587 u_int flags = device_get_flags(dev); 588 int rid; 589 struct resource *port; 590 591 rid = xrid; 592 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 593 0, ~0, IO_COMSIZE, RF_ACTIVE); 594 if (!port) 595 return (ENXIO); 596 597 com = device_get_softc(dev); 598 com->bst = rman_get_bustag(port); 599 com->bsh = rman_get_bushandle(port); 600 if (rclk == 0) 601 rclk = DEFAULT_RCLK; 602 com->rclk = rclk; 603 604 #if 0 605 /* 606 * XXX this is broken - when we are first called, there are no 607 * previously configured IO ports. We could hard code 608 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 609 * This code has been doing nothing since the conversion since 610 * "count" is zero the first time around. 611 */ 612 if (!already_init) { 613 /* 614 * Turn off MCR_IENABLE for all likely serial ports. An unused 615 * port with its MCR_IENABLE gate open will inhibit interrupts 616 * from any used port that shares the interrupt vector. 617 * XXX the gate enable is elsewhere for some multiports. 618 */ 619 device_t *devs; 620 int count, i, xioport; 621 622 devclass_get_devices(sio_devclass, &devs, &count); 623 for (i = 0; i < count; i++) { 624 xdev = devs[i]; 625 if (device_is_enabled(xdev) && 626 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 627 NULL) == 0) 628 outb(xioport + com_mcr, 0); 629 } 630 free(devs, M_TEMP); 631 already_init = TRUE; 632 } 633 #endif 634 635 if (COM_LLCONSOLE(flags)) { 636 printf("sio%d: reserved for low-level i/o\n", 637 device_get_unit(dev)); 638 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 639 return (ENXIO); 640 } 641 642 /* 643 * If the device is on a multiport card and has an AST/4 644 * compatible interrupt control register, initialize this 645 * register and prepare to leave MCR_IENABLE clear in the mcr. 646 * Otherwise, prepare to set MCR_IENABLE in the mcr. 647 * Point idev to the device struct giving the correct id_irq. 648 * This is the struct for the master device if there is one. 649 */ 650 idev = dev; 651 mcr_image = MCR_IENABLE; 652 #ifdef COM_MULTIPORT 653 if (COM_ISMULTIPORT(flags)) { 654 Port_t xiobase; 655 u_long io; 656 657 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 658 if (idev == NULL) { 659 printf("sio%d: master device %d not configured\n", 660 device_get_unit(dev), COM_MPMASTER(flags)); 661 idev = dev; 662 } 663 if (!COM_NOTAST4(flags)) { 664 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 665 NULL) == 0) { 666 xiobase = io; 667 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 668 NULL, NULL) == 0) 669 outb(xiobase + com_scr, 0x80); 670 else 671 outb(xiobase + com_scr, 0); 672 } 673 mcr_image = 0; 674 } 675 } 676 #endif /* COM_MULTIPORT */ 677 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 678 mcr_image = 0; 679 680 bzero(failures, sizeof failures); 681 iobase = rman_get_start(port); 682 683 /* 684 * We don't want to get actual interrupts, just masked ones. 685 * Interrupts from this line should already be masked in the ICU, 686 * but mask them in the processor as well in case there are some 687 * (misconfigured) shared interrupts. 688 */ 689 com_lock(); 690 /* EXTRA DELAY? */ 691 692 /* 693 * For the TI16754 chips, set prescaler to 1 (4 is often the 694 * default after-reset value) as otherwise it's impossible to 695 * get highest baudrates. 696 */ 697 if (COM_TI16754(flags)) { 698 u_char cfcr, efr; 699 700 cfcr = sio_getreg(com, com_cfcr); 701 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 702 efr = sio_getreg(com, com_efr); 703 /* Unlock extended features to turn off prescaler. */ 704 sio_setreg(com, com_efr, efr | EFR_EFE); 705 /* Disable EFR. */ 706 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 707 /* Turn off prescaler. */ 708 sio_setreg(com, com_mcr, 709 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 710 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 711 sio_setreg(com, com_efr, efr); 712 sio_setreg(com, com_cfcr, cfcr); 713 } 714 715 /* 716 * Initialize the speed and the word size and wait long enough to 717 * drain the maximum of 16 bytes of junk in device output queues. 718 * The speed is undefined after a master reset and must be set 719 * before relying on anything related to output. There may be 720 * junk after a (very fast) soft reboot and (apparently) after 721 * master reset. 722 * XXX what about the UART bug avoided by waiting in comparam()? 723 * We don't want to to wait long enough to drain at 2 bps. 724 */ 725 if (iobase == siocniobase) 726 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 727 else { 728 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 729 divisor = siodivisor(rclk, SIO_TEST_SPEED); 730 sio_setreg(com, com_dlbl, divisor & 0xff); 731 sio_setreg(com, com_dlbh, divisor >> 8); 732 sio_setreg(com, com_cfcr, CFCR_8BITS); 733 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 734 } 735 736 /* 737 * Enable the interrupt gate and disable device interupts. This 738 * should leave the device driving the interrupt line low and 739 * guarantee an edge trigger if an interrupt can be generated. 740 */ 741 /* EXTRA DELAY? */ 742 sio_setreg(com, com_mcr, mcr_image); 743 sio_setreg(com, com_ier, 0); 744 DELAY(1000); /* XXX */ 745 irqmap[0] = isa_irq_pending(); 746 747 /* 748 * Attempt to set loopback mode so that we can send a null byte 749 * without annoying any external device. 750 */ 751 /* EXTRA DELAY? */ 752 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 753 754 /* 755 * Attempt to generate an output interrupt. On 8250's, setting 756 * IER_ETXRDY generates an interrupt independent of the current 757 * setting and independent of whether the THR is empty. On 16450's, 758 * setting IER_ETXRDY generates an interrupt independent of the 759 * current setting. On 16550A's, setting IER_ETXRDY only 760 * generates an interrupt when IER_ETXRDY is not already set. 761 */ 762 sio_setreg(com, com_ier, IER_ETXRDY); 763 764 /* 765 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 766 * an interrupt. They'd better generate one for actually doing 767 * output. Loopback may be broken on the same incompatibles but 768 * it's unlikely to do more than allow the null byte out. 769 */ 770 sio_setreg(com, com_data, 0); 771 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 772 773 /* 774 * Turn off loopback mode so that the interrupt gate works again 775 * (MCR_IENABLE was hidden). This should leave the device driving 776 * an interrupt line high. It doesn't matter if the interrupt 777 * line oscillates while we are not looking at it, since interrupts 778 * are disabled. 779 */ 780 /* EXTRA DELAY? */ 781 sio_setreg(com, com_mcr, mcr_image); 782 783 /* 784 * Some pcmcia cards have the "TXRDY bug", so we check everyone 785 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 786 */ 787 if (COM_NOPROBE(flags)) { 788 /* Reading IIR register twice */ 789 for (fn = 0; fn < 2; fn ++) { 790 DELAY(10000); 791 failures[6] = sio_getreg(com, com_iir); 792 } 793 /* Check IIR_TXRDY clear ? */ 794 result = 0; 795 if (failures[6] & IIR_TXRDY) { 796 /* Nop, Double check with clearing IER */ 797 sio_setreg(com, com_ier, 0); 798 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 799 /* Ok. we're familia this gang */ 800 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 801 } else { 802 /* Unknown, Just omit this chip.. XXX */ 803 result = ENXIO; 804 sio_setreg(com, com_mcr, 0); 805 } 806 } else { 807 /* OK. this is well-known guys */ 808 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 809 } 810 sio_setreg(com, com_ier, 0); 811 sio_setreg(com, com_cfcr, CFCR_8BITS); 812 com_unlock(); 813 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 814 return (iobase == siocniobase ? 0 : result); 815 } 816 817 /* 818 * Check that 819 * o the CFCR, IER and MCR in UART hold the values written to them 820 * (the values happen to be all distinct - this is good for 821 * avoiding false positive tests from bus echoes). 822 * o an output interrupt is generated and its vector is correct. 823 * o the interrupt goes away when the IIR in the UART is read. 824 */ 825 /* EXTRA DELAY? */ 826 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 827 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 828 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 829 DELAY(10000); /* Some internal modems need this time */ 830 irqmap[1] = isa_irq_pending(); 831 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 832 DELAY(1000); /* XXX */ 833 irqmap[2] = isa_irq_pending(); 834 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 835 836 /* 837 * Turn off all device interrupts and check that they go off properly. 838 * Leave MCR_IENABLE alone. For ports without a master port, it gates 839 * the OUT2 output of the UART to 840 * the ICU input. Closing the gate would give a floating ICU input 841 * (unless there is another device driving it) and spurious interrupts. 842 * (On the system that this was first tested on, the input floats high 843 * and gives a (masked) interrupt as soon as the gate is closed.) 844 */ 845 sio_setreg(com, com_ier, 0); 846 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 847 failures[7] = sio_getreg(com, com_ier); 848 DELAY(1000); /* XXX */ 849 irqmap[3] = isa_irq_pending(); 850 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 851 852 com_unlock(); 853 854 irqs = irqmap[1] & ~irqmap[0]; 855 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 856 ((1 << xirq) & irqs) == 0) 857 printf( 858 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 859 device_get_unit(dev), xirq, irqs); 860 if (bootverbose) 861 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 862 device_get_unit(dev), 863 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 864 865 result = 0; 866 for (fn = 0; fn < sizeof failures; ++fn) 867 if (failures[fn]) { 868 sio_setreg(com, com_mcr, 0); 869 result = ENXIO; 870 if (bootverbose) { 871 printf("sio%d: probe failed test(s):", 872 device_get_unit(dev)); 873 for (fn = 0; fn < sizeof failures; ++fn) 874 if (failures[fn]) 875 printf(" %d", fn); 876 printf("\n"); 877 } 878 break; 879 } 880 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 881 return (iobase == siocniobase ? 0 : result); 882 } 883 884 #ifdef COM_ESP 885 static int 886 espattach(com, esp_port) 887 struct com_s *com; 888 Port_t esp_port; 889 { 890 u_char dips; 891 u_char val; 892 893 /* 894 * Check the ESP-specific I/O port to see if we're an ESP 895 * card. If not, return failure immediately. 896 */ 897 if ((inb(esp_port) & 0xf3) == 0) { 898 printf(" port 0x%x is not an ESP board?\n", esp_port); 899 return (0); 900 } 901 902 /* 903 * We've got something that claims to be a Hayes ESP card. 904 * Let's hope so. 905 */ 906 907 /* Get the dip-switch configuration */ 908 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 909 dips = inb(esp_port + ESP_STATUS1); 910 911 /* 912 * Bits 0,1 of dips say which COM port we are. 913 */ 914 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 915 printf(" : ESP"); 916 else { 917 printf(" esp_port has com %d\n", dips & 0x03); 918 return (0); 919 } 920 921 /* 922 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 923 */ 924 outb(esp_port + ESP_CMD1, ESP_GETTEST); 925 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 926 val = inb(esp_port + ESP_STATUS2); 927 if ((val & 0x70) < 0x20) { 928 printf("-old (%o)", val & 0x70); 929 return (0); 930 } 931 932 /* 933 * Check for ability to emulate 16550: bit 7 == 1 934 */ 935 if ((dips & 0x80) == 0) { 936 printf(" slave"); 937 return (0); 938 } 939 940 /* 941 * Okay, we seem to be a Hayes ESP card. Whee. 942 */ 943 com->esp = TRUE; 944 com->esp_port = esp_port; 945 return (1); 946 } 947 #endif /* COM_ESP */ 948 949 static int 950 sio_isa_attach(dev) 951 device_t dev; 952 { 953 return (sioattach(dev, 0, 0UL)); 954 } 955 956 int 957 sioattach(dev, xrid, rclk) 958 device_t dev; 959 int xrid; 960 u_long rclk; 961 { 962 struct com_s *com; 963 #ifdef COM_ESP 964 Port_t *espp; 965 #endif 966 Port_t iobase; 967 int minorbase; 968 int unit; 969 u_int flags; 970 int rid; 971 struct resource *port; 972 int ret; 973 974 rid = xrid; 975 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 976 0, ~0, IO_COMSIZE, RF_ACTIVE); 977 if (!port) 978 return (ENXIO); 979 980 iobase = rman_get_start(port); 981 unit = device_get_unit(dev); 982 com = device_get_softc(dev); 983 flags = device_get_flags(dev); 984 985 if (unit >= sio_numunits) 986 sio_numunits = unit + 1; 987 /* 988 * sioprobe() has initialized the device registers as follows: 989 * o cfcr = CFCR_8BITS. 990 * It is most important that CFCR_DLAB is off, so that the 991 * data port is not hidden when we enable interrupts. 992 * o ier = 0. 993 * Interrupts are only enabled when the line is open. 994 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 995 * interrupt control register or the config specifies no irq. 996 * Keeping MCR_DTR and MCR_RTS off might stop the external 997 * device from sending before we are ready. 998 */ 999 bzero(com, sizeof *com); 1000 com->unit = unit; 1001 com->ioportres = port; 1002 com->bst = rman_get_bustag(port); 1003 com->bsh = rman_get_bushandle(port); 1004 com->cfcr_image = CFCR_8BITS; 1005 com->dtr_wait = 3 * hz; 1006 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1007 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1008 com->tx_fifo_size = 1; 1009 com->obufs[0].l_head = com->obuf1; 1010 com->obufs[1].l_head = com->obuf2; 1011 1012 com->data_port = iobase + com_data; 1013 com->int_id_port = iobase + com_iir; 1014 com->modem_ctl_port = iobase + com_mcr; 1015 com->mcr_image = inb(com->modem_ctl_port); 1016 com->line_status_port = iobase + com_lsr; 1017 com->modem_status_port = iobase + com_msr; 1018 com->intr_ctl_port = iobase + com_ier; 1019 1020 if (rclk == 0) 1021 rclk = DEFAULT_RCLK; 1022 com->rclk = rclk; 1023 1024 /* 1025 * We don't use all the flags from <sys/ttydefaults.h> since they 1026 * are only relevant for logins. It's important to have echo off 1027 * initially so that the line doesn't start blathering before the 1028 * echo flag can be turned off. 1029 */ 1030 com->it_in.c_iflag = 0; 1031 com->it_in.c_oflag = 0; 1032 com->it_in.c_cflag = TTYDEF_CFLAG; 1033 com->it_in.c_lflag = 0; 1034 if (unit == comconsole) { 1035 com->it_in.c_iflag = TTYDEF_IFLAG; 1036 com->it_in.c_oflag = TTYDEF_OFLAG; 1037 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1038 com->it_in.c_lflag = TTYDEF_LFLAG; 1039 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1040 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1041 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1042 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1043 } else 1044 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1045 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1046 com_unlock(); 1047 /* 1048 * Leave i/o resources allocated if this is a `cn'-level 1049 * console, so that other devices can't snarf them. 1050 */ 1051 if (iobase != siocniobase) 1052 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1053 return (ENOMEM); 1054 } 1055 com_unlock(); 1056 termioschars(&com->it_in); 1057 com->it_out = com->it_in; 1058 1059 /* attempt to determine UART type */ 1060 printf("sio%d: type", unit); 1061 1062 1063 #ifdef COM_MULTIPORT 1064 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1065 #else 1066 if (!COM_IIR_TXRDYBUG(flags)) 1067 #endif 1068 { 1069 u_char scr; 1070 u_char scr1; 1071 u_char scr2; 1072 1073 scr = sio_getreg(com, com_scr); 1074 sio_setreg(com, com_scr, 0xa5); 1075 scr1 = sio_getreg(com, com_scr); 1076 sio_setreg(com, com_scr, 0x5a); 1077 scr2 = sio_getreg(com, com_scr); 1078 sio_setreg(com, com_scr, scr); 1079 if (scr1 != 0xa5 || scr2 != 0x5a) { 1080 printf(" 8250"); 1081 goto determined_type; 1082 } 1083 } 1084 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1085 DELAY(100); 1086 com->st16650a = 0; 1087 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1088 case FIFO_RX_LOW: 1089 printf(" 16450"); 1090 break; 1091 case FIFO_RX_MEDL: 1092 printf(" 16450?"); 1093 break; 1094 case FIFO_RX_MEDH: 1095 printf(" 16550?"); 1096 break; 1097 case FIFO_RX_HIGH: 1098 if (COM_NOFIFO(flags)) { 1099 printf(" 16550A fifo disabled"); 1100 } else { 1101 com->hasfifo = TRUE; 1102 if (COM_ST16650A(flags)) { 1103 com->st16650a = 1; 1104 com->tx_fifo_size = 32; 1105 printf(" ST16650A"); 1106 } else if (COM_TI16754(flags)) { 1107 com->tx_fifo_size = 64; 1108 printf(" TI16754"); 1109 } else { 1110 com->tx_fifo_size = COM_FIFOSIZE(flags); 1111 printf(" 16550A"); 1112 } 1113 } 1114 #ifdef COM_ESP 1115 for (espp = likely_esp_ports; *espp != 0; espp++) 1116 if (espattach(com, *espp)) { 1117 com->tx_fifo_size = 1024; 1118 break; 1119 } 1120 #endif 1121 if (!com->st16650a && !COM_TI16754(flags)) { 1122 if (!com->tx_fifo_size) 1123 com->tx_fifo_size = 16; 1124 else 1125 printf(" lookalike with %d bytes FIFO", 1126 com->tx_fifo_size); 1127 } 1128 1129 break; 1130 } 1131 1132 #ifdef COM_ESP 1133 if (com->esp) { 1134 /* 1135 * Set 16550 compatibility mode. 1136 * We don't use the ESP_MODE_SCALE bit to increase the 1137 * fifo trigger levels because we can't handle large 1138 * bursts of input. 1139 * XXX flow control should be set in comparam(), not here. 1140 */ 1141 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1142 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1143 1144 /* Set RTS/CTS flow control. */ 1145 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1146 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1147 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1148 1149 /* Set flow-control levels. */ 1150 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1151 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1152 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1153 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1154 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1155 } 1156 #endif /* COM_ESP */ 1157 sio_setreg(com, com_fifo, 0); 1158 determined_type: ; 1159 1160 #ifdef COM_MULTIPORT 1161 if (COM_ISMULTIPORT(flags)) { 1162 device_t masterdev; 1163 1164 com->multiport = TRUE; 1165 printf(" (multiport"); 1166 if (unit == COM_MPMASTER(flags)) 1167 printf(" master"); 1168 printf(")"); 1169 masterdev = devclass_get_device(sio_devclass, 1170 COM_MPMASTER(flags)); 1171 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1172 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1173 } 1174 #endif /* COM_MULTIPORT */ 1175 if (unit == comconsole) 1176 printf(", console"); 1177 if (COM_IIR_TXRDYBUG(flags)) 1178 printf(" with a bogus IIR_TXRDY register"); 1179 printf("\n"); 1180 1181 if (!sio_registered) { 1182 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll"); 1183 sio_registered = TRUE; 1184 } 1185 minorbase = UNIT_TO_MINOR(unit); 1186 make_dev(&sio_cdevsw, minorbase, 1187 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1188 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 1189 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1190 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 1191 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1192 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 1193 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1194 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1195 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1196 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1197 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1198 com->flags = flags; 1199 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1200 pps_init(&com->pps); 1201 1202 rid = 0; 1203 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1204 RF_ACTIVE); 1205 if (com->irqres) { 1206 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1207 INTR_TYPE_TTY | INTR_TYPE_FAST, 1208 siointr, com, &com->cookie); 1209 if (ret) { 1210 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1211 com->irqres, INTR_TYPE_TTY, 1212 siointr, com, &com->cookie); 1213 if (ret == 0) 1214 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1215 } 1216 if (ret) 1217 device_printf(dev, "could not activate interrupt\n"); 1218 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1219 defined(ALT_BREAK_TO_DEBUGGER)) 1220 /* 1221 * Enable interrupts for early break-to-debugger support 1222 * on the console. 1223 */ 1224 if (ret == 0 && unit == comconsole) 1225 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1226 IER_EMSC); 1227 #endif 1228 } 1229 1230 return (0); 1231 } 1232 1233 static int 1234 sioopen(dev_t dev, int flag, int mode, struct thread *td) 1235 { 1236 struct com_s *com; 1237 int error; 1238 int mynor; 1239 int s; 1240 struct tty *tp; 1241 int unit; 1242 1243 mynor = minor(dev); 1244 unit = MINOR_TO_UNIT(mynor); 1245 com = com_addr(unit); 1246 if (com == NULL) 1247 return (ENXIO); 1248 if (com->gone) 1249 return (ENXIO); 1250 if (mynor & CONTROL_MASK) 1251 return (0); 1252 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1253 s = spltty(); 1254 /* 1255 * We jump to this label after all non-interrupted sleeps to pick 1256 * up any changes of the device state. 1257 */ 1258 open_top: 1259 while (com->state & CS_DTR_OFF) { 1260 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0); 1261 if (com_addr(unit) == NULL) 1262 return (ENXIO); 1263 if (error != 0 || com->gone) 1264 goto out; 1265 } 1266 if (tp->t_state & TS_ISOPEN) { 1267 /* 1268 * The device is open, so everything has been initialized. 1269 * Handle conflicts. 1270 */ 1271 if (mynor & CALLOUT_MASK) { 1272 if (!com->active_out) { 1273 error = EBUSY; 1274 goto out; 1275 } 1276 } else { 1277 if (com->active_out) { 1278 if (flag & O_NONBLOCK) { 1279 error = EBUSY; 1280 goto out; 1281 } 1282 error = tsleep(&com->active_out, 1283 PCATCH, "siobi", 0); 1284 if (com_addr(unit) == NULL) 1285 return (ENXIO); 1286 if (error != 0 || com->gone) 1287 goto out; 1288 goto open_top; 1289 } 1290 } 1291 if (tp->t_state & TS_XCLUDE && suser(td)) { 1292 error = EBUSY; 1293 goto out; 1294 } 1295 } else { 1296 /* 1297 * The device isn't open, so there are no conflicts. 1298 * Initialize it. Initialization is done twice in many 1299 * cases: to preempt sleeping callin opens if we are 1300 * callout, and to complete a callin open after DCD rises. 1301 */ 1302 tp->t_oproc = comstart; 1303 tp->t_param = comparam; 1304 tp->t_stop = comstop; 1305 tp->t_dev = dev; 1306 tp->t_termios = mynor & CALLOUT_MASK 1307 ? com->it_out : com->it_in; 1308 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1309 com->poll = com->no_irq; 1310 com->poll_output = com->loses_outints; 1311 ++com->wopeners; 1312 error = comparam(tp, &tp->t_termios); 1313 --com->wopeners; 1314 if (error != 0) 1315 goto out; 1316 /* 1317 * XXX we should goto open_top if comparam() slept. 1318 */ 1319 if (com->hasfifo) { 1320 /* 1321 * (Re)enable and drain fifos. 1322 * 1323 * Certain SMC chips cause problems if the fifos 1324 * are enabled while input is ready. Turn off the 1325 * fifo if necessary to clear the input. We test 1326 * the input ready bit after enabling the fifos 1327 * since we've already enabled them in comparam() 1328 * and to handle races between enabling and fresh 1329 * input. 1330 */ 1331 while (TRUE) { 1332 sio_setreg(com, com_fifo, 1333 FIFO_RCV_RST | FIFO_XMT_RST 1334 | com->fifo_image); 1335 /* 1336 * XXX the delays are for superstitious 1337 * historical reasons. It must be less than 1338 * the character time at the maximum 1339 * supported speed (87 usec at 115200 bps 1340 * 8N1). Otherwise we might loop endlessly 1341 * if data is streaming in. We used to use 1342 * delays of 100. That usually worked 1343 * because DELAY(100) used to usually delay 1344 * for about 85 usec instead of 100. 1345 */ 1346 DELAY(50); 1347 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1348 break; 1349 sio_setreg(com, com_fifo, 0); 1350 DELAY(50); 1351 (void) inb(com->data_port); 1352 } 1353 } 1354 1355 com_lock(); 1356 (void) inb(com->line_status_port); 1357 (void) inb(com->data_port); 1358 com->prev_modem_status = com->last_modem_status 1359 = inb(com->modem_status_port); 1360 if (COM_IIR_TXRDYBUG(com->flags)) { 1361 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1362 | IER_EMSC); 1363 } else { 1364 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1365 | IER_ERLS | IER_EMSC); 1366 } 1367 com_unlock(); 1368 /* 1369 * Handle initial DCD. Callout devices get a fake initial 1370 * DCD (trapdoor DCD). If we are callout, then any sleeping 1371 * callin opens get woken up and resume sleeping on "siobi" 1372 * instead of "siodcd". 1373 */ 1374 /* 1375 * XXX `mynor & CALLOUT_MASK' should be 1376 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1377 * TRAPDOOR_CARRIER is the default initial state for callout 1378 * devices and SOFT_CARRIER is like CLOCAL except it hides 1379 * the true carrier. 1380 */ 1381 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1382 (*linesw[tp->t_line].l_modem)(tp, 1); 1383 } 1384 /* 1385 * Wait for DCD if necessary. 1386 */ 1387 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1388 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1389 ++com->wopeners; 1390 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0); 1391 if (com_addr(unit) == NULL) 1392 return (ENXIO); 1393 --com->wopeners; 1394 if (error != 0 || com->gone) 1395 goto out; 1396 goto open_top; 1397 } 1398 error = (*linesw[tp->t_line].l_open)(dev, tp); 1399 disc_optim(tp, &tp->t_termios, com); 1400 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1401 com->active_out = TRUE; 1402 siosettimeout(); 1403 out: 1404 splx(s); 1405 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1406 comhardclose(com); 1407 return (error); 1408 } 1409 1410 static int 1411 sioclose(dev_t dev, int flag, int mode, struct thread *td) 1412 { 1413 struct com_s *com; 1414 int mynor; 1415 int s; 1416 struct tty *tp; 1417 1418 mynor = minor(dev); 1419 if (mynor & CONTROL_MASK) 1420 return (0); 1421 com = com_addr(MINOR_TO_UNIT(mynor)); 1422 if (com == NULL) 1423 return (ENODEV); 1424 tp = com->tp; 1425 s = spltty(); 1426 (*linesw[tp->t_line].l_close)(tp, flag); 1427 disc_optim(tp, &tp->t_termios, com); 1428 comstop(tp, FREAD | FWRITE); 1429 comhardclose(com); 1430 ttyclose(tp); 1431 siosettimeout(); 1432 splx(s); 1433 if (com->gone) { 1434 printf("sio%d: gone\n", com->unit); 1435 s = spltty(); 1436 if (com->ibuf != NULL) 1437 free(com->ibuf, M_DEVBUF); 1438 bzero(tp, sizeof *tp); 1439 splx(s); 1440 } 1441 return (0); 1442 } 1443 1444 static void 1445 comhardclose(com) 1446 struct com_s *com; 1447 { 1448 int s; 1449 struct tty *tp; 1450 int unit; 1451 1452 unit = com->unit; 1453 s = spltty(); 1454 com->poll = FALSE; 1455 com->poll_output = FALSE; 1456 com->do_timestamp = FALSE; 1457 com->do_dcd_timestamp = FALSE; 1458 com->pps.ppsparam.mode = 0; 1459 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1460 tp = com->tp; 1461 1462 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1463 defined(ALT_BREAK_TO_DEBUGGER)) 1464 /* 1465 * Leave interrupts enabled and don't clear DTR if this is the 1466 * console. This allows us to detect break-to-debugger events 1467 * while the console device is closed. 1468 */ 1469 if (com->unit != comconsole) 1470 #endif 1471 { 1472 sio_setreg(com, com_ier, 0); 1473 if (tp->t_cflag & HUPCL 1474 /* 1475 * XXX we will miss any carrier drop between here and the 1476 * next open. Perhaps we should watch DCD even when the 1477 * port is closed; it is not sufficient to check it at 1478 * the next open because it might go up and down while 1479 * we're not watching. 1480 */ 1481 || (!com->active_out 1482 && !(com->prev_modem_status & MSR_DCD) 1483 && !(com->it_in.c_cflag & CLOCAL)) 1484 || !(tp->t_state & TS_ISOPEN)) { 1485 (void)commctl(com, TIOCM_DTR, DMBIC); 1486 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1487 timeout(siodtrwakeup, com, com->dtr_wait); 1488 com->state |= CS_DTR_OFF; 1489 } 1490 } 1491 } 1492 if (com->hasfifo) { 1493 /* 1494 * Disable fifos so that they are off after controlled 1495 * reboots. Some BIOSes fail to detect 16550s when the 1496 * fifos are enabled. 1497 */ 1498 sio_setreg(com, com_fifo, 0); 1499 } 1500 com->active_out = FALSE; 1501 wakeup(&com->active_out); 1502 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1503 splx(s); 1504 } 1505 1506 static int 1507 sioread(dev, uio, flag) 1508 dev_t dev; 1509 struct uio *uio; 1510 int flag; 1511 { 1512 int mynor; 1513 struct com_s *com; 1514 1515 mynor = minor(dev); 1516 if (mynor & CONTROL_MASK) 1517 return (ENODEV); 1518 com = com_addr(MINOR_TO_UNIT(mynor)); 1519 if (com == NULL || com->gone) 1520 return (ENODEV); 1521 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 1522 } 1523 1524 static int 1525 siowrite(dev, uio, flag) 1526 dev_t dev; 1527 struct uio *uio; 1528 int flag; 1529 { 1530 int mynor; 1531 struct com_s *com; 1532 int unit; 1533 1534 mynor = minor(dev); 1535 if (mynor & CONTROL_MASK) 1536 return (ENODEV); 1537 1538 unit = MINOR_TO_UNIT(mynor); 1539 com = com_addr(unit); 1540 if (com == NULL || com->gone) 1541 return (ENODEV); 1542 /* 1543 * (XXX) We disallow virtual consoles if the physical console is 1544 * a serial port. This is in case there is a display attached that 1545 * is not the console. In that situation we don't need/want the X 1546 * server taking over the console. 1547 */ 1548 if (constty != NULL && unit == comconsole) 1549 constty = NULL; 1550 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 1551 } 1552 1553 static void 1554 siobusycheck(chan) 1555 void *chan; 1556 { 1557 struct com_s *com; 1558 int s; 1559 1560 com = (struct com_s *)chan; 1561 1562 /* 1563 * Clear TS_BUSY if low-level output is complete. 1564 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1565 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1566 * called again. Reading the line status port outside of siointr1() 1567 * is safe because CS_BUSY is clear so there are no output interrupts 1568 * to lose. 1569 */ 1570 s = spltty(); 1571 if (com->state & CS_BUSY) 1572 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1573 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1574 == (LSR_TSRE | LSR_TXRDY)) { 1575 com->tp->t_state &= ~TS_BUSY; 1576 ttwwakeup(com->tp); 1577 com->extra_state &= ~CSE_BUSYCHECK; 1578 } else 1579 timeout(siobusycheck, com, hz / 100); 1580 splx(s); 1581 } 1582 1583 static u_int 1584 siodivisor(rclk, speed) 1585 u_long rclk; 1586 speed_t speed; 1587 { 1588 long actual_speed; 1589 u_int divisor; 1590 int error; 1591 1592 if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 1593 return (0); 1594 divisor = (rclk / (8UL * speed) + 1) / 2; 1595 if (divisor == 0 || divisor >= 65536) 1596 return (0); 1597 actual_speed = rclk / (16UL * divisor); 1598 1599 /* 10 times error in percent: */ 1600 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1601 1602 /* 3.0% maximum error tolerance: */ 1603 if (error < -30 || error > 30) 1604 return (0); 1605 1606 return (divisor); 1607 } 1608 1609 static void 1610 siodtrwakeup(chan) 1611 void *chan; 1612 { 1613 struct com_s *com; 1614 1615 com = (struct com_s *)chan; 1616 com->state &= ~CS_DTR_OFF; 1617 wakeup(&com->dtr_wait); 1618 } 1619 1620 static void 1621 sioinput(com) 1622 struct com_s *com; 1623 { 1624 u_char *buf; 1625 int incc; 1626 u_char line_status; 1627 int recv_data; 1628 struct tty *tp; 1629 1630 buf = com->ibuf; 1631 tp = com->tp; 1632 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1633 com_events -= (com->iptr - com->ibuf); 1634 com->iptr = com->ibuf; 1635 return; 1636 } 1637 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1638 /* 1639 * Avoid the grotesquely inefficient lineswitch routine 1640 * (ttyinput) in "raw" mode. It usually takes about 450 1641 * instructions (that's without canonical processing or echo!). 1642 * slinput is reasonably fast (usually 40 instructions plus 1643 * call overhead). 1644 */ 1645 do { 1646 com_unlock(); 1647 incc = com->iptr - buf; 1648 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1649 && (com->state & CS_RTS_IFLOW 1650 || tp->t_iflag & IXOFF) 1651 && !(tp->t_state & TS_TBLOCK)) 1652 ttyblock(tp); 1653 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1654 += b_to_q((char *)buf, incc, &tp->t_rawq); 1655 buf += incc; 1656 tk_nin += incc; 1657 tk_rawcc += incc; 1658 tp->t_rawcc += incc; 1659 ttwakeup(tp); 1660 if (tp->t_state & TS_TTSTOP 1661 && (tp->t_iflag & IXANY 1662 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1663 tp->t_state &= ~TS_TTSTOP; 1664 tp->t_lflag &= ~FLUSHO; 1665 comstart(tp); 1666 } 1667 com_lock(); 1668 } while (buf < com->iptr); 1669 } else { 1670 do { 1671 com_unlock(); 1672 line_status = buf[com->ierroff]; 1673 recv_data = *buf++; 1674 if (line_status 1675 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1676 if (line_status & LSR_BI) 1677 recv_data |= TTY_BI; 1678 if (line_status & LSR_FE) 1679 recv_data |= TTY_FE; 1680 if (line_status & LSR_OE) 1681 recv_data |= TTY_OE; 1682 if (line_status & LSR_PE) 1683 recv_data |= TTY_PE; 1684 } 1685 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1686 com_lock(); 1687 } while (buf < com->iptr); 1688 } 1689 com_events -= (com->iptr - com->ibuf); 1690 com->iptr = com->ibuf; 1691 1692 /* 1693 * There is now room for another low-level buffer full of input, 1694 * so enable RTS if it is now disabled and there is room in the 1695 * high-level buffer. 1696 */ 1697 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1698 !(tp->t_state & TS_TBLOCK)) 1699 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1700 } 1701 1702 void 1703 siointr(arg) 1704 void *arg; 1705 { 1706 #ifndef COM_MULTIPORT 1707 com_lock(); 1708 siointr1((struct com_s *) arg); 1709 com_unlock(); 1710 #else /* COM_MULTIPORT */ 1711 bool_t possibly_more_intrs; 1712 int unit; 1713 struct com_s *com; 1714 1715 /* 1716 * Loop until there is no activity on any port. This is necessary 1717 * to get an interrupt edge more than to avoid another interrupt. 1718 * If the IRQ signal is just an OR of the IRQ signals from several 1719 * devices, then the edge from one may be lost because another is 1720 * on. 1721 */ 1722 com_lock(); 1723 do { 1724 possibly_more_intrs = FALSE; 1725 for (unit = 0; unit < sio_numunits; ++unit) { 1726 com = com_addr(unit); 1727 /* 1728 * XXX com_lock(); 1729 * would it work here, or be counter-productive? 1730 */ 1731 if (com != NULL 1732 && !com->gone 1733 && (inb(com->int_id_port) & IIR_IMASK) 1734 != IIR_NOPEND) { 1735 siointr1(com); 1736 possibly_more_intrs = TRUE; 1737 } 1738 /* XXX com_unlock(); */ 1739 } 1740 } while (possibly_more_intrs); 1741 com_unlock(); 1742 #endif /* COM_MULTIPORT */ 1743 } 1744 1745 static void 1746 siointr1(com) 1747 struct com_s *com; 1748 { 1749 u_char line_status; 1750 u_char modem_status; 1751 u_char *ioptr; 1752 u_char recv_data; 1753 u_char int_ctl; 1754 u_char int_ctl_new; 1755 struct timecounter *tc; 1756 u_int count; 1757 1758 int_ctl = inb(com->intr_ctl_port); 1759 int_ctl_new = int_ctl; 1760 1761 while (!com->gone) { 1762 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1763 modem_status = inb(com->modem_status_port); 1764 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1765 tc = timecounter; 1766 count = tc->tc_get_timecount(tc); 1767 pps_event(&com->pps, tc, count, 1768 (modem_status & MSR_DCD) ? 1769 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1770 } 1771 } 1772 line_status = inb(com->line_status_port); 1773 1774 /* input event? (check first to help avoid overruns) */ 1775 while (line_status & LSR_RCV_MASK) { 1776 /* break/unnattached error bits or real input? */ 1777 if (!(line_status & LSR_RXRDY)) 1778 recv_data = 0; 1779 else 1780 recv_data = inb(com->data_port); 1781 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 1782 /* 1783 * Solaris implements a new BREAK which is initiated 1784 * by a character sequence CR ~ ^b which is similar 1785 * to a familiar pattern used on Sun servers by the 1786 * Remote Console. 1787 */ 1788 #define KEY_CRTLB 2 /* ^B */ 1789 #define KEY_CR 13 /* CR '\r' */ 1790 #define KEY_TILDE 126 /* ~ */ 1791 1792 if (com->unit == comconsole) { 1793 static int brk_state1 = 0, brk_state2 = 0; 1794 if (recv_data == KEY_CR) { 1795 brk_state1 = recv_data; 1796 brk_state2 = 0; 1797 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) { 1798 if (recv_data == KEY_TILDE) 1799 brk_state2 = recv_data; 1800 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) { 1801 breakpoint(); 1802 brk_state1 = brk_state2 = 0; 1803 goto cont; 1804 } else 1805 brk_state2 = 0; 1806 } else 1807 brk_state1 = 0; 1808 } 1809 #endif 1810 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1811 /* 1812 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1813 * Otherwise, push the work to a higher level 1814 * (to handle PARMRK) if we're bypassing. 1815 * Otherwise, convert BI/FE and PE+INPCK to 0. 1816 * 1817 * This makes bypassing work right in the 1818 * usual "raw" case (IGNBRK set, and IGNPAR 1819 * and INPCK clear). 1820 * 1821 * Note: BI together with FE/PE means just BI. 1822 */ 1823 if (line_status & LSR_BI) { 1824 #if defined(DDB) && defined(BREAK_TO_DEBUGGER) 1825 if (com->unit == comconsole) { 1826 breakpoint(); 1827 goto cont; 1828 } 1829 #endif 1830 if (com->tp == NULL 1831 || com->tp->t_iflag & IGNBRK) 1832 goto cont; 1833 } else { 1834 if (com->tp == NULL 1835 || com->tp->t_iflag & IGNPAR) 1836 goto cont; 1837 } 1838 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1839 && (line_status & (LSR_BI | LSR_FE) 1840 || com->tp->t_iflag & INPCK)) 1841 recv_data = 0; 1842 } 1843 ++com->bytes_in; 1844 if (com->hotchar != 0 && recv_data == com->hotchar) 1845 setsofttty(); 1846 ioptr = com->iptr; 1847 if (ioptr >= com->ibufend) 1848 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1849 else { 1850 if (com->do_timestamp) 1851 microtime(&com->timestamp); 1852 ++com_events; 1853 schedsofttty(); 1854 #if 0 /* for testing input latency vs efficiency */ 1855 if (com->iptr - com->ibuf == 8) 1856 setsofttty(); 1857 #endif 1858 ioptr[0] = recv_data; 1859 ioptr[com->ierroff] = line_status; 1860 com->iptr = ++ioptr; 1861 if (ioptr == com->ihighwater 1862 && com->state & CS_RTS_IFLOW) 1863 outb(com->modem_ctl_port, 1864 com->mcr_image &= ~MCR_RTS); 1865 if (line_status & LSR_OE) 1866 CE_RECORD(com, CE_OVERRUN); 1867 } 1868 cont: 1869 /* 1870 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1871 * jump from the top of the loop to here 1872 */ 1873 line_status = inb(com->line_status_port) & 0x7F; 1874 } 1875 1876 /* modem status change? (always check before doing output) */ 1877 modem_status = inb(com->modem_status_port); 1878 if (modem_status != com->last_modem_status) { 1879 if (com->do_dcd_timestamp 1880 && !(com->last_modem_status & MSR_DCD) 1881 && modem_status & MSR_DCD) 1882 microtime(&com->dcd_timestamp); 1883 1884 /* 1885 * Schedule high level to handle DCD changes. Note 1886 * that we don't use the delta bits anywhere. Some 1887 * UARTs mess them up, and it's easy to remember the 1888 * previous bits and calculate the delta. 1889 */ 1890 com->last_modem_status = modem_status; 1891 if (!(com->state & CS_CHECKMSR)) { 1892 com_events += LOTS_OF_EVENTS; 1893 com->state |= CS_CHECKMSR; 1894 setsofttty(); 1895 } 1896 1897 /* handle CTS change immediately for crisp flow ctl */ 1898 if (com->state & CS_CTS_OFLOW) { 1899 if (modem_status & MSR_CTS) 1900 com->state |= CS_ODEVREADY; 1901 else 1902 com->state &= ~CS_ODEVREADY; 1903 } 1904 } 1905 1906 /* output queued and everything ready? */ 1907 if (line_status & LSR_TXRDY 1908 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1909 ioptr = com->obufq.l_head; 1910 if (com->tx_fifo_size > 1) { 1911 u_int ocount; 1912 1913 ocount = com->obufq.l_tail - ioptr; 1914 if (ocount > com->tx_fifo_size) 1915 ocount = com->tx_fifo_size; 1916 com->bytes_out += ocount; 1917 do 1918 outb(com->data_port, *ioptr++); 1919 while (--ocount != 0); 1920 } else { 1921 outb(com->data_port, *ioptr++); 1922 ++com->bytes_out; 1923 } 1924 com->obufq.l_head = ioptr; 1925 if (COM_IIR_TXRDYBUG(com->flags)) { 1926 int_ctl_new = int_ctl | IER_ETXRDY; 1927 } 1928 if (ioptr >= com->obufq.l_tail) { 1929 struct lbq *qp; 1930 1931 qp = com->obufq.l_next; 1932 qp->l_queued = FALSE; 1933 qp = qp->l_next; 1934 if (qp != NULL) { 1935 com->obufq.l_head = qp->l_head; 1936 com->obufq.l_tail = qp->l_tail; 1937 com->obufq.l_next = qp; 1938 } else { 1939 /* output just completed */ 1940 if (COM_IIR_TXRDYBUG(com->flags)) { 1941 int_ctl_new = int_ctl & ~IER_ETXRDY; 1942 } 1943 com->state &= ~CS_BUSY; 1944 } 1945 if (!(com->state & CS_ODONE)) { 1946 com_events += LOTS_OF_EVENTS; 1947 com->state |= CS_ODONE; 1948 setsofttty(); /* handle at high level ASAP */ 1949 } 1950 } 1951 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 1952 outb(com->intr_ctl_port, int_ctl_new); 1953 } 1954 } 1955 1956 /* finished? */ 1957 #ifndef COM_MULTIPORT 1958 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 1959 #endif /* COM_MULTIPORT */ 1960 return; 1961 } 1962 } 1963 1964 static int 1965 sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td) 1966 { 1967 struct com_s *com; 1968 int error; 1969 int mynor; 1970 int s; 1971 struct tty *tp; 1972 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 1973 u_long oldcmd; 1974 struct termios term; 1975 #endif 1976 1977 mynor = minor(dev); 1978 com = com_addr(MINOR_TO_UNIT(mynor)); 1979 if (com == NULL || com->gone) 1980 return (ENODEV); 1981 if (mynor & CONTROL_MASK) { 1982 struct termios *ct; 1983 1984 switch (mynor & CONTROL_MASK) { 1985 case CONTROL_INIT_STATE: 1986 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 1987 break; 1988 case CONTROL_LOCK_STATE: 1989 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 1990 break; 1991 default: 1992 return (ENODEV); /* /dev/nodev */ 1993 } 1994 switch (cmd) { 1995 case TIOCSETA: 1996 error = suser(td); 1997 if (error != 0) 1998 return (error); 1999 *ct = *(struct termios *)data; 2000 return (0); 2001 case TIOCGETA: 2002 *(struct termios *)data = *ct; 2003 return (0); 2004 case TIOCGETD: 2005 *(int *)data = TTYDISC; 2006 return (0); 2007 case TIOCGWINSZ: 2008 bzero(data, sizeof(struct winsize)); 2009 return (0); 2010 default: 2011 return (ENOTTY); 2012 } 2013 } 2014 tp = com->tp; 2015 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2016 term = tp->t_termios; 2017 oldcmd = cmd; 2018 error = ttsetcompat(tp, &cmd, data, &term); 2019 if (error != 0) 2020 return (error); 2021 if (cmd != oldcmd) 2022 data = (caddr_t)&term; 2023 #endif 2024 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2025 int cc; 2026 struct termios *dt = (struct termios *)data; 2027 struct termios *lt = mynor & CALLOUT_MASK 2028 ? &com->lt_out : &com->lt_in; 2029 2030 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2031 | (dt->c_iflag & ~lt->c_iflag); 2032 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2033 | (dt->c_oflag & ~lt->c_oflag); 2034 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2035 | (dt->c_cflag & ~lt->c_cflag); 2036 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2037 | (dt->c_lflag & ~lt->c_lflag); 2038 for (cc = 0; cc < NCCS; ++cc) 2039 if (lt->c_cc[cc] != 0) 2040 dt->c_cc[cc] = tp->t_cc[cc]; 2041 if (lt->c_ispeed != 0) 2042 dt->c_ispeed = tp->t_ispeed; 2043 if (lt->c_ospeed != 0) 2044 dt->c_ospeed = tp->t_ospeed; 2045 } 2046 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 2047 if (error != ENOIOCTL) 2048 return (error); 2049 s = spltty(); 2050 error = ttioctl(tp, cmd, data, flag); 2051 disc_optim(tp, &tp->t_termios, com); 2052 if (error != ENOIOCTL) { 2053 splx(s); 2054 return (error); 2055 } 2056 switch (cmd) { 2057 case TIOCSBRK: 2058 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2059 break; 2060 case TIOCCBRK: 2061 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2062 break; 2063 case TIOCSDTR: 2064 (void)commctl(com, TIOCM_DTR, DMBIS); 2065 break; 2066 case TIOCCDTR: 2067 (void)commctl(com, TIOCM_DTR, DMBIC); 2068 break; 2069 /* 2070 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2071 * changes get undone on the next call to comparam(). 2072 */ 2073 case TIOCMSET: 2074 (void)commctl(com, *(int *)data, DMSET); 2075 break; 2076 case TIOCMBIS: 2077 (void)commctl(com, *(int *)data, DMBIS); 2078 break; 2079 case TIOCMBIC: 2080 (void)commctl(com, *(int *)data, DMBIC); 2081 break; 2082 case TIOCMGET: 2083 *(int *)data = commctl(com, 0, DMGET); 2084 break; 2085 case TIOCMSDTRWAIT: 2086 /* must be root since the wait applies to following logins */ 2087 error = suser(td); 2088 if (error != 0) { 2089 splx(s); 2090 return (error); 2091 } 2092 com->dtr_wait = *(int *)data * hz / 100; 2093 break; 2094 case TIOCMGDTRWAIT: 2095 *(int *)data = com->dtr_wait * 100 / hz; 2096 break; 2097 case TIOCTIMESTAMP: 2098 com->do_timestamp = TRUE; 2099 *(struct timeval *)data = com->timestamp; 2100 break; 2101 case TIOCDCDTIMESTAMP: 2102 com->do_dcd_timestamp = TRUE; 2103 *(struct timeval *)data = com->dcd_timestamp; 2104 break; 2105 default: 2106 splx(s); 2107 error = pps_ioctl(cmd, data, &com->pps); 2108 if (error == ENODEV) 2109 error = ENOTTY; 2110 return (error); 2111 } 2112 splx(s); 2113 return (0); 2114 } 2115 2116 static void 2117 siopoll(void *dummy) 2118 { 2119 int unit; 2120 2121 if (com_events == 0) 2122 return; 2123 repeat: 2124 for (unit = 0; unit < sio_numunits; ++unit) { 2125 struct com_s *com; 2126 int incc; 2127 struct tty *tp; 2128 2129 com = com_addr(unit); 2130 if (com == NULL) 2131 continue; 2132 tp = com->tp; 2133 if (tp == NULL || com->gone) { 2134 /* 2135 * Discard any events related to never-opened or 2136 * going-away devices. 2137 */ 2138 com_lock(); 2139 incc = com->iptr - com->ibuf; 2140 com->iptr = com->ibuf; 2141 if (com->state & CS_CHECKMSR) { 2142 incc += LOTS_OF_EVENTS; 2143 com->state &= ~CS_CHECKMSR; 2144 } 2145 com_events -= incc; 2146 com_unlock(); 2147 continue; 2148 } 2149 if (com->iptr != com->ibuf) { 2150 com_lock(); 2151 sioinput(com); 2152 com_unlock(); 2153 } 2154 if (com->state & CS_CHECKMSR) { 2155 u_char delta_modem_status; 2156 2157 com_lock(); 2158 delta_modem_status = com->last_modem_status 2159 ^ com->prev_modem_status; 2160 com->prev_modem_status = com->last_modem_status; 2161 com_events -= LOTS_OF_EVENTS; 2162 com->state &= ~CS_CHECKMSR; 2163 com_unlock(); 2164 if (delta_modem_status & MSR_DCD) 2165 (*linesw[tp->t_line].l_modem) 2166 (tp, com->prev_modem_status & MSR_DCD); 2167 } 2168 if (com->state & CS_ODONE) { 2169 com_lock(); 2170 com_events -= LOTS_OF_EVENTS; 2171 com->state &= ~CS_ODONE; 2172 com_unlock(); 2173 if (!(com->state & CS_BUSY) 2174 && !(com->extra_state & CSE_BUSYCHECK)) { 2175 timeout(siobusycheck, com, hz / 100); 2176 com->extra_state |= CSE_BUSYCHECK; 2177 } 2178 (*linesw[tp->t_line].l_start)(tp); 2179 } 2180 if (com_events == 0) 2181 break; 2182 } 2183 if (com_events >= LOTS_OF_EVENTS) 2184 goto repeat; 2185 } 2186 2187 static int 2188 comparam(tp, t) 2189 struct tty *tp; 2190 struct termios *t; 2191 { 2192 u_int cfcr; 2193 int cflag; 2194 struct com_s *com; 2195 u_int divisor; 2196 u_char dlbh; 2197 u_char dlbl; 2198 int s; 2199 int unit; 2200 2201 unit = DEV_TO_UNIT(tp->t_dev); 2202 com = com_addr(unit); 2203 if (com == NULL) 2204 return (ENODEV); 2205 2206 /* do historical conversions */ 2207 if (t->c_ispeed == 0) 2208 t->c_ispeed = t->c_ospeed; 2209 2210 /* check requested parameters */ 2211 if (t->c_ospeed == 0) 2212 divisor = 0; 2213 else { 2214 if (t->c_ispeed != t->c_ospeed) 2215 return (EINVAL); 2216 divisor = siodivisor(com->rclk, t->c_ispeed); 2217 if (divisor == 0) 2218 return (EINVAL); 2219 } 2220 2221 /* parameters are OK, convert them to the com struct and the device */ 2222 s = spltty(); 2223 if (divisor == 0) 2224 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2225 else 2226 (void)commctl(com, TIOCM_DTR, DMBIS); 2227 cflag = t->c_cflag; 2228 switch (cflag & CSIZE) { 2229 case CS5: 2230 cfcr = CFCR_5BITS; 2231 break; 2232 case CS6: 2233 cfcr = CFCR_6BITS; 2234 break; 2235 case CS7: 2236 cfcr = CFCR_7BITS; 2237 break; 2238 default: 2239 cfcr = CFCR_8BITS; 2240 break; 2241 } 2242 if (cflag & PARENB) { 2243 cfcr |= CFCR_PENAB; 2244 if (!(cflag & PARODD)) 2245 cfcr |= CFCR_PEVEN; 2246 } 2247 if (cflag & CSTOPB) 2248 cfcr |= CFCR_STOPB; 2249 2250 if (com->hasfifo && divisor != 0) { 2251 /* 2252 * Use a fifo trigger level low enough so that the input 2253 * latency from the fifo is less than about 16 msec and 2254 * the total latency is less than about 30 msec. These 2255 * latencies are reasonable for humans. Serial comms 2256 * protocols shouldn't expect anything better since modem 2257 * latencies are larger. 2258 * 2259 * Interrupts can be held up for long periods of time 2260 * due to inefficiencies in other parts of the kernel, 2261 * certain video cards, etc. Setting the FIFO trigger 2262 * point to MEDH instead of HIGH gives us 694uS of slop 2263 * (8 character times) instead of 173uS (2 character times) 2264 * @ 115200 bps. 2265 */ 2266 com->fifo_image = t->c_ospeed <= 4800 2267 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2268 #ifdef COM_ESP 2269 /* 2270 * The Hayes ESP card needs the fifo DMA mode bit set 2271 * in compatibility mode. If not, it will interrupt 2272 * for each character received. 2273 */ 2274 if (com->esp) 2275 com->fifo_image |= FIFO_DMA_MODE; 2276 #endif 2277 sio_setreg(com, com_fifo, com->fifo_image); 2278 } 2279 2280 /* 2281 * This returns with interrupts disabled so that we can complete 2282 * the speed change atomically. Keeping interrupts disabled is 2283 * especially important while com_data is hidden. 2284 */ 2285 (void) siosetwater(com, t->c_ispeed); 2286 2287 if (divisor != 0) { 2288 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2289 /* 2290 * Only set the divisor registers if they would change, 2291 * since on some 16550 incompatibles (UMC8669F), setting 2292 * them while input is arriving them loses sync until 2293 * data stops arriving. 2294 */ 2295 dlbl = divisor & 0xFF; 2296 if (sio_getreg(com, com_dlbl) != dlbl) 2297 sio_setreg(com, com_dlbl, dlbl); 2298 dlbh = divisor >> 8; 2299 if (sio_getreg(com, com_dlbh) != dlbh) 2300 sio_setreg(com, com_dlbh, dlbh); 2301 } 2302 2303 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2304 2305 if (!(tp->t_state & TS_TTSTOP)) 2306 com->state |= CS_TTGO; 2307 2308 if (cflag & CRTS_IFLOW) { 2309 if (com->st16650a) { 2310 sio_setreg(com, com_cfcr, 0xbf); 2311 sio_setreg(com, com_fifo, 2312 sio_getreg(com, com_fifo) | 0x40); 2313 } 2314 com->state |= CS_RTS_IFLOW; 2315 /* 2316 * If CS_RTS_IFLOW just changed from off to on, the change 2317 * needs to be propagated to MCR_RTS. This isn't urgent, 2318 * so do it later by calling comstart() instead of repeating 2319 * a lot of code from comstart() here. 2320 */ 2321 } else if (com->state & CS_RTS_IFLOW) { 2322 com->state &= ~CS_RTS_IFLOW; 2323 /* 2324 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2325 * on here, since comstart() won't do it later. 2326 */ 2327 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2328 if (com->st16650a) { 2329 sio_setreg(com, com_cfcr, 0xbf); 2330 sio_setreg(com, com_fifo, 2331 sio_getreg(com, com_fifo) & ~0x40); 2332 } 2333 } 2334 2335 2336 /* 2337 * Set up state to handle output flow control. 2338 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2339 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2340 */ 2341 com->state |= CS_ODEVREADY; 2342 com->state &= ~CS_CTS_OFLOW; 2343 if (cflag & CCTS_OFLOW) { 2344 com->state |= CS_CTS_OFLOW; 2345 if (!(com->last_modem_status & MSR_CTS)) 2346 com->state &= ~CS_ODEVREADY; 2347 if (com->st16650a) { 2348 sio_setreg(com, com_cfcr, 0xbf); 2349 sio_setreg(com, com_fifo, 2350 sio_getreg(com, com_fifo) | 0x80); 2351 } 2352 } else { 2353 if (com->st16650a) { 2354 sio_setreg(com, com_cfcr, 0xbf); 2355 sio_setreg(com, com_fifo, 2356 sio_getreg(com, com_fifo) & ~0x80); 2357 } 2358 } 2359 2360 sio_setreg(com, com_cfcr, com->cfcr_image); 2361 2362 /* XXX shouldn't call functions while intrs are disabled. */ 2363 disc_optim(tp, t, com); 2364 /* 2365 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2366 * unconditionally, but that defeated the careful discarding of 2367 * stale input in sioopen(). 2368 */ 2369 if (com->state >= (CS_BUSY | CS_TTGO)) 2370 siointr1(com); 2371 2372 com_unlock(); 2373 splx(s); 2374 comstart(tp); 2375 if (com->ibufold != NULL) { 2376 free(com->ibufold, M_DEVBUF); 2377 com->ibufold = NULL; 2378 } 2379 return (0); 2380 } 2381 2382 static int 2383 siosetwater(com, speed) 2384 struct com_s *com; 2385 speed_t speed; 2386 { 2387 int cp4ticks; 2388 u_char *ibuf; 2389 int ibufsize; 2390 struct tty *tp; 2391 2392 /* 2393 * Make the buffer size large enough to handle a softtty interrupt 2394 * latency of about 2 ticks without loss of throughput or data 2395 * (about 3 ticks if input flow control is not used or not honoured, 2396 * but a bit less for CS5-CS7 modes). 2397 */ 2398 cp4ticks = speed / 10 / hz * 4; 2399 for (ibufsize = 128; ibufsize < cp4ticks;) 2400 ibufsize <<= 1; 2401 if (ibufsize == com->ibufsize) { 2402 com_lock(); 2403 return (0); 2404 } 2405 2406 /* 2407 * Allocate input buffer. The extra factor of 2 in the size is 2408 * to allow for an error byte for each input byte. 2409 */ 2410 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 2411 if (ibuf == NULL) { 2412 com_lock(); 2413 return (ENOMEM); 2414 } 2415 2416 /* Initialize non-critical variables. */ 2417 com->ibufold = com->ibuf; 2418 com->ibufsize = ibufsize; 2419 tp = com->tp; 2420 if (tp != NULL) { 2421 tp->t_ififosize = 2 * ibufsize; 2422 tp->t_ispeedwat = (speed_t)-1; 2423 tp->t_ospeedwat = (speed_t)-1; 2424 } 2425 2426 /* 2427 * Read current input buffer, if any. Continue with interrupts 2428 * disabled. 2429 */ 2430 com_lock(); 2431 if (com->iptr != com->ibuf) 2432 sioinput(com); 2433 2434 /*- 2435 * Initialize critical variables, including input buffer watermarks. 2436 * The external device is asked to stop sending when the buffer 2437 * exactly reaches high water, or when the high level requests it. 2438 * The high level is notified immediately (rather than at a later 2439 * clock tick) when this watermark is reached. 2440 * The buffer size is chosen so the watermark should almost never 2441 * be reached. 2442 * The low watermark is invisibly 0 since the buffer is always 2443 * emptied all at once. 2444 */ 2445 com->iptr = com->ibuf = ibuf; 2446 com->ibufend = ibuf + ibufsize; 2447 com->ierroff = ibufsize; 2448 com->ihighwater = ibuf + 3 * ibufsize / 4; 2449 return (0); 2450 } 2451 2452 static void 2453 comstart(tp) 2454 struct tty *tp; 2455 { 2456 struct com_s *com; 2457 int s; 2458 int unit; 2459 2460 unit = DEV_TO_UNIT(tp->t_dev); 2461 com = com_addr(unit); 2462 if (com == NULL) 2463 return; 2464 s = spltty(); 2465 com_lock(); 2466 if (tp->t_state & TS_TTSTOP) 2467 com->state &= ~CS_TTGO; 2468 else 2469 com->state |= CS_TTGO; 2470 if (tp->t_state & TS_TBLOCK) { 2471 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2472 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2473 } else { 2474 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2475 && com->state & CS_RTS_IFLOW) 2476 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2477 } 2478 com_unlock(); 2479 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2480 ttwwakeup(tp); 2481 splx(s); 2482 return; 2483 } 2484 if (tp->t_outq.c_cc != 0) { 2485 struct lbq *qp; 2486 struct lbq *next; 2487 2488 if (!com->obufs[0].l_queued) { 2489 com->obufs[0].l_tail 2490 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2491 sizeof com->obuf1); 2492 com->obufs[0].l_next = NULL; 2493 com->obufs[0].l_queued = TRUE; 2494 com_lock(); 2495 if (com->state & CS_BUSY) { 2496 qp = com->obufq.l_next; 2497 while ((next = qp->l_next) != NULL) 2498 qp = next; 2499 qp->l_next = &com->obufs[0]; 2500 } else { 2501 com->obufq.l_head = com->obufs[0].l_head; 2502 com->obufq.l_tail = com->obufs[0].l_tail; 2503 com->obufq.l_next = &com->obufs[0]; 2504 com->state |= CS_BUSY; 2505 } 2506 com_unlock(); 2507 } 2508 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2509 com->obufs[1].l_tail 2510 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2511 sizeof com->obuf2); 2512 com->obufs[1].l_next = NULL; 2513 com->obufs[1].l_queued = TRUE; 2514 com_lock(); 2515 if (com->state & CS_BUSY) { 2516 qp = com->obufq.l_next; 2517 while ((next = qp->l_next) != NULL) 2518 qp = next; 2519 qp->l_next = &com->obufs[1]; 2520 } else { 2521 com->obufq.l_head = com->obufs[1].l_head; 2522 com->obufq.l_tail = com->obufs[1].l_tail; 2523 com->obufq.l_next = &com->obufs[1]; 2524 com->state |= CS_BUSY; 2525 } 2526 com_unlock(); 2527 } 2528 tp->t_state |= TS_BUSY; 2529 } 2530 com_lock(); 2531 if (com->state >= (CS_BUSY | CS_TTGO)) 2532 siointr1(com); /* fake interrupt to start output */ 2533 com_unlock(); 2534 ttwwakeup(tp); 2535 splx(s); 2536 } 2537 2538 static void 2539 comstop(tp, rw) 2540 struct tty *tp; 2541 int rw; 2542 { 2543 struct com_s *com; 2544 2545 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2546 if (com == NULL || com->gone) 2547 return; 2548 com_lock(); 2549 if (rw & FWRITE) { 2550 if (com->hasfifo) 2551 #ifdef COM_ESP 2552 /* XXX avoid h/w bug. */ 2553 if (!com->esp) 2554 #endif 2555 sio_setreg(com, com_fifo, 2556 FIFO_XMT_RST | com->fifo_image); 2557 com->obufs[0].l_queued = FALSE; 2558 com->obufs[1].l_queued = FALSE; 2559 if (com->state & CS_ODONE) 2560 com_events -= LOTS_OF_EVENTS; 2561 com->state &= ~(CS_ODONE | CS_BUSY); 2562 com->tp->t_state &= ~TS_BUSY; 2563 } 2564 if (rw & FREAD) { 2565 if (com->hasfifo) 2566 #ifdef COM_ESP 2567 /* XXX avoid h/w bug. */ 2568 if (!com->esp) 2569 #endif 2570 sio_setreg(com, com_fifo, 2571 FIFO_RCV_RST | com->fifo_image); 2572 com_events -= (com->iptr - com->ibuf); 2573 com->iptr = com->ibuf; 2574 } 2575 com_unlock(); 2576 comstart(tp); 2577 } 2578 2579 static int 2580 commctl(com, bits, how) 2581 struct com_s *com; 2582 int bits; 2583 int how; 2584 { 2585 int mcr; 2586 int msr; 2587 2588 if (how == DMGET) { 2589 bits = TIOCM_LE; /* XXX - always enabled while open */ 2590 mcr = com->mcr_image; 2591 if (mcr & MCR_DTR) 2592 bits |= TIOCM_DTR; 2593 if (mcr & MCR_RTS) 2594 bits |= TIOCM_RTS; 2595 msr = com->prev_modem_status; 2596 if (msr & MSR_CTS) 2597 bits |= TIOCM_CTS; 2598 if (msr & MSR_DCD) 2599 bits |= TIOCM_CD; 2600 if (msr & MSR_DSR) 2601 bits |= TIOCM_DSR; 2602 /* 2603 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2604 * more volatile by reading the modem status a lot. Perhaps 2605 * we should latch both bits until the status is read here. 2606 */ 2607 if (msr & (MSR_RI | MSR_TERI)) 2608 bits |= TIOCM_RI; 2609 return (bits); 2610 } 2611 mcr = 0; 2612 if (bits & TIOCM_DTR) 2613 mcr |= MCR_DTR; 2614 if (bits & TIOCM_RTS) 2615 mcr |= MCR_RTS; 2616 if (com->gone) 2617 return(0); 2618 com_lock(); 2619 switch (how) { 2620 case DMSET: 2621 outb(com->modem_ctl_port, 2622 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2623 break; 2624 case DMBIS: 2625 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2626 break; 2627 case DMBIC: 2628 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2629 break; 2630 } 2631 com_unlock(); 2632 return (0); 2633 } 2634 2635 static void 2636 siosettimeout() 2637 { 2638 struct com_s *com; 2639 bool_t someopen; 2640 int unit; 2641 2642 /* 2643 * Set our timeout period to 1 second if no polled devices are open. 2644 * Otherwise set it to max(1/200, 1/hz). 2645 * Enable timeouts iff some device is open. 2646 */ 2647 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2648 sio_timeout = hz; 2649 someopen = FALSE; 2650 for (unit = 0; unit < sio_numunits; ++unit) { 2651 com = com_addr(unit); 2652 if (com != NULL && com->tp != NULL 2653 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2654 someopen = TRUE; 2655 if (com->poll || com->poll_output) { 2656 sio_timeout = hz > 200 ? hz / 200 : 1; 2657 break; 2658 } 2659 } 2660 } 2661 if (someopen) { 2662 sio_timeouts_until_log = hz / sio_timeout; 2663 sio_timeout_handle = timeout(comwakeup, (void *)NULL, 2664 sio_timeout); 2665 } else { 2666 /* Flush error messages, if any. */ 2667 sio_timeouts_until_log = 1; 2668 comwakeup((void *)NULL); 2669 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2670 } 2671 } 2672 2673 static void 2674 comwakeup(chan) 2675 void *chan; 2676 { 2677 struct com_s *com; 2678 int unit; 2679 2680 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 2681 2682 /* 2683 * Recover from lost output interrupts. 2684 * Poll any lines that don't use interrupts. 2685 */ 2686 for (unit = 0; unit < sio_numunits; ++unit) { 2687 com = com_addr(unit); 2688 if (com != NULL && !com->gone 2689 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2690 com_lock(); 2691 siointr1(com); 2692 com_unlock(); 2693 } 2694 } 2695 2696 /* 2697 * Check for and log errors, but not too often. 2698 */ 2699 if (--sio_timeouts_until_log > 0) 2700 return; 2701 sio_timeouts_until_log = hz / sio_timeout; 2702 for (unit = 0; unit < sio_numunits; ++unit) { 2703 int errnum; 2704 2705 com = com_addr(unit); 2706 if (com == NULL) 2707 continue; 2708 if (com->gone) 2709 continue; 2710 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2711 u_int delta; 2712 u_long total; 2713 2714 com_lock(); 2715 delta = com->delta_error_counts[errnum]; 2716 com->delta_error_counts[errnum] = 0; 2717 com_unlock(); 2718 if (delta == 0) 2719 continue; 2720 total = com->error_counts[errnum] += delta; 2721 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2722 unit, delta, error_desc[errnum], 2723 delta == 1 ? "" : "s", total); 2724 } 2725 } 2726 } 2727 2728 static void 2729 disc_optim(tp, t, com) 2730 struct tty *tp; 2731 struct termios *t; 2732 struct com_s *com; 2733 { 2734 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2735 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2736 && (!(t->c_iflag & PARMRK) 2737 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2738 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2739 && linesw[tp->t_line].l_rint == ttyinput) 2740 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2741 else 2742 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2743 com->hotchar = linesw[tp->t_line].l_hotchar; 2744 } 2745 2746 /* 2747 * Following are all routines needed for SIO to act as console 2748 */ 2749 #include <sys/cons.h> 2750 2751 struct siocnstate { 2752 u_char dlbl; 2753 u_char dlbh; 2754 u_char ier; 2755 u_char cfcr; 2756 u_char mcr; 2757 }; 2758 2759 static speed_t siocngetspeed (Port_t, u_long rclk); 2760 static void siocnclose (struct siocnstate *sp, Port_t iobase); 2761 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed); 2762 static void siocntxwait (Port_t iobase); 2763 2764 static cn_probe_t siocnprobe; 2765 static cn_init_t siocninit; 2766 static cn_checkc_t siocncheckc; 2767 static cn_getc_t siocngetc; 2768 static cn_putc_t siocnputc; 2769 2770 #ifdef __i386__ 2771 CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, 2772 siocnputc, NULL); 2773 #endif 2774 2775 /* To get the GDB related variables */ 2776 #if DDB > 0 2777 #include <ddb/ddb.h> 2778 #endif 2779 2780 static void 2781 siocntxwait(iobase) 2782 Port_t iobase; 2783 { 2784 int timo; 2785 2786 /* 2787 * Wait for any pending transmission to finish. Required to avoid 2788 * the UART lockup bug when the speed is changed, and for normal 2789 * transmits. 2790 */ 2791 timo = 100000; 2792 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2793 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2794 ; 2795 } 2796 2797 /* 2798 * Read the serial port specified and try to figure out what speed 2799 * it's currently running at. We're assuming the serial port has 2800 * been initialized and is basicly idle. This routine is only intended 2801 * to be run at system startup. 2802 * 2803 * If the value read from the serial port doesn't make sense, return 0. 2804 */ 2805 2806 static speed_t 2807 siocngetspeed(iobase, rclk) 2808 Port_t iobase; 2809 u_long rclk; 2810 { 2811 u_int divisor; 2812 u_char dlbh; 2813 u_char dlbl; 2814 u_char cfcr; 2815 2816 cfcr = inb(iobase + com_cfcr); 2817 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2818 2819 dlbl = inb(iobase + com_dlbl); 2820 dlbh = inb(iobase + com_dlbh); 2821 2822 outb(iobase + com_cfcr, cfcr); 2823 2824 divisor = dlbh << 8 | dlbl; 2825 2826 /* XXX there should be more sanity checking. */ 2827 if (divisor == 0) 2828 return (CONSPEED); 2829 return (rclk / (16UL * divisor)); 2830 } 2831 2832 static void 2833 siocnopen(sp, iobase, speed) 2834 struct siocnstate *sp; 2835 Port_t iobase; 2836 int speed; 2837 { 2838 u_int divisor; 2839 u_char dlbh; 2840 u_char dlbl; 2841 2842 /* 2843 * Save all the device control registers except the fifo register 2844 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2845 * We can't save the fifo register since it is read-only. 2846 */ 2847 sp->ier = inb(iobase + com_ier); 2848 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2849 siocntxwait(iobase); 2850 sp->cfcr = inb(iobase + com_cfcr); 2851 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2852 sp->dlbl = inb(iobase + com_dlbl); 2853 sp->dlbh = inb(iobase + com_dlbh); 2854 /* 2855 * Only set the divisor registers if they would change, since on 2856 * some 16550 incompatibles (Startech), setting them clears the 2857 * data input register. This also reduces the effects of the 2858 * UMC8669F bug. 2859 */ 2860 divisor = siodivisor(comdefaultrclk, speed); 2861 dlbl = divisor & 0xFF; 2862 if (sp->dlbl != dlbl) 2863 outb(iobase + com_dlbl, dlbl); 2864 dlbh = divisor >> 8; 2865 if (sp->dlbh != dlbh) 2866 outb(iobase + com_dlbh, dlbh); 2867 outb(iobase + com_cfcr, CFCR_8BITS); 2868 sp->mcr = inb(iobase + com_mcr); 2869 /* 2870 * We don't want interrupts, but must be careful not to "disable" 2871 * them by clearing the MCR_IENABLE bit, since that might cause 2872 * an interrupt by floating the IRQ line. 2873 */ 2874 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2875 } 2876 2877 static void 2878 siocnclose(sp, iobase) 2879 struct siocnstate *sp; 2880 Port_t iobase; 2881 { 2882 /* 2883 * Restore the device control registers. 2884 */ 2885 siocntxwait(iobase); 2886 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2887 if (sp->dlbl != inb(iobase + com_dlbl)) 2888 outb(iobase + com_dlbl, sp->dlbl); 2889 if (sp->dlbh != inb(iobase + com_dlbh)) 2890 outb(iobase + com_dlbh, sp->dlbh); 2891 outb(iobase + com_cfcr, sp->cfcr); 2892 /* 2893 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2894 */ 2895 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2896 outb(iobase + com_ier, sp->ier); 2897 } 2898 2899 static void 2900 siocnprobe(cp) 2901 struct consdev *cp; 2902 { 2903 speed_t boot_speed; 2904 u_char cfcr; 2905 u_int divisor; 2906 int s, unit; 2907 struct siocnstate sp; 2908 2909 /* 2910 * Find our first enabled console, if any. If it is a high-level 2911 * console device, then initialize it and return successfully. 2912 * If it is a low-level console device, then initialize it and 2913 * return unsuccessfully. It must be initialized in both cases 2914 * for early use by console drivers and debuggers. Initializing 2915 * the hardware is not necessary in all cases, since the i/o 2916 * routines initialize it on the fly, but it is necessary if 2917 * input might arrive while the hardware is switched back to an 2918 * uninitialized state. We can't handle multiple console devices 2919 * yet because our low-level routines don't take a device arg. 2920 * We trust the user to set the console flags properly so that we 2921 * don't need to probe. 2922 */ 2923 cp->cn_pri = CN_DEAD; 2924 2925 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2926 int flags; 2927 int disabled; 2928 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 2929 if (disabled) 2930 continue; 2931 } 2932 if (resource_int_value("sio", unit, "flags", &flags)) 2933 continue; 2934 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2935 int port; 2936 Port_t iobase; 2937 2938 if (resource_int_value("sio", unit, "port", &port)) 2939 continue; 2940 iobase = port; 2941 s = spltty(); 2942 if (boothowto & RB_SERIAL) { 2943 boot_speed = 2944 siocngetspeed(iobase, comdefaultrclk); 2945 if (boot_speed) 2946 comdefaultrate = boot_speed; 2947 } 2948 2949 /* 2950 * Initialize the divisor latch. We can't rely on 2951 * siocnopen() to do this the first time, since it 2952 * avoids writing to the latch if the latch appears 2953 * to have the correct value. Also, if we didn't 2954 * just read the speed from the hardware, then we 2955 * need to set the speed in hardware so that 2956 * switching it later is null. 2957 */ 2958 cfcr = inb(iobase + com_cfcr); 2959 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2960 divisor = siodivisor(comdefaultrclk, comdefaultrate); 2961 outb(iobase + com_dlbl, divisor & 0xff); 2962 outb(iobase + com_dlbh, divisor >> 8); 2963 outb(iobase + com_cfcr, cfcr); 2964 2965 siocnopen(&sp, iobase, comdefaultrate); 2966 2967 splx(s); 2968 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2969 cp->cn_dev = makedev(CDEV_MAJOR, unit); 2970 cp->cn_pri = COM_FORCECONSOLE(flags) 2971 || boothowto & RB_SERIAL 2972 ? CN_REMOTE : CN_NORMAL; 2973 siocniobase = iobase; 2974 siocnunit = unit; 2975 } 2976 if (COM_DEBUGGER(flags)) { 2977 printf("sio%d: gdb debugging port\n", unit); 2978 siogdbiobase = iobase; 2979 siogdbunit = unit; 2980 #if DDB > 0 2981 gdbdev = makedev(CDEV_MAJOR, unit); 2982 gdb_getc = siocngetc; 2983 gdb_putc = siocnputc; 2984 #endif 2985 } 2986 } 2987 } 2988 #ifdef __i386__ 2989 #if DDB > 0 2990 /* 2991 * XXX Ugly Compatability. 2992 * If no gdb port has been specified, set it to be the console 2993 * as some configuration files don't specify the gdb port. 2994 */ 2995 if (gdbdev == NODEV && (boothowto & RB_GDB)) { 2996 printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 2997 siocnunit); 2998 printf("Set flag 0x80 on desired GDB port in your\n"); 2999 printf("configuration file (currently sio only).\n"); 3000 siogdbiobase = siocniobase; 3001 siogdbunit = siocnunit; 3002 gdbdev = makedev(CDEV_MAJOR, siocnunit); 3003 gdb_getc = siocngetc; 3004 gdb_putc = siocnputc; 3005 } 3006 #endif 3007 #endif 3008 } 3009 3010 #ifdef __alpha__ 3011 3012 CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 3013 3014 int 3015 siocnattach(port, speed) 3016 int port; 3017 int speed; 3018 { 3019 int s; 3020 u_char cfcr; 3021 u_int divisor; 3022 struct siocnstate sp; 3023 3024 siocniobase = port; 3025 comdefaultrate = speed; 3026 sio_consdev.cn_pri = CN_NORMAL; 3027 sio_consdev.cn_dev = makedev(CDEV_MAJOR, 0); 3028 3029 s = spltty(); 3030 3031 /* 3032 * Initialize the divisor latch. We can't rely on 3033 * siocnopen() to do this the first time, since it 3034 * avoids writing to the latch if the latch appears 3035 * to have the correct value. Also, if we didn't 3036 * just read the speed from the hardware, then we 3037 * need to set the speed in hardware so that 3038 * switching it later is null. 3039 */ 3040 cfcr = inb(siocniobase + com_cfcr); 3041 outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 3042 divisor = siodivisor(comdefaultrclk, comdefaultrate); 3043 outb(siocniobase + com_dlbl, divisor & 0xff); 3044 outb(siocniobase + com_dlbh, divisor >> 8); 3045 outb(siocniobase + com_cfcr, cfcr); 3046 3047 siocnopen(&sp, siocniobase, comdefaultrate); 3048 splx(s); 3049 3050 cn_tab = &sio_consdev; 3051 return (0); 3052 } 3053 3054 int 3055 siogdbattach(port, speed) 3056 int port; 3057 int speed; 3058 { 3059 int s; 3060 u_char cfcr; 3061 u_int divisor; 3062 struct siocnstate sp; 3063 3064 siogdbiobase = port; 3065 gdbdefaultrate = speed; 3066 3067 s = spltty(); 3068 3069 /* 3070 * Initialize the divisor latch. We can't rely on 3071 * siocnopen() to do this the first time, since it 3072 * avoids writing to the latch if the latch appears 3073 * to have the correct value. Also, if we didn't 3074 * just read the speed from the hardware, then we 3075 * need to set the speed in hardware so that 3076 * switching it later is null. 3077 */ 3078 cfcr = inb(siogdbiobase + com_cfcr); 3079 outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 3080 divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 3081 outb(siogdbiobase + com_dlbl, divisor & 0xff); 3082 outb(siogdbiobase + com_dlbh, divisor >> 8); 3083 outb(siogdbiobase + com_cfcr, cfcr); 3084 3085 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3086 splx(s); 3087 3088 return (0); 3089 } 3090 3091 #endif 3092 3093 static void 3094 siocninit(cp) 3095 struct consdev *cp; 3096 { 3097 comconsole = DEV_TO_UNIT(cp->cn_dev); 3098 } 3099 3100 static int 3101 siocncheckc(dev) 3102 dev_t dev; 3103 { 3104 int c; 3105 Port_t iobase; 3106 int s; 3107 struct siocnstate sp; 3108 3109 if (minor(dev) == siogdbunit) 3110 iobase = siogdbiobase; 3111 else 3112 iobase = siocniobase; 3113 s = spltty(); 3114 siocnopen(&sp, iobase, comdefaultrate); 3115 if (inb(iobase + com_lsr) & LSR_RXRDY) 3116 c = inb(iobase + com_data); 3117 else 3118 c = -1; 3119 siocnclose(&sp, iobase); 3120 splx(s); 3121 return (c); 3122 } 3123 3124 3125 int 3126 siocngetc(dev) 3127 dev_t dev; 3128 { 3129 int c; 3130 Port_t iobase; 3131 int s; 3132 struct siocnstate sp; 3133 3134 if (minor(dev) == siogdbunit) 3135 iobase = siogdbiobase; 3136 else 3137 iobase = siocniobase; 3138 s = spltty(); 3139 siocnopen(&sp, iobase, comdefaultrate); 3140 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3141 ; 3142 c = inb(iobase + com_data); 3143 siocnclose(&sp, iobase); 3144 splx(s); 3145 return (c); 3146 } 3147 3148 void 3149 siocnputc(dev, c) 3150 dev_t dev; 3151 int c; 3152 { 3153 int s; 3154 struct siocnstate sp; 3155 Port_t iobase; 3156 3157 if (minor(dev) == siogdbunit) 3158 iobase = siogdbiobase; 3159 else 3160 iobase = siocniobase; 3161 s = spltty(); 3162 siocnopen(&sp, iobase, comdefaultrate); 3163 siocntxwait(iobase); 3164 outb(iobase + com_data, c); 3165 siocnclose(&sp, iobase); 3166 splx(s); 3167 } 3168 3169 #ifdef __alpha__ 3170 int 3171 siogdbgetc() 3172 { 3173 int c; 3174 Port_t iobase; 3175 int s; 3176 struct siocnstate sp; 3177 3178 iobase = siogdbiobase; 3179 s = spltty(); 3180 siocnopen(&sp, iobase, gdbdefaultrate); 3181 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3182 ; 3183 c = inb(iobase + com_data); 3184 siocnclose(&sp, iobase); 3185 splx(s); 3186 return (c); 3187 } 3188 3189 void 3190 siogdbputc(c) 3191 int c; 3192 { 3193 int s; 3194 struct siocnstate sp; 3195 3196 s = spltty(); 3197 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3198 siocntxwait(siogdbiobase); 3199 outb(siogdbiobase + com_data, c); 3200 siocnclose(&sp, siogdbiobase); 3201 splx(s); 3202 } 3203 #endif 3204 3205 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3206 #if NPCI > 0 3207 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3208 #endif 3209 #if NPUC > 0 3210 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0); 3211 #endif 3212