1 /*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by the University of 16 * California, Berkeley and its contributors. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $ 34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.16 2004/05/19 22:52:49 dillon Exp $ 35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91 36 * from: i386/isa sio.c,v 1.234 37 */ 38 39 #include "opt_comconsole.h" 40 #include "opt_compat.h" 41 #include "opt_ddb.h" 42 #include "opt_sio.h" 43 #include "use_pci.h" 44 #ifdef __i386__ 45 #include "use_puc.h" 46 #endif 47 #include "use_sio.h" 48 49 /* 50 * Serial driver, based on 386BSD-0.1 com driver. 51 * Mostly rewritten to use pseudo-DMA. 52 * Works for National Semiconductor NS8250-NS16550AF UARTs. 53 * COM driver, based on HP dca driver. 54 * 55 * Changes for PC-Card integration: 56 * - Added PC-Card driver table and handlers 57 */ 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/reboot.h> 61 #include <sys/malloc.h> 62 #include <sys/tty.h> 63 #include <sys/proc.h> 64 #include <sys/module.h> 65 #include <sys/conf.h> 66 #include <sys/dkstat.h> 67 #include <sys/fcntl.h> 68 #include <sys/interrupt.h> 69 #include <sys/kernel.h> 70 #include <sys/syslog.h> 71 #include <sys/sysctl.h> 72 #include <sys/bus.h> 73 #include <machine/bus_pio.h> 74 #include <machine/bus.h> 75 #include <sys/rman.h> 76 #include <sys/timepps.h> 77 78 #include <machine/limits.h> 79 80 #include <bus/isa/isareg.h> 81 #include <bus/isa/isavar.h> 82 #if NPCI > 0 83 #include <bus/pci/pcireg.h> 84 #include <bus/pci/pcivar.h> 85 #endif 86 #if NPUC > 0 87 #include <dev/misc/puc/pucvar.h> 88 #endif 89 #include <machine/lock.h> 90 91 #include <machine/clock.h> 92 #include <machine/ipl.h> 93 #ifndef SMP 94 #include <machine/lock.h> 95 #endif 96 #include <machine/resource.h> 97 98 #include "sioreg.h" 99 #include "sio_private.h" 100 101 #ifdef COM_ESP 102 #include "../ic_layer/esp.h" 103 #endif 104 105 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */ 106 107 #define CALLOUT_MASK 0x80 108 #define CONTROL_MASK 0x60 109 #define CONTROL_INIT_STATE 0x20 110 #define CONTROL_LOCK_STATE 0x40 111 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev))) 112 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \ 113 | ((mynor) & 0x1f)) 114 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \ 115 | ((unit) & 0x1f)) 116 117 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */ 118 119 #define sio_getreg(com, off) \ 120 (bus_space_read_1((com)->bst, (com)->bsh, (off))) 121 #define sio_setreg(com, off, value) \ 122 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value))) 123 124 /* 125 * com state bits. 126 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher 127 * than the other bits so that they can be tested as a group without masking 128 * off the low bits. 129 * 130 * The following com and tty flags correspond closely: 131 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and 132 * comstop()) 133 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart()) 134 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam()) 135 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam()) 136 * TS_FLUSH is not used. 137 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON. 138 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state). 139 */ 140 #define CS_BUSY 0x80 /* output in progress */ 141 #define CS_TTGO 0x40 /* output not stopped by XOFF */ 142 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */ 143 #define CS_CHECKMSR 1 /* check of MSR scheduled */ 144 #define CS_CTS_OFLOW 2 /* use CTS output flow control */ 145 #define CS_DTR_OFF 0x10 /* DTR held off */ 146 #define CS_ODONE 4 /* output completed */ 147 #define CS_RTS_IFLOW 8 /* use RTS input flow control */ 148 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */ 149 150 static char const * const error_desc[] = { 151 #define CE_OVERRUN 0 152 "silo overflow", 153 #define CE_INTERRUPT_BUF_OVERFLOW 1 154 "interrupt-level buffer overflow", 155 #define CE_TTY_BUF_OVERFLOW 2 156 "tty-level buffer overflow", 157 }; 158 159 #ifdef COM_ESP 160 static int espattach (struct com_s *com, Port_t esp_port); 161 #endif 162 static int sio_isa_attach (device_t dev); 163 164 static timeout_t siobusycheck; 165 static u_int siodivisor (u_long rclk, speed_t speed); 166 static timeout_t siodtrwakeup; 167 static void comhardclose (struct com_s *com); 168 static void sioinput (struct com_s *com); 169 static void siointr1 (struct com_s *com); 170 static void siointr (void *arg); 171 static int commctl (struct com_s *com, int bits, int how); 172 static int comparam (struct tty *tp, struct termios *t); 173 static inthand2_t siopoll; 174 static int sio_isa_probe (device_t dev); 175 static void siosettimeout (void); 176 static int siosetwater (struct com_s *com, speed_t speed); 177 static void comstart (struct tty *tp); 178 static void comstop (struct tty *tp, int rw); 179 static timeout_t comwakeup; 180 static void disc_optim (struct tty *tp, struct termios *t, 181 struct com_s *com); 182 183 #if NPCI > 0 184 static int sio_pci_attach (device_t dev); 185 static void sio_pci_kludge_unit (device_t dev); 186 static int sio_pci_probe (device_t dev); 187 #endif /* NPCI > 0 */ 188 189 #if NPUC > 0 190 static int sio_puc_attach (device_t dev); 191 static int sio_puc_probe (device_t dev); 192 #endif /* NPUC > 0 */ 193 194 static char driver_name[] = "sio"; 195 196 /* table and macro for fast conversion from a unit number to its com struct */ 197 devclass_t sio_devclass; 198 #define com_addr(unit) ((struct com_s *) \ 199 devclass_get_softc(sio_devclass, unit)) 200 201 static device_method_t sio_isa_methods[] = { 202 /* Device interface */ 203 DEVMETHOD(device_probe, sio_isa_probe), 204 DEVMETHOD(device_attach, sio_isa_attach), 205 206 { 0, 0 } 207 }; 208 209 static driver_t sio_isa_driver = { 210 driver_name, 211 sio_isa_methods, 212 sizeof(struct com_s), 213 }; 214 215 #if NPCI > 0 216 static device_method_t sio_pci_methods[] = { 217 /* Device interface */ 218 DEVMETHOD(device_probe, sio_pci_probe), 219 DEVMETHOD(device_attach, sio_pci_attach), 220 221 { 0, 0 } 222 }; 223 224 static driver_t sio_pci_driver = { 225 driver_name, 226 sio_pci_methods, 227 sizeof(struct com_s), 228 }; 229 #endif /* NPCI > 0 */ 230 231 #if NPUC > 0 232 static device_method_t sio_puc_methods[] = { 233 /* Device interface */ 234 DEVMETHOD(device_probe, sio_puc_probe), 235 DEVMETHOD(device_attach, sio_puc_attach), 236 237 { 0, 0 } 238 }; 239 240 static driver_t sio_puc_driver = { 241 driver_name, 242 sio_puc_methods, 243 sizeof(struct com_s), 244 }; 245 #endif /* NPUC > 0 */ 246 247 static d_open_t sioopen; 248 static d_close_t sioclose; 249 static d_read_t sioread; 250 static d_write_t siowrite; 251 static d_ioctl_t sioioctl; 252 253 #define CDEV_MAJOR 28 254 static struct cdevsw sio_cdevsw = { 255 /* name */ driver_name, 256 /* maj */ CDEV_MAJOR, 257 /* flags */ D_TTY | D_KQFILTER, 258 /* port */ NULL, 259 /* clone */ NULL, 260 261 /* open */ sioopen, 262 /* close */ sioclose, 263 /* read */ sioread, 264 /* write */ siowrite, 265 /* ioctl */ sioioctl, 266 /* poll */ ttypoll, 267 /* mmap */ nommap, 268 /* strategy */ nostrategy, 269 /* dump */ nodump, 270 /* psize */ nopsize, 271 /* kqfilter */ ttykqfilter 272 }; 273 274 int comconsole = -1; 275 static volatile speed_t comdefaultrate = CONSPEED; 276 static u_long comdefaultrclk = DEFAULT_RCLK; 277 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, ""); 278 #ifdef __alpha__ 279 static volatile speed_t gdbdefaultrate = CONSPEED; 280 #endif 281 static u_int com_events; /* input chars + weighted output completions */ 282 static Port_t siocniobase; 283 static int siocnunit; 284 static Port_t siogdbiobase; 285 static int siogdbunit = -1; 286 static bool_t sio_registered; 287 static int sio_timeout; 288 static int sio_timeouts_until_log; 289 static struct callout_handle sio_timeout_handle 290 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle); 291 static int sio_numunits; 292 293 #ifdef COM_ESP 294 /* XXX configure this properly. */ 295 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, }; 296 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 }; 297 #endif 298 299 /* 300 * handle sysctl read/write requests for console speed 301 * 302 * In addition to setting comdefaultrate for I/O through /dev/console, 303 * also set the initial and lock values for the /dev/ttyXX device 304 * if there is one associated with the console. Finally, if the /dev/tty 305 * device has already been open, change the speed on the open running port 306 * itself. 307 */ 308 309 static int 310 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS) 311 { 312 int error, s; 313 speed_t newspeed; 314 struct com_s *com; 315 struct tty *tp; 316 317 newspeed = comdefaultrate; 318 319 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req); 320 if (error || !req->newptr) 321 return (error); 322 323 comdefaultrate = newspeed; 324 325 if (comconsole < 0) /* serial console not selected? */ 326 return (0); 327 328 com = com_addr(comconsole); 329 if (com == NULL) 330 return (ENXIO); 331 332 /* 333 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX 334 * (note, the lock rates really are boolean -- if non-zero, disallow 335 * speed changes) 336 */ 337 com->it_in.c_ispeed = com->it_in.c_ospeed = 338 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 339 com->it_out.c_ispeed = com->it_out.c_ospeed = 340 com->lt_out.c_ispeed = com->lt_out.c_ospeed = comdefaultrate; 341 342 /* 343 * if we're open, change the running rate too 344 */ 345 tp = com->tp; 346 if (tp && (tp->t_state & TS_ISOPEN)) { 347 tp->t_termios.c_ispeed = 348 tp->t_termios.c_ospeed = comdefaultrate; 349 s = spltty(); 350 error = comparam(tp, &tp->t_termios); 351 splx(s); 352 } 353 return error; 354 } 355 356 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW, 357 0, 0, sysctl_machdep_comdefaultrate, "I", ""); 358 359 #if NPCI > 0 360 struct pci_ids { 361 u_int32_t type; 362 const char *desc; 363 int rid; 364 }; 365 366 static struct pci_ids pci_ids[] = { 367 { 0x100812b9, "3COM PCI FaxModem", 0x10 }, 368 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 }, 369 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 370 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 }, 371 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 }, 372 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 }, 373 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 }, 374 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 }, 375 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 }, 376 { 0x00000000, NULL, 0 } 377 }; 378 379 static int 380 sio_pci_attach(dev) 381 device_t dev; 382 { 383 u_int32_t type; 384 struct pci_ids *id; 385 386 type = pci_get_devid(dev); 387 id = pci_ids; 388 while (id->type && id->type != type) 389 id++; 390 if (id->desc == NULL) 391 return (ENXIO); 392 sio_pci_kludge_unit(dev); 393 return (sioattach(dev, id->rid, 0UL)); 394 } 395 396 /* 397 * Don't cut and paste this to other drivers. It is a horrible kludge 398 * which will fail to work and also be unnecessary in future versions. 399 */ 400 static void 401 sio_pci_kludge_unit(dev) 402 device_t dev; 403 { 404 devclass_t dc; 405 int err; 406 int start; 407 int unit; 408 409 unit = 0; 410 start = 0; 411 while (resource_int_value("sio", unit, "port", &start) == 0 && 412 start > 0) 413 unit++; 414 if (device_get_unit(dev) < unit) { 415 dc = device_get_devclass(dev); 416 while (devclass_get_device(dc, unit)) 417 unit++; 418 device_printf(dev, "moving to sio%d\n", unit); 419 err = device_set_unit(dev, unit); /* EVIL DO NOT COPY */ 420 if (err) 421 device_printf(dev, "error moving device %d\n", err); 422 } 423 } 424 425 static int 426 sio_pci_probe(dev) 427 device_t dev; 428 { 429 u_int32_t type; 430 struct pci_ids *id; 431 432 type = pci_get_devid(dev); 433 id = pci_ids; 434 while (id->type && id->type != type) 435 id++; 436 if (id->desc == NULL) 437 return (ENXIO); 438 device_set_desc(dev, id->desc); 439 return (sioprobe(dev, id->rid, 0UL)); 440 } 441 #endif /* NPCI > 0 */ 442 443 #if NPUC > 0 444 static int 445 sio_puc_attach(dev) 446 device_t dev; 447 { 448 u_int rclk; 449 450 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 451 &rclk) != 0) 452 rclk = DEFAULT_RCLK; 453 return (sioattach(dev, 0, rclk)); 454 } 455 456 static int 457 sio_puc_probe(dev) 458 device_t dev; 459 { 460 u_int rclk; 461 462 if (BUS_READ_IVAR(device_get_parent(dev), dev, PUC_IVAR_FREQ, 463 &rclk) != 0) 464 rclk = DEFAULT_RCLK; 465 return (sioprobe(dev, 0, rclk)); 466 } 467 #endif /* NPUC */ 468 469 static struct isa_pnp_id sio_ids[] = { 470 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */ 471 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */ 472 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */ 473 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */ 474 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */ 475 /* Devices that do not have a compatid */ 476 {0x12206804, NULL}, /* ACH2012 - 5634BTS 56K Video Ready Modem */ 477 {0x7602a904, NULL}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */ 478 {0x00007905, NULL}, /* AKY0000 - 56K Plug&Play Modem */ 479 {0x21107905, NULL}, /* AKY1021 - 56K Plug&Play Modem */ 480 {0x01405407, NULL}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */ 481 {0x56039008, NULL}, /* BDP0356 - Best Data 56x2 */ 482 {0x56159008, NULL}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/ 483 {0x36339008, NULL}, /* BDP3336 - Best Data Prods. 336F */ 484 {0x0014490a, NULL}, /* BRI1400 - Boca 33.6 PnP */ 485 {0x0015490a, NULL}, /* BRI1500 - Internal Fax Data */ 486 {0x0034490a, NULL}, /* BRI3400 - Internal ACF Modem */ 487 {0x0094490a, NULL}, /* BRI9400 - Boca K56Flex PnP */ 488 {0x00b4490a, NULL}, /* BRIB400 - Boca 56k PnP */ 489 {0x0030320d, NULL}, /* CIR3000 - Cirrus Logic V43 */ 490 {0x0100440e, NULL}, /* CRD0001 - Cardinal MVP288IV ? */ 491 {0x01308c0e, NULL}, /* CTL3001 - Creative Labs Phoneblaster */ 492 {0x36033610, NULL}, /* DAV0336 - DAVICOM 336PNP MODEM */ 493 {0x01009416, NULL}, /* ETT0001 - E-Tech Bullet 33k6 PnP */ 494 {0x0000aa1a, NULL}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */ 495 {0x1200c31e, NULL}, /* GVC0012 - VF1128HV-R9 (win modem?) */ 496 {0x0303c31e, NULL}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */ 497 {0x0505c31e, NULL}, /* GVC0505 - GVC 56k Faxmodem */ 498 {0x0116c31e, NULL}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */ 499 {0x0050c31e, NULL}, /* GVC5000 - some GVC modem */ 500 {0x3800f91e, NULL}, /* GWY0038 - Telepath with v.90 */ 501 {0x9062f91e, NULL}, /* GWY6290 - Telepath with x2 Technology */ 502 {0x8100e425, NULL}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */ 503 {0x21002534, NULL}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/ 504 {0x0000f435, NULL}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */ 505 {0x5015f435, NULL}, /* MOT1550 - Motorola ModemSURFR 56K Modem */ 506 {0xf015f435, NULL}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */ 507 {0x6045f435, NULL}, /* MOT4560 - Motorola ? */ 508 {0x61e7a338, NULL}, /* NECE761 - 33.6Modem */ 509 {0x08804f3f, NULL}, /* OZO8008 - Zoom (33.6k Modem) */ 510 {0x0f804f3f, NULL}, /* OZO800f - Zoom 2812 (56k Modem) */ 511 {0x39804f3f, NULL}, /* OZO8039 - Zoom 56k flex */ 512 {0x00914f3f, NULL}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */ 513 {0x3024a341, NULL}, /* PMC2430 - Pace 56 Voice Internal Modem */ 514 {0x1000eb49, NULL}, /* ROK0010 - Rockwell ? */ 515 {0x1200b23d, NULL}, /* RSS0012 - OMRON ME5614ISA */ 516 {0x5002734a, NULL}, /* RSS0250 - 5614Jx3(G) Internal Modem */ 517 {0x6202734a, NULL}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */ 518 {0x1010104d, NULL}, /* SHP1010 - Rockwell 33600bps Modem */ 519 {0xc100ad4d, NULL}, /* SMM00C1 - Leopard 56k PnP */ 520 {0x9012b04e, NULL}, /* SUP1290 - Supra ? */ 521 {0x1013b04e, NULL}, /* SUP1310 - SupraExpress 336i PnP */ 522 {0x8013b04e, NULL}, /* SUP1380 - SupraExpress 288i PnP Voice */ 523 {0x8113b04e, NULL}, /* SUP1381 - SupraExpress 336i PnP Voice */ 524 {0x5016b04e, NULL}, /* SUP1650 - Supra 336i Sp Intl */ 525 {0x7016b04e, NULL}, /* SUP1670 - Supra 336i V+ Intl */ 526 {0x7420b04e, NULL}, /* SUP2070 - Supra ? */ 527 {0x8020b04e, NULL}, /* SUP2080 - Supra ? */ 528 {0x8420b04e, NULL}, /* SUP2084 - SupraExpress 56i PnP */ 529 {0x7121b04e, NULL}, /* SUP2171 - SupraExpress 56i Sp? */ 530 {0x8024b04e, NULL}, /* SUP2480 - Supra ? */ 531 {0x01007256, NULL}, /* USR0001 - U.S. Robotics Inc., Sportster W */ 532 {0x02007256, NULL}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */ 533 {0x04007256, NULL}, /* USR0004 - USR Sportster 14.4k */ 534 {0x06007256, NULL}, /* USR0006 - USR Sportster 33.6k */ 535 {0x11007256, NULL}, /* USR0011 - USR ? */ 536 {0x01017256, NULL}, /* USR0101 - USR ? */ 537 {0x30207256, NULL}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */ 538 {0x50207256, NULL}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */ 539 {0x70207256, NULL}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */ 540 {0x30307256, NULL}, /* USR3030 - U.S. Robotics 56K FAX INT */ 541 {0x31307256, NULL}, /* USR3031 - U.S. Robotics 56K FAX INT */ 542 {0x50307256, NULL}, /* USR3050 - U.S. Robotics 56K FAX INT */ 543 {0x70307256, NULL}, /* USR3070 - U.S. Robotics 56K Voice INT */ 544 {0x90307256, NULL}, /* USR3090 - USR ? */ 545 {0x70917256, NULL}, /* USR9170 - U.S. Robotics 56K FAX INT */ 546 {0x90917256, NULL}, /* USR9190 - USR 56k Voice INT */ 547 {0x0300695c, NULL}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */ 548 {0x01a0896a, NULL}, /* ZTIA001 - Zoom Internal V90 Faxmodem */ 549 {0x61f7896a, NULL}, /* ZTIF761 - Zoom ComStar 33.6 */ 550 {0} 551 }; 552 553 554 555 static int 556 sio_isa_probe(dev) 557 device_t dev; 558 { 559 /* Check isapnp ids */ 560 if (ISA_PNP_PROBE(device_get_parent(dev), dev, sio_ids) == ENXIO) 561 return (ENXIO); 562 return (sioprobe(dev, 0, 0UL)); 563 } 564 565 int 566 sioprobe(dev, xrid, rclk) 567 device_t dev; 568 int xrid; 569 u_long rclk; 570 { 571 #if 0 572 static bool_t already_init; 573 device_t xdev; 574 #endif 575 struct com_s *com; 576 u_int divisor; 577 bool_t failures[10]; 578 int fn; 579 device_t idev; 580 Port_t iobase; 581 intrmask_t irqmap[4]; 582 intrmask_t irqs; 583 u_char mcr_image; 584 int result; 585 u_long xirq; 586 u_int flags = device_get_flags(dev); 587 int rid; 588 struct resource *port; 589 590 rid = xrid; 591 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 592 0, ~0, IO_COMSIZE, RF_ACTIVE); 593 if (!port) 594 return (ENXIO); 595 596 com = device_get_softc(dev); 597 com->bst = rman_get_bustag(port); 598 com->bsh = rman_get_bushandle(port); 599 if (rclk == 0) 600 rclk = DEFAULT_RCLK; 601 com->rclk = rclk; 602 603 #if 0 604 /* 605 * XXX this is broken - when we are first called, there are no 606 * previously configured IO ports. We could hard code 607 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse. 608 * This code has been doing nothing since the conversion since 609 * "count" is zero the first time around. 610 */ 611 if (!already_init) { 612 /* 613 * Turn off MCR_IENABLE for all likely serial ports. An unused 614 * port with its MCR_IENABLE gate open will inhibit interrupts 615 * from any used port that shares the interrupt vector. 616 * XXX the gate enable is elsewhere for some multiports. 617 */ 618 device_t *devs; 619 int count, i, xioport; 620 621 devclass_get_devices(sio_devclass, &devs, &count); 622 for (i = 0; i < count; i++) { 623 xdev = devs[i]; 624 if (device_is_enabled(xdev) && 625 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport, 626 NULL) == 0) 627 outb(xioport + com_mcr, 0); 628 } 629 free(devs, M_TEMP); 630 already_init = TRUE; 631 } 632 #endif 633 634 if (COM_LLCONSOLE(flags)) { 635 printf("sio%d: reserved for low-level i/o\n", 636 device_get_unit(dev)); 637 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 638 return (ENXIO); 639 } 640 641 /* 642 * If the device is on a multiport card and has an AST/4 643 * compatible interrupt control register, initialize this 644 * register and prepare to leave MCR_IENABLE clear in the mcr. 645 * Otherwise, prepare to set MCR_IENABLE in the mcr. 646 * Point idev to the device struct giving the correct id_irq. 647 * This is the struct for the master device if there is one. 648 */ 649 idev = dev; 650 mcr_image = MCR_IENABLE; 651 #ifdef COM_MULTIPORT 652 if (COM_ISMULTIPORT(flags)) { 653 Port_t xiobase; 654 u_long io; 655 656 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags)); 657 if (idev == NULL) { 658 printf("sio%d: master device %d not configured\n", 659 device_get_unit(dev), COM_MPMASTER(flags)); 660 idev = dev; 661 } 662 if (!COM_NOTAST4(flags)) { 663 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io, 664 NULL) == 0) { 665 xiobase = io; 666 if (bus_get_resource(idev, SYS_RES_IRQ, 0, 667 NULL, NULL) == 0) 668 outb(xiobase + com_scr, 0x80); 669 else 670 outb(xiobase + com_scr, 0); 671 } 672 mcr_image = 0; 673 } 674 } 675 #endif /* COM_MULTIPORT */ 676 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0) 677 mcr_image = 0; 678 679 bzero(failures, sizeof failures); 680 iobase = rman_get_start(port); 681 682 /* 683 * We don't want to get actual interrupts, just masked ones. 684 * Interrupts from this line should already be masked in the ICU, 685 * but mask them in the processor as well in case there are some 686 * (misconfigured) shared interrupts. 687 */ 688 com_lock(); 689 /* EXTRA DELAY? */ 690 691 /* 692 * For the TI16754 chips, set prescaler to 1 (4 is often the 693 * default after-reset value) as otherwise it's impossible to 694 * get highest baudrates. 695 */ 696 if (COM_TI16754(flags)) { 697 u_char cfcr, efr; 698 699 cfcr = sio_getreg(com, com_cfcr); 700 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 701 efr = sio_getreg(com, com_efr); 702 /* Unlock extended features to turn off prescaler. */ 703 sio_setreg(com, com_efr, efr | EFR_EFE); 704 /* Disable EFR. */ 705 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0); 706 /* Turn off prescaler. */ 707 sio_setreg(com, com_mcr, 708 sio_getreg(com, com_mcr) & ~MCR_PRESCALE); 709 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE); 710 sio_setreg(com, com_efr, efr); 711 sio_setreg(com, com_cfcr, cfcr); 712 } 713 714 /* 715 * Initialize the speed and the word size and wait long enough to 716 * drain the maximum of 16 bytes of junk in device output queues. 717 * The speed is undefined after a master reset and must be set 718 * before relying on anything related to output. There may be 719 * junk after a (very fast) soft reboot and (apparently) after 720 * master reset. 721 * XXX what about the UART bug avoided by waiting in comparam()? 722 * We don't want to to wait long enough to drain at 2 bps. 723 */ 724 if (iobase == siocniobase) 725 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10)); 726 else { 727 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS); 728 divisor = siodivisor(rclk, SIO_TEST_SPEED); 729 sio_setreg(com, com_dlbl, divisor & 0xff); 730 sio_setreg(com, com_dlbh, divisor >> 8); 731 sio_setreg(com, com_cfcr, CFCR_8BITS); 732 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10)); 733 } 734 735 /* 736 * Enable the interrupt gate and disable device interupts. This 737 * should leave the device driving the interrupt line low and 738 * guarantee an edge trigger if an interrupt can be generated. 739 */ 740 /* EXTRA DELAY? */ 741 sio_setreg(com, com_mcr, mcr_image); 742 sio_setreg(com, com_ier, 0); 743 DELAY(1000); /* XXX */ 744 irqmap[0] = isa_irq_pending(); 745 746 /* 747 * Attempt to set loopback mode so that we can send a null byte 748 * without annoying any external device. 749 */ 750 /* EXTRA DELAY? */ 751 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK); 752 753 /* 754 * Attempt to generate an output interrupt. On 8250's, setting 755 * IER_ETXRDY generates an interrupt independent of the current 756 * setting and independent of whether the THR is empty. On 16450's, 757 * setting IER_ETXRDY generates an interrupt independent of the 758 * current setting. On 16550A's, setting IER_ETXRDY only 759 * generates an interrupt when IER_ETXRDY is not already set. 760 */ 761 sio_setreg(com, com_ier, IER_ETXRDY); 762 763 /* 764 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate 765 * an interrupt. They'd better generate one for actually doing 766 * output. Loopback may be broken on the same incompatibles but 767 * it's unlikely to do more than allow the null byte out. 768 */ 769 sio_setreg(com, com_data, 0); 770 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10)); 771 772 /* 773 * Turn off loopback mode so that the interrupt gate works again 774 * (MCR_IENABLE was hidden). This should leave the device driving 775 * an interrupt line high. It doesn't matter if the interrupt 776 * line oscillates while we are not looking at it, since interrupts 777 * are disabled. 778 */ 779 /* EXTRA DELAY? */ 780 sio_setreg(com, com_mcr, mcr_image); 781 782 /* 783 * Some pcmcia cards have the "TXRDY bug", so we check everyone 784 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... ) 785 */ 786 if (COM_NOPROBE(flags)) { 787 /* Reading IIR register twice */ 788 for (fn = 0; fn < 2; fn ++) { 789 DELAY(10000); 790 failures[6] = sio_getreg(com, com_iir); 791 } 792 /* Check IIR_TXRDY clear ? */ 793 result = 0; 794 if (failures[6] & IIR_TXRDY) { 795 /* Nop, Double check with clearing IER */ 796 sio_setreg(com, com_ier, 0); 797 if (sio_getreg(com, com_iir) & IIR_NOPEND) { 798 /* Ok. we're familia this gang */ 799 SET_FLAG(dev, COM_C_IIR_TXRDYBUG); 800 } else { 801 /* Unknown, Just omit this chip.. XXX */ 802 result = ENXIO; 803 sio_setreg(com, com_mcr, 0); 804 } 805 } else { 806 /* OK. this is well-known guys */ 807 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG); 808 } 809 sio_setreg(com, com_ier, 0); 810 sio_setreg(com, com_cfcr, CFCR_8BITS); 811 com_unlock(); 812 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 813 return (iobase == siocniobase ? 0 : result); 814 } 815 816 /* 817 * Check that 818 * o the CFCR, IER and MCR in UART hold the values written to them 819 * (the values happen to be all distinct - this is good for 820 * avoiding false positive tests from bus echoes). 821 * o an output interrupt is generated and its vector is correct. 822 * o the interrupt goes away when the IIR in the UART is read. 823 */ 824 /* EXTRA DELAY? */ 825 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS; 826 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY; 827 failures[2] = sio_getreg(com, com_mcr) - mcr_image; 828 DELAY(10000); /* Some internal modems need this time */ 829 irqmap[1] = isa_irq_pending(); 830 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY; 831 DELAY(1000); /* XXX */ 832 irqmap[2] = isa_irq_pending(); 833 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 834 835 /* 836 * Turn off all device interrupts and check that they go off properly. 837 * Leave MCR_IENABLE alone. For ports without a master port, it gates 838 * the OUT2 output of the UART to 839 * the ICU input. Closing the gate would give a floating ICU input 840 * (unless there is another device driving it) and spurious interrupts. 841 * (On the system that this was first tested on, the input floats high 842 * and gives a (masked) interrupt as soon as the gate is closed.) 843 */ 844 sio_setreg(com, com_ier, 0); 845 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */ 846 failures[7] = sio_getreg(com, com_ier); 847 DELAY(1000); /* XXX */ 848 irqmap[3] = isa_irq_pending(); 849 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND; 850 851 com_unlock(); 852 853 irqs = irqmap[1] & ~irqmap[0]; 854 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 && 855 ((1 << xirq) & irqs) == 0) 856 printf( 857 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n", 858 device_get_unit(dev), xirq, irqs); 859 if (bootverbose) 860 printf("sio%d: irq maps: %#x %#x %#x %#x\n", 861 device_get_unit(dev), 862 irqmap[0], irqmap[1], irqmap[2], irqmap[3]); 863 864 result = 0; 865 for (fn = 0; fn < sizeof failures; ++fn) 866 if (failures[fn]) { 867 sio_setreg(com, com_mcr, 0); 868 result = ENXIO; 869 if (bootverbose) { 870 printf("sio%d: probe failed test(s):", 871 device_get_unit(dev)); 872 for (fn = 0; fn < sizeof failures; ++fn) 873 if (failures[fn]) 874 printf(" %d", fn); 875 printf("\n"); 876 } 877 break; 878 } 879 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 880 return (iobase == siocniobase ? 0 : result); 881 } 882 883 #ifdef COM_ESP 884 static int 885 espattach(com, esp_port) 886 struct com_s *com; 887 Port_t esp_port; 888 { 889 u_char dips; 890 u_char val; 891 892 /* 893 * Check the ESP-specific I/O port to see if we're an ESP 894 * card. If not, return failure immediately. 895 */ 896 if ((inb(esp_port) & 0xf3) == 0) { 897 printf(" port 0x%x is not an ESP board?\n", esp_port); 898 return (0); 899 } 900 901 /* 902 * We've got something that claims to be a Hayes ESP card. 903 * Let's hope so. 904 */ 905 906 /* Get the dip-switch configuration */ 907 outb(esp_port + ESP_CMD1, ESP_GETDIPS); 908 dips = inb(esp_port + ESP_STATUS1); 909 910 /* 911 * Bits 0,1 of dips say which COM port we are. 912 */ 913 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03]) 914 printf(" : ESP"); 915 else { 916 printf(" esp_port has com %d\n", dips & 0x03); 917 return (0); 918 } 919 920 /* 921 * Check for ESP version 2.0 or later: bits 4,5,6 = 010. 922 */ 923 outb(esp_port + ESP_CMD1, ESP_GETTEST); 924 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */ 925 val = inb(esp_port + ESP_STATUS2); 926 if ((val & 0x70) < 0x20) { 927 printf("-old (%o)", val & 0x70); 928 return (0); 929 } 930 931 /* 932 * Check for ability to emulate 16550: bit 7 == 1 933 */ 934 if ((dips & 0x80) == 0) { 935 printf(" slave"); 936 return (0); 937 } 938 939 /* 940 * Okay, we seem to be a Hayes ESP card. Whee. 941 */ 942 com->esp = TRUE; 943 com->esp_port = esp_port; 944 return (1); 945 } 946 #endif /* COM_ESP */ 947 948 static int 949 sio_isa_attach(dev) 950 device_t dev; 951 { 952 return (sioattach(dev, 0, 0UL)); 953 } 954 955 int 956 sioattach(dev, xrid, rclk) 957 device_t dev; 958 int xrid; 959 u_long rclk; 960 { 961 struct com_s *com; 962 #ifdef COM_ESP 963 Port_t *espp; 964 #endif 965 Port_t iobase; 966 int minorbase; 967 int unit; 968 u_int flags; 969 int rid; 970 struct resource *port; 971 int ret; 972 973 rid = xrid; 974 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 975 0, ~0, IO_COMSIZE, RF_ACTIVE); 976 if (!port) 977 return (ENXIO); 978 979 iobase = rman_get_start(port); 980 unit = device_get_unit(dev); 981 com = device_get_softc(dev); 982 flags = device_get_flags(dev); 983 984 if (unit >= sio_numunits) 985 sio_numunits = unit + 1; 986 /* 987 * sioprobe() has initialized the device registers as follows: 988 * o cfcr = CFCR_8BITS. 989 * It is most important that CFCR_DLAB is off, so that the 990 * data port is not hidden when we enable interrupts. 991 * o ier = 0. 992 * Interrupts are only enabled when the line is open. 993 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible 994 * interrupt control register or the config specifies no irq. 995 * Keeping MCR_DTR and MCR_RTS off might stop the external 996 * device from sending before we are ready. 997 */ 998 bzero(com, sizeof *com); 999 com->unit = unit; 1000 com->ioportres = port; 1001 com->bst = rman_get_bustag(port); 1002 com->bsh = rman_get_bushandle(port); 1003 com->cfcr_image = CFCR_8BITS; 1004 com->dtr_wait = 3 * hz; 1005 com->loses_outints = COM_LOSESOUTINTS(flags) != 0; 1006 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0; 1007 com->tx_fifo_size = 1; 1008 com->obufs[0].l_head = com->obuf1; 1009 com->obufs[1].l_head = com->obuf2; 1010 1011 com->data_port = iobase + com_data; 1012 com->int_id_port = iobase + com_iir; 1013 com->modem_ctl_port = iobase + com_mcr; 1014 com->mcr_image = inb(com->modem_ctl_port); 1015 com->line_status_port = iobase + com_lsr; 1016 com->modem_status_port = iobase + com_msr; 1017 com->intr_ctl_port = iobase + com_ier; 1018 1019 if (rclk == 0) 1020 rclk = DEFAULT_RCLK; 1021 com->rclk = rclk; 1022 1023 /* 1024 * We don't use all the flags from <sys/ttydefaults.h> since they 1025 * are only relevant for logins. It's important to have echo off 1026 * initially so that the line doesn't start blathering before the 1027 * echo flag can be turned off. 1028 */ 1029 com->it_in.c_iflag = 0; 1030 com->it_in.c_oflag = 0; 1031 com->it_in.c_cflag = TTYDEF_CFLAG; 1032 com->it_in.c_lflag = 0; 1033 if (unit == comconsole) { 1034 com->it_in.c_iflag = TTYDEF_IFLAG; 1035 com->it_in.c_oflag = TTYDEF_OFLAG; 1036 com->it_in.c_cflag = TTYDEF_CFLAG | CLOCAL; 1037 com->it_in.c_lflag = TTYDEF_LFLAG; 1038 com->lt_out.c_cflag = com->lt_in.c_cflag = CLOCAL; 1039 com->lt_out.c_ispeed = com->lt_out.c_ospeed = 1040 com->lt_in.c_ispeed = com->lt_in.c_ospeed = 1041 com->it_in.c_ispeed = com->it_in.c_ospeed = comdefaultrate; 1042 } else 1043 com->it_in.c_ispeed = com->it_in.c_ospeed = TTYDEF_SPEED; 1044 if (siosetwater(com, com->it_in.c_ispeed) != 0) { 1045 com_unlock(); 1046 /* 1047 * Leave i/o resources allocated if this is a `cn'-level 1048 * console, so that other devices can't snarf them. 1049 */ 1050 if (iobase != siocniobase) 1051 bus_release_resource(dev, SYS_RES_IOPORT, rid, port); 1052 return (ENOMEM); 1053 } 1054 com_unlock(); 1055 termioschars(&com->it_in); 1056 com->it_out = com->it_in; 1057 1058 /* attempt to determine UART type */ 1059 printf("sio%d: type", unit); 1060 1061 1062 #ifdef COM_MULTIPORT 1063 if (!COM_ISMULTIPORT(flags) && !COM_IIR_TXRDYBUG(flags)) 1064 #else 1065 if (!COM_IIR_TXRDYBUG(flags)) 1066 #endif 1067 { 1068 u_char scr; 1069 u_char scr1; 1070 u_char scr2; 1071 1072 scr = sio_getreg(com, com_scr); 1073 sio_setreg(com, com_scr, 0xa5); 1074 scr1 = sio_getreg(com, com_scr); 1075 sio_setreg(com, com_scr, 0x5a); 1076 scr2 = sio_getreg(com, com_scr); 1077 sio_setreg(com, com_scr, scr); 1078 if (scr1 != 0xa5 || scr2 != 0x5a) { 1079 printf(" 8250"); 1080 goto determined_type; 1081 } 1082 } 1083 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH); 1084 DELAY(100); 1085 com->st16650a = 0; 1086 switch (inb(com->int_id_port) & IIR_FIFO_MASK) { 1087 case FIFO_RX_LOW: 1088 printf(" 16450"); 1089 break; 1090 case FIFO_RX_MEDL: 1091 printf(" 16450?"); 1092 break; 1093 case FIFO_RX_MEDH: 1094 printf(" 16550?"); 1095 break; 1096 case FIFO_RX_HIGH: 1097 if (COM_NOFIFO(flags)) { 1098 printf(" 16550A fifo disabled"); 1099 } else { 1100 com->hasfifo = TRUE; 1101 if (COM_ST16650A(flags)) { 1102 com->st16650a = 1; 1103 com->tx_fifo_size = 32; 1104 printf(" ST16650A"); 1105 } else if (COM_TI16754(flags)) { 1106 com->tx_fifo_size = 64; 1107 printf(" TI16754"); 1108 } else { 1109 com->tx_fifo_size = COM_FIFOSIZE(flags); 1110 printf(" 16550A"); 1111 } 1112 } 1113 #ifdef COM_ESP 1114 for (espp = likely_esp_ports; *espp != 0; espp++) 1115 if (espattach(com, *espp)) { 1116 com->tx_fifo_size = 1024; 1117 break; 1118 } 1119 #endif 1120 if (!com->st16650a && !COM_TI16754(flags)) { 1121 if (!com->tx_fifo_size) 1122 com->tx_fifo_size = 16; 1123 else 1124 printf(" lookalike with %d bytes FIFO", 1125 com->tx_fifo_size); 1126 } 1127 1128 break; 1129 } 1130 1131 #ifdef COM_ESP 1132 if (com->esp) { 1133 /* 1134 * Set 16550 compatibility mode. 1135 * We don't use the ESP_MODE_SCALE bit to increase the 1136 * fifo trigger levels because we can't handle large 1137 * bursts of input. 1138 * XXX flow control should be set in comparam(), not here. 1139 */ 1140 outb(com->esp_port + ESP_CMD1, ESP_SETMODE); 1141 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO); 1142 1143 /* Set RTS/CTS flow control. */ 1144 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE); 1145 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS); 1146 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS); 1147 1148 /* Set flow-control levels. */ 1149 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW); 1150 outb(com->esp_port + ESP_CMD2, HIBYTE(768)); 1151 outb(com->esp_port + ESP_CMD2, LOBYTE(768)); 1152 outb(com->esp_port + ESP_CMD2, HIBYTE(512)); 1153 outb(com->esp_port + ESP_CMD2, LOBYTE(512)); 1154 } 1155 #endif /* COM_ESP */ 1156 sio_setreg(com, com_fifo, 0); 1157 determined_type: ; 1158 1159 #ifdef COM_MULTIPORT 1160 if (COM_ISMULTIPORT(flags)) { 1161 device_t masterdev; 1162 1163 com->multiport = TRUE; 1164 printf(" (multiport"); 1165 if (unit == COM_MPMASTER(flags)) 1166 printf(" master"); 1167 printf(")"); 1168 masterdev = devclass_get_device(sio_devclass, 1169 COM_MPMASTER(flags)); 1170 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev, 1171 SYS_RES_IRQ, 0, NULL, NULL) != 0); 1172 } 1173 #endif /* COM_MULTIPORT */ 1174 if (unit == comconsole) 1175 printf(", console"); 1176 if (COM_IIR_TXRDYBUG(flags)) 1177 printf(" with a bogus IIR_TXRDY register"); 1178 printf("\n"); 1179 1180 if (!sio_registered) { 1181 register_swi(SWI_TTY, siopoll, NULL ,"swi_siopoll"); 1182 sio_registered = TRUE; 1183 } 1184 minorbase = UNIT_TO_MINOR(unit); 1185 cdevsw_add(&sio_cdevsw, UNIT_TO_MINOR(-1), minorbase); 1186 make_dev(&sio_cdevsw, minorbase, 1187 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit); 1188 make_dev(&sio_cdevsw, minorbase | CONTROL_INIT_STATE, 1189 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit); 1190 make_dev(&sio_cdevsw, minorbase | CONTROL_LOCK_STATE, 1191 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit); 1192 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK, 1193 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit); 1194 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_INIT_STATE, 1195 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit); 1196 make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE, 1197 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit); 1198 com->flags = flags; 1199 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 1200 pps_init(&com->pps); 1201 1202 rid = 0; 1203 com->irqres = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0ul, ~0ul, 1, 1204 RF_ACTIVE); 1205 if (com->irqres) { 1206 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres, 1207 INTR_TYPE_TTY | INTR_FAST, 1208 siointr, com, &com->cookie); 1209 if (ret) { 1210 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, 1211 com->irqres, INTR_TYPE_TTY, 1212 siointr, com, &com->cookie); 1213 if (ret == 0) 1214 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n"); 1215 } 1216 if (ret) 1217 device_printf(dev, "could not activate interrupt\n"); 1218 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1219 defined(ALT_BREAK_TO_DEBUGGER)) 1220 /* 1221 * Enable interrupts for early break-to-debugger support 1222 * on the console. 1223 */ 1224 if (ret == 0 && unit == comconsole) 1225 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS | 1226 IER_EMSC); 1227 #endif 1228 } 1229 1230 return (0); 1231 } 1232 1233 static int 1234 sioopen(dev_t dev, int flag, int mode, struct thread *td) 1235 { 1236 struct com_s *com; 1237 int error; 1238 int mynor; 1239 int s; 1240 struct tty *tp; 1241 int unit; 1242 1243 mynor = minor(dev); 1244 unit = MINOR_TO_UNIT(mynor); 1245 com = com_addr(unit); 1246 if (com == NULL) 1247 return (ENXIO); 1248 if (com->gone) 1249 return (ENXIO); 1250 if (mynor & CONTROL_MASK) 1251 return (0); 1252 tp = dev->si_tty = com->tp = ttymalloc(com->tp); 1253 s = spltty(); 1254 /* 1255 * We jump to this label after all non-interrupted sleeps to pick 1256 * up any changes of the device state. 1257 */ 1258 open_top: 1259 while (com->state & CS_DTR_OFF) { 1260 error = tsleep(&com->dtr_wait, PCATCH, "siodtr", 0); 1261 if (com_addr(unit) == NULL) 1262 return (ENXIO); 1263 if (error != 0 || com->gone) 1264 goto out; 1265 } 1266 if (tp->t_state & TS_ISOPEN) { 1267 /* 1268 * The device is open, so everything has been initialized. 1269 * Handle conflicts. 1270 */ 1271 if (mynor & CALLOUT_MASK) { 1272 if (!com->active_out) { 1273 error = EBUSY; 1274 goto out; 1275 } 1276 } else { 1277 if (com->active_out) { 1278 if (flag & O_NONBLOCK) { 1279 error = EBUSY; 1280 goto out; 1281 } 1282 error = tsleep(&com->active_out, 1283 PCATCH, "siobi", 0); 1284 if (com_addr(unit) == NULL) 1285 return (ENXIO); 1286 if (error != 0 || com->gone) 1287 goto out; 1288 goto open_top; 1289 } 1290 } 1291 if (tp->t_state & TS_XCLUDE && suser(td)) { 1292 error = EBUSY; 1293 goto out; 1294 } 1295 } else { 1296 /* 1297 * The device isn't open, so there are no conflicts. 1298 * Initialize it. Initialization is done twice in many 1299 * cases: to preempt sleeping callin opens if we are 1300 * callout, and to complete a callin open after DCD rises. 1301 */ 1302 tp->t_oproc = comstart; 1303 tp->t_param = comparam; 1304 tp->t_stop = comstop; 1305 tp->t_dev = dev; 1306 tp->t_termios = mynor & CALLOUT_MASK 1307 ? com->it_out : com->it_in; 1308 (void)commctl(com, TIOCM_DTR | TIOCM_RTS, DMSET); 1309 com->poll = com->no_irq; 1310 com->poll_output = com->loses_outints; 1311 ++com->wopeners; 1312 error = comparam(tp, &tp->t_termios); 1313 --com->wopeners; 1314 if (error != 0) 1315 goto out; 1316 /* 1317 * XXX we should goto open_top if comparam() slept. 1318 */ 1319 if (com->hasfifo) { 1320 /* 1321 * (Re)enable and drain fifos. 1322 * 1323 * Certain SMC chips cause problems if the fifos 1324 * are enabled while input is ready. Turn off the 1325 * fifo if necessary to clear the input. We test 1326 * the input ready bit after enabling the fifos 1327 * since we've already enabled them in comparam() 1328 * and to handle races between enabling and fresh 1329 * input. 1330 */ 1331 while (TRUE) { 1332 sio_setreg(com, com_fifo, 1333 FIFO_RCV_RST | FIFO_XMT_RST 1334 | com->fifo_image); 1335 /* 1336 * XXX the delays are for superstitious 1337 * historical reasons. It must be less than 1338 * the character time at the maximum 1339 * supported speed (87 usec at 115200 bps 1340 * 8N1). Otherwise we might loop endlessly 1341 * if data is streaming in. We used to use 1342 * delays of 100. That usually worked 1343 * because DELAY(100) used to usually delay 1344 * for about 85 usec instead of 100. 1345 */ 1346 DELAY(50); 1347 if (!(inb(com->line_status_port) & LSR_RXRDY)) 1348 break; 1349 sio_setreg(com, com_fifo, 0); 1350 DELAY(50); 1351 (void) inb(com->data_port); 1352 } 1353 } 1354 1355 com_lock(); 1356 (void) inb(com->line_status_port); 1357 (void) inb(com->data_port); 1358 com->prev_modem_status = com->last_modem_status 1359 = inb(com->modem_status_port); 1360 if (COM_IIR_TXRDYBUG(com->flags)) { 1361 outb(com->intr_ctl_port, IER_ERXRDY | IER_ERLS 1362 | IER_EMSC); 1363 } else { 1364 outb(com->intr_ctl_port, IER_ERXRDY | IER_ETXRDY 1365 | IER_ERLS | IER_EMSC); 1366 } 1367 com_unlock(); 1368 /* 1369 * Handle initial DCD. Callout devices get a fake initial 1370 * DCD (trapdoor DCD). If we are callout, then any sleeping 1371 * callin opens get woken up and resume sleeping on "siobi" 1372 * instead of "siodcd". 1373 */ 1374 /* 1375 * XXX `mynor & CALLOUT_MASK' should be 1376 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where 1377 * TRAPDOOR_CARRIER is the default initial state for callout 1378 * devices and SOFT_CARRIER is like CLOCAL except it hides 1379 * the true carrier. 1380 */ 1381 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK) 1382 (*linesw[tp->t_line].l_modem)(tp, 1); 1383 } 1384 /* 1385 * Wait for DCD if necessary. 1386 */ 1387 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK) 1388 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) { 1389 ++com->wopeners; 1390 error = tsleep(TSA_CARR_ON(tp), PCATCH, "siodcd", 0); 1391 if (com_addr(unit) == NULL) 1392 return (ENXIO); 1393 --com->wopeners; 1394 if (error != 0 || com->gone) 1395 goto out; 1396 goto open_top; 1397 } 1398 error = (*linesw[tp->t_line].l_open)(dev, tp); 1399 disc_optim(tp, &tp->t_termios, com); 1400 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK) 1401 com->active_out = TRUE; 1402 siosettimeout(); 1403 out: 1404 splx(s); 1405 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0) 1406 comhardclose(com); 1407 return (error); 1408 } 1409 1410 static int 1411 sioclose(dev_t dev, int flag, int mode, struct thread *td) 1412 { 1413 struct com_s *com; 1414 int mynor; 1415 int s; 1416 struct tty *tp; 1417 1418 mynor = minor(dev); 1419 if (mynor & CONTROL_MASK) 1420 return (0); 1421 com = com_addr(MINOR_TO_UNIT(mynor)); 1422 if (com == NULL) 1423 return (ENODEV); 1424 tp = com->tp; 1425 s = spltty(); 1426 (*linesw[tp->t_line].l_close)(tp, flag); 1427 disc_optim(tp, &tp->t_termios, com); 1428 comstop(tp, FREAD | FWRITE); 1429 comhardclose(com); 1430 ttyclose(tp); 1431 siosettimeout(); 1432 splx(s); 1433 if (com->gone) { 1434 printf("sio%d: gone\n", com->unit); 1435 s = spltty(); 1436 if (com->ibuf != NULL) 1437 free(com->ibuf, M_DEVBUF); 1438 bzero(tp, sizeof *tp); 1439 splx(s); 1440 } 1441 return (0); 1442 } 1443 1444 static void 1445 comhardclose(com) 1446 struct com_s *com; 1447 { 1448 int s; 1449 struct tty *tp; 1450 int unit; 1451 1452 unit = com->unit; 1453 s = spltty(); 1454 com->poll = FALSE; 1455 com->poll_output = FALSE; 1456 com->do_timestamp = FALSE; 1457 com->do_dcd_timestamp = FALSE; 1458 com->pps.ppsparam.mode = 0; 1459 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 1460 tp = com->tp; 1461 1462 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \ 1463 defined(ALT_BREAK_TO_DEBUGGER)) 1464 /* 1465 * Leave interrupts enabled and don't clear DTR if this is the 1466 * console. This allows us to detect break-to-debugger events 1467 * while the console device is closed. 1468 */ 1469 if (com->unit != comconsole) 1470 #endif 1471 { 1472 sio_setreg(com, com_ier, 0); 1473 if (tp->t_cflag & HUPCL 1474 /* 1475 * XXX we will miss any carrier drop between here and the 1476 * next open. Perhaps we should watch DCD even when the 1477 * port is closed; it is not sufficient to check it at 1478 * the next open because it might go up and down while 1479 * we're not watching. 1480 */ 1481 || (!com->active_out 1482 && !(com->prev_modem_status & MSR_DCD) 1483 && !(com->it_in.c_cflag & CLOCAL)) 1484 || !(tp->t_state & TS_ISOPEN)) { 1485 (void)commctl(com, TIOCM_DTR, DMBIC); 1486 if (com->dtr_wait != 0 && !(com->state & CS_DTR_OFF)) { 1487 timeout(siodtrwakeup, com, com->dtr_wait); 1488 com->state |= CS_DTR_OFF; 1489 } 1490 } 1491 } 1492 if (com->hasfifo) { 1493 /* 1494 * Disable fifos so that they are off after controlled 1495 * reboots. Some BIOSes fail to detect 16550s when the 1496 * fifos are enabled. 1497 */ 1498 sio_setreg(com, com_fifo, 0); 1499 } 1500 com->active_out = FALSE; 1501 wakeup(&com->active_out); 1502 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */ 1503 splx(s); 1504 } 1505 1506 static int 1507 sioread(dev, uio, flag) 1508 dev_t dev; 1509 struct uio *uio; 1510 int flag; 1511 { 1512 int mynor; 1513 struct com_s *com; 1514 1515 mynor = minor(dev); 1516 if (mynor & CONTROL_MASK) 1517 return (ENODEV); 1518 com = com_addr(MINOR_TO_UNIT(mynor)); 1519 if (com == NULL || com->gone) 1520 return (ENODEV); 1521 return ((*linesw[com->tp->t_line].l_read)(com->tp, uio, flag)); 1522 } 1523 1524 static int 1525 siowrite(dev, uio, flag) 1526 dev_t dev; 1527 struct uio *uio; 1528 int flag; 1529 { 1530 int mynor; 1531 struct com_s *com; 1532 int unit; 1533 1534 mynor = minor(dev); 1535 if (mynor & CONTROL_MASK) 1536 return (ENODEV); 1537 1538 unit = MINOR_TO_UNIT(mynor); 1539 com = com_addr(unit); 1540 if (com == NULL || com->gone) 1541 return (ENODEV); 1542 /* 1543 * (XXX) We disallow virtual consoles if the physical console is 1544 * a serial port. This is in case there is a display attached that 1545 * is not the console. In that situation we don't need/want the X 1546 * server taking over the console. 1547 */ 1548 if (constty != NULL && unit == comconsole) 1549 constty = NULL; 1550 return ((*linesw[com->tp->t_line].l_write)(com->tp, uio, flag)); 1551 } 1552 1553 static void 1554 siobusycheck(chan) 1555 void *chan; 1556 { 1557 struct com_s *com; 1558 int s; 1559 1560 com = (struct com_s *)chan; 1561 1562 /* 1563 * Clear TS_BUSY if low-level output is complete. 1564 * spl locking is sufficient because siointr1() does not set CS_BUSY. 1565 * If siointr1() clears CS_BUSY after we look at it, then we'll get 1566 * called again. Reading the line status port outside of siointr1() 1567 * is safe because CS_BUSY is clear so there are no output interrupts 1568 * to lose. 1569 */ 1570 s = spltty(); 1571 if (com->state & CS_BUSY) 1572 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */ 1573 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY)) 1574 == (LSR_TSRE | LSR_TXRDY)) { 1575 com->tp->t_state &= ~TS_BUSY; 1576 ttwwakeup(com->tp); 1577 com->extra_state &= ~CSE_BUSYCHECK; 1578 } else 1579 timeout(siobusycheck, com, hz / 100); 1580 splx(s); 1581 } 1582 1583 static u_int 1584 siodivisor(rclk, speed) 1585 u_long rclk; 1586 speed_t speed; 1587 { 1588 long actual_speed; 1589 u_int divisor; 1590 int error; 1591 1592 if (speed == 0 || speed > (ULONG_MAX - 1) / 8) 1593 return (0); 1594 divisor = (rclk / (8UL * speed) + 1) / 2; 1595 if (divisor == 0 || divisor >= 65536) 1596 return (0); 1597 actual_speed = rclk / (16UL * divisor); 1598 1599 /* 10 times error in percent: */ 1600 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2; 1601 1602 /* 3.0% maximum error tolerance: */ 1603 if (error < -30 || error > 30) 1604 return (0); 1605 1606 return (divisor); 1607 } 1608 1609 static void 1610 siodtrwakeup(chan) 1611 void *chan; 1612 { 1613 struct com_s *com; 1614 1615 com = (struct com_s *)chan; 1616 com->state &= ~CS_DTR_OFF; 1617 wakeup(&com->dtr_wait); 1618 } 1619 1620 static void 1621 sioinput(com) 1622 struct com_s *com; 1623 { 1624 u_char *buf; 1625 int incc; 1626 u_char line_status; 1627 int recv_data; 1628 struct tty *tp; 1629 1630 buf = com->ibuf; 1631 tp = com->tp; 1632 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) { 1633 com_events -= (com->iptr - com->ibuf); 1634 com->iptr = com->ibuf; 1635 return; 1636 } 1637 if (tp->t_state & TS_CAN_BYPASS_L_RINT) { 1638 /* 1639 * Avoid the grotesquely inefficient lineswitch routine 1640 * (ttyinput) in "raw" mode. It usually takes about 450 1641 * instructions (that's without canonical processing or echo!). 1642 * slinput is reasonably fast (usually 40 instructions plus 1643 * call overhead). 1644 */ 1645 do { 1646 com_unlock(); 1647 incc = com->iptr - buf; 1648 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat 1649 && (com->state & CS_RTS_IFLOW 1650 || tp->t_iflag & IXOFF) 1651 && !(tp->t_state & TS_TBLOCK)) 1652 ttyblock(tp); 1653 com->delta_error_counts[CE_TTY_BUF_OVERFLOW] 1654 += b_to_q((char *)buf, incc, &tp->t_rawq); 1655 buf += incc; 1656 tk_nin += incc; 1657 tk_rawcc += incc; 1658 tp->t_rawcc += incc; 1659 ttwakeup(tp); 1660 if (tp->t_state & TS_TTSTOP 1661 && (tp->t_iflag & IXANY 1662 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) { 1663 tp->t_state &= ~TS_TTSTOP; 1664 tp->t_lflag &= ~FLUSHO; 1665 comstart(tp); 1666 } 1667 com_lock(); 1668 } while (buf < com->iptr); 1669 } else { 1670 do { 1671 com_unlock(); 1672 line_status = buf[com->ierroff]; 1673 recv_data = *buf++; 1674 if (line_status 1675 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) { 1676 if (line_status & LSR_BI) 1677 recv_data |= TTY_BI; 1678 if (line_status & LSR_FE) 1679 recv_data |= TTY_FE; 1680 if (line_status & LSR_OE) 1681 recv_data |= TTY_OE; 1682 if (line_status & LSR_PE) 1683 recv_data |= TTY_PE; 1684 } 1685 (*linesw[tp->t_line].l_rint)(recv_data, tp); 1686 com_lock(); 1687 } while (buf < com->iptr); 1688 } 1689 com_events -= (com->iptr - com->ibuf); 1690 com->iptr = com->ibuf; 1691 1692 /* 1693 * There is now room for another low-level buffer full of input, 1694 * so enable RTS if it is now disabled and there is room in the 1695 * high-level buffer. 1696 */ 1697 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) && 1698 !(tp->t_state & TS_TBLOCK)) 1699 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 1700 } 1701 1702 void 1703 siointr(arg) 1704 void *arg; 1705 { 1706 #ifndef COM_MULTIPORT 1707 com_lock(); 1708 siointr1((struct com_s *) arg); 1709 com_unlock(); 1710 #else /* COM_MULTIPORT */ 1711 bool_t possibly_more_intrs; 1712 int unit; 1713 struct com_s *com; 1714 1715 /* 1716 * Loop until there is no activity on any port. This is necessary 1717 * to get an interrupt edge more than to avoid another interrupt. 1718 * If the IRQ signal is just an OR of the IRQ signals from several 1719 * devices, then the edge from one may be lost because another is 1720 * on. 1721 */ 1722 com_lock(); 1723 do { 1724 possibly_more_intrs = FALSE; 1725 for (unit = 0; unit < sio_numunits; ++unit) { 1726 com = com_addr(unit); 1727 /* 1728 * XXX com_lock(); 1729 * would it work here, or be counter-productive? 1730 */ 1731 if (com != NULL 1732 && !com->gone 1733 && (inb(com->int_id_port) & IIR_IMASK) 1734 != IIR_NOPEND) { 1735 siointr1(com); 1736 possibly_more_intrs = TRUE; 1737 } 1738 /* XXX com_unlock(); */ 1739 } 1740 } while (possibly_more_intrs); 1741 com_unlock(); 1742 #endif /* COM_MULTIPORT */ 1743 } 1744 1745 static void 1746 siointr1(com) 1747 struct com_s *com; 1748 { 1749 u_char line_status; 1750 u_char modem_status; 1751 u_char *ioptr; 1752 u_char recv_data; 1753 u_char int_ctl; 1754 u_char int_ctl_new; 1755 u_int count; 1756 1757 int_ctl = inb(com->intr_ctl_port); 1758 int_ctl_new = int_ctl; 1759 1760 while (!com->gone) { 1761 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) { 1762 modem_status = inb(com->modem_status_port); 1763 if ((modem_status ^ com->last_modem_status) & MSR_DCD) { 1764 count = cputimer_count(); 1765 pps_event(&com->pps, count, 1766 (modem_status & MSR_DCD) ? 1767 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR); 1768 } 1769 } 1770 line_status = inb(com->line_status_port); 1771 1772 /* input event? (check first to help avoid overruns) */ 1773 while (line_status & LSR_RCV_MASK) { 1774 /* break/unnattached error bits or real input? */ 1775 if (!(line_status & LSR_RXRDY)) 1776 recv_data = 0; 1777 else 1778 recv_data = inb(com->data_port); 1779 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER) 1780 /* 1781 * Solaris implements a new BREAK which is initiated 1782 * by a character sequence CR ~ ^b which is similar 1783 * to a familiar pattern used on Sun servers by the 1784 * Remote Console. 1785 */ 1786 #define KEY_CRTLB 2 /* ^B */ 1787 #define KEY_CR 13 /* CR '\r' */ 1788 #define KEY_TILDE 126 /* ~ */ 1789 1790 if (com->unit == comconsole) { 1791 static int brk_state1 = 0, brk_state2 = 0; 1792 if (recv_data == KEY_CR) { 1793 brk_state1 = recv_data; 1794 brk_state2 = 0; 1795 } else if (brk_state1 == KEY_CR && (recv_data == KEY_TILDE || recv_data == KEY_CRTLB)) { 1796 if (recv_data == KEY_TILDE) 1797 brk_state2 = recv_data; 1798 else if (brk_state2 == KEY_TILDE && recv_data == KEY_CRTLB) { 1799 breakpoint(); 1800 brk_state1 = brk_state2 = 0; 1801 goto cont; 1802 } else 1803 brk_state2 = 0; 1804 } else 1805 brk_state1 = 0; 1806 } 1807 #endif 1808 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) { 1809 /* 1810 * Don't store BI if IGNBRK or FE/PE if IGNPAR. 1811 * Otherwise, push the work to a higher level 1812 * (to handle PARMRK) if we're bypassing. 1813 * Otherwise, convert BI/FE and PE+INPCK to 0. 1814 * 1815 * This makes bypassing work right in the 1816 * usual "raw" case (IGNBRK set, and IGNPAR 1817 * and INPCK clear). 1818 * 1819 * Note: BI together with FE/PE means just BI. 1820 */ 1821 if (line_status & LSR_BI) { 1822 #if defined(DDB) && defined(BREAK_TO_DEBUGGER) 1823 if (com->unit == comconsole) { 1824 breakpoint(); 1825 goto cont; 1826 } 1827 #endif 1828 if (com->tp == NULL 1829 || com->tp->t_iflag & IGNBRK) 1830 goto cont; 1831 } else { 1832 if (com->tp == NULL 1833 || com->tp->t_iflag & IGNPAR) 1834 goto cont; 1835 } 1836 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT 1837 && (line_status & (LSR_BI | LSR_FE) 1838 || com->tp->t_iflag & INPCK)) 1839 recv_data = 0; 1840 } 1841 ++com->bytes_in; 1842 if (com->hotchar != 0 && recv_data == com->hotchar) 1843 setsofttty(); 1844 ioptr = com->iptr; 1845 if (ioptr >= com->ibufend) 1846 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW); 1847 else { 1848 if (com->do_timestamp) 1849 microtime(&com->timestamp); 1850 ++com_events; 1851 schedsofttty(); 1852 #if 0 /* for testing input latency vs efficiency */ 1853 if (com->iptr - com->ibuf == 8) 1854 setsofttty(); 1855 #endif 1856 ioptr[0] = recv_data; 1857 ioptr[com->ierroff] = line_status; 1858 com->iptr = ++ioptr; 1859 if (ioptr == com->ihighwater 1860 && com->state & CS_RTS_IFLOW) 1861 outb(com->modem_ctl_port, 1862 com->mcr_image &= ~MCR_RTS); 1863 if (line_status & LSR_OE) 1864 CE_RECORD(com, CE_OVERRUN); 1865 } 1866 cont: 1867 /* 1868 * "& 0x7F" is to avoid the gcc-1.40 generating a slow 1869 * jump from the top of the loop to here 1870 */ 1871 line_status = inb(com->line_status_port) & 0x7F; 1872 } 1873 1874 /* modem status change? (always check before doing output) */ 1875 modem_status = inb(com->modem_status_port); 1876 if (modem_status != com->last_modem_status) { 1877 if (com->do_dcd_timestamp 1878 && !(com->last_modem_status & MSR_DCD) 1879 && modem_status & MSR_DCD) 1880 microtime(&com->dcd_timestamp); 1881 1882 /* 1883 * Schedule high level to handle DCD changes. Note 1884 * that we don't use the delta bits anywhere. Some 1885 * UARTs mess them up, and it's easy to remember the 1886 * previous bits and calculate the delta. 1887 */ 1888 com->last_modem_status = modem_status; 1889 if (!(com->state & CS_CHECKMSR)) { 1890 com_events += LOTS_OF_EVENTS; 1891 com->state |= CS_CHECKMSR; 1892 setsofttty(); 1893 } 1894 1895 /* handle CTS change immediately for crisp flow ctl */ 1896 if (com->state & CS_CTS_OFLOW) { 1897 if (modem_status & MSR_CTS) 1898 com->state |= CS_ODEVREADY; 1899 else 1900 com->state &= ~CS_ODEVREADY; 1901 } 1902 } 1903 1904 /* output queued and everything ready? */ 1905 if (line_status & LSR_TXRDY 1906 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) { 1907 ioptr = com->obufq.l_head; 1908 if (com->tx_fifo_size > 1) { 1909 u_int ocount; 1910 1911 ocount = com->obufq.l_tail - ioptr; 1912 if (ocount > com->tx_fifo_size) 1913 ocount = com->tx_fifo_size; 1914 com->bytes_out += ocount; 1915 do 1916 outb(com->data_port, *ioptr++); 1917 while (--ocount != 0); 1918 } else { 1919 outb(com->data_port, *ioptr++); 1920 ++com->bytes_out; 1921 } 1922 com->obufq.l_head = ioptr; 1923 if (COM_IIR_TXRDYBUG(com->flags)) { 1924 int_ctl_new = int_ctl | IER_ETXRDY; 1925 } 1926 if (ioptr >= com->obufq.l_tail) { 1927 struct lbq *qp; 1928 1929 qp = com->obufq.l_next; 1930 qp->l_queued = FALSE; 1931 qp = qp->l_next; 1932 if (qp != NULL) { 1933 com->obufq.l_head = qp->l_head; 1934 com->obufq.l_tail = qp->l_tail; 1935 com->obufq.l_next = qp; 1936 } else { 1937 /* output just completed */ 1938 if (COM_IIR_TXRDYBUG(com->flags)) { 1939 int_ctl_new = int_ctl & ~IER_ETXRDY; 1940 } 1941 com->state &= ~CS_BUSY; 1942 } 1943 if (!(com->state & CS_ODONE)) { 1944 com_events += LOTS_OF_EVENTS; 1945 com->state |= CS_ODONE; 1946 setsofttty(); /* handle at high level ASAP */ 1947 } 1948 } 1949 if (COM_IIR_TXRDYBUG(com->flags) && (int_ctl != int_ctl_new)) { 1950 outb(com->intr_ctl_port, int_ctl_new); 1951 } 1952 } 1953 1954 /* finished? */ 1955 #ifndef COM_MULTIPORT 1956 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND) 1957 #endif /* COM_MULTIPORT */ 1958 return; 1959 } 1960 } 1961 1962 static int 1963 sioioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct thread *td) 1964 { 1965 struct com_s *com; 1966 int error; 1967 int mynor; 1968 int s; 1969 struct tty *tp; 1970 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 1971 u_long oldcmd; 1972 struct termios term; 1973 #endif 1974 1975 mynor = minor(dev); 1976 com = com_addr(MINOR_TO_UNIT(mynor)); 1977 if (com == NULL || com->gone) 1978 return (ENODEV); 1979 if (mynor & CONTROL_MASK) { 1980 struct termios *ct; 1981 1982 switch (mynor & CONTROL_MASK) { 1983 case CONTROL_INIT_STATE: 1984 ct = mynor & CALLOUT_MASK ? &com->it_out : &com->it_in; 1985 break; 1986 case CONTROL_LOCK_STATE: 1987 ct = mynor & CALLOUT_MASK ? &com->lt_out : &com->lt_in; 1988 break; 1989 default: 1990 return (ENODEV); /* /dev/nodev */ 1991 } 1992 switch (cmd) { 1993 case TIOCSETA: 1994 error = suser(td); 1995 if (error != 0) 1996 return (error); 1997 *ct = *(struct termios *)data; 1998 return (0); 1999 case TIOCGETA: 2000 *(struct termios *)data = *ct; 2001 return (0); 2002 case TIOCGETD: 2003 *(int *)data = TTYDISC; 2004 return (0); 2005 case TIOCGWINSZ: 2006 bzero(data, sizeof(struct winsize)); 2007 return (0); 2008 default: 2009 return (ENOTTY); 2010 } 2011 } 2012 tp = com->tp; 2013 #if defined(COMPAT_43) || defined(COMPAT_SUNOS) 2014 term = tp->t_termios; 2015 oldcmd = cmd; 2016 error = ttsetcompat(tp, &cmd, data, &term); 2017 if (error != 0) 2018 return (error); 2019 if (cmd != oldcmd) 2020 data = (caddr_t)&term; 2021 #endif 2022 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) { 2023 int cc; 2024 struct termios *dt = (struct termios *)data; 2025 struct termios *lt = mynor & CALLOUT_MASK 2026 ? &com->lt_out : &com->lt_in; 2027 2028 dt->c_iflag = (tp->t_iflag & lt->c_iflag) 2029 | (dt->c_iflag & ~lt->c_iflag); 2030 dt->c_oflag = (tp->t_oflag & lt->c_oflag) 2031 | (dt->c_oflag & ~lt->c_oflag); 2032 dt->c_cflag = (tp->t_cflag & lt->c_cflag) 2033 | (dt->c_cflag & ~lt->c_cflag); 2034 dt->c_lflag = (tp->t_lflag & lt->c_lflag) 2035 | (dt->c_lflag & ~lt->c_lflag); 2036 for (cc = 0; cc < NCCS; ++cc) 2037 if (lt->c_cc[cc] != 0) 2038 dt->c_cc[cc] = tp->t_cc[cc]; 2039 if (lt->c_ispeed != 0) 2040 dt->c_ispeed = tp->t_ispeed; 2041 if (lt->c_ospeed != 0) 2042 dt->c_ospeed = tp->t_ospeed; 2043 } 2044 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, td); 2045 if (error != ENOIOCTL) 2046 return (error); 2047 s = spltty(); 2048 error = ttioctl(tp, cmd, data, flag); 2049 disc_optim(tp, &tp->t_termios, com); 2050 if (error != ENOIOCTL) { 2051 splx(s); 2052 return (error); 2053 } 2054 switch (cmd) { 2055 case TIOCSBRK: 2056 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK); 2057 break; 2058 case TIOCCBRK: 2059 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK); 2060 break; 2061 case TIOCSDTR: 2062 (void)commctl(com, TIOCM_DTR, DMBIS); 2063 break; 2064 case TIOCCDTR: 2065 (void)commctl(com, TIOCM_DTR, DMBIC); 2066 break; 2067 /* 2068 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The 2069 * changes get undone on the next call to comparam(). 2070 */ 2071 case TIOCMSET: 2072 (void)commctl(com, *(int *)data, DMSET); 2073 break; 2074 case TIOCMBIS: 2075 (void)commctl(com, *(int *)data, DMBIS); 2076 break; 2077 case TIOCMBIC: 2078 (void)commctl(com, *(int *)data, DMBIC); 2079 break; 2080 case TIOCMGET: 2081 *(int *)data = commctl(com, 0, DMGET); 2082 break; 2083 case TIOCMSDTRWAIT: 2084 /* must be root since the wait applies to following logins */ 2085 error = suser(td); 2086 if (error != 0) { 2087 splx(s); 2088 return (error); 2089 } 2090 com->dtr_wait = *(int *)data * hz / 100; 2091 break; 2092 case TIOCMGDTRWAIT: 2093 *(int *)data = com->dtr_wait * 100 / hz; 2094 break; 2095 case TIOCTIMESTAMP: 2096 com->do_timestamp = TRUE; 2097 *(struct timeval *)data = com->timestamp; 2098 break; 2099 case TIOCDCDTIMESTAMP: 2100 com->do_dcd_timestamp = TRUE; 2101 *(struct timeval *)data = com->dcd_timestamp; 2102 break; 2103 default: 2104 splx(s); 2105 error = pps_ioctl(cmd, data, &com->pps); 2106 if (error == ENODEV) 2107 error = ENOTTY; 2108 return (error); 2109 } 2110 splx(s); 2111 return (0); 2112 } 2113 2114 static void 2115 siopoll(void *dummy) 2116 { 2117 int unit; 2118 2119 if (com_events == 0) 2120 return; 2121 repeat: 2122 for (unit = 0; unit < sio_numunits; ++unit) { 2123 struct com_s *com; 2124 int incc; 2125 struct tty *tp; 2126 2127 com = com_addr(unit); 2128 if (com == NULL) 2129 continue; 2130 tp = com->tp; 2131 if (tp == NULL || com->gone) { 2132 /* 2133 * Discard any events related to never-opened or 2134 * going-away devices. 2135 */ 2136 com_lock(); 2137 incc = com->iptr - com->ibuf; 2138 com->iptr = com->ibuf; 2139 if (com->state & CS_CHECKMSR) { 2140 incc += LOTS_OF_EVENTS; 2141 com->state &= ~CS_CHECKMSR; 2142 } 2143 com_events -= incc; 2144 com_unlock(); 2145 continue; 2146 } 2147 if (com->iptr != com->ibuf) { 2148 com_lock(); 2149 sioinput(com); 2150 com_unlock(); 2151 } 2152 if (com->state & CS_CHECKMSR) { 2153 u_char delta_modem_status; 2154 2155 com_lock(); 2156 delta_modem_status = com->last_modem_status 2157 ^ com->prev_modem_status; 2158 com->prev_modem_status = com->last_modem_status; 2159 com_events -= LOTS_OF_EVENTS; 2160 com->state &= ~CS_CHECKMSR; 2161 com_unlock(); 2162 if (delta_modem_status & MSR_DCD) 2163 (*linesw[tp->t_line].l_modem) 2164 (tp, com->prev_modem_status & MSR_DCD); 2165 } 2166 if (com->state & CS_ODONE) { 2167 com_lock(); 2168 com_events -= LOTS_OF_EVENTS; 2169 com->state &= ~CS_ODONE; 2170 com_unlock(); 2171 if (!(com->state & CS_BUSY) 2172 && !(com->extra_state & CSE_BUSYCHECK)) { 2173 timeout(siobusycheck, com, hz / 100); 2174 com->extra_state |= CSE_BUSYCHECK; 2175 } 2176 (*linesw[tp->t_line].l_start)(tp); 2177 } 2178 if (com_events == 0) 2179 break; 2180 } 2181 if (com_events >= LOTS_OF_EVENTS) 2182 goto repeat; 2183 } 2184 2185 static int 2186 comparam(tp, t) 2187 struct tty *tp; 2188 struct termios *t; 2189 { 2190 u_int cfcr; 2191 int cflag; 2192 struct com_s *com; 2193 u_int divisor; 2194 u_char dlbh; 2195 u_char dlbl; 2196 int s; 2197 int unit; 2198 2199 unit = DEV_TO_UNIT(tp->t_dev); 2200 com = com_addr(unit); 2201 if (com == NULL) 2202 return (ENODEV); 2203 2204 /* do historical conversions */ 2205 if (t->c_ispeed == 0) 2206 t->c_ispeed = t->c_ospeed; 2207 2208 /* check requested parameters */ 2209 if (t->c_ospeed == 0) 2210 divisor = 0; 2211 else { 2212 if (t->c_ispeed != t->c_ospeed) 2213 return (EINVAL); 2214 divisor = siodivisor(com->rclk, t->c_ispeed); 2215 if (divisor == 0) 2216 return (EINVAL); 2217 } 2218 2219 /* parameters are OK, convert them to the com struct and the device */ 2220 s = spltty(); 2221 if (divisor == 0) 2222 (void)commctl(com, TIOCM_DTR, DMBIC); /* hang up line */ 2223 else 2224 (void)commctl(com, TIOCM_DTR, DMBIS); 2225 cflag = t->c_cflag; 2226 switch (cflag & CSIZE) { 2227 case CS5: 2228 cfcr = CFCR_5BITS; 2229 break; 2230 case CS6: 2231 cfcr = CFCR_6BITS; 2232 break; 2233 case CS7: 2234 cfcr = CFCR_7BITS; 2235 break; 2236 default: 2237 cfcr = CFCR_8BITS; 2238 break; 2239 } 2240 if (cflag & PARENB) { 2241 cfcr |= CFCR_PENAB; 2242 if (!(cflag & PARODD)) 2243 cfcr |= CFCR_PEVEN; 2244 } 2245 if (cflag & CSTOPB) 2246 cfcr |= CFCR_STOPB; 2247 2248 if (com->hasfifo && divisor != 0) { 2249 /* 2250 * Use a fifo trigger level low enough so that the input 2251 * latency from the fifo is less than about 16 msec and 2252 * the total latency is less than about 30 msec. These 2253 * latencies are reasonable for humans. Serial comms 2254 * protocols shouldn't expect anything better since modem 2255 * latencies are larger. 2256 * 2257 * Interrupts can be held up for long periods of time 2258 * due to inefficiencies in other parts of the kernel, 2259 * certain video cards, etc. Setting the FIFO trigger 2260 * point to MEDH instead of HIGH gives us 694uS of slop 2261 * (8 character times) instead of 173uS (2 character times) 2262 * @ 115200 bps. 2263 */ 2264 com->fifo_image = t->c_ospeed <= 4800 2265 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; 2266 #ifdef COM_ESP 2267 /* 2268 * The Hayes ESP card needs the fifo DMA mode bit set 2269 * in compatibility mode. If not, it will interrupt 2270 * for each character received. 2271 */ 2272 if (com->esp) 2273 com->fifo_image |= FIFO_DMA_MODE; 2274 #endif 2275 sio_setreg(com, com_fifo, com->fifo_image); 2276 } 2277 2278 /* 2279 * This returns with interrupts disabled so that we can complete 2280 * the speed change atomically. Keeping interrupts disabled is 2281 * especially important while com_data is hidden. 2282 */ 2283 (void) siosetwater(com, t->c_ispeed); 2284 2285 if (divisor != 0) { 2286 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB); 2287 /* 2288 * Only set the divisor registers if they would change, 2289 * since on some 16550 incompatibles (UMC8669F), setting 2290 * them while input is arriving them loses sync until 2291 * data stops arriving. 2292 */ 2293 dlbl = divisor & 0xFF; 2294 if (sio_getreg(com, com_dlbl) != dlbl) 2295 sio_setreg(com, com_dlbl, dlbl); 2296 dlbh = divisor >> 8; 2297 if (sio_getreg(com, com_dlbh) != dlbh) 2298 sio_setreg(com, com_dlbh, dlbh); 2299 } 2300 2301 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr); 2302 2303 if (!(tp->t_state & TS_TTSTOP)) 2304 com->state |= CS_TTGO; 2305 2306 if (cflag & CRTS_IFLOW) { 2307 if (com->st16650a) { 2308 sio_setreg(com, com_cfcr, 0xbf); 2309 sio_setreg(com, com_fifo, 2310 sio_getreg(com, com_fifo) | 0x40); 2311 } 2312 com->state |= CS_RTS_IFLOW; 2313 /* 2314 * If CS_RTS_IFLOW just changed from off to on, the change 2315 * needs to be propagated to MCR_RTS. This isn't urgent, 2316 * so do it later by calling comstart() instead of repeating 2317 * a lot of code from comstart() here. 2318 */ 2319 } else if (com->state & CS_RTS_IFLOW) { 2320 com->state &= ~CS_RTS_IFLOW; 2321 /* 2322 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS 2323 * on here, since comstart() won't do it later. 2324 */ 2325 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2326 if (com->st16650a) { 2327 sio_setreg(com, com_cfcr, 0xbf); 2328 sio_setreg(com, com_fifo, 2329 sio_getreg(com, com_fifo) & ~0x40); 2330 } 2331 } 2332 2333 2334 /* 2335 * Set up state to handle output flow control. 2336 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level? 2337 * Now has 10+ msec latency, while CTS flow has 50- usec latency. 2338 */ 2339 com->state |= CS_ODEVREADY; 2340 com->state &= ~CS_CTS_OFLOW; 2341 if (cflag & CCTS_OFLOW) { 2342 com->state |= CS_CTS_OFLOW; 2343 if (!(com->last_modem_status & MSR_CTS)) 2344 com->state &= ~CS_ODEVREADY; 2345 if (com->st16650a) { 2346 sio_setreg(com, com_cfcr, 0xbf); 2347 sio_setreg(com, com_fifo, 2348 sio_getreg(com, com_fifo) | 0x80); 2349 } 2350 } else { 2351 if (com->st16650a) { 2352 sio_setreg(com, com_cfcr, 0xbf); 2353 sio_setreg(com, com_fifo, 2354 sio_getreg(com, com_fifo) & ~0x80); 2355 } 2356 } 2357 2358 sio_setreg(com, com_cfcr, com->cfcr_image); 2359 2360 /* XXX shouldn't call functions while intrs are disabled. */ 2361 disc_optim(tp, t, com); 2362 /* 2363 * Recover from fiddling with CS_TTGO. We used to call siointr1() 2364 * unconditionally, but that defeated the careful discarding of 2365 * stale input in sioopen(). 2366 */ 2367 if (com->state >= (CS_BUSY | CS_TTGO)) 2368 siointr1(com); 2369 2370 com_unlock(); 2371 splx(s); 2372 comstart(tp); 2373 if (com->ibufold != NULL) { 2374 free(com->ibufold, M_DEVBUF); 2375 com->ibufold = NULL; 2376 } 2377 return (0); 2378 } 2379 2380 static int 2381 siosetwater(com, speed) 2382 struct com_s *com; 2383 speed_t speed; 2384 { 2385 int cp4ticks; 2386 u_char *ibuf; 2387 int ibufsize; 2388 struct tty *tp; 2389 2390 /* 2391 * Make the buffer size large enough to handle a softtty interrupt 2392 * latency of about 2 ticks without loss of throughput or data 2393 * (about 3 ticks if input flow control is not used or not honoured, 2394 * but a bit less for CS5-CS7 modes). 2395 */ 2396 cp4ticks = speed / 10 / hz * 4; 2397 for (ibufsize = 128; ibufsize < cp4ticks;) 2398 ibufsize <<= 1; 2399 if (ibufsize == com->ibufsize) { 2400 com_lock(); 2401 return (0); 2402 } 2403 2404 /* 2405 * Allocate input buffer. The extra factor of 2 in the size is 2406 * to allow for an error byte for each input byte. 2407 */ 2408 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT); 2409 if (ibuf == NULL) { 2410 com_lock(); 2411 return (ENOMEM); 2412 } 2413 2414 /* Initialize non-critical variables. */ 2415 com->ibufold = com->ibuf; 2416 com->ibufsize = ibufsize; 2417 tp = com->tp; 2418 if (tp != NULL) { 2419 tp->t_ififosize = 2 * ibufsize; 2420 tp->t_ispeedwat = (speed_t)-1; 2421 tp->t_ospeedwat = (speed_t)-1; 2422 } 2423 2424 /* 2425 * Read current input buffer, if any. Continue with interrupts 2426 * disabled. 2427 */ 2428 com_lock(); 2429 if (com->iptr != com->ibuf) 2430 sioinput(com); 2431 2432 /*- 2433 * Initialize critical variables, including input buffer watermarks. 2434 * The external device is asked to stop sending when the buffer 2435 * exactly reaches high water, or when the high level requests it. 2436 * The high level is notified immediately (rather than at a later 2437 * clock tick) when this watermark is reached. 2438 * The buffer size is chosen so the watermark should almost never 2439 * be reached. 2440 * The low watermark is invisibly 0 since the buffer is always 2441 * emptied all at once. 2442 */ 2443 com->iptr = com->ibuf = ibuf; 2444 com->ibufend = ibuf + ibufsize; 2445 com->ierroff = ibufsize; 2446 com->ihighwater = ibuf + 3 * ibufsize / 4; 2447 return (0); 2448 } 2449 2450 static void 2451 comstart(tp) 2452 struct tty *tp; 2453 { 2454 struct com_s *com; 2455 int s; 2456 int unit; 2457 2458 unit = DEV_TO_UNIT(tp->t_dev); 2459 com = com_addr(unit); 2460 if (com == NULL) 2461 return; 2462 s = spltty(); 2463 com_lock(); 2464 if (tp->t_state & TS_TTSTOP) 2465 com->state &= ~CS_TTGO; 2466 else 2467 com->state |= CS_TTGO; 2468 if (tp->t_state & TS_TBLOCK) { 2469 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW) 2470 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS); 2471 } else { 2472 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater 2473 && com->state & CS_RTS_IFLOW) 2474 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS); 2475 } 2476 com_unlock(); 2477 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) { 2478 ttwwakeup(tp); 2479 splx(s); 2480 return; 2481 } 2482 if (tp->t_outq.c_cc != 0) { 2483 struct lbq *qp; 2484 struct lbq *next; 2485 2486 if (!com->obufs[0].l_queued) { 2487 com->obufs[0].l_tail 2488 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1, 2489 sizeof com->obuf1); 2490 com->obufs[0].l_next = NULL; 2491 com->obufs[0].l_queued = TRUE; 2492 com_lock(); 2493 if (com->state & CS_BUSY) { 2494 qp = com->obufq.l_next; 2495 while ((next = qp->l_next) != NULL) 2496 qp = next; 2497 qp->l_next = &com->obufs[0]; 2498 } else { 2499 com->obufq.l_head = com->obufs[0].l_head; 2500 com->obufq.l_tail = com->obufs[0].l_tail; 2501 com->obufq.l_next = &com->obufs[0]; 2502 com->state |= CS_BUSY; 2503 } 2504 com_unlock(); 2505 } 2506 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) { 2507 com->obufs[1].l_tail 2508 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2, 2509 sizeof com->obuf2); 2510 com->obufs[1].l_next = NULL; 2511 com->obufs[1].l_queued = TRUE; 2512 com_lock(); 2513 if (com->state & CS_BUSY) { 2514 qp = com->obufq.l_next; 2515 while ((next = qp->l_next) != NULL) 2516 qp = next; 2517 qp->l_next = &com->obufs[1]; 2518 } else { 2519 com->obufq.l_head = com->obufs[1].l_head; 2520 com->obufq.l_tail = com->obufs[1].l_tail; 2521 com->obufq.l_next = &com->obufs[1]; 2522 com->state |= CS_BUSY; 2523 } 2524 com_unlock(); 2525 } 2526 tp->t_state |= TS_BUSY; 2527 } 2528 com_lock(); 2529 if (com->state >= (CS_BUSY | CS_TTGO)) 2530 siointr1(com); /* fake interrupt to start output */ 2531 com_unlock(); 2532 ttwwakeup(tp); 2533 splx(s); 2534 } 2535 2536 static void 2537 comstop(tp, rw) 2538 struct tty *tp; 2539 int rw; 2540 { 2541 struct com_s *com; 2542 2543 com = com_addr(DEV_TO_UNIT(tp->t_dev)); 2544 if (com == NULL || com->gone) 2545 return; 2546 com_lock(); 2547 if (rw & FWRITE) { 2548 if (com->hasfifo) 2549 #ifdef COM_ESP 2550 /* XXX avoid h/w bug. */ 2551 if (!com->esp) 2552 #endif 2553 sio_setreg(com, com_fifo, 2554 FIFO_XMT_RST | com->fifo_image); 2555 com->obufs[0].l_queued = FALSE; 2556 com->obufs[1].l_queued = FALSE; 2557 if (com->state & CS_ODONE) 2558 com_events -= LOTS_OF_EVENTS; 2559 com->state &= ~(CS_ODONE | CS_BUSY); 2560 com->tp->t_state &= ~TS_BUSY; 2561 } 2562 if (rw & FREAD) { 2563 if (com->hasfifo) 2564 #ifdef COM_ESP 2565 /* XXX avoid h/w bug. */ 2566 if (!com->esp) 2567 #endif 2568 sio_setreg(com, com_fifo, 2569 FIFO_RCV_RST | com->fifo_image); 2570 com_events -= (com->iptr - com->ibuf); 2571 com->iptr = com->ibuf; 2572 } 2573 com_unlock(); 2574 comstart(tp); 2575 } 2576 2577 static int 2578 commctl(com, bits, how) 2579 struct com_s *com; 2580 int bits; 2581 int how; 2582 { 2583 int mcr; 2584 int msr; 2585 2586 if (how == DMGET) { 2587 bits = TIOCM_LE; /* XXX - always enabled while open */ 2588 mcr = com->mcr_image; 2589 if (mcr & MCR_DTR) 2590 bits |= TIOCM_DTR; 2591 if (mcr & MCR_RTS) 2592 bits |= TIOCM_RTS; 2593 msr = com->prev_modem_status; 2594 if (msr & MSR_CTS) 2595 bits |= TIOCM_CTS; 2596 if (msr & MSR_DCD) 2597 bits |= TIOCM_CD; 2598 if (msr & MSR_DSR) 2599 bits |= TIOCM_DSR; 2600 /* 2601 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI 2602 * more volatile by reading the modem status a lot. Perhaps 2603 * we should latch both bits until the status is read here. 2604 */ 2605 if (msr & (MSR_RI | MSR_TERI)) 2606 bits |= TIOCM_RI; 2607 return (bits); 2608 } 2609 mcr = 0; 2610 if (bits & TIOCM_DTR) 2611 mcr |= MCR_DTR; 2612 if (bits & TIOCM_RTS) 2613 mcr |= MCR_RTS; 2614 if (com->gone) 2615 return(0); 2616 com_lock(); 2617 switch (how) { 2618 case DMSET: 2619 outb(com->modem_ctl_port, 2620 com->mcr_image = mcr | (com->mcr_image & MCR_IENABLE)); 2621 break; 2622 case DMBIS: 2623 outb(com->modem_ctl_port, com->mcr_image |= mcr); 2624 break; 2625 case DMBIC: 2626 outb(com->modem_ctl_port, com->mcr_image &= ~mcr); 2627 break; 2628 } 2629 com_unlock(); 2630 return (0); 2631 } 2632 2633 static void 2634 siosettimeout() 2635 { 2636 struct com_s *com; 2637 bool_t someopen; 2638 int unit; 2639 2640 /* 2641 * Set our timeout period to 1 second if no polled devices are open. 2642 * Otherwise set it to max(1/200, 1/hz). 2643 * Enable timeouts iff some device is open. 2644 */ 2645 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2646 sio_timeout = hz; 2647 someopen = FALSE; 2648 for (unit = 0; unit < sio_numunits; ++unit) { 2649 com = com_addr(unit); 2650 if (com != NULL && com->tp != NULL 2651 && com->tp->t_state & TS_ISOPEN && !com->gone) { 2652 someopen = TRUE; 2653 if (com->poll || com->poll_output) { 2654 sio_timeout = hz > 200 ? hz / 200 : 1; 2655 break; 2656 } 2657 } 2658 } 2659 if (someopen) { 2660 sio_timeouts_until_log = hz / sio_timeout; 2661 sio_timeout_handle = timeout(comwakeup, (void *)NULL, 2662 sio_timeout); 2663 } else { 2664 /* Flush error messages, if any. */ 2665 sio_timeouts_until_log = 1; 2666 comwakeup((void *)NULL); 2667 untimeout(comwakeup, (void *)NULL, sio_timeout_handle); 2668 } 2669 } 2670 2671 static void 2672 comwakeup(chan) 2673 void *chan; 2674 { 2675 struct com_s *com; 2676 int unit; 2677 2678 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout); 2679 2680 /* 2681 * Recover from lost output interrupts. 2682 * Poll any lines that don't use interrupts. 2683 */ 2684 for (unit = 0; unit < sio_numunits; ++unit) { 2685 com = com_addr(unit); 2686 if (com != NULL && !com->gone 2687 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) { 2688 com_lock(); 2689 siointr1(com); 2690 com_unlock(); 2691 } 2692 } 2693 2694 /* 2695 * Check for and log errors, but not too often. 2696 */ 2697 if (--sio_timeouts_until_log > 0) 2698 return; 2699 sio_timeouts_until_log = hz / sio_timeout; 2700 for (unit = 0; unit < sio_numunits; ++unit) { 2701 int errnum; 2702 2703 com = com_addr(unit); 2704 if (com == NULL) 2705 continue; 2706 if (com->gone) 2707 continue; 2708 for (errnum = 0; errnum < CE_NTYPES; ++errnum) { 2709 u_int delta; 2710 u_long total; 2711 2712 com_lock(); 2713 delta = com->delta_error_counts[errnum]; 2714 com->delta_error_counts[errnum] = 0; 2715 com_unlock(); 2716 if (delta == 0) 2717 continue; 2718 total = com->error_counts[errnum] += delta; 2719 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n", 2720 unit, delta, error_desc[errnum], 2721 delta == 1 ? "" : "s", total); 2722 } 2723 } 2724 } 2725 2726 static void 2727 disc_optim(tp, t, com) 2728 struct tty *tp; 2729 struct termios *t; 2730 struct com_s *com; 2731 { 2732 if (!(t->c_iflag & (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP | IXON)) 2733 && (!(t->c_iflag & BRKINT) || (t->c_iflag & IGNBRK)) 2734 && (!(t->c_iflag & PARMRK) 2735 || (t->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK)) 2736 && !(t->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) 2737 && linesw[tp->t_line].l_rint == ttyinput) 2738 tp->t_state |= TS_CAN_BYPASS_L_RINT; 2739 else 2740 tp->t_state &= ~TS_CAN_BYPASS_L_RINT; 2741 com->hotchar = linesw[tp->t_line].l_hotchar; 2742 } 2743 2744 /* 2745 * Following are all routines needed for SIO to act as console 2746 */ 2747 #include <sys/cons.h> 2748 2749 struct siocnstate { 2750 u_char dlbl; 2751 u_char dlbh; 2752 u_char ier; 2753 u_char cfcr; 2754 u_char mcr; 2755 }; 2756 2757 static speed_t siocngetspeed (Port_t, u_long rclk); 2758 static void siocnclose (struct siocnstate *sp, Port_t iobase); 2759 static void siocnopen (struct siocnstate *sp, Port_t iobase, int speed); 2760 static void siocntxwait (Port_t iobase); 2761 2762 static cn_probe_t siocnprobe; 2763 static cn_init_t siocninit; 2764 static cn_checkc_t siocncheckc; 2765 static cn_getc_t siocngetc; 2766 static cn_putc_t siocnputc; 2767 2768 #ifdef __i386__ 2769 CONS_DRIVER(sio, siocnprobe, siocninit, NULL, siocngetc, siocncheckc, 2770 siocnputc, NULL); 2771 #endif 2772 2773 /* To get the GDB related variables */ 2774 #if DDB > 0 2775 #include <ddb/ddb.h> 2776 #endif 2777 2778 static void 2779 siocntxwait(iobase) 2780 Port_t iobase; 2781 { 2782 int timo; 2783 2784 /* 2785 * Wait for any pending transmission to finish. Required to avoid 2786 * the UART lockup bug when the speed is changed, and for normal 2787 * transmits. 2788 */ 2789 timo = 100000; 2790 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY)) 2791 != (LSR_TSRE | LSR_TXRDY) && --timo != 0) 2792 ; 2793 } 2794 2795 /* 2796 * Read the serial port specified and try to figure out what speed 2797 * it's currently running at. We're assuming the serial port has 2798 * been initialized and is basicly idle. This routine is only intended 2799 * to be run at system startup. 2800 * 2801 * If the value read from the serial port doesn't make sense, return 0. 2802 */ 2803 2804 static speed_t 2805 siocngetspeed(iobase, rclk) 2806 Port_t iobase; 2807 u_long rclk; 2808 { 2809 u_int divisor; 2810 u_char dlbh; 2811 u_char dlbl; 2812 u_char cfcr; 2813 2814 cfcr = inb(iobase + com_cfcr); 2815 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2816 2817 dlbl = inb(iobase + com_dlbl); 2818 dlbh = inb(iobase + com_dlbh); 2819 2820 outb(iobase + com_cfcr, cfcr); 2821 2822 divisor = dlbh << 8 | dlbl; 2823 2824 /* XXX there should be more sanity checking. */ 2825 if (divisor == 0) 2826 return (CONSPEED); 2827 return (rclk / (16UL * divisor)); 2828 } 2829 2830 static void 2831 siocnopen(sp, iobase, speed) 2832 struct siocnstate *sp; 2833 Port_t iobase; 2834 int speed; 2835 { 2836 u_int divisor; 2837 u_char dlbh; 2838 u_char dlbl; 2839 2840 /* 2841 * Save all the device control registers except the fifo register 2842 * and set our default ones (cs8 -parenb speed=comdefaultrate). 2843 * We can't save the fifo register since it is read-only. 2844 */ 2845 sp->ier = inb(iobase + com_ier); 2846 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */ 2847 siocntxwait(iobase); 2848 sp->cfcr = inb(iobase + com_cfcr); 2849 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2850 sp->dlbl = inb(iobase + com_dlbl); 2851 sp->dlbh = inb(iobase + com_dlbh); 2852 /* 2853 * Only set the divisor registers if they would change, since on 2854 * some 16550 incompatibles (Startech), setting them clears the 2855 * data input register. This also reduces the effects of the 2856 * UMC8669F bug. 2857 */ 2858 divisor = siodivisor(comdefaultrclk, speed); 2859 dlbl = divisor & 0xFF; 2860 if (sp->dlbl != dlbl) 2861 outb(iobase + com_dlbl, dlbl); 2862 dlbh = divisor >> 8; 2863 if (sp->dlbh != dlbh) 2864 outb(iobase + com_dlbh, dlbh); 2865 outb(iobase + com_cfcr, CFCR_8BITS); 2866 sp->mcr = inb(iobase + com_mcr); 2867 /* 2868 * We don't want interrupts, but must be careful not to "disable" 2869 * them by clearing the MCR_IENABLE bit, since that might cause 2870 * an interrupt by floating the IRQ line. 2871 */ 2872 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS); 2873 } 2874 2875 static void 2876 siocnclose(sp, iobase) 2877 struct siocnstate *sp; 2878 Port_t iobase; 2879 { 2880 /* 2881 * Restore the device control registers. 2882 */ 2883 siocntxwait(iobase); 2884 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS); 2885 if (sp->dlbl != inb(iobase + com_dlbl)) 2886 outb(iobase + com_dlbl, sp->dlbl); 2887 if (sp->dlbh != inb(iobase + com_dlbh)) 2888 outb(iobase + com_dlbh, sp->dlbh); 2889 outb(iobase + com_cfcr, sp->cfcr); 2890 /* 2891 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them. 2892 */ 2893 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS); 2894 outb(iobase + com_ier, sp->ier); 2895 } 2896 2897 static void 2898 siocnprobe(cp) 2899 struct consdev *cp; 2900 { 2901 speed_t boot_speed; 2902 u_char cfcr; 2903 u_int divisor; 2904 int s, unit; 2905 struct siocnstate sp; 2906 2907 /* 2908 * Find our first enabled console, if any. If it is a high-level 2909 * console device, then initialize it and return successfully. 2910 * If it is a low-level console device, then initialize it and 2911 * return unsuccessfully. It must be initialized in both cases 2912 * for early use by console drivers and debuggers. Initializing 2913 * the hardware is not necessary in all cases, since the i/o 2914 * routines initialize it on the fly, but it is necessary if 2915 * input might arrive while the hardware is switched back to an 2916 * uninitialized state. We can't handle multiple console devices 2917 * yet because our low-level routines don't take a device arg. 2918 * We trust the user to set the console flags properly so that we 2919 * don't need to probe. 2920 */ 2921 cp->cn_pri = CN_DEAD; 2922 2923 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */ 2924 int flags; 2925 int disabled; 2926 if (resource_int_value("sio", unit, "disabled", &disabled) == 0) { 2927 if (disabled) 2928 continue; 2929 } 2930 if (resource_int_value("sio", unit, "flags", &flags)) 2931 continue; 2932 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) { 2933 int port; 2934 Port_t iobase; 2935 2936 if (resource_int_value("sio", unit, "port", &port)) 2937 continue; 2938 iobase = port; 2939 s = spltty(); 2940 if (boothowto & RB_SERIAL) { 2941 boot_speed = 2942 siocngetspeed(iobase, comdefaultrclk); 2943 if (boot_speed) 2944 comdefaultrate = boot_speed; 2945 } 2946 2947 /* 2948 * Initialize the divisor latch. We can't rely on 2949 * siocnopen() to do this the first time, since it 2950 * avoids writing to the latch if the latch appears 2951 * to have the correct value. Also, if we didn't 2952 * just read the speed from the hardware, then we 2953 * need to set the speed in hardware so that 2954 * switching it later is null. 2955 */ 2956 cfcr = inb(iobase + com_cfcr); 2957 outb(iobase + com_cfcr, CFCR_DLAB | cfcr); 2958 divisor = siodivisor(comdefaultrclk, comdefaultrate); 2959 outb(iobase + com_dlbl, divisor & 0xff); 2960 outb(iobase + com_dlbh, divisor >> 8); 2961 outb(iobase + com_cfcr, cfcr); 2962 2963 siocnopen(&sp, iobase, comdefaultrate); 2964 2965 splx(s); 2966 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) { 2967 cp->cn_dev = make_dev(&sio_cdevsw, unit, 2968 UID_ROOT, GID_WHEEL, 0600, 2969 "ttyd%r", unit); 2970 cp->cn_pri = COM_FORCECONSOLE(flags) 2971 || boothowto & RB_SERIAL 2972 ? CN_REMOTE : CN_NORMAL; 2973 siocniobase = iobase; 2974 siocnunit = unit; 2975 } 2976 if (COM_DEBUGGER(flags)) { 2977 printf("sio%d: gdb debugging port\n", unit); 2978 siogdbiobase = iobase; 2979 siogdbunit = unit; 2980 #if DDB > 0 2981 gdbdev = make_dev(&sio_cdevsw, unit, 2982 UID_ROOT, GID_WHEEL, 0600, 2983 "ttyd%r", unit); 2984 gdb_getc = siocngetc; 2985 gdb_putc = siocnputc; 2986 #endif 2987 } 2988 } 2989 } 2990 #ifdef __i386__ 2991 #if DDB > 0 2992 /* 2993 * XXX Ugly Compatability. 2994 * If no gdb port has been specified, set it to be the console 2995 * as some configuration files don't specify the gdb port. 2996 */ 2997 if (gdbdev == NODEV && (boothowto & RB_GDB)) { 2998 printf("Warning: no GDB port specified. Defaulting to sio%d.\n", 2999 siocnunit); 3000 printf("Set flag 0x80 on desired GDB port in your\n"); 3001 printf("configuration file (currently sio only).\n"); 3002 siogdbiobase = siocniobase; 3003 siogdbunit = siocnunit; 3004 gdbdev = make_dev(&sio_cdevsw, siocnunit, 3005 UID_ROOT, GID_WHEEL, 0600, 3006 "ttyd%r", siocnunit); 3007 gdb_getc = siocngetc; 3008 gdb_putc = siocnputc; 3009 } 3010 #endif 3011 #endif 3012 } 3013 3014 #ifdef __alpha__ 3015 3016 CONS_DRIVER(sio, NULL, NULL, NULL, siocngetc, siocncheckc, siocnputc, NULL); 3017 3018 int 3019 siocnattach(port, speed) 3020 int port; 3021 int speed; 3022 { 3023 int s; 3024 u_char cfcr; 3025 u_int divisor; 3026 struct siocnstate sp; 3027 3028 siocniobase = port; 3029 comdefaultrate = speed; 3030 sio_consdev.cn_pri = CN_NORMAL; 3031 sio_consdev.cn_dev = make_dev(&sio_cdevsw, 0, UID_ROOT, GID_WHEEL, 3032 0600, "ttyd%r", 0); 3033 3034 s = spltty(); 3035 3036 /* 3037 * Initialize the divisor latch. We can't rely on 3038 * siocnopen() to do this the first time, since it 3039 * avoids writing to the latch if the latch appears 3040 * to have the correct value. Also, if we didn't 3041 * just read the speed from the hardware, then we 3042 * need to set the speed in hardware so that 3043 * switching it later is null. 3044 */ 3045 cfcr = inb(siocniobase + com_cfcr); 3046 outb(siocniobase + com_cfcr, CFCR_DLAB | cfcr); 3047 divisor = siodivisor(comdefaultrclk, comdefaultrate); 3048 outb(siocniobase + com_dlbl, divisor & 0xff); 3049 outb(siocniobase + com_dlbh, divisor >> 8); 3050 outb(siocniobase + com_cfcr, cfcr); 3051 3052 siocnopen(&sp, siocniobase, comdefaultrate); 3053 splx(s); 3054 3055 cn_tab = &sio_consdev; 3056 return (0); 3057 } 3058 3059 int 3060 siogdbattach(port, speed) 3061 int port; 3062 int speed; 3063 { 3064 int s; 3065 u_char cfcr; 3066 u_int divisor; 3067 struct siocnstate sp; 3068 3069 siogdbiobase = port; 3070 gdbdefaultrate = speed; 3071 3072 s = spltty(); 3073 3074 /* 3075 * Initialize the divisor latch. We can't rely on 3076 * siocnopen() to do this the first time, since it 3077 * avoids writing to the latch if the latch appears 3078 * to have the correct value. Also, if we didn't 3079 * just read the speed from the hardware, then we 3080 * need to set the speed in hardware so that 3081 * switching it later is null. 3082 */ 3083 cfcr = inb(siogdbiobase + com_cfcr); 3084 outb(siogdbiobase + com_cfcr, CFCR_DLAB | cfcr); 3085 divisor = siodivisor(comdefaultrclk, gdbdefaultrate); 3086 outb(siogdbiobase + com_dlbl, divisor & 0xff); 3087 outb(siogdbiobase + com_dlbh, divisor >> 8); 3088 outb(siogdbiobase + com_cfcr, cfcr); 3089 3090 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3091 splx(s); 3092 3093 return (0); 3094 } 3095 3096 #endif 3097 3098 static void 3099 siocninit(cp) 3100 struct consdev *cp; 3101 { 3102 comconsole = DEV_TO_UNIT(cp->cn_dev); 3103 } 3104 3105 static int 3106 siocncheckc(dev) 3107 dev_t dev; 3108 { 3109 int c; 3110 Port_t iobase; 3111 int s; 3112 struct siocnstate sp; 3113 3114 if (minor(dev) == siogdbunit) 3115 iobase = siogdbiobase; 3116 else 3117 iobase = siocniobase; 3118 s = spltty(); 3119 siocnopen(&sp, iobase, comdefaultrate); 3120 if (inb(iobase + com_lsr) & LSR_RXRDY) 3121 c = inb(iobase + com_data); 3122 else 3123 c = -1; 3124 siocnclose(&sp, iobase); 3125 splx(s); 3126 return (c); 3127 } 3128 3129 3130 int 3131 siocngetc(dev) 3132 dev_t dev; 3133 { 3134 int c; 3135 Port_t iobase; 3136 int s; 3137 struct siocnstate sp; 3138 3139 if (minor(dev) == siogdbunit) 3140 iobase = siogdbiobase; 3141 else 3142 iobase = siocniobase; 3143 s = spltty(); 3144 siocnopen(&sp, iobase, comdefaultrate); 3145 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3146 ; 3147 c = inb(iobase + com_data); 3148 siocnclose(&sp, iobase); 3149 splx(s); 3150 return (c); 3151 } 3152 3153 void 3154 siocnputc(dev, c) 3155 dev_t dev; 3156 int c; 3157 { 3158 int s; 3159 struct siocnstate sp; 3160 Port_t iobase; 3161 3162 if (minor(dev) == siogdbunit) 3163 iobase = siogdbiobase; 3164 else 3165 iobase = siocniobase; 3166 s = spltty(); 3167 siocnopen(&sp, iobase, comdefaultrate); 3168 siocntxwait(iobase); 3169 outb(iobase + com_data, c); 3170 siocnclose(&sp, iobase); 3171 splx(s); 3172 } 3173 3174 #ifdef __alpha__ 3175 int 3176 siogdbgetc() 3177 { 3178 int c; 3179 Port_t iobase; 3180 int s; 3181 struct siocnstate sp; 3182 3183 iobase = siogdbiobase; 3184 s = spltty(); 3185 siocnopen(&sp, iobase, gdbdefaultrate); 3186 while (!(inb(iobase + com_lsr) & LSR_RXRDY)) 3187 ; 3188 c = inb(iobase + com_data); 3189 siocnclose(&sp, iobase); 3190 splx(s); 3191 return (c); 3192 } 3193 3194 void 3195 siogdbputc(c) 3196 int c; 3197 { 3198 int s; 3199 struct siocnstate sp; 3200 3201 s = spltty(); 3202 siocnopen(&sp, siogdbiobase, gdbdefaultrate); 3203 siocntxwait(siogdbiobase); 3204 outb(siogdbiobase + com_data, c); 3205 siocnclose(&sp, siogdbiobase); 3206 splx(s); 3207 } 3208 #endif 3209 3210 DRIVER_MODULE(sio, isa, sio_isa_driver, sio_devclass, 0, 0); 3211 #if NPCI > 0 3212 DRIVER_MODULE(sio, pci, sio_pci_driver, sio_devclass, 0, 0); 3213 #endif 3214 #if NPUC > 0 3215 DRIVER_MODULE(sio, puc, sio_puc_driver, sio_devclass, 0, 0); 3216 #endif 3217