xref: /dflybsd-src/sys/dev/raid/mps/mps_pci.c (revision c12c399a1f4ca85fa32e64e159acf5cd2259d897)
1 /*-
2  * Copyright (c) 2009 Yahoo! Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD: src/sys/dev/mps/mps_pci.c,v 1.4 2012/01/26 18:17:21 ken Exp $
27  */
28 
29 /* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */
30 
31 /* TODO Move headers to mpsvar */
32 #include <sys/types.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/bus.h>
38 #include <sys/conf.h>
39 #include <sys/eventhandler.h>
40 #include <sys/malloc.h>
41 #include <sys/sysctl.h>
42 #include <sys/uio.h>
43 
44 #include <sys/rman.h>
45 
46 #include <bus/pci/pcireg.h>
47 #include <bus/pci/pcivar.h>
48 #include <bus/pci/pci_private.h>
49 
50 #include <dev/raid/mps/mpi/mpi2_type.h>
51 #include <dev/raid/mps/mpi/mpi2.h>
52 #include <dev/raid/mps/mpi/mpi2_ioc.h>
53 #include <dev/raid/mps/mpi/mpi2_cnfg.h>
54 #include <dev/raid/mps/mpi/mpi2_tool.h>
55 
56 #include <sys/queue.h>
57 #include <sys/kthread.h>
58 #include <dev/raid/mps/mps_ioctl.h>
59 #include <dev/raid/mps/mpsvar.h>
60 
61 static int	mps_pci_probe(device_t);
62 static int	mps_pci_attach(device_t);
63 static int	mps_pci_detach(device_t);
64 static int	mps_pci_suspend(device_t);
65 static int	mps_pci_resume(device_t);
66 static void	mps_pci_free(struct mps_softc *);
67 #if 0 /* XXX swildner */
68 static int	mps_alloc_msix(struct mps_softc *sc, int msgs);
69 #endif
70 
71 static device_method_t mps_methods[] = {
72 	DEVMETHOD(device_probe,		mps_pci_probe),
73 	DEVMETHOD(device_attach,	mps_pci_attach),
74 	DEVMETHOD(device_detach,	mps_pci_detach),
75 	DEVMETHOD(device_suspend,	mps_pci_suspend),
76 	DEVMETHOD(device_resume,	mps_pci_resume),
77 
78 	{ 0, 0 }
79 };
80 
81 static driver_t mps_pci_driver = {
82 	"mps",
83 	mps_methods,
84 	sizeof(struct mps_softc)
85 };
86 
87 static devclass_t	mps_devclass;
88 DRIVER_MODULE(mps, pci, mps_pci_driver, mps_devclass, 0, 0);
89 
90 struct mps_ident {
91 	uint16_t	vendor;
92 	uint16_t	device;
93 	uint16_t	subvendor;
94 	uint16_t	subdevice;
95 	u_int		flags;
96 	const char	*desc;
97 } mps_identifiers[] = {
98 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2004,
99 	    0xffff, 0xffff, 0, "LSI SAS2004" },
100 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2008,
101 	    0xffff, 0xffff, 0, "LSI SAS2008" },
102 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_1,
103 	    0xffff, 0xffff, 0, "LSI SAS2108" },
104 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_2,
105 	    0xffff, 0xffff, 0, "LSI SAS2108" },
106 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2108_3,
107 	    0xffff, 0xffff, 0, "LSI SAS2108" },
108 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_1,
109 	    0xffff, 0xffff, 0, "LSI SAS2116" },
110 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2116_2,
111 	    0xffff, 0xffff, 0, "LSI SAS2116" },
112 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_1,
113 	    0xffff, 0xffff, 0, "LSI SAS2208" },
114 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_2,
115 	    0xffff, 0xffff, 0, "LSI SAS2208" },
116 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_3,
117 	    0xffff, 0xffff, 0, "LSI SAS2208" },
118 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_4,
119 	    0xffff, 0xffff, 0, "LSI SAS2208" },
120 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_5,
121 	    0xffff, 0xffff, 0, "LSI SAS2208" },
122 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2208_6,
123 	    0xffff, 0xffff, 0, "LSI SAS2208" },
124 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_1,
125 	    0xffff, 0xffff, 0, "LSI SAS2308" },
126 	// Add Customer specific vender/subdevice id before generic
127 	// (0xffff) vender/subdevice id.
128 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
129 	    0x8086, 0x3516, 0, "Intel(R) Integrated RAID Module RMS25JB080" },
130 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
131 	    0x8086, 0x3517, 0, "Intel(R) Integrated RAID Module RMS25JB040" },
132 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
133 	    0x8086, 0x3518, 0, "Intel(R) Integrated RAID Module RMS25KB080" },
134 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
135 	    0x8086, 0x3519, 0, "Intel(R) Integrated RAID Module RMS25KB040" },
136 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_2,
137 	    0xffff, 0xffff, 0, "LSI SAS2308" },
138 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SAS2308_3,
139 	    0xffff, 0xffff, 0, "LSI SAS2308" },
140 	{ MPI2_MFGPAGE_VENDORID_LSI, MPI2_MFGPAGE_DEVID_SSS6200,
141 	    0xffff, 0xffff, MPS_FLAGS_WD_AVAILABLE, "LSI SSS6200" },
142 	{ 0, 0, 0, 0, 0, NULL }
143 };
144 
145 static struct mps_ident *
146 mps_find_ident(device_t dev)
147 {
148 	struct mps_ident *m;
149 
150 	for (m = mps_identifiers; m->vendor != 0; m++) {
151 		if (m->vendor != pci_get_vendor(dev))
152 			continue;
153 		if (m->device != pci_get_device(dev))
154 			continue;
155 		if ((m->subvendor != 0xffff) &&
156 		    (m->subvendor != pci_get_subvendor(dev)))
157 			continue;
158 		if ((m->subdevice != 0xffff) &&
159 		    (m->subdevice != pci_get_subdevice(dev)))
160 			continue;
161 		return (m);
162 	}
163 
164 	return (NULL);
165 }
166 
167 static int
168 mps_pci_probe(device_t dev)
169 {
170 	struct mps_ident *id;
171 
172 	if ((id = mps_find_ident(dev)) != NULL) {
173 		device_set_desc(dev, id->desc);
174 		return (BUS_PROBE_VENDOR);
175 	}
176 	return (ENXIO);
177 }
178 
179 static int
180 mps_pci_attach(device_t dev)
181 {
182 	struct mps_softc *sc;
183 	struct mps_ident *m;
184 	uint16_t command;
185 	int error;
186 
187 	sc = device_get_softc(dev);
188 	bzero(sc, sizeof(*sc));
189 	sc->mps_dev = dev;
190 	m = mps_find_ident(dev);
191 	sc->mps_flags = m->flags;
192 
193 	/* Twiddle basic PCI config bits for a sanity check */
194 	command = pci_read_config(dev, PCIR_COMMAND, 2);
195 	command |= PCIM_CMD_BUSMASTEREN;
196 	pci_write_config(dev, PCIR_COMMAND, command, 2);
197 	command = pci_read_config(dev, PCIR_COMMAND, 2);
198 	if ((command & PCIM_CMD_BUSMASTEREN) == 0) {
199 		device_printf(dev, "Cannot enable PCI busmaster\n");
200 		return (ENXIO);
201 	}
202 	if ((command & PCIM_CMD_MEMEN) == 0) {
203 		device_printf(dev, "PCI memory window not available\n");
204 		return (ENXIO);
205 	}
206 
207 	/* Allocate the System Interface Register Set */
208 	sc->mps_regs_rid = PCIR_BAR(1);
209 	if ((sc->mps_regs_resource = bus_alloc_resource_any(dev,
210 	    SYS_RES_MEMORY, &sc->mps_regs_rid, RF_ACTIVE)) == NULL) {
211 		device_printf(dev, "Cannot allocate PCI registers\n");
212 		return (ENXIO);
213 	}
214 	sc->mps_btag = rman_get_bustag(sc->mps_regs_resource);
215 	sc->mps_bhandle = rman_get_bushandle(sc->mps_regs_resource);
216 
217 	/* Allocate the parent DMA tag */
218 	if (bus_dma_tag_create(NULL,			/* parent */
219 				1, 0,			/* algnmnt, boundary */
220 				BUS_SPACE_MAXADDR,	/* lowaddr */
221 				BUS_SPACE_MAXADDR,	/* highaddr */
222 				NULL, NULL,		/* filter, filterarg */
223 				BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
224 				BUS_SPACE_UNRESTRICTED,	/* nsegments */
225 				BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
226 				0,			/* flags */
227 				&sc->mps_parent_dmat)) {
228 		device_printf(dev, "Cannot allocate parent DMA tag\n");
229 		mps_pci_free(sc);
230 		return (ENOMEM);
231 	}
232 
233 	if ((error = mps_attach(sc)) != 0)
234 		mps_pci_free(sc);
235 
236 	return (error);
237 }
238 
239 int
240 mps_pci_setup_interrupts(struct mps_softc *sc)
241 {
242 	device_t dev;
243 	int error;
244 	u_int irq_flags;
245 
246 	dev = sc->mps_dev;
247 #if 0 /* XXX swildner */
248 	if ((sc->disable_msix == 0) &&
249 	    ((msgs = pci_msix_count(dev)) >= MPS_MSI_COUNT))
250 		error = mps_alloc_msix(sc, MPS_MSI_COUNT);
251 #endif
252 
253 	sc->mps_irq_rid[0] = 0;
254 	sc->mps_irq_type[0] = pci_alloc_1intr(dev, sc->enable_msi,
255 	    &sc->mps_irq_rid[0], &irq_flags);
256 	sc->mps_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
257 	    &sc->mps_irq_rid[0],  irq_flags);
258 	if (sc->mps_irq[0] == NULL) {
259 		device_printf(dev, "Cannot allocate interrupt\n");
260 		return (ENXIO);
261 	}
262 	error = bus_setup_intr(dev, sc->mps_irq[0], INTR_MPSAFE, mps_intr, sc,
263 	    &sc->mps_intrhand[0], NULL);
264 	if (error)
265 		device_printf(dev, "Cannot setup interrupt\n");
266 
267 	return (error);
268 }
269 
270 static int
271 mps_pci_detach(device_t dev)
272 {
273 	struct mps_softc *sc;
274 	int error;
275 
276 	sc = device_get_softc(dev);
277 
278 	if ((error = mps_free(sc)) != 0)
279 		return (error);
280 
281 	mps_pci_free(sc);
282 	return (0);
283 }
284 
285 static void
286 mps_pci_free(struct mps_softc *sc)
287 {
288 	if (sc->mps_parent_dmat != NULL) {
289 		bus_dma_tag_destroy(sc->mps_parent_dmat);
290 	}
291 
292 	bus_teardown_intr(sc->mps_dev, sc->mps_irq[0], sc->mps_intrhand[0]);
293 	bus_release_resource(sc->mps_dev, SYS_RES_IRQ, sc->mps_irq_rid[0],
294 	    sc->mps_irq[0]);
295 	if (sc->mps_irq_type[0] == PCI_INTR_TYPE_MSI)
296 		pci_release_msi(sc->mps_dev);
297 
298 	if (sc->mps_regs_resource != NULL) {
299 		bus_release_resource(sc->mps_dev, SYS_RES_MEMORY,
300 		    sc->mps_regs_rid, sc->mps_regs_resource);
301 	}
302 
303 	return;
304 }
305 
306 static int
307 mps_pci_suspend(device_t dev)
308 {
309 	return (EINVAL);
310 }
311 
312 static int
313 mps_pci_resume(device_t dev)
314 {
315 	return (EINVAL);
316 }
317 
318 #if 0 /* XXX swildner */
319 static int
320 mps_alloc_msix(struct mps_softc *sc, int msgs)
321 {
322 	int error;
323 
324 	error = pci_alloc_msix(sc->mps_dev, &msgs);
325 	return (error);
326 }
327 #endif
328 
329 int
330 mps_pci_restore(struct mps_softc *sc)
331 {
332 	struct pci_devinfo *dinfo;
333 
334 	mps_dprint(sc, MPS_TRACE, "%s\n", __func__);
335 
336 	dinfo = device_get_ivars(sc->mps_dev);
337 	if (dinfo == NULL) {
338 		mps_dprint(sc, MPS_FAULT, "%s: NULL dinfo\n", __func__);
339 		return (EINVAL);
340 	}
341 
342 	pci_cfg_restore(sc->mps_dev, dinfo);
343 	return (0);
344 }
345