1 /*- 2 * Copyright (c) 2006 IronPort Systems 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 /*- 27 * Copyright (c) 2007 LSI Corp. 28 * Copyright (c) 2007 Rajesh Prabhakaran. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms, with or without 32 * modification, are permitted provided that the following conditions 33 * are met: 34 * 1. Redistributions of source code must retain the above copyright 35 * notice, this list of conditions and the following disclaimer. 36 * 2. Redistributions in binary form must reproduce the above copyright 37 * notice, this list of conditions and the following disclaimer in the 38 * documentation and/or other materials provided with the distribution. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 41 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 43 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 46 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 47 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 48 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 49 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 50 * SUCH DAMAGE. 51 * 52 * $FreeBSD: src/sys/dev/mfi/mfi_pci.c,v 1.16 2010/03/02 17:34:11 kib Exp $ 53 * FreeBSD projects/head_mfi/ r232888 54 */ 55 56 /* PCI/PCI-X/PCIe bus interface for the LSI MegaSAS controllers */ 57 58 #include "opt_mfi.h" 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/module.h> 64 #include <sys/bus.h> 65 #include <sys/conf.h> 66 #include <sys/buf2.h> 67 #include <sys/malloc.h> 68 #include <sys/uio.h> 69 #include <sys/eventhandler.h> 70 #include <sys/rman.h> 71 72 #include <bus/pci/pcireg.h> 73 #include <bus/pci/pcivar.h> 74 75 #include <dev/raid/mfi/mfireg.h> 76 #include <dev/raid/mfi/mfi_ioctl.h> 77 #include <dev/raid/mfi/mfivar.h> 78 79 static int mfi_pci_probe(device_t); 80 static int mfi_pci_attach(device_t); 81 static int mfi_pci_detach(device_t); 82 static int mfi_pci_suspend(device_t); 83 static int mfi_pci_resume(device_t); 84 static void mfi_pci_free(struct mfi_softc *); 85 86 static device_method_t mfi_methods[] = { 87 DEVMETHOD(device_probe, mfi_pci_probe), 88 DEVMETHOD(device_attach, mfi_pci_attach), 89 DEVMETHOD(device_detach, mfi_pci_detach), 90 DEVMETHOD(device_suspend, mfi_pci_suspend), 91 DEVMETHOD(device_resume, mfi_pci_resume), 92 DEVMETHOD(bus_print_child, bus_generic_print_child), 93 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 94 DEVMETHOD_END 95 }; 96 97 static driver_t mfi_pci_driver = { 98 "mfi", 99 mfi_methods, 100 sizeof(struct mfi_softc) 101 }; 102 103 static devclass_t mfi_devclass; 104 DRIVER_MODULE(mfi, pci, mfi_pci_driver, mfi_devclass, NULL, NULL); 105 MODULE_VERSION(mfi, 1); 106 107 static int mfi_msi_enable = 1; 108 TUNABLE_INT("hw.mfi.msi.enable", &mfi_msi_enable); 109 110 static int mfi_mrsas_enable = 0; 111 TUNABLE_INT("hw.mfi.mrsas_enable", &mfi_mrsas_enable); 112 113 struct mfi_ident { 114 uint16_t vendor; 115 uint16_t device; 116 uint16_t subvendor; 117 uint16_t subdevice; 118 int flags; 119 const char *desc; 120 } mfi_identifiers[] = { 121 { 0x1000, 0x005b, 0x1028, 0x1f2d, 122 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 123 "Dell PERC H810 Adapter" }, 124 { 0x1000, 0x005b, 0x1028, 0x1f30, 125 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 126 "Dell PERC H710 Embedded" }, 127 { 0x1000, 0x005b, 0x1028, 0x1f31, 128 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 129 "Dell PERC H710P Adapter" }, 130 { 0x1000, 0x005b, 0x1028, 0x1f33, 131 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 132 "Dell PERC H710P Mini (blades)" }, 133 { 0x1000, 0x005b, 0x1028, 0x1f34, 134 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 135 "Dell PERC H710P Mini (monolithics)" }, 136 { 0x1000, 0x005b, 0x1028, 0x1f35, 137 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 138 "Dell PERC H710 Adapter" }, 139 { 0x1000, 0x005b, 0x1028, 0x1f37, 140 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 141 "Dell PERC H710 Mini (blades)" }, 142 { 0x1000, 0x005b, 0x1028, 0x1f38, 143 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 144 "Dell PERC H710 Mini (monolithics)" }, 145 { 0x1000, 0x005b, 0x8086, 0x9265, 146 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 147 "Intel (R) RAID Controller RS25DB080" }, 148 { 0x1000, 0x005b, 0x8086, 0x9285, 149 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 150 "Intel (R) RAID Controller RS25NB008" }, 151 { 0x1000, 0x005b, 0xffff, 0xffff, 152 MFI_FLAGS_SKINNY | MFI_FLAGS_TBOLT | MFI_FLAGS_MRSAS, 153 "ThunderBolt" }, 154 { 0x1000, 0x0060, 0x1028, 0xffff, MFI_FLAGS_1078, 155 "Dell PERC 6" }, 156 { 0x1000, 0x0060, 0xffff, 0xffff, MFI_FLAGS_1078, 157 "LSI MegaSAS 1078" }, 158 { 0x1000, 0x0071, 0xffff, 0xffff, MFI_FLAGS_SKINNY, 159 "Drake Skinny" }, 160 { 0x1000, 0x0073, 0xffff, 0xffff, MFI_FLAGS_SKINNY, 161 "Drake Skinny" }, 162 { 0x1000, 0x0078, 0xffff, 0xffff, MFI_FLAGS_GEN2, 163 "LSI MegaSAS Gen2" }, 164 { 0x1000, 0x0079, 0x1028, 0x1f15, MFI_FLAGS_GEN2, 165 "Dell PERC H800 Adapter" }, 166 { 0x1000, 0x0079, 0x1028, 0x1f16, MFI_FLAGS_GEN2, 167 "Dell PERC H700 Adapter" }, 168 { 0x1000, 0x0079, 0x1028, 0x1f17, MFI_FLAGS_GEN2, 169 "Dell PERC H700 Integrated" }, 170 { 0x1000, 0x0079, 0x1028, 0x1f18, MFI_FLAGS_GEN2, 171 "Dell PERC H700 Modular" }, 172 { 0x1000, 0x0079, 0x1028, 0x1f19, MFI_FLAGS_GEN2, 173 "Dell PERC H700" }, 174 { 0x1000, 0x0079, 0x1028, 0x1f1a, MFI_FLAGS_GEN2, 175 "Dell PERC H800 Proto Adapter" }, 176 { 0x1000, 0x0079, 0x1028, 0x1f1b, MFI_FLAGS_GEN2, 177 "Dell PERC H800" }, 178 { 0x1000, 0x0079, 0x1028, 0xffff, MFI_FLAGS_GEN2, 179 "Dell PERC Gen2" }, 180 { 0x1000, 0x0079, 0xffff, 0xffff, MFI_FLAGS_GEN2, 181 "LSI MegaSAS Gen2" }, 182 { 0x1000, 0x007c, 0xffff, 0xffff, MFI_FLAGS_1078, 183 "LSI MegaSAS 1078" }, 184 { 0x1000, 0x0411, 0xffff, 0xffff, MFI_FLAGS_1064R, /* Brocton IOP */ 185 "LSI MegaSAS 1064R" }, 186 { 0x1000, 0x0413, 0xffff, 0xffff, MFI_FLAGS_1064R, /* Verde ZCR */ 187 "LSI MegaSAS 1064R" }, 188 { 0x1028, 0x0015, 0xffff, 0xffff, MFI_FLAGS_1064R, 189 "Dell PERC 5/i" }, 190 {0, 0, 0, 0, 0, NULL} 191 }; 192 193 static struct mfi_ident * 194 mfi_find_ident(device_t dev) 195 { 196 struct mfi_ident *m; 197 198 for (m = mfi_identifiers; m->vendor != 0; m++) { 199 if ((m->vendor == pci_get_vendor(dev)) && 200 (m->device == pci_get_device(dev)) && 201 ((m->subvendor == pci_get_subvendor(dev)) || 202 (m->subvendor == 0xffff)) && 203 ((m->subdevice == pci_get_subdevice(dev)) || 204 (m->subdevice == 0xffff))) 205 return (m); 206 } 207 208 return (NULL); 209 } 210 211 static int 212 mfi_pci_probe(device_t dev) 213 { 214 struct mfi_ident *id; 215 216 if ((id = mfi_find_ident(dev)) != NULL) { 217 device_set_desc(dev, id->desc); 218 219 /* give priority to mrsas if tunable set */ 220 TUNABLE_INT_FETCH("hw.mfi.mrsas_enable", &mfi_mrsas_enable); 221 if ((id->flags & MFI_FLAGS_MRSAS) && mfi_mrsas_enable) 222 return (ENXIO); /* XXX (BUS_PROBE_LOW_PRIORITY); */ 223 else 224 return (BUS_PROBE_DEFAULT); 225 } 226 return (ENXIO); 227 } 228 229 static int 230 mfi_pci_attach(device_t dev) 231 { 232 struct mfi_softc *sc; 233 struct mfi_ident *m; 234 uint32_t command; 235 int error; 236 u_int irq_flags; 237 238 sc = device_get_softc(dev); 239 bzero(sc, sizeof(*sc)); 240 sc->mfi_dev = dev; 241 m = mfi_find_ident(dev); 242 sc->mfi_flags = m->flags; 243 244 /* Verify that the adapter can be set up in PCI space */ 245 command = pci_read_config(dev, PCIR_COMMAND, 2); 246 command |= PCIM_CMD_BUSMASTEREN; 247 pci_write_config(dev, PCIR_COMMAND, command, 2); 248 command = pci_read_config(dev, PCIR_COMMAND, 2); 249 if ((command & PCIM_CMD_BUSMASTEREN) == 0) { 250 device_printf(dev, "Can't enable PCI busmaster\n"); 251 return (ENXIO); 252 } 253 if ((command & PCIM_CMD_MEMEN) == 0) { 254 device_printf(dev, "PCI memory window not available\n"); 255 return (ENXIO); 256 } 257 258 /* Allocate PCI registers */ 259 if ((sc->mfi_flags & MFI_FLAGS_1064R) || 260 (sc->mfi_flags & MFI_FLAGS_1078)) { 261 /* 1068/1078: Memory mapped BAR is at offset 0x10 */ 262 sc->mfi_regs_rid = PCIR_BAR(0); 263 } else if ((sc->mfi_flags & MFI_FLAGS_GEN2) || 264 (sc->mfi_flags & MFI_FLAGS_SKINNY) || 265 (sc->mfi_flags & MFI_FLAGS_TBOLT)) { 266 /* GEN2/Skinny: Memory mapped BAR is at offset 0x14 */ 267 sc->mfi_regs_rid = PCIR_BAR(1); 268 } 269 if ((sc->mfi_regs_resource = bus_alloc_resource_any(sc->mfi_dev, 270 SYS_RES_MEMORY, &sc->mfi_regs_rid, RF_ACTIVE)) == NULL) { 271 device_printf(dev, "Cannot allocate PCI registers\n"); 272 return (ENXIO); 273 } 274 sc->mfi_btag = rman_get_bustag(sc->mfi_regs_resource); 275 sc->mfi_bhandle = rman_get_bushandle(sc->mfi_regs_resource); 276 277 error = ENOMEM; 278 279 /* Allocate parent DMA tag */ 280 if (bus_dma_tag_create( NULL, /* parent */ 281 1, 0, /* algnmnt, boundary */ 282 BUS_SPACE_MAXADDR, /* lowaddr */ 283 BUS_SPACE_MAXADDR, /* highaddr */ 284 NULL, NULL, /* filter, filterarg */ 285 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */ 286 BUS_SPACE_UNRESTRICTED, /* nsegments */ 287 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */ 288 0, /* flags */ 289 &sc->mfi_parent_dmat)) { 290 device_printf(dev, "Cannot allocate parent DMA tag\n"); 291 goto out; 292 } 293 294 /* Allocate IRQ resource. */ 295 sc->mfi_irq_rid = 0; 296 sc->mfi_irq_type = pci_alloc_1intr(sc->mfi_dev, mfi_msi_enable, 297 &sc->mfi_irq_rid, &irq_flags); 298 if ((sc->mfi_irq = bus_alloc_resource_any(sc->mfi_dev, SYS_RES_IRQ, 299 &sc->mfi_irq_rid, irq_flags)) == NULL) { 300 device_printf(sc->mfi_dev, "Cannot allocate interrupt\n"); 301 return (EINVAL); 302 } 303 304 error = mfi_attach(sc); 305 out: 306 if (error) { 307 mfi_free(sc); 308 mfi_pci_free(sc); 309 } 310 311 return (error); 312 } 313 314 static int 315 mfi_pci_detach(device_t dev) 316 { 317 struct mfi_softc *sc; 318 device_t *devlist; 319 int error, devcount, i; 320 321 sc = device_get_softc(dev); 322 323 lockmgr(&sc->mfi_config_lock, LK_EXCLUSIVE); 324 lockmgr(&sc->mfi_io_lock, LK_EXCLUSIVE); 325 if ((sc->mfi_flags & MFI_FLAGS_OPEN) != 0) { 326 lockmgr(&sc->mfi_io_lock, LK_RELEASE); 327 lockmgr(&sc->mfi_config_lock, LK_RELEASE); 328 return (EBUSY); 329 } 330 sc->mfi_detaching = 1; 331 lockmgr(&sc->mfi_io_lock, LK_RELEASE); 332 333 if ((error = device_get_children(sc->mfi_dev, &devlist, &devcount)) != 0) { 334 lockmgr(&sc->mfi_config_lock, LK_RELEASE); 335 return error; 336 } 337 for (i = 0; i < devcount; i++) 338 device_delete_child(sc->mfi_dev, devlist[i]); 339 kfree(devlist, M_TEMP); 340 lockmgr(&sc->mfi_config_lock, LK_RELEASE); 341 342 EVENTHANDLER_DEREGISTER(shutdown_final, sc->mfi_eh); 343 344 mfi_shutdown(sc); 345 mfi_free(sc); 346 mfi_pci_free(sc); 347 return (0); 348 } 349 350 static void 351 mfi_pci_free(struct mfi_softc *sc) 352 { 353 354 if (sc->mfi_regs_resource != NULL) { 355 bus_release_resource(sc->mfi_dev, SYS_RES_MEMORY, 356 sc->mfi_regs_rid, sc->mfi_regs_resource); 357 } 358 if (sc->mfi_irq_type == PCI_INTR_TYPE_MSI) 359 pci_release_msi(sc->mfi_dev); 360 } 361 362 static int 363 mfi_pci_suspend(device_t dev) 364 { 365 366 return (EINVAL); 367 } 368 369 static int 370 mfi_pci_resume(device_t dev) 371 { 372 373 return (EINVAL); 374 } 375