1 /* $FreeBSD: src/sys/dev/asr/asr.c,v 1.3.2.2 2001/08/23 05:21:29 scottl Exp $ */ 2 /* $DragonFly: src/sys/dev/raid/asr/asr.c,v 1.32 2008/01/05 14:02:38 swildner Exp $ */ 3 /* 4 * Copyright (c) 1996-2000 Distributed Processing Technology Corporation 5 * Copyright (c) 2000-2001 Adaptec Corporation 6 * All rights reserved. 7 * 8 * TERMS AND CONDITIONS OF USE 9 * 10 * Redistribution and use in source form, with or without modification, are 11 * permitted provided that redistributions of source code must retain the 12 * above copyright notice, this list of conditions and the following disclaimer. 13 * 14 * This software is provided `as is' by Adaptec and any express or implied 15 * warranties, including, but not limited to, the implied warranties of 16 * merchantability and fitness for a particular purpose, are disclaimed. In no 17 * event shall Adaptec be liable for any direct, indirect, incidental, special, 18 * exemplary or consequential damages (including, but not limited to, 19 * procurement of substitute goods or services; loss of use, data, or profits; 20 * or business interruptions) however caused and on any theory of liability, 21 * whether in contract, strict liability, or tort (including negligence or 22 * otherwise) arising in any way out of the use of this driver software, even 23 * if advised of the possibility of such damage. 24 * 25 * SCSI I2O host adapter driver 26 * 27 * V1.08 2001/08/21 Mark_Salyzyn@adaptec.com 28 * - The 2000S and 2005S do not initialize on some machines, 29 * increased timeout to 255ms from 50ms for the StatusGet 30 * command. 31 * V1.07 2001/05/22 Mark_Salyzyn@adaptec.com 32 * - I knew this one was too good to be true. The error return 33 * on ioctl commands needs to be compared to CAM_REQ_CMP, not 34 * to the bit masked status. 35 * V1.06 2001/05/08 Mark_Salyzyn@adaptec.com 36 * - The 2005S that was supported is affectionately called the 37 * Conjoined BAR Firmware. In order to support RAID-5 in a 38 * 16MB low-cost configuration, Firmware was forced to go 39 * to a Split BAR Firmware. This requires a separate IOP and 40 * Messaging base address. 41 * V1.05 2001/04/25 Mark_Salyzyn@adaptec.com 42 * - Handle support for 2005S Zero Channel RAID solution. 43 * - System locked up if the Adapter locked up. Do not try 44 * to send other commands if the resetIOP command fails. The 45 * fail outstanding command discovery loop was flawed as the 46 * removal of the command from the list prevented discovering 47 * all the commands. 48 * - Comment changes to clarify driver. 49 * - SysInfo searched for an EATA SmartROM, not an I2O SmartROM. 50 * - We do not use the AC_FOUND_DEV event because of I2O. 51 * Removed asr_async. 52 * V1.04 2000/09/22 Mark_Salyzyn@adaptec.com, msmith@freebsd.org, 53 * lampa@fee.vutbr.cz and Scott_Long@adaptec.com. 54 * - Removed support for PM1554, PM2554 and PM2654 in Mode-0 55 * mode as this is confused with competitor adapters in run 56 * mode. 57 * - critical locking needed in ASR_ccbAdd and ASR_ccbRemove 58 * to prevent operating system panic. 59 * - moved default major number to 154 from 97. 60 * V1.03 2000/07/12 Mark_Salyzyn@adaptec.com 61 * - The controller is not actually an ASR (Adaptec SCSI RAID) 62 * series that is visible, it's more of an internal code name. 63 * remove any visible references within reason for now. 64 * - bus_ptr->LUN was not correctly zeroed when initially 65 * allocated causing a possible panic of the operating system 66 * during boot. 67 * V1.02 2000/06/26 Mark_Salyzyn@adaptec.com 68 * - Code always fails for ASR_getTid affecting performance. 69 * - initiated a set of changes that resulted from a formal 70 * code inspection by Mark_Salyzyn@adaptec.com, 71 * George_Dake@adaptec.com, Jeff_Zeak@adaptec.com, 72 * Martin_Wilson@adaptec.com and Vincent_Trandoan@adaptec.com. 73 * Their findings were focussed on the LCT & TID handler, and 74 * all resulting changes were to improve code readability, 75 * consistency or have a positive effect on performance. 76 * V1.01 2000/06/14 Mark_Salyzyn@adaptec.com 77 * - Passthrough returned an incorrect error. 78 * - Passthrough did not migrate the intrinsic scsi layer wakeup 79 * on command completion. 80 * - generate control device nodes using make_dev and delete_dev. 81 * - Performance affected by TID caching reallocing. 82 * - Made suggested changes by Justin_Gibbs@adaptec.com 83 * - use splcam instead of splbio. 84 * - use u_int8_t instead of u_char. 85 * - use u_int16_t instead of u_short. 86 * - use u_int32_t instead of u_long where appropriate. 87 * - use 64 bit context handler instead of 32 bit. 88 * - create_ccb should only allocate the worst case 89 * requirements for the driver since CAM may evolve 90 * making union ccb much larger than needed here. 91 * renamed create_ccb to asr_alloc_ccb. 92 * - go nutz justifying all debug prints as macros 93 * defined at the top and remove unsightly ifdefs. 94 * - INLINE STATIC viewed as confusing. Historically 95 * utilized to affect code performance and debug 96 * issues in OS, Compiler or OEM specific situations. 97 * V1.00 2000/05/31 Mark_Salyzyn@adaptec.com 98 * - Ported from FreeBSD 2.2.X DPT I2O driver. 99 * changed struct scsi_xfer to union ccb/struct ccb_hdr 100 * changed variable name xs to ccb 101 * changed struct scsi_link to struct cam_path 102 * changed struct scsibus_data to struct cam_sim 103 * stopped using fordriver for holding on to the TID 104 * use proprietary packet creation instead of scsi_inquire 105 * CAM layer sends synchronize commands. 106 */ 107 108 #define ASR_VERSION 1 109 #define ASR_REVISION '0' 110 #define ASR_SUBREVISION '8' 111 #define ASR_MONTH 8 112 #define ASR_DAY 21 113 #define ASR_YEAR 2001 - 1980 114 115 /* 116 * Debug macros to reduce the unsightly ifdefs 117 */ 118 #if (defined(DEBUG_ASR) || defined(DEBUG_ASR_USR_CMD) || defined(DEBUG_ASR_CMD)) 119 # define debug_asr_message(message) \ 120 { \ 121 u_int32_t * pointer = (u_int32_t *)message; \ 122 u_int32_t length = I2O_MESSAGE_FRAME_getMessageSize(message);\ 123 u_int32_t counter = 0; \ 124 \ 125 while (length--) { \ 126 kprintf ("%08lx%c", (u_long)*(pointer++), \ 127 (((++counter & 7) == 0) || (length == 0)) \ 128 ? '\n' \ 129 : ' '); \ 130 } \ 131 } 132 #endif /* DEBUG_ASR || DEBUG_ASR_USR_CMD || DEBUG_ASR_CMD */ 133 134 #if (defined(DEBUG_ASR)) 135 /* Breaks on none STDC based compilers :-( */ 136 # define debug_asr_printf(fmt,args...) kprintf(fmt, ##args) 137 # define debug_asr_dump_message(message) debug_asr_message(message) 138 # define debug_asr_print_path(ccb) xpt_print_path(ccb->ccb_h.path); 139 /* None fatal version of the ASSERT macro */ 140 # if (defined(__STDC__)) 141 # define ASSERT(phrase) if(!(phrase))kprintf(#phrase " at line %d file %s\n",__LINE__,__FILE__) 142 # else 143 # define ASSERT(phrase) if(!(phrase))kprintf("phrase" " at line %d file %s\n",__LINE__,__FILE__) 144 # endif 145 #else /* DEBUG_ASR */ 146 # define debug_asr_printf(fmt,args...) 147 # define debug_asr_dump_message(message) 148 # define debug_asr_print_path(ccb) 149 # define ASSERT(x) 150 #endif /* DEBUG_ASR */ 151 152 /* 153 * If DEBUG_ASR_CMD is defined: 154 * 0 - Display incoming SCSI commands 155 * 1 - add in a quick character before queueing. 156 * 2 - add in outgoing message frames. 157 */ 158 #if (defined(DEBUG_ASR_CMD)) 159 # define debug_asr_cmd_printf(fmt,args...) kprintf(fmt,##args) 160 # define debug_asr_dump_ccb(ccb) \ 161 { \ 162 u_int8_t * cp = (unsigned char *)&(ccb->csio.cdb_io); \ 163 int len = ccb->csio.cdb_len; \ 164 \ 165 while (len) { \ 166 debug_asr_cmd_printf (" %02x", *(cp++)); \ 167 --len; \ 168 } \ 169 } 170 # if (DEBUG_ASR_CMD > 0) 171 # define debug_asr_cmd1_printf debug_asr_cmd_printf 172 # else 173 # define debug_asr_cmd1_printf(fmt,args...) 174 # endif 175 # if (DEBUG_ASR_CMD > 1) 176 # define debug_asr_cmd2_printf debug_asr_cmd_printf 177 # define debug_asr_cmd2_dump_message(message) debug_asr_message(message) 178 # else 179 # define debug_asr_cmd2_printf(fmt,args...) 180 # define debug_asr_cmd2_dump_message(message) 181 # endif 182 #else /* DEBUG_ASR_CMD */ 183 # define debug_asr_cmd_printf(fmt,args...) 184 # define debug_asr_cmd_dump_ccb(ccb) 185 # define debug_asr_cmd1_printf(fmt,args...) 186 # define debug_asr_cmd2_printf(fmt,args...) 187 # define debug_asr_cmd2_dump_message(message) 188 #endif /* DEBUG_ASR_CMD */ 189 190 #if (defined(DEBUG_ASR_USR_CMD)) 191 # define debug_usr_cmd_printf(fmt,args...) kprintf(fmt,##args) 192 # define debug_usr_cmd_dump_message(message) debug_usr_message(message) 193 #else /* DEBUG_ASR_USR_CMD */ 194 # define debug_usr_cmd_printf(fmt,args...) 195 # define debug_usr_cmd_dump_message(message) 196 #endif /* DEBUG_ASR_USR_CMD */ 197 198 #define dsDescription_size 46 /* Snug as a bug in a rug */ 199 #include "dptsig.h" 200 201 static dpt_sig_S ASR_sig = { 202 { 'd', 'P', 't', 'S', 'i', 'G'}, SIG_VERSION, PROC_INTEL, 203 PROC_386 | PROC_486 | PROC_PENTIUM | PROC_SEXIUM, FT_HBADRVR, 0, 204 OEM_DPT, OS_FREE_BSD, CAP_ABOVE16MB, DEV_ALL, 205 ADF_ALL_SC5, 206 0, 0, ASR_VERSION, ASR_REVISION, ASR_SUBREVISION, 207 ASR_MONTH, ASR_DAY, ASR_YEAR, 208 /* 01234567890123456789012345678901234567890123456789 < 50 chars */ 209 "Adaptec FreeBSD 4.0.0 Unix SCSI I2O HBA Driver" 210 /* ^^^^^ asr_attach alters these to match OS */ 211 }; 212 213 #include <sys/param.h> /* TRUE=1 and FALSE=0 defined here */ 214 #include <sys/kernel.h> 215 #include <sys/systm.h> 216 #include <sys/malloc.h> 217 #include <sys/proc.h> 218 #include <sys/conf.h> 219 #include <sys/bus.h> 220 #include <sys/rman.h> 221 #include <sys/stat.h> 222 #include <sys/device.h> 223 #include <sys/thread2.h> 224 #include <sys/ioccom.h> 225 226 #include <bus/cam/cam.h> 227 #include <bus/cam/cam_ccb.h> 228 #include <bus/cam/cam_sim.h> 229 #include <bus/cam/cam_xpt_sim.h> 230 #include <bus/cam/cam_xpt_periph.h> 231 232 #include <bus/cam/scsi/scsi_all.h> 233 #include <bus/cam/scsi/scsi_message.h> 234 235 #include <vm/vm.h> 236 #include <vm/pmap.h> 237 #include <machine/cputypes.h> 238 #include <machine/clock.h> 239 #include <machine/vmparam.h> 240 241 #include <bus/pci/pcivar.h> 242 #include <bus/pci/pcireg.h> 243 244 #define STATIC static 245 #define INLINE 246 247 #if (defined(DEBUG_ASR) && (DEBUG_ASR > 0)) 248 # undef STATIC 249 # define STATIC 250 # undef INLINE 251 # define INLINE 252 #endif 253 #define IN 254 #define OUT 255 #define INOUT 256 257 #define osdSwap4(x) ((u_long)ntohl((u_long)(x))) 258 #define KVTOPHYS(x) vtophys(x) 259 #include "dptalign.h" 260 #include "i2oexec.h" 261 #include "i2obscsi.h" 262 #include "i2odpt.h" 263 #include "i2oadptr.h" 264 #include "sys_info.h" 265 266 /* Configuration Definitions */ 267 268 #define SG_SIZE 58 /* Scatter Gather list Size */ 269 #define MAX_TARGET_ID 126 /* Maximum Target ID supported */ 270 #define MAX_LUN 255 /* Maximum LUN Supported */ 271 #define MAX_CHANNEL 7 /* Maximum Channel # Supported by driver */ 272 #define MAX_INBOUND 2000 /* Max CCBs, Also Max Queue Size */ 273 #define MAX_OUTBOUND 256 /* Maximum outbound frames/adapter */ 274 #define MAX_INBOUND_SIZE 512 /* Maximum inbound frame size */ 275 #define MAX_MAP 4194304L /* Maximum mapping size of IOP */ 276 /* Also serves as the minimum map for */ 277 /* the 2005S zero channel RAID product */ 278 279 /************************************************************************** 280 ** ASR Host Adapter structure - One Structure For Each Host Adapter That ** 281 ** Is Configured Into The System. The Structure Supplies Configuration ** 282 ** Information, Status Info, Queue Info And An Active CCB List Pointer. ** 283 ***************************************************************************/ 284 285 /* I2O register set */ 286 typedef struct { 287 U8 Address[0x30]; 288 volatile U32 Status; 289 volatile U32 Mask; 290 # define Mask_InterruptsDisabled 0x08 291 U32 x[2]; 292 volatile U32 ToFIFO; /* In Bound FIFO */ 293 volatile U32 FromFIFO; /* Out Bound FIFO */ 294 } i2oRegs_t; 295 296 /* 297 * A MIX of performance and space considerations for TID lookups 298 */ 299 typedef u_int16_t tid_t; 300 301 typedef struct { 302 u_int32_t size; /* up to MAX_LUN */ 303 tid_t TID[1]; 304 } lun2tid_t; 305 306 typedef struct { 307 u_int32_t size; /* up to MAX_TARGET */ 308 lun2tid_t * LUN[1]; 309 } target2lun_t; 310 311 /* 312 * To ensure that we only allocate and use the worst case ccb here, lets 313 * make our own local ccb union. If asr_alloc_ccb is utilized for another 314 * ccb type, ensure that you add the additional structures into our local 315 * ccb union. To ensure strict type checking, we will utilize the local 316 * ccb definition wherever possible. 317 */ 318 union asr_ccb { 319 struct ccb_hdr ccb_h; /* For convenience */ 320 struct ccb_scsiio csio; 321 struct ccb_setasync csa; 322 }; 323 324 typedef struct Asr_softc { 325 u_int16_t ha_irq; 326 void * ha_Base; /* base port for each board */ 327 u_int8_t * volatile ha_blinkLED; 328 i2oRegs_t * ha_Virt; /* Base address of IOP */ 329 U8 * ha_Fvirt; /* Base address of Frames */ 330 I2O_IOP_ENTRY ha_SystemTable; 331 LIST_HEAD(,ccb_hdr) ha_ccb; /* ccbs in use */ 332 struct cam_path * ha_path[MAX_CHANNEL+1]; 333 struct cam_sim * ha_sim[MAX_CHANNEL+1]; 334 struct resource * ha_mem_res; 335 struct resource * ha_mes_res; 336 struct resource * ha_irq_res; 337 void * ha_intr; 338 PI2O_LCT ha_LCT; /* Complete list of devices */ 339 # define le_type IdentityTag[0] 340 # define I2O_BSA 0x20 341 # define I2O_FCA 0x40 342 # define I2O_SCSI 0x00 343 # define I2O_PORT 0x80 344 # define I2O_UNKNOWN 0x7F 345 # define le_bus IdentityTag[1] 346 # define le_target IdentityTag[2] 347 # define le_lun IdentityTag[3] 348 target2lun_t * ha_targets[MAX_CHANNEL+1]; 349 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME ha_Msgs; 350 u_long ha_Msgs_Phys; 351 352 u_int8_t ha_in_reset; 353 # define HA_OPERATIONAL 0 354 # define HA_IN_RESET 1 355 # define HA_OFF_LINE 2 356 # define HA_OFF_LINE_RECOVERY 3 357 /* Configuration information */ 358 /* The target id maximums we take */ 359 u_int8_t ha_MaxBus; /* Maximum bus */ 360 u_int8_t ha_MaxId; /* Maximum target ID */ 361 u_int8_t ha_MaxLun; /* Maximum target LUN */ 362 u_int8_t ha_SgSize; /* Max SG elements */ 363 u_int8_t ha_pciBusNum; 364 u_int8_t ha_pciDeviceNum; 365 u_int8_t ha_adapter_target[MAX_CHANNEL+1]; 366 u_int16_t ha_QueueSize; /* Max outstanding commands */ 367 u_int16_t ha_Msgs_Count; 368 369 /* Links into other parents and HBAs */ 370 struct Asr_softc * ha_next; /* HBA list */ 371 } Asr_softc_t; 372 373 STATIC Asr_softc_t * Asr_softc; 374 375 /* 376 * Prototypes of the routines we have in this object. 377 */ 378 379 /* Externally callable routines */ 380 #define PROBE_ARGS IN device_t tag 381 #define PROBE_RET int 382 #define PROBE_SET() u_long id = (pci_get_device(tag)<<16)|pci_get_vendor(tag) 383 #define PROBE_RETURN(retval) if(retval){device_set_desc(tag,retval);return(0);}else{return(ENXIO);} 384 #define ATTACH_ARGS IN device_t tag 385 #define ATTACH_RET int 386 #define ATTACH_SET() int unit = device_get_unit(tag) 387 #define ATTACH_RETURN(retval) return(retval) 388 /* I2O HDM interface */ 389 STATIC PROBE_RET asr_probe (PROBE_ARGS); 390 STATIC ATTACH_RET asr_attach (ATTACH_ARGS); 391 /* DOMINO placeholder */ 392 STATIC PROBE_RET domino_probe (PROBE_ARGS); 393 STATIC ATTACH_RET domino_attach (ATTACH_ARGS); 394 /* MODE0 adapter placeholder */ 395 STATIC PROBE_RET mode0_probe (PROBE_ARGS); 396 STATIC ATTACH_RET mode0_attach (ATTACH_ARGS); 397 398 STATIC Asr_softc_t * ASR_get_sc (cdev_t dev); 399 STATIC d_ioctl_t asr_ioctl; 400 STATIC d_open_t asr_open; 401 STATIC d_close_t asr_close; 402 STATIC int asr_intr (IN Asr_softc_t *sc); 403 STATIC void asr_timeout (INOUT void *arg); 404 STATIC int ASR_init (IN Asr_softc_t *sc); 405 STATIC INLINE int ASR_acquireLct (INOUT Asr_softc_t *sc); 406 STATIC INLINE int ASR_acquireHrt (INOUT Asr_softc_t *sc); 407 STATIC void asr_action (IN struct cam_sim *sim, 408 IN union ccb *ccb); 409 STATIC void asr_poll (IN struct cam_sim * sim); 410 411 /* 412 * Here is the auto-probe structure used to nest our tests appropriately 413 * during the startup phase of the operating system. 414 */ 415 STATIC device_method_t asr_methods[] = { 416 DEVMETHOD(device_probe, asr_probe), 417 DEVMETHOD(device_attach, asr_attach), 418 { 0, 0 } 419 }; 420 421 STATIC driver_t asr_driver = { 422 "asr", 423 asr_methods, 424 sizeof(Asr_softc_t) 425 }; 426 427 STATIC devclass_t asr_devclass; 428 429 DECLARE_DUMMY_MODULE(asr); 430 DRIVER_MODULE(asr, pci, asr_driver, asr_devclass, 0, 0); 431 432 STATIC device_method_t domino_methods[] = { 433 DEVMETHOD(device_probe, domino_probe), 434 DEVMETHOD(device_attach, domino_attach), 435 { 0, 0 } 436 }; 437 438 STATIC driver_t domino_driver = { 439 "domino", 440 domino_methods, 441 0 442 }; 443 444 STATIC devclass_t domino_devclass; 445 446 DRIVER_MODULE(domino, pci, domino_driver, domino_devclass, 0, 0); 447 448 STATIC device_method_t mode0_methods[] = { 449 DEVMETHOD(device_probe, mode0_probe), 450 DEVMETHOD(device_attach, mode0_attach), 451 { 0, 0 } 452 }; 453 454 STATIC driver_t mode0_driver = { 455 "mode0", 456 mode0_methods, 457 0 458 }; 459 460 STATIC devclass_t mode0_devclass; 461 462 DRIVER_MODULE(mode0, pci, mode0_driver, mode0_devclass, 0, 0); 463 464 /* 465 * devsw for asr hba driver 466 * 467 * only ioctl is used. the sd driver provides all other access. 468 */ 469 STATIC struct dev_ops asr_ops = { 470 { "asr", -1, 0 }, 471 .d_open = asr_open, 472 .d_close = asr_close, 473 .d_ioctl = asr_ioctl, 474 }; 475 476 /* 477 * Initialize the dynamic dev_ops hooks. 478 */ 479 STATIC void 480 asr_drvinit (void * unused) 481 { 482 static int asr_devsw_installed = 0; 483 484 if (asr_devsw_installed) { 485 return; 486 } 487 asr_devsw_installed++; 488 489 /* 490 * Adding the ops will dynamically assign a major number. 491 */ 492 dev_ops_add(&asr_ops, 0, 0); 493 } /* asr_drvinit */ 494 495 /* XXX Must initialize before CAM layer picks up our HBA driver */ 496 SYSINIT(asrdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE,asr_drvinit,NULL) 497 498 /* I2O support routines */ 499 #define defAlignLong(STRUCT,NAME) char NAME[sizeof(STRUCT)] 500 #define getAlignLong(STRUCT,NAME) ((STRUCT *)(NAME)) 501 502 /* 503 * Fill message with default. 504 */ 505 STATIC PI2O_MESSAGE_FRAME 506 ASR_fillMessage ( 507 IN char * Message, 508 IN u_int16_t size) 509 { 510 OUT PI2O_MESSAGE_FRAME Message_Ptr; 511 512 Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message); 513 bzero ((void *)Message_Ptr, size); 514 I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11); 515 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr, 516 (size + sizeof(U32) - 1) >> 2); 517 I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1); 518 return (Message_Ptr); 519 } /* ASR_fillMessage */ 520 521 #define EMPTY_QUEUE ((U32)-1L) 522 523 STATIC INLINE U32 524 ASR_getMessage( 525 IN i2oRegs_t * virt) 526 { 527 OUT U32 MessageOffset; 528 529 if ((MessageOffset = virt->ToFIFO) == EMPTY_QUEUE) { 530 MessageOffset = virt->ToFIFO; 531 } 532 return (MessageOffset); 533 } /* ASR_getMessage */ 534 535 /* Issue a polled command */ 536 STATIC U32 537 ASR_initiateCp ( 538 INOUT i2oRegs_t * virt, 539 INOUT U8 * fvirt, 540 IN PI2O_MESSAGE_FRAME Message) 541 { 542 OUT U32 Mask = -1L; 543 U32 MessageOffset; 544 u_int Delay = 1500; 545 546 /* 547 * ASR_initiateCp is only used for synchronous commands and will 548 * be made more resiliant to adapter delays since commands like 549 * resetIOP can cause the adapter to be deaf for a little time. 550 */ 551 while (((MessageOffset = ASR_getMessage(virt)) == EMPTY_QUEUE) 552 && (--Delay != 0)) { 553 DELAY (10000); 554 } 555 if (MessageOffset != EMPTY_QUEUE) { 556 bcopy (Message, fvirt + MessageOffset, 557 I2O_MESSAGE_FRAME_getMessageSize(Message) << 2); 558 /* 559 * Disable the Interrupts 560 */ 561 virt->Mask = (Mask = virt->Mask) | Mask_InterruptsDisabled; 562 virt->ToFIFO = MessageOffset; 563 } 564 return (Mask); 565 } /* ASR_initiateCp */ 566 567 /* 568 * Reset the adapter. 569 */ 570 STATIC U32 571 ASR_resetIOP ( 572 INOUT i2oRegs_t * virt, 573 INOUT U8 * fvirt) 574 { 575 struct resetMessage { 576 I2O_EXEC_IOP_RESET_MESSAGE M; 577 U32 R; 578 }; 579 defAlignLong(struct resetMessage,Message); 580 PI2O_EXEC_IOP_RESET_MESSAGE Message_Ptr; 581 OUT U32 * volatile Reply_Ptr; 582 U32 Old; 583 584 /* 585 * Build up our copy of the Message. 586 */ 587 Message_Ptr = (PI2O_EXEC_IOP_RESET_MESSAGE)ASR_fillMessage(Message, 588 sizeof(I2O_EXEC_IOP_RESET_MESSAGE)); 589 I2O_EXEC_IOP_RESET_MESSAGE_setFunction(Message_Ptr, I2O_EXEC_IOP_RESET); 590 /* 591 * Reset the Reply Status 592 */ 593 *(Reply_Ptr = (U32 *)((char *)Message_Ptr 594 + sizeof(I2O_EXEC_IOP_RESET_MESSAGE))) = 0; 595 I2O_EXEC_IOP_RESET_MESSAGE_setStatusWordLowAddress(Message_Ptr, 596 KVTOPHYS((void *)Reply_Ptr)); 597 /* 598 * Send the Message out 599 */ 600 if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) { 601 /* 602 * Wait for a response (Poll), timeouts are dangerous if 603 * the card is truly responsive. We assume response in 2s. 604 */ 605 u_int8_t Delay = 200; 606 607 while ((*Reply_Ptr == 0) && (--Delay != 0)) { 608 DELAY (10000); 609 } 610 /* 611 * Re-enable the interrupts. 612 */ 613 virt->Mask = Old; 614 ASSERT (*Reply_Ptr); 615 return (*Reply_Ptr); 616 } 617 ASSERT (Old != (U32)-1L); 618 return (0); 619 } /* ASR_resetIOP */ 620 621 /* 622 * Get the curent state of the adapter 623 */ 624 STATIC INLINE PI2O_EXEC_STATUS_GET_REPLY 625 ASR_getStatus ( 626 INOUT i2oRegs_t * virt, 627 INOUT U8 * fvirt, 628 OUT PI2O_EXEC_STATUS_GET_REPLY buffer) 629 { 630 defAlignLong(I2O_EXEC_STATUS_GET_MESSAGE,Message); 631 PI2O_EXEC_STATUS_GET_MESSAGE Message_Ptr; 632 U32 Old; 633 634 /* 635 * Build up our copy of the Message. 636 */ 637 Message_Ptr = (PI2O_EXEC_STATUS_GET_MESSAGE)ASR_fillMessage(Message, 638 sizeof(I2O_EXEC_STATUS_GET_MESSAGE)); 639 I2O_EXEC_STATUS_GET_MESSAGE_setFunction(Message_Ptr, 640 I2O_EXEC_STATUS_GET); 641 I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferAddressLow(Message_Ptr, 642 KVTOPHYS((void *)buffer)); 643 /* This one is a Byte Count */ 644 I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferLength(Message_Ptr, 645 sizeof(I2O_EXEC_STATUS_GET_REPLY)); 646 /* 647 * Reset the Reply Status 648 */ 649 bzero ((void *)buffer, sizeof(I2O_EXEC_STATUS_GET_REPLY)); 650 /* 651 * Send the Message out 652 */ 653 if ((Old = ASR_initiateCp (virt, fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) { 654 /* 655 * Wait for a response (Poll), timeouts are dangerous if 656 * the card is truly responsive. We assume response in 50ms. 657 */ 658 u_int8_t Delay = 255; 659 660 while (*((U8 * volatile)&(buffer->SyncByte)) == 0) { 661 if (--Delay == 0) { 662 buffer = (PI2O_EXEC_STATUS_GET_REPLY)NULL; 663 break; 664 } 665 DELAY (1000); 666 } 667 /* 668 * Re-enable the interrupts. 669 */ 670 virt->Mask = Old; 671 return (buffer); 672 } 673 return ((PI2O_EXEC_STATUS_GET_REPLY)NULL); 674 } /* ASR_getStatus */ 675 676 /* 677 * Check if the device is a SCSI I2O HBA, and add it to the list. 678 */ 679 680 /* 681 * Probe for ASR controller. If we find it, we will use it. 682 * virtual adapters. 683 */ 684 STATIC PROBE_RET 685 asr_probe(PROBE_ARGS) 686 { 687 PROBE_SET(); 688 if ((id == 0xA5011044) || (id == 0xA5111044)) { 689 PROBE_RETURN ("Adaptec Caching SCSI RAID"); 690 } 691 PROBE_RETURN (NULL); 692 } /* asr_probe */ 693 694 /* 695 * Probe/Attach for DOMINO chipset. 696 */ 697 STATIC PROBE_RET 698 domino_probe(PROBE_ARGS) 699 { 700 PROBE_SET(); 701 if (id == 0x10121044) { 702 PROBE_RETURN ("Adaptec Caching Memory Controller"); 703 } 704 PROBE_RETURN (NULL); 705 } /* domino_probe */ 706 707 STATIC ATTACH_RET 708 domino_attach (ATTACH_ARGS) 709 { 710 ATTACH_RETURN (0); 711 } /* domino_attach */ 712 713 /* 714 * Probe/Attach for MODE0 adapters. 715 */ 716 STATIC PROBE_RET 717 mode0_probe(PROBE_ARGS) 718 { 719 PROBE_SET(); 720 721 /* 722 * If/When we can get a business case to commit to a 723 * Mode0 driver here, we can make all these tests more 724 * specific and robust. Mode0 adapters have their processors 725 * turned off, this the chips are in a raw state. 726 */ 727 728 /* This is a PLX9054 */ 729 if (id == 0x905410B5) { 730 PROBE_RETURN ("Adaptec Mode0 PM3757"); 731 } 732 /* This is a PLX9080 */ 733 if (id == 0x908010B5) { 734 PROBE_RETURN ("Adaptec Mode0 PM3754/PM3755"); 735 } 736 /* This is a ZION 80303 */ 737 if (id == 0x53098086) { 738 PROBE_RETURN ("Adaptec Mode0 3010S"); 739 } 740 /* This is an i960RS */ 741 if (id == 0x39628086) { 742 PROBE_RETURN ("Adaptec Mode0 2100S"); 743 } 744 /* This is an i960RN */ 745 if (id == 0x19648086) { 746 PROBE_RETURN ("Adaptec Mode0 PM2865/2400A/3200S/3400S"); 747 } 748 #if 0 /* this would match any generic i960 -- mjs */ 749 /* This is an i960RP (typically also on Motherboards) */ 750 if (id == 0x19608086) { 751 PROBE_RETURN ("Adaptec Mode0 PM2554/PM1554/PM2654"); 752 } 753 #endif 754 PROBE_RETURN (NULL); 755 } /* mode0_probe */ 756 757 STATIC ATTACH_RET 758 mode0_attach (ATTACH_ARGS) 759 { 760 ATTACH_RETURN (0); 761 } /* mode0_attach */ 762 763 STATIC INLINE union asr_ccb * 764 asr_alloc_ccb ( 765 IN Asr_softc_t * sc) 766 { 767 OUT union asr_ccb * new_ccb; 768 769 if ((new_ccb = (union asr_ccb *)kmalloc(sizeof(*new_ccb), 770 M_DEVBUF, M_WAITOK | M_ZERO)) != (union asr_ccb *)NULL) { 771 new_ccb->ccb_h.pinfo.priority = 1; 772 new_ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX; 773 new_ccb->ccb_h.spriv_ptr0 = sc; 774 } 775 return (new_ccb); 776 } /* asr_alloc_ccb */ 777 778 STATIC INLINE void 779 asr_free_ccb ( 780 IN union asr_ccb * free_ccb) 781 { 782 kfree(free_ccb, M_DEVBUF); 783 } /* asr_free_ccb */ 784 785 /* 786 * Print inquiry data `carefully' 787 */ 788 STATIC void 789 ASR_prstring ( 790 u_int8_t * s, 791 int len) 792 { 793 while ((--len >= 0) && (*s) && (*s != ' ') && (*s != '-')) { 794 kprintf ("%c", *(s++)); 795 } 796 } /* ASR_prstring */ 797 798 /* 799 * Prototypes 800 */ 801 STATIC INLINE int ASR_queue ( 802 IN Asr_softc_t * sc, 803 IN PI2O_MESSAGE_FRAME Message); 804 /* 805 * Send a message synchronously and without Interrupt to a ccb. 806 */ 807 STATIC int 808 ASR_queue_s ( 809 INOUT union asr_ccb * ccb, 810 IN PI2O_MESSAGE_FRAME Message) 811 { 812 U32 Mask; 813 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0); 814 815 /* 816 * We do not need any (optional byteswapping) method access to 817 * the Initiator context field. 818 */ 819 I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb); 820 821 /* Prevent interrupt service */ 822 crit_enter(); 823 sc->ha_Virt->Mask = (Mask = sc->ha_Virt->Mask) 824 | Mask_InterruptsDisabled; 825 826 if (ASR_queue (sc, Message) == EMPTY_QUEUE) { 827 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 828 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 829 } 830 831 /* 832 * Wait for this board to report a finished instruction. 833 */ 834 while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) { 835 (void)asr_intr (sc); 836 } 837 838 /* Re-enable Interrupts */ 839 sc->ha_Virt->Mask = Mask; 840 crit_exit(); 841 842 return (ccb->ccb_h.status); 843 } /* ASR_queue_s */ 844 845 /* 846 * Send a message synchronously to a Asr_softc_t 847 */ 848 STATIC int 849 ASR_queue_c ( 850 IN Asr_softc_t * sc, 851 IN PI2O_MESSAGE_FRAME Message) 852 { 853 union asr_ccb * ccb; 854 OUT int status; 855 856 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) { 857 return (CAM_REQUEUE_REQ); 858 } 859 860 status = ASR_queue_s (ccb, Message); 861 862 asr_free_ccb(ccb); 863 864 return (status); 865 } /* ASR_queue_c */ 866 867 /* 868 * Add the specified ccb to the active queue 869 */ 870 STATIC INLINE void 871 ASR_ccbAdd ( 872 IN Asr_softc_t * sc, 873 INOUT union asr_ccb * ccb) 874 { 875 crit_enter(); 876 LIST_INSERT_HEAD(&(sc->ha_ccb), &(ccb->ccb_h), sim_links.le); 877 if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) { 878 if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT) { 879 /* 880 * RAID systems can take considerable time to 881 * complete some commands given the large cache 882 * flashes switching from write back to write thru. 883 */ 884 ccb->ccb_h.timeout = 6 * 60 * 1000; 885 } 886 callout_reset(&ccb->ccb_h.timeout_ch, 887 (ccb->ccb_h.timeout * hz) / 1000, asr_timeout, ccb); 888 } 889 crit_exit(); 890 } /* ASR_ccbAdd */ 891 892 /* 893 * Remove the specified ccb from the active queue. 894 */ 895 STATIC INLINE void 896 ASR_ccbRemove ( 897 IN Asr_softc_t * sc, 898 INOUT union asr_ccb * ccb) 899 { 900 crit_enter(); 901 callout_stop(&ccb->ccb_h.timeout_ch); 902 LIST_REMOVE(&(ccb->ccb_h), sim_links.le); 903 crit_exit(); 904 } /* ASR_ccbRemove */ 905 906 /* 907 * Fail all the active commands, so they get re-issued by the operating 908 * system. 909 */ 910 STATIC INLINE void 911 ASR_failActiveCommands ( 912 IN Asr_softc_t * sc) 913 { 914 struct ccb_hdr * ccb; 915 916 #if 0 /* Currently handled by callers, unnecessary paranoia currently */ 917 /* Left in for historical perspective. */ 918 defAlignLong(I2O_EXEC_LCT_NOTIFY_MESSAGE,Message); 919 PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr; 920 921 /* Send a blind LCT command to wait for the enableSys to complete */ 922 Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)ASR_fillMessage(Message, 923 sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT)); 924 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), 925 I2O_EXEC_LCT_NOTIFY); 926 I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr, 927 I2O_CLASS_MATCH_ANYCLASS); 928 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); 929 #endif 930 931 crit_enter(); 932 /* 933 * We do not need to inform the CAM layer that we had a bus 934 * reset since we manage it on our own, this also prevents the 935 * SCSI_DELAY settling that would be required on other systems. 936 * The `SCSI_DELAY' has already been handled by the card via the 937 * acquisition of the LCT table while we are at CAM priority level. 938 * for (int bus = 0; bus <= sc->ha_MaxBus; ++bus) { 939 * xpt_async (AC_BUS_RESET, sc->ha_path[bus], NULL); 940 * } 941 */ 942 while ((ccb = LIST_FIRST(&(sc->ha_ccb))) != (struct ccb_hdr *)NULL) { 943 ASR_ccbRemove (sc, (union asr_ccb *)ccb); 944 945 ccb->status &= ~CAM_STATUS_MASK; 946 ccb->status |= CAM_REQUEUE_REQ; 947 /* Nothing Transfered */ 948 ((struct ccb_scsiio *)ccb)->resid 949 = ((struct ccb_scsiio *)ccb)->dxfer_len; 950 951 if (ccb->path) { 952 xpt_done ((union ccb *)ccb); 953 } else { 954 wakeup ((caddr_t)ccb); 955 } 956 } 957 crit_exit(); 958 } /* ASR_failActiveCommands */ 959 960 /* 961 * The following command causes the HBA to reset the specific bus 962 */ 963 STATIC INLINE void 964 ASR_resetBus( 965 IN Asr_softc_t * sc, 966 IN int bus) 967 { 968 defAlignLong(I2O_HBA_BUS_RESET_MESSAGE,Message); 969 I2O_HBA_BUS_RESET_MESSAGE * Message_Ptr; 970 PI2O_LCT_ENTRY Device; 971 972 Message_Ptr = (I2O_HBA_BUS_RESET_MESSAGE *)ASR_fillMessage(Message, 973 sizeof(I2O_HBA_BUS_RESET_MESSAGE)); 974 I2O_MESSAGE_FRAME_setFunction(&Message_Ptr->StdMessageFrame, 975 I2O_HBA_BUS_RESET); 976 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY) 977 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); 978 ++Device) { 979 if (((Device->le_type & I2O_PORT) != 0) 980 && (Device->le_bus == bus)) { 981 I2O_MESSAGE_FRAME_setTargetAddress( 982 &Message_Ptr->StdMessageFrame, 983 I2O_LCT_ENTRY_getLocalTID(Device)); 984 /* Asynchronous command, with no expectations */ 985 (void)ASR_queue(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); 986 break; 987 } 988 } 989 } /* ASR_resetBus */ 990 991 STATIC INLINE int 992 ASR_getBlinkLedCode ( 993 IN Asr_softc_t * sc) 994 { 995 if ((sc != (Asr_softc_t *)NULL) 996 && (sc->ha_blinkLED != (u_int8_t *)NULL) 997 && (sc->ha_blinkLED[1] == 0xBC)) { 998 return (sc->ha_blinkLED[0]); 999 } 1000 return (0); 1001 } /* ASR_getBlinkCode */ 1002 1003 /* 1004 * Determine the address of an TID lookup. Must be done at high priority 1005 * since the address can be changed by other threads of execution. 1006 * 1007 * Returns NULL pointer if not indexible (but will attempt to generate 1008 * an index if `new_entry' flag is set to TRUE). 1009 * 1010 * All addressible entries are to be guaranteed zero if never initialized. 1011 */ 1012 STATIC INLINE tid_t * 1013 ASR_getTidAddress( 1014 INOUT Asr_softc_t * sc, 1015 IN int bus, 1016 IN int target, 1017 IN int lun, 1018 IN int new_entry) 1019 { 1020 target2lun_t * bus_ptr; 1021 lun2tid_t * target_ptr; 1022 unsigned new_size; 1023 1024 /* 1025 * Validity checking of incoming parameters. More of a bound 1026 * expansion limit than an issue with the code dealing with the 1027 * values. 1028 * 1029 * sc must be valid before it gets here, so that check could be 1030 * dropped if speed a critical issue. 1031 */ 1032 if ((sc == (Asr_softc_t *)NULL) 1033 || (bus > MAX_CHANNEL) 1034 || (target > sc->ha_MaxId) 1035 || (lun > sc->ha_MaxLun)) { 1036 debug_asr_printf("(%lx,%d,%d,%d) target out of range\n", 1037 (u_long)sc, bus, target, lun); 1038 return ((tid_t *)NULL); 1039 } 1040 /* 1041 * See if there is an associated bus list. 1042 * 1043 * for performance, allocate in size of BUS_CHUNK chunks. 1044 * BUS_CHUNK must be a power of two. This is to reduce 1045 * fragmentation effects on the allocations. 1046 */ 1047 # define BUS_CHUNK 8 1048 new_size = ((target + BUS_CHUNK - 1) & ~(BUS_CHUNK - 1)); 1049 if ((bus_ptr = sc->ha_targets[bus]) == (target2lun_t *)NULL) { 1050 /* 1051 * Allocate a new structure? 1052 * Since one element in structure, the +1 1053 * needed for size has been abstracted. 1054 */ 1055 if ((new_entry == FALSE) 1056 || ((sc->ha_targets[bus] = bus_ptr = (target2lun_t *)kmalloc ( 1057 sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size), 1058 M_TEMP, M_WAITOK)) 1059 == (target2lun_t *)NULL)) { 1060 debug_asr_printf("failed to allocate bus list\n"); 1061 return ((tid_t *)NULL); 1062 } 1063 bzero (bus_ptr, sizeof(*bus_ptr) 1064 + (sizeof(bus_ptr->LUN) * new_size)); 1065 bus_ptr->size = new_size + 1; 1066 } else if (bus_ptr->size <= new_size) { 1067 target2lun_t * new_bus_ptr; 1068 1069 /* 1070 * Reallocate a new structure? 1071 * Since one element in structure, the +1 1072 * needed for size has been abstracted. 1073 */ 1074 if ((new_entry == FALSE) 1075 || ((new_bus_ptr = (target2lun_t *)kmalloc ( 1076 sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size), 1077 M_TEMP, M_WAITOK)) 1078 == (target2lun_t *)NULL)) { 1079 debug_asr_printf("failed to reallocate bus list\n"); 1080 return ((tid_t *)NULL); 1081 } 1082 /* 1083 * Zero and copy the whole thing, safer, simpler coding 1084 * and not really performance critical at this point. 1085 */ 1086 bzero (new_bus_ptr, sizeof(*bus_ptr) 1087 + (sizeof(bus_ptr->LUN) * new_size)); 1088 bcopy (bus_ptr, new_bus_ptr, sizeof(*bus_ptr) 1089 + (sizeof(bus_ptr->LUN) * (bus_ptr->size - 1))); 1090 sc->ha_targets[bus] = new_bus_ptr; 1091 kfree (bus_ptr, M_TEMP); 1092 bus_ptr = new_bus_ptr; 1093 bus_ptr->size = new_size + 1; 1094 } 1095 /* 1096 * We now have the bus list, lets get to the target list. 1097 * Since most systems have only *one* lun, we do not allocate 1098 * in chunks as above, here we allow one, then in chunk sizes. 1099 * TARGET_CHUNK must be a power of two. This is to reduce 1100 * fragmentation effects on the allocations. 1101 */ 1102 # define TARGET_CHUNK 8 1103 if ((new_size = lun) != 0) { 1104 new_size = ((lun + TARGET_CHUNK - 1) & ~(TARGET_CHUNK - 1)); 1105 } 1106 if ((target_ptr = bus_ptr->LUN[target]) == (lun2tid_t *)NULL) { 1107 /* 1108 * Allocate a new structure? 1109 * Since one element in structure, the +1 1110 * needed for size has been abstracted. 1111 */ 1112 if ((new_entry == FALSE) 1113 || ((bus_ptr->LUN[target] = target_ptr = (lun2tid_t *)kmalloc ( 1114 sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size), 1115 M_TEMP, M_WAITOK)) 1116 == (lun2tid_t *)NULL)) { 1117 debug_asr_printf("failed to allocate target list\n"); 1118 return ((tid_t *)NULL); 1119 } 1120 bzero (target_ptr, sizeof(*target_ptr) 1121 + (sizeof(target_ptr->TID) * new_size)); 1122 target_ptr->size = new_size + 1; 1123 } else if (target_ptr->size <= new_size) { 1124 lun2tid_t * new_target_ptr; 1125 1126 /* 1127 * Reallocate a new structure? 1128 * Since one element in structure, the +1 1129 * needed for size has been abstracted. 1130 */ 1131 if ((new_entry == FALSE) 1132 || ((new_target_ptr = (lun2tid_t *)kmalloc ( 1133 sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size), 1134 M_TEMP, M_WAITOK)) 1135 == (lun2tid_t *)NULL)) { 1136 debug_asr_printf("failed to reallocate target list\n"); 1137 return ((tid_t *)NULL); 1138 } 1139 /* 1140 * Zero and copy the whole thing, safer, simpler coding 1141 * and not really performance critical at this point. 1142 */ 1143 bzero (new_target_ptr, sizeof(*target_ptr) 1144 + (sizeof(target_ptr->TID) * new_size)); 1145 bcopy (target_ptr, new_target_ptr, 1146 sizeof(*target_ptr) 1147 + (sizeof(target_ptr->TID) * (target_ptr->size - 1))); 1148 bus_ptr->LUN[target] = new_target_ptr; 1149 kfree (target_ptr, M_TEMP); 1150 target_ptr = new_target_ptr; 1151 target_ptr->size = new_size + 1; 1152 } 1153 /* 1154 * Now, acquire the TID address from the LUN indexed list. 1155 */ 1156 return (&(target_ptr->TID[lun])); 1157 } /* ASR_getTidAddress */ 1158 1159 /* 1160 * Get a pre-existing TID relationship. 1161 * 1162 * If the TID was never set, return (tid_t)-1. 1163 * 1164 * should use mutex rather than spl. 1165 */ 1166 STATIC INLINE tid_t 1167 ASR_getTid ( 1168 IN Asr_softc_t * sc, 1169 IN int bus, 1170 IN int target, 1171 IN int lun) 1172 { 1173 tid_t * tid_ptr; 1174 OUT tid_t retval; 1175 1176 crit_enter(); 1177 if (((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, FALSE)) 1178 == (tid_t *)NULL) 1179 /* (tid_t)0 or (tid_t)-1 indicate no TID */ 1180 || (*tid_ptr == (tid_t)0)) { 1181 crit_exit(); 1182 return ((tid_t)-1); 1183 } 1184 retval = *tid_ptr; 1185 crit_exit(); 1186 return (retval); 1187 } /* ASR_getTid */ 1188 1189 /* 1190 * Set a TID relationship. 1191 * 1192 * If the TID was not set, return (tid_t)-1. 1193 * 1194 * should use mutex rather than spl. 1195 */ 1196 STATIC INLINE tid_t 1197 ASR_setTid ( 1198 INOUT Asr_softc_t * sc, 1199 IN int bus, 1200 IN int target, 1201 IN int lun, 1202 INOUT tid_t TID) 1203 { 1204 tid_t * tid_ptr; 1205 1206 if (TID != (tid_t)-1) { 1207 if (TID == 0) { 1208 return ((tid_t)-1); 1209 } 1210 crit_enter(); 1211 if ((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, TRUE)) 1212 == (tid_t *)NULL) { 1213 crit_exit(); 1214 return ((tid_t)-1); 1215 } 1216 *tid_ptr = TID; 1217 crit_exit(); 1218 } 1219 return (TID); 1220 } /* ASR_setTid */ 1221 1222 /*-------------------------------------------------------------------------*/ 1223 /* Function ASR_rescan */ 1224 /*-------------------------------------------------------------------------*/ 1225 /* The Parameters Passed To This Function Are : */ 1226 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */ 1227 /* */ 1228 /* This Function Will rescan the adapter and resynchronize any data */ 1229 /* */ 1230 /* Return : 0 For OK, Error Code Otherwise */ 1231 /*-------------------------------------------------------------------------*/ 1232 1233 STATIC INLINE int 1234 ASR_rescan( 1235 IN Asr_softc_t * sc) 1236 { 1237 int bus; 1238 OUT int error; 1239 1240 /* 1241 * Re-acquire the LCT table and synchronize us to the adapter. 1242 */ 1243 if ((error = ASR_acquireLct(sc)) == 0) { 1244 error = ASR_acquireHrt(sc); 1245 } 1246 1247 if (error != 0) { 1248 return error; 1249 } 1250 1251 bus = sc->ha_MaxBus; 1252 /* Reset all existing cached TID lookups */ 1253 do { 1254 int target, event = 0; 1255 1256 /* 1257 * Scan for all targets on this bus to see if they 1258 * got affected by the rescan. 1259 */ 1260 for (target = 0; target <= sc->ha_MaxId; ++target) { 1261 int lun; 1262 1263 /* Stay away from the controller ID */ 1264 if (target == sc->ha_adapter_target[bus]) { 1265 continue; 1266 } 1267 for (lun = 0; lun <= sc->ha_MaxLun; ++lun) { 1268 PI2O_LCT_ENTRY Device; 1269 tid_t TID = (tid_t)-1; 1270 tid_t LastTID; 1271 1272 /* 1273 * See if the cached TID changed. Search for 1274 * the device in our new LCT. 1275 */ 1276 for (Device = sc->ha_LCT->LCTEntry; 1277 Device < (PI2O_LCT_ENTRY)(((U32 *)sc->ha_LCT) 1278 + I2O_LCT_getTableSize(sc->ha_LCT)); 1279 ++Device) { 1280 if ((Device->le_type != I2O_UNKNOWN) 1281 && (Device->le_bus == bus) 1282 && (Device->le_target == target) 1283 && (Device->le_lun == lun) 1284 && (I2O_LCT_ENTRY_getUserTID(Device) 1285 == 0xFFF)) { 1286 TID = I2O_LCT_ENTRY_getLocalTID( 1287 Device); 1288 break; 1289 } 1290 } 1291 /* 1292 * Indicate to the OS that the label needs 1293 * to be recalculated, or that the specific 1294 * open device is no longer valid (Merde) 1295 * because the cached TID changed. 1296 */ 1297 LastTID = ASR_getTid (sc, bus, target, lun); 1298 if (LastTID != TID) { 1299 struct cam_path * path; 1300 1301 if (xpt_create_path(&path, 1302 /*periph*/NULL, 1303 cam_sim_path(sc->ha_sim[bus]), 1304 target, lun) != CAM_REQ_CMP) { 1305 if (TID == (tid_t)-1) { 1306 event |= AC_LOST_DEVICE; 1307 } else { 1308 event |= AC_INQ_CHANGED 1309 | AC_GETDEV_CHANGED; 1310 } 1311 } else { 1312 if (TID == (tid_t)-1) { 1313 xpt_async( 1314 AC_LOST_DEVICE, 1315 path, NULL); 1316 } else if (LastTID == (tid_t)-1) { 1317 struct ccb_getdev ccb; 1318 1319 xpt_setup_ccb( 1320 &(ccb.ccb_h), 1321 path, /*priority*/5); 1322 xpt_async( 1323 AC_FOUND_DEVICE, 1324 path, 1325 &ccb); 1326 } else { 1327 xpt_async( 1328 AC_INQ_CHANGED, 1329 path, NULL); 1330 xpt_async( 1331 AC_GETDEV_CHANGED, 1332 path, NULL); 1333 } 1334 } 1335 } 1336 /* 1337 * We have the option of clearing the 1338 * cached TID for it to be rescanned, or to 1339 * set it now even if the device never got 1340 * accessed. We chose the later since we 1341 * currently do not use the condition that 1342 * the TID ever got cached. 1343 */ 1344 ASR_setTid (sc, bus, target, lun, TID); 1345 } 1346 } 1347 /* 1348 * The xpt layer can not handle multiple events at the 1349 * same call. 1350 */ 1351 if (event & AC_LOST_DEVICE) { 1352 xpt_async(AC_LOST_DEVICE, sc->ha_path[bus], NULL); 1353 } 1354 if (event & AC_INQ_CHANGED) { 1355 xpt_async(AC_INQ_CHANGED, sc->ha_path[bus], NULL); 1356 } 1357 if (event & AC_GETDEV_CHANGED) { 1358 xpt_async(AC_GETDEV_CHANGED, sc->ha_path[bus], NULL); 1359 } 1360 } while (--bus >= 0); 1361 return (error); 1362 } /* ASR_rescan */ 1363 1364 /*-------------------------------------------------------------------------*/ 1365 /* Function ASR_reset */ 1366 /*-------------------------------------------------------------------------*/ 1367 /* The Parameters Passed To This Function Are : */ 1368 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */ 1369 /* */ 1370 /* This Function Will reset the adapter and resynchronize any data */ 1371 /* */ 1372 /* Return : None */ 1373 /*-------------------------------------------------------------------------*/ 1374 1375 STATIC INLINE int 1376 ASR_reset( 1377 IN Asr_softc_t * sc) 1378 { 1379 int retVal; 1380 1381 crit_enter(); 1382 if ((sc->ha_in_reset == HA_IN_RESET) 1383 || (sc->ha_in_reset == HA_OFF_LINE_RECOVERY)) { 1384 crit_exit(); 1385 return (EBUSY); 1386 } 1387 /* 1388 * Promotes HA_OPERATIONAL to HA_IN_RESET, 1389 * or HA_OFF_LINE to HA_OFF_LINE_RECOVERY. 1390 */ 1391 ++(sc->ha_in_reset); 1392 if (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0) { 1393 debug_asr_printf ("ASR_resetIOP failed\n"); 1394 /* 1395 * We really need to take this card off-line, easier said 1396 * than make sense. Better to keep retrying for now since if a 1397 * UART cable is connected the blinkLEDs the adapter is now in 1398 * a hard state requiring action from the monitor commands to 1399 * the HBA to continue. For debugging waiting forever is a 1400 * good thing. In a production system, however, one may wish 1401 * to instead take the card off-line ... 1402 */ 1403 # if 0 && (defined(HA_OFF_LINE)) 1404 /* 1405 * Take adapter off-line. 1406 */ 1407 kprintf ("asr%d: Taking adapter off-line\n", 1408 sc->ha_path[0] 1409 ? cam_sim_unit(xpt_path_sim(sc->ha_path[0])) 1410 : 0); 1411 sc->ha_in_reset = HA_OFF_LINE; 1412 crit_exit(); 1413 return (ENXIO); 1414 # else 1415 /* Wait Forever */ 1416 while (ASR_resetIOP (sc->ha_Virt, sc->ha_Fvirt) == 0); 1417 # endif 1418 } 1419 retVal = ASR_init (sc); 1420 crit_exit(); 1421 if (retVal != 0) { 1422 debug_asr_printf ("ASR_init failed\n"); 1423 sc->ha_in_reset = HA_OFF_LINE; 1424 return (ENXIO); 1425 } 1426 if (ASR_rescan (sc) != 0) { 1427 debug_asr_printf ("ASR_rescan failed\n"); 1428 } 1429 ASR_failActiveCommands (sc); 1430 if (sc->ha_in_reset == HA_OFF_LINE_RECOVERY) { 1431 kprintf ("asr%d: Brining adapter back on-line\n", 1432 sc->ha_path[0] 1433 ? cam_sim_unit(xpt_path_sim(sc->ha_path[0])) 1434 : 0); 1435 } 1436 sc->ha_in_reset = HA_OPERATIONAL; 1437 return (0); 1438 } /* ASR_reset */ 1439 1440 /* 1441 * Device timeout handler. 1442 */ 1443 STATIC void 1444 asr_timeout( 1445 INOUT void * arg) 1446 { 1447 union asr_ccb * ccb = (union asr_ccb *)arg; 1448 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0); 1449 int s; 1450 1451 debug_asr_print_path(ccb); 1452 debug_asr_printf("timed out"); 1453 1454 /* 1455 * Check if the adapter has locked up? 1456 */ 1457 if ((s = ASR_getBlinkLedCode(sc)) != 0) { 1458 /* Reset Adapter */ 1459 kprintf ("asr%d: Blink LED 0x%x resetting adapter\n", 1460 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), s); 1461 if (ASR_reset (sc) == ENXIO) { 1462 /* Try again later */ 1463 callout_reset(&ccb->ccb_h.timeout_ch, 1464 (ccb->ccb_h.timeout * hz) / 1000, asr_timeout, ccb); 1465 } 1466 return; 1467 } 1468 /* 1469 * Abort does not function on the ASR card!!! Walking away from 1470 * the SCSI command is also *very* dangerous. A SCSI BUS reset is 1471 * our best bet, followed by a complete adapter reset if that fails. 1472 */ 1473 crit_enter(); 1474 /* Check if we already timed out once to raise the issue */ 1475 if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_CMD_TIMEOUT) { 1476 debug_asr_printf (" AGAIN\nreinitializing adapter\n"); 1477 if (ASR_reset (sc) == ENXIO) { 1478 callout_reset(&ccb->ccb_h.timeout_ch, 1479 (ccb->ccb_h.timeout * hz) / 1000, asr_timeout, ccb); 1480 } 1481 crit_exit(); 1482 return; 1483 } 1484 debug_asr_printf ("\nresetting bus\n"); 1485 /* If the BUS reset does not take, then an adapter reset is next! */ 1486 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 1487 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 1488 callout_reset(&ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000, 1489 asr_timeout, ccb); 1490 ASR_resetBus (sc, cam_sim_bus(xpt_path_sim(ccb->ccb_h.path))); 1491 xpt_async (AC_BUS_RESET, ccb->ccb_h.path, NULL); 1492 crit_exit(); 1493 } /* asr_timeout */ 1494 1495 /* 1496 * send a message asynchronously 1497 */ 1498 STATIC INLINE int 1499 ASR_queue( 1500 IN Asr_softc_t * sc, 1501 IN PI2O_MESSAGE_FRAME Message) 1502 { 1503 OUT U32 MessageOffset; 1504 union asr_ccb * ccb; 1505 1506 debug_asr_printf ("Host Command Dump:\n"); 1507 debug_asr_dump_message (Message); 1508 1509 ccb = (union asr_ccb *)(long) 1510 I2O_MESSAGE_FRAME_getInitiatorContext64(Message); 1511 1512 if ((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE) { 1513 bcopy (Message, sc->ha_Fvirt + MessageOffset, 1514 I2O_MESSAGE_FRAME_getMessageSize(Message) << 2); 1515 if (ccb) { 1516 ASR_ccbAdd (sc, ccb); 1517 } 1518 /* Post the command */ 1519 sc->ha_Virt->ToFIFO = MessageOffset; 1520 } else { 1521 if (ASR_getBlinkLedCode(sc)) { 1522 /* 1523 * Unlikely we can do anything if we can't grab a 1524 * message frame :-(, but lets give it a try. 1525 */ 1526 (void)ASR_reset (sc); 1527 } 1528 } 1529 return (MessageOffset); 1530 } /* ASR_queue */ 1531 1532 1533 /* Simple Scatter Gather elements */ 1534 #define SG(SGL,Index,Flags,Buffer,Size) \ 1535 I2O_FLAGS_COUNT_setCount( \ 1536 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \ 1537 Size); \ 1538 I2O_FLAGS_COUNT_setFlags( \ 1539 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \ 1540 I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | (Flags)); \ 1541 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress( \ 1542 &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index]), \ 1543 (Buffer == NULL) ? NULL : KVTOPHYS(Buffer)) 1544 1545 /* 1546 * Retrieve Parameter Group. 1547 * Buffer must be allocated using defAlignLong macro. 1548 */ 1549 STATIC void * 1550 ASR_getParams( 1551 IN Asr_softc_t * sc, 1552 IN tid_t TID, 1553 IN int Group, 1554 OUT void * Buffer, 1555 IN unsigned BufferSize) 1556 { 1557 struct paramGetMessage { 1558 I2O_UTIL_PARAMS_GET_MESSAGE M; 1559 char F[ 1560 sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)]; 1561 struct Operations { 1562 I2O_PARAM_OPERATIONS_LIST_HEADER Header; 1563 I2O_PARAM_OPERATION_ALL_TEMPLATE Template[1]; 1564 } O; 1565 }; 1566 defAlignLong(struct paramGetMessage, Message); 1567 struct Operations * Operations_Ptr; 1568 I2O_UTIL_PARAMS_GET_MESSAGE * Message_Ptr; 1569 struct ParamBuffer { 1570 I2O_PARAM_RESULTS_LIST_HEADER Header; 1571 I2O_PARAM_READ_OPERATION_RESULT Read; 1572 char Info[1]; 1573 } * Buffer_Ptr; 1574 1575 Message_Ptr = (I2O_UTIL_PARAMS_GET_MESSAGE *)ASR_fillMessage(Message, 1576 sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) 1577 + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)); 1578 Operations_Ptr = (struct Operations *)((char *)Message_Ptr 1579 + sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) 1580 + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)); 1581 bzero ((void *)Operations_Ptr, sizeof(struct Operations)); 1582 I2O_PARAM_OPERATIONS_LIST_HEADER_setOperationCount( 1583 &(Operations_Ptr->Header), 1); 1584 I2O_PARAM_OPERATION_ALL_TEMPLATE_setOperation( 1585 &(Operations_Ptr->Template[0]), I2O_PARAMS_OPERATION_FIELD_GET); 1586 I2O_PARAM_OPERATION_ALL_TEMPLATE_setFieldCount( 1587 &(Operations_Ptr->Template[0]), 0xFFFF); 1588 I2O_PARAM_OPERATION_ALL_TEMPLATE_setGroupNumber( 1589 &(Operations_Ptr->Template[0]), Group); 1590 bzero ((void *)(Buffer_Ptr = getAlignLong(struct ParamBuffer, Buffer)), 1591 BufferSize); 1592 1593 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame), 1594 I2O_VERSION_11 1595 + (((sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT)) 1596 / sizeof(U32)) << 4)); 1597 I2O_MESSAGE_FRAME_setTargetAddress (&(Message_Ptr->StdMessageFrame), 1598 TID); 1599 I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame), 1600 I2O_UTIL_PARAMS_GET); 1601 /* 1602 * Set up the buffers as scatter gather elements. 1603 */ 1604 SG(&(Message_Ptr->SGL), 0, 1605 I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER, 1606 Operations_Ptr, sizeof(struct Operations)); 1607 SG(&(Message_Ptr->SGL), 1, 1608 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, 1609 Buffer_Ptr, BufferSize); 1610 1611 if ((ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) == CAM_REQ_CMP) 1612 && (Buffer_Ptr->Header.ResultCount)) { 1613 return ((void *)(Buffer_Ptr->Info)); 1614 } 1615 return ((void *)NULL); 1616 } /* ASR_getParams */ 1617 1618 /* 1619 * Acquire the LCT information. 1620 */ 1621 STATIC INLINE int 1622 ASR_acquireLct ( 1623 INOUT Asr_softc_t * sc) 1624 { 1625 PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr; 1626 PI2O_SGE_SIMPLE_ELEMENT sg; 1627 int MessageSizeInBytes; 1628 caddr_t v; 1629 int len; 1630 I2O_LCT Table; 1631 PI2O_LCT_ENTRY Entry; 1632 1633 /* 1634 * sc value assumed valid 1635 */ 1636 MessageSizeInBytes = sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) 1637 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT); 1638 if ((Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)kmalloc ( 1639 MessageSizeInBytes, M_TEMP, M_WAITOK)) 1640 == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) { 1641 return (ENOMEM); 1642 } 1643 (void)ASR_fillMessage((char *)Message_Ptr, MessageSizeInBytes); 1644 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame), 1645 (I2O_VERSION_11 + 1646 (((sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT)) 1647 / sizeof(U32)) << 4))); 1648 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), 1649 I2O_EXEC_LCT_NOTIFY); 1650 I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr, 1651 I2O_CLASS_MATCH_ANYCLASS); 1652 /* 1653 * Call the LCT table to determine the number of device entries 1654 * to reserve space for. 1655 */ 1656 SG(&(Message_Ptr->SGL), 0, 1657 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, &Table, 1658 sizeof(I2O_LCT)); 1659 /* 1660 * since this code is reused in several systems, code efficiency 1661 * is greater by using a shift operation rather than a divide by 1662 * sizeof(u_int32_t). 1663 */ 1664 I2O_LCT_setTableSize(&Table, 1665 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2); 1666 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); 1667 /* 1668 * Determine the size of the LCT table. 1669 */ 1670 if (sc->ha_LCT) { 1671 kfree (sc->ha_LCT, M_TEMP); 1672 } 1673 /* 1674 * kmalloc only generates contiguous memory when less than a 1675 * page is expected. We must break the request up into an SG list ... 1676 */ 1677 if (((len = (I2O_LCT_getTableSize(&Table) << 2)) <= 1678 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY))) 1679 || (len > (128 * 1024))) { /* Arbitrary */ 1680 kfree (Message_Ptr, M_TEMP); 1681 return (EINVAL); 1682 } 1683 if ((sc->ha_LCT = (PI2O_LCT)kmalloc (len, M_TEMP, M_WAITOK)) 1684 == (PI2O_LCT)NULL) { 1685 kfree (Message_Ptr, M_TEMP); 1686 return (ENOMEM); 1687 } 1688 /* 1689 * since this code is reused in several systems, code efficiency 1690 * is greater by using a shift operation rather than a divide by 1691 * sizeof(u_int32_t). 1692 */ 1693 I2O_LCT_setTableSize(sc->ha_LCT, 1694 (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2); 1695 /* 1696 * Convert the access to the LCT table into a SG list. 1697 */ 1698 sg = Message_Ptr->SGL.u.Simple; 1699 v = (caddr_t)(sc->ha_LCT); 1700 for (;;) { 1701 int next, base, span; 1702 1703 span = 0; 1704 next = base = KVTOPHYS(v); 1705 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base); 1706 1707 /* How far can we go contiguously */ 1708 while ((len > 0) && (base == next)) { 1709 int size; 1710 1711 next = trunc_page(base) + PAGE_SIZE; 1712 size = next - base; 1713 if (size > len) { 1714 size = len; 1715 } 1716 span += size; 1717 v += size; 1718 len -= size; 1719 base = KVTOPHYS(v); 1720 } 1721 1722 /* Construct the Flags */ 1723 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span); 1724 { 1725 int rw = I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT; 1726 if (len <= 0) { 1727 rw = (I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT 1728 | I2O_SGL_FLAGS_LAST_ELEMENT 1729 | I2O_SGL_FLAGS_END_OF_BUFFER); 1730 } 1731 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount), rw); 1732 } 1733 1734 if (len <= 0) { 1735 break; 1736 } 1737 1738 /* 1739 * Incrementing requires resizing of the packet. 1740 */ 1741 ++sg; 1742 MessageSizeInBytes += sizeof(*sg); 1743 I2O_MESSAGE_FRAME_setMessageSize( 1744 &(Message_Ptr->StdMessageFrame), 1745 I2O_MESSAGE_FRAME_getMessageSize( 1746 &(Message_Ptr->StdMessageFrame)) 1747 + (sizeof(*sg) / sizeof(U32))); 1748 { 1749 PI2O_EXEC_LCT_NOTIFY_MESSAGE NewMessage_Ptr; 1750 1751 if ((NewMessage_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE) 1752 kmalloc (MessageSizeInBytes, M_TEMP, M_WAITOK)) 1753 == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) { 1754 kfree (sc->ha_LCT, M_TEMP); 1755 sc->ha_LCT = (PI2O_LCT)NULL; 1756 kfree (Message_Ptr, M_TEMP); 1757 return (ENOMEM); 1758 } 1759 span = ((caddr_t)sg) - (caddr_t)Message_Ptr; 1760 bcopy ((caddr_t)Message_Ptr, 1761 (caddr_t)NewMessage_Ptr, span); 1762 kfree (Message_Ptr, M_TEMP); 1763 sg = (PI2O_SGE_SIMPLE_ELEMENT) 1764 (((caddr_t)NewMessage_Ptr) + span); 1765 Message_Ptr = NewMessage_Ptr; 1766 } 1767 } 1768 { int retval; 1769 1770 retval = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); 1771 kfree (Message_Ptr, M_TEMP); 1772 if (retval != CAM_REQ_CMP) { 1773 return (ENODEV); 1774 } 1775 } 1776 /* If the LCT table grew, lets truncate accesses */ 1777 if (I2O_LCT_getTableSize(&Table) < I2O_LCT_getTableSize(sc->ha_LCT)) { 1778 I2O_LCT_setTableSize(sc->ha_LCT, I2O_LCT_getTableSize(&Table)); 1779 } 1780 for (Entry = sc->ha_LCT->LCTEntry; Entry < (PI2O_LCT_ENTRY) 1781 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); 1782 ++Entry) { 1783 Entry->le_type = I2O_UNKNOWN; 1784 switch (I2O_CLASS_ID_getClass(&(Entry->ClassID))) { 1785 1786 case I2O_CLASS_RANDOM_BLOCK_STORAGE: 1787 Entry->le_type = I2O_BSA; 1788 break; 1789 1790 case I2O_CLASS_SCSI_PERIPHERAL: 1791 Entry->le_type = I2O_SCSI; 1792 break; 1793 1794 case I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL: 1795 Entry->le_type = I2O_FCA; 1796 break; 1797 1798 case I2O_CLASS_BUS_ADAPTER_PORT: 1799 Entry->le_type = I2O_PORT | I2O_SCSI; 1800 /* FALLTHRU */ 1801 case I2O_CLASS_FIBRE_CHANNEL_PORT: 1802 if (I2O_CLASS_ID_getClass(&(Entry->ClassID)) == 1803 I2O_CLASS_FIBRE_CHANNEL_PORT) { 1804 Entry->le_type = I2O_PORT | I2O_FCA; 1805 } 1806 { struct ControllerInfo { 1807 I2O_PARAM_RESULTS_LIST_HEADER Header; 1808 I2O_PARAM_READ_OPERATION_RESULT Read; 1809 I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info; 1810 }; 1811 defAlignLong(struct ControllerInfo, Buffer); 1812 PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info; 1813 1814 Entry->le_bus = 0xff; 1815 Entry->le_target = 0xff; 1816 Entry->le_lun = 0xff; 1817 1818 if ((Info = (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR) 1819 ASR_getParams(sc, 1820 I2O_LCT_ENTRY_getLocalTID(Entry), 1821 I2O_HBA_SCSI_CONTROLLER_INFO_GROUP_NO, 1822 Buffer, sizeof(struct ControllerInfo))) 1823 == (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)NULL) { 1824 continue; 1825 } 1826 Entry->le_target 1827 = I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getInitiatorID( 1828 Info); 1829 Entry->le_lun = 0; 1830 } /* FALLTHRU */ 1831 default: 1832 continue; 1833 } 1834 { struct DeviceInfo { 1835 I2O_PARAM_RESULTS_LIST_HEADER Header; 1836 I2O_PARAM_READ_OPERATION_RESULT Read; 1837 I2O_DPT_DEVICE_INFO_SCALAR Info; 1838 }; 1839 defAlignLong (struct DeviceInfo, Buffer); 1840 PI2O_DPT_DEVICE_INFO_SCALAR Info; 1841 1842 Entry->le_bus = 0xff; 1843 Entry->le_target = 0xff; 1844 Entry->le_lun = 0xff; 1845 1846 if ((Info = (PI2O_DPT_DEVICE_INFO_SCALAR) 1847 ASR_getParams(sc, 1848 I2O_LCT_ENTRY_getLocalTID(Entry), 1849 I2O_DPT_DEVICE_INFO_GROUP_NO, 1850 Buffer, sizeof(struct DeviceInfo))) 1851 == (PI2O_DPT_DEVICE_INFO_SCALAR)NULL) { 1852 continue; 1853 } 1854 Entry->le_type 1855 |= I2O_DPT_DEVICE_INFO_SCALAR_getDeviceType(Info); 1856 Entry->le_bus 1857 = I2O_DPT_DEVICE_INFO_SCALAR_getBus(Info); 1858 if ((Entry->le_bus > sc->ha_MaxBus) 1859 && (Entry->le_bus <= MAX_CHANNEL)) { 1860 sc->ha_MaxBus = Entry->le_bus; 1861 } 1862 Entry->le_target 1863 = I2O_DPT_DEVICE_INFO_SCALAR_getIdentifier(Info); 1864 Entry->le_lun 1865 = I2O_DPT_DEVICE_INFO_SCALAR_getLunInfo(Info); 1866 } 1867 } 1868 /* 1869 * A zero return value indicates success. 1870 */ 1871 return (0); 1872 } /* ASR_acquireLct */ 1873 1874 /* 1875 * Initialize a message frame. 1876 * We assume that the CDB has already been set up, so all we do here is 1877 * generate the Scatter Gather list. 1878 */ 1879 STATIC INLINE PI2O_MESSAGE_FRAME 1880 ASR_init_message( 1881 IN union asr_ccb * ccb, 1882 OUT PI2O_MESSAGE_FRAME Message) 1883 { 1884 int next, span, base, rw; 1885 OUT PI2O_MESSAGE_FRAME Message_Ptr; 1886 Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0); 1887 PI2O_SGE_SIMPLE_ELEMENT sg; 1888 caddr_t v; 1889 vm_size_t size, len; 1890 U32 MessageSize; 1891 1892 /* We only need to zero out the PRIVATE_SCSI_SCB_EXECUTE_MESSAGE */ 1893 bzero (Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message), 1894 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT))); 1895 1896 { 1897 int target = ccb->ccb_h.target_id; 1898 int lun = ccb->ccb_h.target_lun; 1899 int bus = cam_sim_bus(xpt_path_sim(ccb->ccb_h.path)); 1900 tid_t TID; 1901 1902 if ((TID = ASR_getTid (sc, bus, target, lun)) == (tid_t)-1) { 1903 PI2O_LCT_ENTRY Device; 1904 1905 TID = (tid_t)0; 1906 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY) 1907 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); 1908 ++Device) { 1909 if ((Device->le_type != I2O_UNKNOWN) 1910 && (Device->le_bus == bus) 1911 && (Device->le_target == target) 1912 && (Device->le_lun == lun) 1913 && (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF)) { 1914 TID = I2O_LCT_ENTRY_getLocalTID(Device); 1915 ASR_setTid (sc, Device->le_bus, 1916 Device->le_target, Device->le_lun, 1917 TID); 1918 break; 1919 } 1920 } 1921 } 1922 if (TID == (tid_t)0) { 1923 return ((PI2O_MESSAGE_FRAME)NULL); 1924 } 1925 I2O_MESSAGE_FRAME_setTargetAddress(Message_Ptr, TID); 1926 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID( 1927 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, TID); 1928 } 1929 I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11 | 1930 (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT)) 1931 / sizeof(U32)) << 4)); 1932 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr, 1933 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 1934 - sizeof(I2O_SG_ELEMENT)) / sizeof(U32)); 1935 I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1); 1936 I2O_MESSAGE_FRAME_setFunction(Message_Ptr, I2O_PRIVATE_MESSAGE); 1937 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode ( 1938 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, I2O_SCSI_SCB_EXEC); 1939 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags ( 1940 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, 1941 I2O_SCB_FLAG_ENABLE_DISCONNECT 1942 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 1943 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER); 1944 /* 1945 * We do not need any (optional byteswapping) method access to 1946 * the Initiator & Transaction context field. 1947 */ 1948 I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb); 1949 1950 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID( 1951 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, DPT_ORGANIZATION_ID); 1952 /* 1953 * copy the cdb over 1954 */ 1955 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength( 1956 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, ccb->csio.cdb_len); 1957 bcopy (&(ccb->csio.cdb_io), 1958 ((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->CDB, ccb->csio.cdb_len); 1959 1960 /* 1961 * Given a buffer describing a transfer, set up a scatter/gather map 1962 * in a ccb to map that SCSI transfer. 1963 */ 1964 1965 rw = (ccb->ccb_h.flags & CAM_DIR_IN) ? 0 : I2O_SGL_FLAGS_DIR; 1966 1967 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags ( 1968 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, 1969 (ccb->csio.dxfer_len) 1970 ? ((rw) ? (I2O_SCB_FLAG_XFER_TO_DEVICE 1971 | I2O_SCB_FLAG_ENABLE_DISCONNECT 1972 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 1973 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER) 1974 : (I2O_SCB_FLAG_XFER_FROM_DEVICE 1975 | I2O_SCB_FLAG_ENABLE_DISCONNECT 1976 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 1977 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)) 1978 : (I2O_SCB_FLAG_ENABLE_DISCONNECT 1979 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 1980 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)); 1981 1982 /* 1983 * Given a transfer described by a `data', fill in the SG list. 1984 */ 1985 sg = &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->SGL.u.Simple[0]; 1986 1987 len = ccb->csio.dxfer_len; 1988 v = ccb->csio.data_ptr; 1989 ASSERT (ccb->csio.dxfer_len >= 0); 1990 MessageSize = I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr); 1991 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount( 1992 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, len); 1993 while ((len > 0) && (sg < &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 1994 Message_Ptr)->SGL.u.Simple[SG_SIZE])) { 1995 span = 0; 1996 next = base = KVTOPHYS(v); 1997 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base); 1998 1999 /* How far can we go contiguously */ 2000 while ((len > 0) && (base == next)) { 2001 next = trunc_page(base) + PAGE_SIZE; 2002 size = next - base; 2003 if (size > len) { 2004 size = len; 2005 } 2006 span += size; 2007 v += size; 2008 len -= size; 2009 base = KVTOPHYS(v); 2010 } 2011 2012 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span); 2013 if (len == 0) { 2014 rw |= I2O_SGL_FLAGS_LAST_ELEMENT; 2015 } 2016 I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount), 2017 I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | rw); 2018 ++sg; 2019 MessageSize += sizeof(*sg) / sizeof(U32); 2020 } 2021 /* We always do the request sense ... */ 2022 if ((span = ccb->csio.sense_len) == 0) { 2023 span = sizeof(ccb->csio.sense_data); 2024 } 2025 SG(sg, 0, I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, 2026 &(ccb->csio.sense_data), span); 2027 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr, 2028 MessageSize + (sizeof(*sg) / sizeof(U32))); 2029 return (Message_Ptr); 2030 } /* ASR_init_message */ 2031 2032 /* 2033 * Reset the adapter. 2034 */ 2035 STATIC INLINE U32 2036 ASR_initOutBound ( 2037 INOUT Asr_softc_t * sc) 2038 { 2039 struct initOutBoundMessage { 2040 I2O_EXEC_OUTBOUND_INIT_MESSAGE M; 2041 U32 R; 2042 }; 2043 defAlignLong(struct initOutBoundMessage,Message); 2044 PI2O_EXEC_OUTBOUND_INIT_MESSAGE Message_Ptr; 2045 OUT U32 * volatile Reply_Ptr; 2046 U32 Old; 2047 2048 /* 2049 * Build up our copy of the Message. 2050 */ 2051 Message_Ptr = (PI2O_EXEC_OUTBOUND_INIT_MESSAGE)ASR_fillMessage(Message, 2052 sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE)); 2053 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), 2054 I2O_EXEC_OUTBOUND_INIT); 2055 I2O_EXEC_OUTBOUND_INIT_MESSAGE_setHostPageFrameSize(Message_Ptr, PAGE_SIZE); 2056 I2O_EXEC_OUTBOUND_INIT_MESSAGE_setOutboundMFrameSize(Message_Ptr, 2057 sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)); 2058 /* 2059 * Reset the Reply Status 2060 */ 2061 *(Reply_Ptr = (U32 *)((char *)Message_Ptr 2062 + sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE))) = 0; 2063 SG (&(Message_Ptr->SGL), 0, I2O_SGL_FLAGS_LAST_ELEMENT, Reply_Ptr, 2064 sizeof(U32)); 2065 /* 2066 * Send the Message out 2067 */ 2068 if ((Old = ASR_initiateCp (sc->ha_Virt, sc->ha_Fvirt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) { 2069 u_long size, addr; 2070 2071 /* 2072 * Wait for a response (Poll). 2073 */ 2074 while (*Reply_Ptr < I2O_EXEC_OUTBOUND_INIT_REJECTED); 2075 /* 2076 * Re-enable the interrupts. 2077 */ 2078 sc->ha_Virt->Mask = Old; 2079 /* 2080 * Populate the outbound table. 2081 */ 2082 if (sc->ha_Msgs == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) { 2083 2084 /* Allocate the reply frames */ 2085 size = sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) 2086 * sc->ha_Msgs_Count; 2087 2088 /* 2089 * contigmalloc only works reliably at 2090 * initialization time. 2091 */ 2092 if ((sc->ha_Msgs = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) 2093 contigmalloc (size, M_DEVBUF, M_WAITOK | M_ZERO, 0ul, 2094 0xFFFFFFFFul, (u_long)sizeof(U32), 0ul)) 2095 != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) { 2096 sc->ha_Msgs_Phys = KVTOPHYS(sc->ha_Msgs); 2097 } 2098 } 2099 2100 /* Initialize the outbound FIFO */ 2101 if (sc->ha_Msgs != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) 2102 for (size = sc->ha_Msgs_Count, addr = sc->ha_Msgs_Phys; 2103 size; --size) { 2104 sc->ha_Virt->FromFIFO = addr; 2105 addr += sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME); 2106 } 2107 return (*Reply_Ptr); 2108 } 2109 return (0); 2110 } /* ASR_initOutBound */ 2111 2112 /* 2113 * Set the system table 2114 */ 2115 STATIC INLINE int 2116 ASR_setSysTab( 2117 IN Asr_softc_t * sc) 2118 { 2119 PI2O_EXEC_SYS_TAB_SET_MESSAGE Message_Ptr; 2120 PI2O_SET_SYSTAB_HEADER SystemTable; 2121 Asr_softc_t * ha; 2122 PI2O_SGE_SIMPLE_ELEMENT sg; 2123 int retVal; 2124 2125 if ((SystemTable = (PI2O_SET_SYSTAB_HEADER)kmalloc ( 2126 sizeof(I2O_SET_SYSTAB_HEADER), M_TEMP, M_WAITOK | M_ZERO)) 2127 == (PI2O_SET_SYSTAB_HEADER)NULL) { 2128 return (ENOMEM); 2129 } 2130 for (ha = Asr_softc; ha; ha = ha->ha_next) { 2131 ++SystemTable->NumberEntries; 2132 } 2133 if ((Message_Ptr = (PI2O_EXEC_SYS_TAB_SET_MESSAGE)kmalloc ( 2134 sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT) 2135 + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)), 2136 M_TEMP, M_WAITOK)) == (PI2O_EXEC_SYS_TAB_SET_MESSAGE)NULL) { 2137 kfree (SystemTable, M_TEMP); 2138 return (ENOMEM); 2139 } 2140 (void)ASR_fillMessage((char *)Message_Ptr, 2141 sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT) 2142 + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT))); 2143 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame), 2144 (I2O_VERSION_11 + 2145 (((sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)) 2146 / sizeof(U32)) << 4))); 2147 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), 2148 I2O_EXEC_SYS_TAB_SET); 2149 /* 2150 * Call the LCT table to determine the number of device entries 2151 * to reserve space for. 2152 * since this code is reused in several systems, code efficiency 2153 * is greater by using a shift operation rather than a divide by 2154 * sizeof(u_int32_t). 2155 */ 2156 sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr 2157 + ((I2O_MESSAGE_FRAME_getVersionOffset( 2158 &(Message_Ptr->StdMessageFrame)) & 0xF0) >> 2)); 2159 SG(sg, 0, I2O_SGL_FLAGS_DIR, SystemTable, sizeof(I2O_SET_SYSTAB_HEADER)); 2160 ++sg; 2161 for (ha = Asr_softc; ha; ha = ha->ha_next) { 2162 SG(sg, 0, 2163 ((ha->ha_next) 2164 ? (I2O_SGL_FLAGS_DIR) 2165 : (I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER)), 2166 &(ha->ha_SystemTable), sizeof(ha->ha_SystemTable)); 2167 ++sg; 2168 } 2169 SG(sg, 0, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0); 2170 SG(sg, 1, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_LAST_ELEMENT 2171 | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0); 2172 retVal = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); 2173 kfree (Message_Ptr, M_TEMP); 2174 kfree (SystemTable, M_TEMP); 2175 return (retVal); 2176 } /* ASR_setSysTab */ 2177 2178 STATIC INLINE int 2179 ASR_acquireHrt ( 2180 INOUT Asr_softc_t * sc) 2181 { 2182 defAlignLong(I2O_EXEC_HRT_GET_MESSAGE,Message); 2183 I2O_EXEC_HRT_GET_MESSAGE * Message_Ptr; 2184 struct { 2185 I2O_HRT Header; 2186 I2O_HRT_ENTRY Entry[MAX_CHANNEL]; 2187 } Hrt; 2188 u_int8_t NumberOfEntries; 2189 PI2O_HRT_ENTRY Entry; 2190 2191 bzero ((void *)&Hrt, sizeof (Hrt)); 2192 Message_Ptr = (I2O_EXEC_HRT_GET_MESSAGE *)ASR_fillMessage(Message, 2193 sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT) 2194 + sizeof(I2O_SGE_SIMPLE_ELEMENT)); 2195 I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame), 2196 (I2O_VERSION_11 2197 + (((sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT)) 2198 / sizeof(U32)) << 4))); 2199 I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame), 2200 I2O_EXEC_HRT_GET); 2201 2202 /* 2203 * Set up the buffers as scatter gather elements. 2204 */ 2205 SG(&(Message_Ptr->SGL), 0, 2206 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, 2207 &Hrt, sizeof(Hrt)); 2208 if (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != CAM_REQ_CMP) { 2209 return (ENODEV); 2210 } 2211 if ((NumberOfEntries = I2O_HRT_getNumberEntries(&Hrt.Header)) 2212 > (MAX_CHANNEL + 1)) { 2213 NumberOfEntries = MAX_CHANNEL + 1; 2214 } 2215 for (Entry = Hrt.Header.HRTEntry; 2216 NumberOfEntries != 0; 2217 ++Entry, --NumberOfEntries) { 2218 PI2O_LCT_ENTRY Device; 2219 2220 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY) 2221 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); 2222 ++Device) { 2223 if (I2O_LCT_ENTRY_getLocalTID(Device) 2224 == (I2O_HRT_ENTRY_getAdapterID(Entry) & 0xFFF)) { 2225 Device->le_bus = I2O_HRT_ENTRY_getAdapterID( 2226 Entry) >> 16; 2227 if ((Device->le_bus > sc->ha_MaxBus) 2228 && (Device->le_bus <= MAX_CHANNEL)) { 2229 sc->ha_MaxBus = Device->le_bus; 2230 } 2231 } 2232 } 2233 } 2234 return (0); 2235 } /* ASR_acquireHrt */ 2236 2237 /* 2238 * Enable the adapter. 2239 */ 2240 STATIC INLINE int 2241 ASR_enableSys ( 2242 IN Asr_softc_t * sc) 2243 { 2244 defAlignLong(I2O_EXEC_SYS_ENABLE_MESSAGE,Message); 2245 PI2O_EXEC_SYS_ENABLE_MESSAGE Message_Ptr; 2246 2247 Message_Ptr = (PI2O_EXEC_SYS_ENABLE_MESSAGE)ASR_fillMessage(Message, 2248 sizeof(I2O_EXEC_SYS_ENABLE_MESSAGE)); 2249 I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), 2250 I2O_EXEC_SYS_ENABLE); 2251 return (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != 0); 2252 } /* ASR_enableSys */ 2253 2254 /* 2255 * Perform the stages necessary to initialize the adapter 2256 */ 2257 STATIC int 2258 ASR_init( 2259 IN Asr_softc_t * sc) 2260 { 2261 return ((ASR_initOutBound(sc) == 0) 2262 || (ASR_setSysTab(sc) != CAM_REQ_CMP) 2263 || (ASR_enableSys(sc) != CAM_REQ_CMP)); 2264 } /* ASR_init */ 2265 2266 /* 2267 * Send a Synchronize Cache command to the target device. 2268 */ 2269 STATIC INLINE void 2270 ASR_sync ( 2271 IN Asr_softc_t * sc, 2272 IN int bus, 2273 IN int target, 2274 IN int lun) 2275 { 2276 tid_t TID; 2277 2278 /* 2279 * We will not synchronize the device when there are outstanding 2280 * commands issued by the OS (this is due to a locked up device, 2281 * as the OS normally would flush all outstanding commands before 2282 * issuing a shutdown or an adapter reset). 2283 */ 2284 if ((sc != (Asr_softc_t *)NULL) 2285 && (LIST_FIRST(&(sc->ha_ccb)) != (struct ccb_hdr *)NULL) 2286 && ((TID = ASR_getTid (sc, bus, target, lun)) != (tid_t)-1) 2287 && (TID != (tid_t)0)) { 2288 defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message); 2289 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr; 2290 2291 bzero (Message_Ptr 2292 = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message), 2293 sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 2294 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT)); 2295 2296 I2O_MESSAGE_FRAME_setVersionOffset( 2297 (PI2O_MESSAGE_FRAME)Message_Ptr, 2298 I2O_VERSION_11 2299 | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 2300 - sizeof(I2O_SG_ELEMENT)) 2301 / sizeof(U32)) << 4)); 2302 I2O_MESSAGE_FRAME_setMessageSize( 2303 (PI2O_MESSAGE_FRAME)Message_Ptr, 2304 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 2305 - sizeof(I2O_SG_ELEMENT)) 2306 / sizeof(U32)); 2307 I2O_MESSAGE_FRAME_setInitiatorAddress ( 2308 (PI2O_MESSAGE_FRAME)Message_Ptr, 1); 2309 I2O_MESSAGE_FRAME_setFunction( 2310 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE); 2311 I2O_MESSAGE_FRAME_setTargetAddress( 2312 (PI2O_MESSAGE_FRAME)Message_Ptr, TID); 2313 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode ( 2314 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, 2315 I2O_SCSI_SCB_EXEC); 2316 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(Message_Ptr, TID); 2317 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr, 2318 I2O_SCB_FLAG_ENABLE_DISCONNECT 2319 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 2320 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER); 2321 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID( 2322 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, 2323 DPT_ORGANIZATION_ID); 2324 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6); 2325 Message_Ptr->CDB[0] = SYNCHRONIZE_CACHE; 2326 Message_Ptr->CDB[1] = (lun << 5); 2327 2328 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr, 2329 (I2O_SCB_FLAG_XFER_FROM_DEVICE 2330 | I2O_SCB_FLAG_ENABLE_DISCONNECT 2331 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 2332 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)); 2333 2334 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); 2335 2336 } 2337 } 2338 2339 STATIC INLINE void 2340 ASR_synchronize ( 2341 IN Asr_softc_t * sc) 2342 { 2343 int bus, target, lun; 2344 2345 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) { 2346 for (target = 0; target <= sc->ha_MaxId; ++target) { 2347 for (lun = 0; lun <= sc->ha_MaxLun; ++lun) { 2348 ASR_sync(sc,bus,target,lun); 2349 } 2350 } 2351 } 2352 } 2353 2354 /* 2355 * Reset the HBA, targets and BUS. 2356 * Currently this resets *all* the SCSI busses. 2357 */ 2358 STATIC INLINE void 2359 asr_hbareset( 2360 IN Asr_softc_t * sc) 2361 { 2362 ASR_synchronize (sc); 2363 (void)ASR_reset (sc); 2364 } /* asr_hbareset */ 2365 2366 /* 2367 * A reduced copy of the real pci_map_mem, incorporating the MAX_MAP 2368 * limit and a reduction in error checking (in the pre 4.0 case). 2369 */ 2370 STATIC int 2371 asr_pci_map_mem ( 2372 IN device_t tag, 2373 IN Asr_softc_t * sc) 2374 { 2375 int rid; 2376 u_int32_t p, l, s; 2377 2378 /* 2379 * I2O specification says we must find first *memory* mapped BAR 2380 */ 2381 for (rid = PCIR_MAPS; 2382 rid < (PCIR_MAPS + 4 * sizeof(u_int32_t)); 2383 rid += sizeof(u_int32_t)) { 2384 p = pci_read_config(tag, rid, sizeof(p)); 2385 if ((p & 1) == 0) { 2386 break; 2387 } 2388 } 2389 /* 2390 * Give up? 2391 */ 2392 if (rid >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) { 2393 rid = PCIR_MAPS; 2394 } 2395 p = pci_read_config(tag, rid, sizeof(p)); 2396 pci_write_config(tag, rid, -1, sizeof(p)); 2397 l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15); 2398 pci_write_config(tag, rid, p, sizeof(p)); 2399 if (l > MAX_MAP) { 2400 l = MAX_MAP; 2401 } 2402 /* 2403 * The 2005S Zero Channel RAID solution is not a perfect PCI 2404 * citizen. It asks for 4MB on BAR0, and 0MB on BAR1, once 2405 * enabled it rewrites the size of BAR0 to 2MB, sets BAR1 to 2406 * BAR0+2MB and sets it's size to 2MB. The IOP registers are 2407 * accessible via BAR0, the messaging registers are accessible 2408 * via BAR1. If the subdevice code is 50 to 59 decimal. 2409 */ 2410 s = pci_read_config(tag, PCIR_DEVVENDOR, sizeof(s)); 2411 if (s != 0xA5111044) { 2412 s = pci_read_config(tag, PCIR_SUBVEND_0, sizeof(s)); 2413 if ((((ADPTDOMINATOR_SUB_ID_START ^ s) & 0xF000FFFF) == 0) 2414 && (ADPTDOMINATOR_SUB_ID_START <= s) 2415 && (s <= ADPTDOMINATOR_SUB_ID_END)) { 2416 l = MAX_MAP; /* Conjoined BAR Raptor Daptor */ 2417 } 2418 } 2419 p &= ~15; 2420 sc->ha_mem_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid, 2421 p, p + l, l, RF_ACTIVE); 2422 if (sc->ha_mem_res == (struct resource *)NULL) { 2423 return (0); 2424 } 2425 sc->ha_Base = (void *)rman_get_start(sc->ha_mem_res); 2426 if (sc->ha_Base == (void *)NULL) { 2427 return (0); 2428 } 2429 sc->ha_Virt = (i2oRegs_t *) rman_get_virtual(sc->ha_mem_res); 2430 if (s == 0xA5111044) { /* Split BAR Raptor Daptor */ 2431 if ((rid += sizeof(u_int32_t)) 2432 >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) { 2433 return (0); 2434 } 2435 p = pci_read_config(tag, rid, sizeof(p)); 2436 pci_write_config(tag, rid, -1, sizeof(p)); 2437 l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15); 2438 pci_write_config(tag, rid, p, sizeof(p)); 2439 if (l > MAX_MAP) { 2440 l = MAX_MAP; 2441 } 2442 p &= ~15; 2443 sc->ha_mes_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid, 2444 p, p + l, l, RF_ACTIVE); 2445 if (sc->ha_mes_res == (struct resource *)NULL) { 2446 return (0); 2447 } 2448 if ((void *)rman_get_start(sc->ha_mes_res) == (void *)NULL) { 2449 return (0); 2450 } 2451 sc->ha_Fvirt = (U8 *) rman_get_virtual(sc->ha_mes_res); 2452 } else { 2453 sc->ha_Fvirt = (U8 *)(sc->ha_Virt); 2454 } 2455 return (1); 2456 } /* asr_pci_map_mem */ 2457 2458 /* 2459 * A simplified copy of the real pci_map_int with additional 2460 * registration requirements. 2461 */ 2462 STATIC int 2463 asr_pci_map_int ( 2464 IN device_t tag, 2465 IN Asr_softc_t * sc) 2466 { 2467 int rid = 0; 2468 int error; 2469 2470 sc->ha_irq_res = bus_alloc_resource(tag, SYS_RES_IRQ, &rid, 2471 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); 2472 if (sc->ha_irq_res == (struct resource *)NULL) { 2473 return (0); 2474 } 2475 error = bus_setup_intr(tag, sc->ha_irq_res, 0, 2476 (driver_intr_t *)asr_intr, (void *)sc, 2477 &(sc->ha_intr), NULL); 2478 if (error) { 2479 return (0); 2480 } 2481 sc->ha_irq = pci_read_config(tag, PCIR_INTLINE, sizeof(char)); 2482 return (1); 2483 } /* asr_pci_map_int */ 2484 2485 /* 2486 * Attach the devices, and virtual devices to the driver list. 2487 */ 2488 STATIC ATTACH_RET 2489 asr_attach (ATTACH_ARGS) 2490 { 2491 Asr_softc_t * sc; 2492 struct scsi_inquiry_data * iq; 2493 ATTACH_SET(); 2494 2495 sc = kmalloc(sizeof(*sc), M_DEVBUF, M_INTWAIT | M_ZERO); 2496 if (Asr_softc == (Asr_softc_t *)NULL) { 2497 /* 2498 * Fixup the OS revision as saved in the dptsig for the 2499 * engine (dptioctl.h) to pick up. 2500 */ 2501 bcopy (osrelease, &ASR_sig.dsDescription[16], 5); 2502 kprintf ("asr%d: major=%d\n", unit, asr_ops.head.maj); 2503 } 2504 /* 2505 * Initialize the software structure 2506 */ 2507 LIST_INIT(&(sc->ha_ccb)); 2508 /* Link us into the HA list */ 2509 { 2510 Asr_softc_t **ha; 2511 2512 for (ha = &Asr_softc; *ha; ha = &((*ha)->ha_next)); 2513 *(ha) = sc; 2514 } 2515 { 2516 PI2O_EXEC_STATUS_GET_REPLY status; 2517 int size; 2518 2519 /* 2520 * This is the real McCoy! 2521 */ 2522 if (!asr_pci_map_mem(tag, sc)) { 2523 kprintf ("asr%d: could not map memory\n", unit); 2524 ATTACH_RETURN(ENXIO); 2525 } 2526 /* Enable if not formerly enabled */ 2527 pci_write_config (tag, PCIR_COMMAND, 2528 pci_read_config (tag, PCIR_COMMAND, sizeof(char)) 2529 | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN, sizeof(char)); 2530 /* Knowledge is power, responsibility is direct */ 2531 { 2532 struct pci_devinfo { 2533 STAILQ_ENTRY(pci_devinfo) pci_links; 2534 struct resource_list resources; 2535 pcicfgregs cfg; 2536 } * dinfo = device_get_ivars(tag); 2537 sc->ha_pciBusNum = dinfo->cfg.bus; 2538 sc->ha_pciDeviceNum = (dinfo->cfg.slot << 3) 2539 | dinfo->cfg.func; 2540 } 2541 /* Check if the device is there? */ 2542 if ((ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt) == 0) 2543 || ((status = (PI2O_EXEC_STATUS_GET_REPLY)kmalloc ( 2544 sizeof(I2O_EXEC_STATUS_GET_REPLY), M_TEMP, M_WAITOK)) 2545 == (PI2O_EXEC_STATUS_GET_REPLY)NULL) 2546 || (ASR_getStatus(sc->ha_Virt, sc->ha_Fvirt, status) == NULL)) { 2547 kprintf ("asr%d: could not initialize hardware\n", unit); 2548 ATTACH_RETURN(ENODEV); /* Get next, maybe better luck */ 2549 } 2550 sc->ha_SystemTable.OrganizationID = status->OrganizationID; 2551 sc->ha_SystemTable.IOP_ID = status->IOP_ID; 2552 sc->ha_SystemTable.I2oVersion = status->I2oVersion; 2553 sc->ha_SystemTable.IopState = status->IopState; 2554 sc->ha_SystemTable.MessengerType = status->MessengerType; 2555 sc->ha_SystemTable.InboundMessageFrameSize 2556 = status->InboundMFrameSize; 2557 sc->ha_SystemTable.MessengerInfo.InboundMessagePortAddressLow 2558 = (U32)(sc->ha_Base) + (U32)(&(((i2oRegs_t *)NULL)->ToFIFO)); 2559 2560 if (!asr_pci_map_int(tag, (void *)sc)) { 2561 kprintf ("asr%d: could not map interrupt\n", unit); 2562 ATTACH_RETURN(ENXIO); 2563 } 2564 2565 /* Adjust the maximim inbound count */ 2566 if (((sc->ha_QueueSize 2567 = I2O_EXEC_STATUS_GET_REPLY_getMaxInboundMFrames(status)) 2568 > MAX_INBOUND) 2569 || (sc->ha_QueueSize == 0)) { 2570 sc->ha_QueueSize = MAX_INBOUND; 2571 } 2572 2573 /* Adjust the maximum outbound count */ 2574 if (((sc->ha_Msgs_Count 2575 = I2O_EXEC_STATUS_GET_REPLY_getMaxOutboundMFrames(status)) 2576 > MAX_OUTBOUND) 2577 || (sc->ha_Msgs_Count == 0)) { 2578 sc->ha_Msgs_Count = MAX_OUTBOUND; 2579 } 2580 if (sc->ha_Msgs_Count > sc->ha_QueueSize) { 2581 sc->ha_Msgs_Count = sc->ha_QueueSize; 2582 } 2583 2584 /* Adjust the maximum SG size to adapter */ 2585 if ((size = (I2O_EXEC_STATUS_GET_REPLY_getInboundMFrameSize( 2586 status) << 2)) > MAX_INBOUND_SIZE) { 2587 size = MAX_INBOUND_SIZE; 2588 } 2589 kfree (status, M_TEMP); 2590 sc->ha_SgSize = (size - sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 2591 + sizeof(I2O_SG_ELEMENT)) / sizeof(I2O_SGE_SIMPLE_ELEMENT); 2592 } 2593 2594 /* 2595 * Only do a bus/HBA reset on the first time through. On this 2596 * first time through, we do not send a flush to the devices. 2597 */ 2598 if (ASR_init(sc) == 0) { 2599 struct BufferInfo { 2600 I2O_PARAM_RESULTS_LIST_HEADER Header; 2601 I2O_PARAM_READ_OPERATION_RESULT Read; 2602 I2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info; 2603 }; 2604 defAlignLong (struct BufferInfo, Buffer); 2605 PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info; 2606 # define FW_DEBUG_BLED_OFFSET 8 2607 2608 if ((Info = (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR) 2609 ASR_getParams(sc, 0, 2610 I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO, 2611 Buffer, sizeof(struct BufferInfo))) 2612 != (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)NULL) { 2613 sc->ha_blinkLED = sc->ha_Fvirt 2614 + I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info) 2615 + FW_DEBUG_BLED_OFFSET; 2616 } 2617 if (ASR_acquireLct(sc) == 0) { 2618 (void)ASR_acquireHrt(sc); 2619 } 2620 } else { 2621 kprintf ("asr%d: failed to initialize\n", unit); 2622 ATTACH_RETURN(ENXIO); 2623 } 2624 /* 2625 * Add in additional probe responses for more channels. We 2626 * are reusing the variable `target' for a channel loop counter. 2627 * Done here because of we need both the acquireLct and 2628 * acquireHrt data. 2629 */ 2630 { PI2O_LCT_ENTRY Device; 2631 2632 for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY) 2633 (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); 2634 ++Device) { 2635 if (Device->le_type == I2O_UNKNOWN) { 2636 continue; 2637 } 2638 if (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF) { 2639 if (Device->le_target > sc->ha_MaxId) { 2640 sc->ha_MaxId = Device->le_target; 2641 } 2642 if (Device->le_lun > sc->ha_MaxLun) { 2643 sc->ha_MaxLun = Device->le_lun; 2644 } 2645 } 2646 if (((Device->le_type & I2O_PORT) != 0) 2647 && (Device->le_bus <= MAX_CHANNEL)) { 2648 /* Do not increase MaxId for efficiency */ 2649 sc->ha_adapter_target[Device->le_bus] 2650 = Device->le_target; 2651 } 2652 } 2653 } 2654 2655 2656 /* 2657 * Print the HBA model number as inquired from the card. 2658 */ 2659 2660 kprintf ("asr%d:", unit); 2661 2662 if ((iq = (struct scsi_inquiry_data *)kmalloc ( 2663 sizeof(struct scsi_inquiry_data), M_TEMP, M_WAITOK | M_ZERO)) 2664 != (struct scsi_inquiry_data *)NULL) { 2665 defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message); 2666 PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr; 2667 int posted = 0; 2668 2669 bzero (Message_Ptr 2670 = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message), 2671 sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 2672 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT)); 2673 2674 I2O_MESSAGE_FRAME_setVersionOffset( 2675 (PI2O_MESSAGE_FRAME)Message_Ptr, 2676 I2O_VERSION_11 2677 | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 2678 - sizeof(I2O_SG_ELEMENT)) 2679 / sizeof(U32)) << 4)); 2680 I2O_MESSAGE_FRAME_setMessageSize( 2681 (PI2O_MESSAGE_FRAME)Message_Ptr, 2682 (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) 2683 - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT)) 2684 / sizeof(U32)); 2685 I2O_MESSAGE_FRAME_setInitiatorAddress ( 2686 (PI2O_MESSAGE_FRAME)Message_Ptr, 1); 2687 I2O_MESSAGE_FRAME_setFunction( 2688 (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE); 2689 I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode ( 2690 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, 2691 I2O_SCSI_SCB_EXEC); 2692 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr, 2693 I2O_SCB_FLAG_ENABLE_DISCONNECT 2694 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 2695 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER); 2696 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setInterpret(Message_Ptr, 1); 2697 I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID( 2698 (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, 2699 DPT_ORGANIZATION_ID); 2700 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6); 2701 Message_Ptr->CDB[0] = INQUIRY; 2702 Message_Ptr->CDB[4] = (unsigned char)sizeof(struct scsi_inquiry_data); 2703 if (Message_Ptr->CDB[4] == 0) { 2704 Message_Ptr->CDB[4] = 255; 2705 } 2706 2707 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr, 2708 (I2O_SCB_FLAG_XFER_FROM_DEVICE 2709 | I2O_SCB_FLAG_ENABLE_DISCONNECT 2710 | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 2711 | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)); 2712 2713 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount( 2714 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, 2715 sizeof(struct scsi_inquiry_data)); 2716 SG(&(Message_Ptr->SGL), 0, 2717 I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, 2718 iq, sizeof(struct scsi_inquiry_data)); 2719 (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); 2720 2721 if (iq->vendor[0] && (iq->vendor[0] != ' ')) { 2722 kprintf (" "); 2723 ASR_prstring (iq->vendor, 8); 2724 ++posted; 2725 } 2726 if (iq->product[0] && (iq->product[0] != ' ')) { 2727 kprintf (" "); 2728 ASR_prstring (iq->product, 16); 2729 ++posted; 2730 } 2731 if (iq->revision[0] && (iq->revision[0] != ' ')) { 2732 kprintf (" FW Rev. "); 2733 ASR_prstring (iq->revision, 4); 2734 ++posted; 2735 } 2736 kfree ((caddr_t)iq, M_TEMP); 2737 if (posted) { 2738 kprintf (","); 2739 } 2740 } 2741 kprintf (" %d channel, %d CCBs, Protocol I2O\n", sc->ha_MaxBus + 1, 2742 (sc->ha_QueueSize > MAX_INBOUND) ? MAX_INBOUND : sc->ha_QueueSize); 2743 2744 /* 2745 * fill in the prototype cam_path. 2746 */ 2747 { 2748 int bus; 2749 union asr_ccb * ccb; 2750 2751 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) { 2752 kprintf ("asr%d: CAM could not be notified of asynchronous callback parameters\n", unit); 2753 ATTACH_RETURN(ENOMEM); 2754 } 2755 for (bus = 0; bus <= sc->ha_MaxBus; ++bus) { 2756 int QueueSize = sc->ha_QueueSize; 2757 2758 if (QueueSize > MAX_INBOUND) { 2759 QueueSize = MAX_INBOUND; 2760 } 2761 2762 /* 2763 * Construct our first channel SIM entry 2764 */ 2765 sc->ha_sim[bus] = cam_sim_alloc( 2766 asr_action, asr_poll, "asr", sc, 2767 unit, 1, QueueSize, NULL); 2768 if (sc->ha_sim[bus] == NULL) 2769 continue; 2770 2771 if (xpt_bus_register(sc->ha_sim[bus], bus) 2772 != CAM_SUCCESS) { 2773 cam_sim_free(sc->ha_sim[bus]); 2774 sc->ha_sim[bus] = NULL; 2775 continue; 2776 } 2777 2778 if (xpt_create_path(&(sc->ha_path[bus]), /*periph*/NULL, 2779 cam_sim_path(sc->ha_sim[bus]), CAM_TARGET_WILDCARD, 2780 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 2781 xpt_bus_deregister( 2782 cam_sim_path(sc->ha_sim[bus])); 2783 cam_sim_free(sc->ha_sim[bus]); 2784 sc->ha_sim[bus] = NULL; 2785 continue; 2786 } 2787 } 2788 asr_free_ccb (ccb); 2789 } 2790 /* 2791 * Generate the device node information 2792 */ 2793 make_dev(&asr_ops, unit, 0, 0, S_IRWXU, "rasr%d", unit); 2794 ATTACH_RETURN(0); 2795 } /* asr_attach */ 2796 2797 STATIC void 2798 asr_poll( 2799 IN struct cam_sim *sim) 2800 { 2801 asr_intr(cam_sim_softc(sim)); 2802 } /* asr_poll */ 2803 2804 STATIC void 2805 asr_action( 2806 IN struct cam_sim * sim, 2807 IN union ccb * ccb) 2808 { 2809 struct Asr_softc * sc; 2810 2811 debug_asr_printf ("asr_action(%lx,%lx{%x})\n", 2812 (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code); 2813 2814 CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("asr_action\n")); 2815 2816 ccb->ccb_h.spriv_ptr0 = sc = (struct Asr_softc *)cam_sim_softc(sim); 2817 2818 switch (ccb->ccb_h.func_code) { 2819 2820 /* Common cases first */ 2821 case XPT_SCSI_IO: /* Execute the requested I/O operation */ 2822 { 2823 struct Message { 2824 char M[MAX_INBOUND_SIZE]; 2825 }; 2826 defAlignLong(struct Message,Message); 2827 PI2O_MESSAGE_FRAME Message_Ptr; 2828 2829 /* Reject incoming commands while we are resetting the card */ 2830 if (sc->ha_in_reset != HA_OPERATIONAL) { 2831 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2832 if (sc->ha_in_reset >= HA_OFF_LINE) { 2833 /* HBA is now off-line */ 2834 ccb->ccb_h.status |= CAM_UNREC_HBA_ERROR; 2835 } else { 2836 /* HBA currently resetting, try again later. */ 2837 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 2838 } 2839 debug_asr_cmd_printf (" e\n"); 2840 xpt_done(ccb); 2841 debug_asr_cmd_printf (" q\n"); 2842 break; 2843 } 2844 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) { 2845 kprintf( 2846 "asr%d WARNING: scsi_cmd(%x) already done on b%dt%du%d\n", 2847 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), 2848 ccb->csio.cdb_io.cdb_bytes[0], 2849 cam_sim_bus(sim), 2850 ccb->ccb_h.target_id, 2851 ccb->ccb_h.target_lun); 2852 } 2853 debug_asr_cmd_printf ("(%d,%d,%d,%d)", 2854 cam_sim_unit(sim), 2855 cam_sim_bus(sim), 2856 ccb->ccb_h.target_id, 2857 ccb->ccb_h.target_lun); 2858 debug_asr_cmd_dump_ccb(ccb); 2859 2860 if ((Message_Ptr = ASR_init_message ((union asr_ccb *)ccb, 2861 (PI2O_MESSAGE_FRAME)Message)) != (PI2O_MESSAGE_FRAME)NULL) { 2862 debug_asr_cmd2_printf ("TID=%x:\n", 2863 PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getTID( 2864 (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)); 2865 debug_asr_cmd2_dump_message(Message_Ptr); 2866 debug_asr_cmd1_printf (" q"); 2867 2868 if (ASR_queue (sc, Message_Ptr) == EMPTY_QUEUE) { 2869 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2870 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 2871 debug_asr_cmd_printf (" E\n"); 2872 xpt_done(ccb); 2873 } 2874 debug_asr_cmd_printf (" Q\n"); 2875 break; 2876 } 2877 /* 2878 * We will get here if there is no valid TID for the device 2879 * referenced in the scsi command packet. 2880 */ 2881 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 2882 ccb->ccb_h.status |= CAM_SEL_TIMEOUT; 2883 debug_asr_cmd_printf (" B\n"); 2884 xpt_done(ccb); 2885 break; 2886 } 2887 2888 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 2889 /* Rese HBA device ... */ 2890 asr_hbareset (sc); 2891 ccb->ccb_h.status = CAM_REQ_CMP; 2892 xpt_done(ccb); 2893 break; 2894 2895 # if (defined(REPORT_LUNS)) 2896 case REPORT_LUNS: 2897 # endif 2898 case XPT_ABORT: /* Abort the specified CCB */ 2899 /* XXX Implement */ 2900 ccb->ccb_h.status = CAM_REQ_INVALID; 2901 xpt_done(ccb); 2902 break; 2903 2904 case XPT_SET_TRAN_SETTINGS: 2905 /* XXX Implement */ 2906 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 2907 xpt_done(ccb); 2908 break; 2909 2910 case XPT_GET_TRAN_SETTINGS: 2911 /* Get default/user set transfer settings for the target */ 2912 { 2913 struct ccb_trans_settings *cts = &(ccb->cts); 2914 #ifdef CAM_NEW_TRAN_CODE 2915 struct ccb_trans_settings_scsi *scsi = 2916 &cts->proto_specific.scsi; 2917 struct ccb_trans_settings_spi *spi = 2918 &cts->xport_specific.spi; 2919 2920 if (cts->type == CTS_TYPE_USER_SETTINGS) { 2921 cts->protocol = PROTO_SCSI; 2922 cts->protocol_version = SCSI_REV_2; 2923 cts->transport = XPORT_SPI; 2924 cts->transport_version = 2; 2925 2926 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB; 2927 spi->flags = CTS_SPI_FLAGS_DISC_ENB; 2928 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 2929 spi->sync_period = 6; /* 40MHz */ 2930 spi->sync_offset = 15; 2931 spi->valid = CTS_SPI_VALID_SYNC_RATE 2932 | CTS_SPI_VALID_SYNC_OFFSET 2933 | CTS_SPI_VALID_BUS_WIDTH 2934 | CTS_SPI_VALID_DISC; 2935 scsi->valid = CTS_SCSI_VALID_TQ; 2936 2937 ccb->ccb_h.status = CAM_REQ_CMP; 2938 } else { 2939 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 2940 } 2941 #else 2942 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) { 2943 cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB; 2944 cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT; 2945 cts->sync_period = 6; /* 40MHz */ 2946 cts->sync_offset = 15; 2947 2948 cts->valid = CCB_TRANS_SYNC_RATE_VALID 2949 | CCB_TRANS_SYNC_OFFSET_VALID 2950 | CCB_TRANS_BUS_WIDTH_VALID 2951 | CCB_TRANS_DISC_VALID 2952 | CCB_TRANS_TQ_VALID; 2953 ccb->ccb_h.status = CAM_REQ_CMP; 2954 } else { 2955 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; 2956 } 2957 #endif 2958 xpt_done(ccb); 2959 break; 2960 } 2961 2962 case XPT_CALC_GEOMETRY: 2963 { 2964 struct ccb_calc_geometry *ccg; 2965 u_int32_t size_mb; 2966 u_int32_t secs_per_cylinder; 2967 2968 ccg = &(ccb->ccg); 2969 size_mb = ccg->volume_size 2970 / ((1024L * 1024L) / ccg->block_size); 2971 2972 if (size_mb > 4096) { 2973 ccg->heads = 255; 2974 ccg->secs_per_track = 63; 2975 } else if (size_mb > 2048) { 2976 ccg->heads = 128; 2977 ccg->secs_per_track = 63; 2978 } else if (size_mb > 1024) { 2979 ccg->heads = 65; 2980 ccg->secs_per_track = 63; 2981 } else { 2982 ccg->heads = 64; 2983 ccg->secs_per_track = 32; 2984 } 2985 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 2986 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 2987 ccb->ccb_h.status = CAM_REQ_CMP; 2988 xpt_done(ccb); 2989 break; 2990 } 2991 2992 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 2993 ASR_resetBus (sc, cam_sim_bus(sim)); 2994 ccb->ccb_h.status = CAM_REQ_CMP; 2995 xpt_done(ccb); 2996 break; 2997 2998 case XPT_TERM_IO: /* Terminate the I/O process */ 2999 /* XXX Implement */ 3000 ccb->ccb_h.status = CAM_REQ_INVALID; 3001 xpt_done(ccb); 3002 break; 3003 3004 case XPT_PATH_INQ: /* Path routing inquiry */ 3005 { 3006 struct ccb_pathinq *cpi = &(ccb->cpi); 3007 3008 cpi->version_num = 1; /* XXX??? */ 3009 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16; 3010 cpi->target_sprt = 0; 3011 /* Not necessary to reset bus, done by HDM initialization */ 3012 cpi->hba_misc = PIM_NOBUSRESET; 3013 cpi->hba_eng_cnt = 0; 3014 cpi->max_target = sc->ha_MaxId; 3015 cpi->max_lun = sc->ha_MaxLun; 3016 cpi->initiator_id = sc->ha_adapter_target[cam_sim_bus(sim)]; 3017 cpi->bus_id = cam_sim_bus(sim); 3018 cpi->base_transfer_speed = 3300; 3019 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 3020 strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN); 3021 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 3022 cpi->unit_number = cam_sim_unit(sim); 3023 cpi->ccb_h.status = CAM_REQ_CMP; 3024 #ifdef CAM_NEW_TRAN_CODE 3025 cpi->transport = XPORT_SPI; 3026 cpi->transport_version = 2; 3027 cpi->protocol = PROTO_SCSI; 3028 cpi->protocol_version = SCSI_REV_2; 3029 #endif 3030 xpt_done(ccb); 3031 break; 3032 } 3033 default: 3034 ccb->ccb_h.status = CAM_REQ_INVALID; 3035 xpt_done(ccb); 3036 break; 3037 } 3038 } /* asr_action */ 3039 3040 3041 /* 3042 * Handle processing of current CCB as pointed to by the Status. 3043 */ 3044 STATIC int 3045 asr_intr ( 3046 IN Asr_softc_t * sc) 3047 { 3048 OUT int processed; 3049 3050 for (processed = 0; 3051 sc->ha_Virt->Status & Mask_InterruptsDisabled; 3052 processed = 1) { 3053 union asr_ccb * ccb; 3054 U32 ReplyOffset; 3055 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply; 3056 3057 if (((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE) 3058 && ((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)) { 3059 break; 3060 } 3061 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)(ReplyOffset 3062 - sc->ha_Msgs_Phys + (char *)(sc->ha_Msgs)); 3063 /* 3064 * We do not need any (optional byteswapping) method access to 3065 * the Initiator context field. 3066 */ 3067 ccb = (union asr_ccb *)(long) 3068 I2O_MESSAGE_FRAME_getInitiatorContext64( 3069 &(Reply->StdReplyFrame.StdMessageFrame)); 3070 if (I2O_MESSAGE_FRAME_getMsgFlags( 3071 &(Reply->StdReplyFrame.StdMessageFrame)) 3072 & I2O_MESSAGE_FLAGS_FAIL) { 3073 defAlignLong(I2O_UTIL_NOP_MESSAGE,Message); 3074 PI2O_UTIL_NOP_MESSAGE Message_Ptr; 3075 U32 MessageOffset; 3076 3077 MessageOffset = (u_long) 3078 I2O_FAILURE_REPLY_MESSAGE_FRAME_getPreservedMFA( 3079 (PI2O_FAILURE_REPLY_MESSAGE_FRAME)Reply); 3080 /* 3081 * Get the Original Message Frame's address, and get 3082 * it's Transaction Context into our space. (Currently 3083 * unused at original authorship, but better to be 3084 * safe than sorry). Straight copy means that we 3085 * need not concern ourselves with the (optional 3086 * byteswapping) method access. 3087 */ 3088 Reply->StdReplyFrame.TransactionContext 3089 = ((PI2O_SINGLE_REPLY_MESSAGE_FRAME) 3090 (sc->ha_Fvirt + MessageOffset))->TransactionContext; 3091 /* 3092 * For 64 bit machines, we need to reconstruct the 3093 * 64 bit context. 3094 */ 3095 ccb = (union asr_ccb *)(long) 3096 I2O_MESSAGE_FRAME_getInitiatorContext64( 3097 &(Reply->StdReplyFrame.StdMessageFrame)); 3098 /* 3099 * Unique error code for command failure. 3100 */ 3101 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode( 3102 &(Reply->StdReplyFrame), (u_int16_t)-2); 3103 /* 3104 * Modify the message frame to contain a NOP and 3105 * re-issue it to the controller. 3106 */ 3107 Message_Ptr = (PI2O_UTIL_NOP_MESSAGE)ASR_fillMessage( 3108 Message, sizeof(I2O_UTIL_NOP_MESSAGE)); 3109 # if (I2O_UTIL_NOP != 0) 3110 I2O_MESSAGE_FRAME_setFunction ( 3111 &(Message_Ptr->StdMessageFrame), 3112 I2O_UTIL_NOP); 3113 # endif 3114 /* 3115 * Copy the packet out to the Original Message 3116 */ 3117 bcopy ((caddr_t)Message_Ptr, 3118 sc->ha_Fvirt + MessageOffset, 3119 sizeof(I2O_UTIL_NOP_MESSAGE)); 3120 /* 3121 * Issue the NOP 3122 */ 3123 sc->ha_Virt->ToFIFO = MessageOffset; 3124 } 3125 3126 /* 3127 * Asynchronous command with no return requirements, 3128 * and a generic handler for immunity against odd error 3129 * returns from the adapter. 3130 */ 3131 if (ccb == (union asr_ccb *)NULL) { 3132 /* 3133 * Return Reply so that it can be used for the 3134 * next command 3135 */ 3136 sc->ha_Virt->FromFIFO = ReplyOffset; 3137 continue; 3138 } 3139 3140 /* Welease Wadjah! (and stop timeouts) */ 3141 ASR_ccbRemove (sc, ccb); 3142 3143 switch ( 3144 I2O_SINGLE_REPLY_MESSAGE_FRAME_getDetailedStatusCode( 3145 &(Reply->StdReplyFrame))) { 3146 3147 case I2O_SCSI_DSC_SUCCESS: 3148 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 3149 ccb->ccb_h.status |= CAM_REQ_CMP; 3150 break; 3151 3152 case I2O_SCSI_DSC_CHECK_CONDITION: 3153 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 3154 ccb->ccb_h.status |= CAM_REQ_CMP|CAM_AUTOSNS_VALID; 3155 break; 3156 3157 case I2O_SCSI_DSC_BUSY: 3158 /* FALLTHRU */ 3159 case I2O_SCSI_HBA_DSC_ADAPTER_BUSY: 3160 /* FALLTHRU */ 3161 case I2O_SCSI_HBA_DSC_SCSI_BUS_RESET: 3162 /* FALLTHRU */ 3163 case I2O_SCSI_HBA_DSC_BUS_BUSY: 3164 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 3165 ccb->ccb_h.status |= CAM_SCSI_BUSY; 3166 break; 3167 3168 case I2O_SCSI_HBA_DSC_SELECTION_TIMEOUT: 3169 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 3170 ccb->ccb_h.status |= CAM_SEL_TIMEOUT; 3171 break; 3172 3173 case I2O_SCSI_HBA_DSC_COMMAND_TIMEOUT: 3174 /* FALLTHRU */ 3175 case I2O_SCSI_HBA_DSC_DEVICE_NOT_PRESENT: 3176 /* FALLTHRU */ 3177 case I2O_SCSI_HBA_DSC_LUN_INVALID: 3178 /* FALLTHRU */ 3179 case I2O_SCSI_HBA_DSC_SCSI_TID_INVALID: 3180 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 3181 ccb->ccb_h.status |= CAM_CMD_TIMEOUT; 3182 break; 3183 3184 case I2O_SCSI_HBA_DSC_DATA_OVERRUN: 3185 /* FALLTHRU */ 3186 case I2O_SCSI_HBA_DSC_REQUEST_LENGTH_ERROR: 3187 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 3188 ccb->ccb_h.status |= CAM_DATA_RUN_ERR; 3189 break; 3190 3191 default: 3192 ccb->ccb_h.status &= ~CAM_STATUS_MASK; 3193 ccb->ccb_h.status |= CAM_REQUEUE_REQ; 3194 break; 3195 } 3196 if ((ccb->csio.resid = ccb->csio.dxfer_len) != 0) { 3197 ccb->csio.resid -= 3198 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getTransferCount( 3199 Reply); 3200 } 3201 3202 /* Sense data in reply packet */ 3203 if (ccb->ccb_h.status & CAM_AUTOSNS_VALID) { 3204 u_int16_t size = I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getAutoSenseTransferCount(Reply); 3205 3206 if (size) { 3207 if (size > sizeof(ccb->csio.sense_data)) { 3208 size = sizeof(ccb->csio.sense_data); 3209 } 3210 if (size > I2O_SCSI_SENSE_DATA_SZ) { 3211 size = I2O_SCSI_SENSE_DATA_SZ; 3212 } 3213 if ((ccb->csio.sense_len) 3214 && (size > ccb->csio.sense_len)) { 3215 size = ccb->csio.sense_len; 3216 } 3217 bcopy ((caddr_t)Reply->SenseData, 3218 (caddr_t)&(ccb->csio.sense_data), size); 3219 } 3220 } 3221 3222 /* 3223 * Return Reply so that it can be used for the next command 3224 * since we have no more need for it now 3225 */ 3226 sc->ha_Virt->FromFIFO = ReplyOffset; 3227 3228 if (ccb->ccb_h.path) { 3229 xpt_done ((union ccb *)ccb); 3230 } else { 3231 wakeup ((caddr_t)ccb); 3232 } 3233 } 3234 return (processed); 3235 } /* asr_intr */ 3236 3237 #undef QueueSize /* Grrrr */ 3238 #undef SG_Size /* Grrrr */ 3239 3240 /* 3241 * Meant to be included at the bottom of asr.c !!! 3242 */ 3243 3244 /* 3245 * Included here as hard coded. Done because other necessary include 3246 * files utilize C++ comment structures which make them a nuisance to 3247 * included here just to pick up these three typedefs. 3248 */ 3249 typedef U32 DPT_TAG_T; 3250 typedef U32 DPT_MSG_T; 3251 typedef U32 DPT_RTN_T; 3252 3253 #undef SCSI_RESET /* Conflicts with "scsi/scsiconf.h" defintion */ 3254 #include "osd_unix.h" 3255 3256 #define asr_unit(dev) minor(dev) 3257 3258 STATIC INLINE Asr_softc_t * 3259 ASR_get_sc ( 3260 IN cdev_t dev) 3261 { 3262 int unit = asr_unit(dev); 3263 OUT Asr_softc_t * sc = Asr_softc; 3264 3265 while (sc && sc->ha_sim[0] && (cam_sim_unit(sc->ha_sim[0]) != unit)) { 3266 sc = sc->ha_next; 3267 } 3268 return (sc); 3269 } /* ASR_get_sc */ 3270 3271 STATIC u_int8_t ASR_ctlr_held; 3272 #if (!defined(UNREFERENCED_PARAMETER)) 3273 # define UNREFERENCED_PARAMETER(x) (void)(x) 3274 #endif 3275 3276 STATIC int 3277 asr_open(struct dev_open_args *ap) 3278 { 3279 cdev_t dev = ap->a_head.a_dev; 3280 OUT int error; 3281 3282 if (ASR_get_sc (dev) == (Asr_softc_t *)NULL) { 3283 return (ENODEV); 3284 } 3285 crit_enter(); 3286 if (ASR_ctlr_held) { 3287 error = EBUSY; 3288 } else if ((error = suser_cred(ap->a_cred, 0)) == 0) { 3289 ++ASR_ctlr_held; 3290 } 3291 crit_exit(); 3292 return (error); 3293 } /* asr_open */ 3294 3295 STATIC int 3296 asr_close(struct dev_close_args *ap) 3297 { 3298 ASR_ctlr_held = 0; 3299 return (0); 3300 } /* asr_close */ 3301 3302 3303 /*-------------------------------------------------------------------------*/ 3304 /* Function ASR_queue_i */ 3305 /*-------------------------------------------------------------------------*/ 3306 /* The Parameters Passed To This Function Are : */ 3307 /* Asr_softc_t * : HBA miniport driver's adapter data storage. */ 3308 /* PI2O_MESSAGE_FRAME : Msg Structure Pointer For This Command */ 3309 /* I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME following the Msg Structure */ 3310 /* */ 3311 /* This Function Will Take The User Request Packet And Convert It To An */ 3312 /* I2O MSG And Send It Off To The Adapter. */ 3313 /* */ 3314 /* Return : 0 For OK, Error Code Otherwise */ 3315 /*-------------------------------------------------------------------------*/ 3316 STATIC INLINE int 3317 ASR_queue_i( 3318 IN Asr_softc_t * sc, 3319 INOUT PI2O_MESSAGE_FRAME Packet) 3320 { 3321 union asr_ccb * ccb; 3322 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply; 3323 PI2O_MESSAGE_FRAME Message_Ptr; 3324 PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply_Ptr; 3325 int MessageSizeInBytes; 3326 int ReplySizeInBytes; 3327 int error; 3328 int s; 3329 /* Scatter Gather buffer list */ 3330 struct ioctlSgList_S { 3331 SLIST_ENTRY(ioctlSgList_S) link; 3332 caddr_t UserSpace; 3333 I2O_FLAGS_COUNT FlagsCount; 3334 char KernelSpace[sizeof(long)]; 3335 } * elm; 3336 /* Generates a `first' entry */ 3337 SLIST_HEAD(ioctlSgListHead_S, ioctlSgList_S) sgList; 3338 3339 if (ASR_getBlinkLedCode(sc)) { 3340 debug_usr_cmd_printf ("Adapter currently in BlinkLed %x\n", 3341 ASR_getBlinkLedCode(sc)); 3342 return (EIO); 3343 } 3344 /* Copy in the message into a local allocation */ 3345 if ((Message_Ptr = (PI2O_MESSAGE_FRAME)kmalloc ( 3346 sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK)) 3347 == (PI2O_MESSAGE_FRAME)NULL) { 3348 debug_usr_cmd_printf ( 3349 "Failed to acquire I2O_MESSAGE_FRAME memory\n"); 3350 return (ENOMEM); 3351 } 3352 if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr, 3353 sizeof(I2O_MESSAGE_FRAME))) != 0) { 3354 kfree (Message_Ptr, M_TEMP); 3355 debug_usr_cmd_printf ("Can't copy in packet errno=%d\n", error); 3356 return (error); 3357 } 3358 /* Acquire information to determine type of packet */ 3359 MessageSizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr)<<2); 3360 /* The offset of the reply information within the user packet */ 3361 Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)((char *)Packet 3362 + MessageSizeInBytes); 3363 3364 /* Check if the message is a synchronous initialization command */ 3365 s = I2O_MESSAGE_FRAME_getFunction(Message_Ptr); 3366 kfree (Message_Ptr, M_TEMP); 3367 switch (s) { 3368 3369 case I2O_EXEC_IOP_RESET: 3370 { U32 status; 3371 3372 status = ASR_resetIOP(sc->ha_Virt, sc->ha_Fvirt); 3373 ReplySizeInBytes = sizeof(status); 3374 debug_usr_cmd_printf ("resetIOP done\n"); 3375 return (copyout ((caddr_t)&status, (caddr_t)Reply, 3376 ReplySizeInBytes)); 3377 } 3378 3379 case I2O_EXEC_STATUS_GET: 3380 { I2O_EXEC_STATUS_GET_REPLY status; 3381 3382 if (ASR_getStatus (sc->ha_Virt, sc->ha_Fvirt, &status) 3383 == (PI2O_EXEC_STATUS_GET_REPLY)NULL) { 3384 debug_usr_cmd_printf ("getStatus failed\n"); 3385 return (ENXIO); 3386 } 3387 ReplySizeInBytes = sizeof(status); 3388 debug_usr_cmd_printf ("getStatus done\n"); 3389 return (copyout ((caddr_t)&status, (caddr_t)Reply, 3390 ReplySizeInBytes)); 3391 } 3392 3393 case I2O_EXEC_OUTBOUND_INIT: 3394 { U32 status; 3395 3396 status = ASR_initOutBound(sc); 3397 ReplySizeInBytes = sizeof(status); 3398 debug_usr_cmd_printf ("intOutBound done\n"); 3399 return (copyout ((caddr_t)&status, (caddr_t)Reply, 3400 ReplySizeInBytes)); 3401 } 3402 } 3403 3404 /* Determine if the message size is valid */ 3405 if ((MessageSizeInBytes < sizeof(I2O_MESSAGE_FRAME)) 3406 || (MAX_INBOUND_SIZE < MessageSizeInBytes)) { 3407 debug_usr_cmd_printf ("Packet size %d incorrect\n", 3408 MessageSizeInBytes); 3409 return (EINVAL); 3410 } 3411 3412 if ((Message_Ptr = (PI2O_MESSAGE_FRAME)kmalloc (MessageSizeInBytes, 3413 M_TEMP, M_WAITOK)) == (PI2O_MESSAGE_FRAME)NULL) { 3414 debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n", 3415 MessageSizeInBytes); 3416 return (ENOMEM); 3417 } 3418 if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr, 3419 MessageSizeInBytes)) != 0) { 3420 kfree (Message_Ptr, M_TEMP); 3421 debug_usr_cmd_printf ("Can't copy in packet[%d] errno=%d\n", 3422 MessageSizeInBytes, error); 3423 return (error); 3424 } 3425 3426 /* Check the size of the reply frame, and start constructing */ 3427 3428 if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)kmalloc ( 3429 sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK)) 3430 == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) { 3431 kfree (Message_Ptr, M_TEMP); 3432 debug_usr_cmd_printf ( 3433 "Failed to acquire I2O_MESSAGE_FRAME memory\n"); 3434 return (ENOMEM); 3435 } 3436 if ((error = copyin ((caddr_t)Reply, (caddr_t)Reply_Ptr, 3437 sizeof(I2O_MESSAGE_FRAME))) != 0) { 3438 kfree (Reply_Ptr, M_TEMP); 3439 kfree (Message_Ptr, M_TEMP); 3440 debug_usr_cmd_printf ( 3441 "Failed to copy in reply frame, errno=%d\n", 3442 error); 3443 return (error); 3444 } 3445 ReplySizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize( 3446 &(Reply_Ptr->StdReplyFrame.StdMessageFrame)) << 2); 3447 kfree (Reply_Ptr, M_TEMP); 3448 if (ReplySizeInBytes < sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME)) { 3449 kfree (Message_Ptr, M_TEMP); 3450 debug_usr_cmd_printf ( 3451 "Failed to copy in reply frame[%d], errno=%d\n", 3452 ReplySizeInBytes, error); 3453 return (EINVAL); 3454 } 3455 3456 if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)kmalloc ( 3457 ((ReplySizeInBytes > sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)) 3458 ? ReplySizeInBytes 3459 : sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)), 3460 M_TEMP, M_WAITOK)) == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) { 3461 kfree (Message_Ptr, M_TEMP); 3462 debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n", 3463 ReplySizeInBytes); 3464 return (ENOMEM); 3465 } 3466 (void)ASR_fillMessage ((char *)Reply_Ptr, ReplySizeInBytes); 3467 Reply_Ptr->StdReplyFrame.StdMessageFrame.InitiatorContext 3468 = Message_Ptr->InitiatorContext; 3469 Reply_Ptr->StdReplyFrame.TransactionContext 3470 = ((PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr)->TransactionContext; 3471 I2O_MESSAGE_FRAME_setMsgFlags( 3472 &(Reply_Ptr->StdReplyFrame.StdMessageFrame), 3473 I2O_MESSAGE_FRAME_getMsgFlags( 3474 &(Reply_Ptr->StdReplyFrame.StdMessageFrame)) 3475 | I2O_MESSAGE_FLAGS_REPLY); 3476 3477 /* Check if the message is a special case command */ 3478 switch (I2O_MESSAGE_FRAME_getFunction(Message_Ptr)) { 3479 case I2O_EXEC_SYS_TAB_SET: /* Special Case of empty Scatter Gather */ 3480 if (MessageSizeInBytes == ((I2O_MESSAGE_FRAME_getVersionOffset( 3481 Message_Ptr) & 0xF0) >> 2)) { 3482 kfree (Message_Ptr, M_TEMP); 3483 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode( 3484 &(Reply_Ptr->StdReplyFrame), 3485 (ASR_setSysTab(sc) != CAM_REQ_CMP)); 3486 I2O_MESSAGE_FRAME_setMessageSize( 3487 &(Reply_Ptr->StdReplyFrame.StdMessageFrame), 3488 sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME)); 3489 error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply, 3490 ReplySizeInBytes); 3491 kfree (Reply_Ptr, M_TEMP); 3492 return (error); 3493 } 3494 } 3495 3496 /* Deal in the general case */ 3497 /* First allocate and optionally copy in each scatter gather element */ 3498 SLIST_INIT(&sgList); 3499 if ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0) != 0) { 3500 PI2O_SGE_SIMPLE_ELEMENT sg; 3501 3502 /* 3503 * since this code is reused in several systems, code 3504 * efficiency is greater by using a shift operation rather 3505 * than a divide by sizeof(u_int32_t). 3506 */ 3507 sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr 3508 + ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0) 3509 >> 2)); 3510 while (sg < (PI2O_SGE_SIMPLE_ELEMENT)(((caddr_t)Message_Ptr) 3511 + MessageSizeInBytes)) { 3512 caddr_t v; 3513 int len; 3514 3515 if ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount)) 3516 & I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT) == 0) { 3517 error = EINVAL; 3518 break; 3519 } 3520 len = I2O_FLAGS_COUNT_getCount(&(sg->FlagsCount)); 3521 debug_usr_cmd_printf ("SG[%d] = %x[%d]\n", 3522 sg - (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr 3523 + ((I2O_MESSAGE_FRAME_getVersionOffset( 3524 Message_Ptr) & 0xF0) >> 2)), 3525 I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg), len); 3526 3527 if ((elm = (struct ioctlSgList_S *)kmalloc ( 3528 sizeof(*elm) - sizeof(elm->KernelSpace) + len, 3529 M_TEMP, M_WAITOK)) 3530 == (struct ioctlSgList_S *)NULL) { 3531 debug_usr_cmd_printf ( 3532 "Failed to allocate SG[%d]\n", len); 3533 error = ENOMEM; 3534 break; 3535 } 3536 SLIST_INSERT_HEAD(&sgList, elm, link); 3537 elm->FlagsCount = sg->FlagsCount; 3538 elm->UserSpace = (caddr_t) 3539 (I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg)); 3540 v = elm->KernelSpace; 3541 /* Copy in outgoing data (DIR bit could be invalid) */ 3542 if ((error = copyin (elm->UserSpace, (caddr_t)v, len)) 3543 != 0) { 3544 break; 3545 } 3546 /* 3547 * If the buffer is not contiguous, lets 3548 * break up the scatter/gather entries. 3549 */ 3550 while ((len > 0) 3551 && (sg < (PI2O_SGE_SIMPLE_ELEMENT) 3552 (((caddr_t)Message_Ptr) + MAX_INBOUND_SIZE))) { 3553 int next, base, span; 3554 3555 span = 0; 3556 next = base = KVTOPHYS(v); 3557 I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, 3558 base); 3559 3560 /* How far can we go physically contiguously */ 3561 while ((len > 0) && (base == next)) { 3562 int size; 3563 3564 next = trunc_page(base) + PAGE_SIZE; 3565 size = next - base; 3566 if (size > len) { 3567 size = len; 3568 } 3569 span += size; 3570 v += size; 3571 len -= size; 3572 base = KVTOPHYS(v); 3573 } 3574 3575 /* Construct the Flags */ 3576 I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), 3577 span); 3578 { 3579 int flags = I2O_FLAGS_COUNT_getFlags( 3580 &(elm->FlagsCount)); 3581 /* Any remaining length? */ 3582 if (len > 0) { 3583 flags &= 3584 ~(I2O_SGL_FLAGS_END_OF_BUFFER 3585 | I2O_SGL_FLAGS_LAST_ELEMENT); 3586 } 3587 I2O_FLAGS_COUNT_setFlags( 3588 &(sg->FlagsCount), flags); 3589 } 3590 3591 debug_usr_cmd_printf ("sg[%d] = %x[%d]\n", 3592 sg - (PI2O_SGE_SIMPLE_ELEMENT) 3593 ((char *)Message_Ptr 3594 + ((I2O_MESSAGE_FRAME_getVersionOffset( 3595 Message_Ptr) & 0xF0) >> 2)), 3596 I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg), 3597 span); 3598 if (len <= 0) { 3599 break; 3600 } 3601 3602 /* 3603 * Incrementing requires resizing of the 3604 * packet, and moving up the existing SG 3605 * elements. 3606 */ 3607 ++sg; 3608 MessageSizeInBytes += sizeof(*sg); 3609 I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr, 3610 I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr) 3611 + (sizeof(*sg) / sizeof(U32))); 3612 { 3613 PI2O_MESSAGE_FRAME NewMessage_Ptr; 3614 3615 if ((NewMessage_Ptr 3616 = (PI2O_MESSAGE_FRAME) 3617 kmalloc (MessageSizeInBytes, 3618 M_TEMP, M_WAITOK)) 3619 == (PI2O_MESSAGE_FRAME)NULL) { 3620 debug_usr_cmd_printf ( 3621 "Failed to acquire frame[%d] memory\n", 3622 MessageSizeInBytes); 3623 error = ENOMEM; 3624 break; 3625 } 3626 span = ((caddr_t)sg) 3627 - (caddr_t)Message_Ptr; 3628 bcopy ((caddr_t)Message_Ptr, 3629 (caddr_t)NewMessage_Ptr, span); 3630 bcopy ((caddr_t)(sg-1), 3631 ((caddr_t)NewMessage_Ptr) + span, 3632 MessageSizeInBytes - span); 3633 kfree (Message_Ptr, M_TEMP); 3634 sg = (PI2O_SGE_SIMPLE_ELEMENT) 3635 (((caddr_t)NewMessage_Ptr) + span); 3636 Message_Ptr = NewMessage_Ptr; 3637 } 3638 } 3639 if ((error) 3640 || ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount)) 3641 & I2O_SGL_FLAGS_LAST_ELEMENT) != 0)) { 3642 break; 3643 } 3644 ++sg; 3645 } 3646 if (error) { 3647 while ((elm = SLIST_FIRST(&sgList)) 3648 != (struct ioctlSgList_S *)NULL) { 3649 SLIST_REMOVE_HEAD(&sgList, link); 3650 kfree (elm, M_TEMP); 3651 } 3652 kfree (Reply_Ptr, M_TEMP); 3653 kfree (Message_Ptr, M_TEMP); 3654 return (error); 3655 } 3656 } 3657 3658 debug_usr_cmd_printf ("Inbound: "); 3659 debug_usr_cmd_dump_message(Message_Ptr); 3660 3661 /* Send the command */ 3662 if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) { 3663 /* Free up in-kernel buffers */ 3664 while ((elm = SLIST_FIRST(&sgList)) 3665 != (struct ioctlSgList_S *)NULL) { 3666 SLIST_REMOVE_HEAD(&sgList, link); 3667 kfree (elm, M_TEMP); 3668 } 3669 kfree (Reply_Ptr, M_TEMP); 3670 kfree (Message_Ptr, M_TEMP); 3671 return (ENOMEM); 3672 } 3673 3674 /* 3675 * We do not need any (optional byteswapping) method access to 3676 * the Initiator context field. 3677 */ 3678 I2O_MESSAGE_FRAME_setInitiatorContext64( 3679 (PI2O_MESSAGE_FRAME)Message_Ptr, (long)ccb); 3680 3681 (void)ASR_queue (sc, (PI2O_MESSAGE_FRAME)Message_Ptr); 3682 3683 kfree (Message_Ptr, M_TEMP); 3684 3685 /* 3686 * Wait for the board to report a finished instruction. 3687 */ 3688 crit_enter(); 3689 while ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_REQ_INPROG) { 3690 if (ASR_getBlinkLedCode(sc)) { 3691 /* Reset Adapter */ 3692 kprintf ("asr%d: Blink LED 0x%x resetting adapter\n", 3693 cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), 3694 ASR_getBlinkLedCode(sc)); 3695 if (ASR_reset (sc) == ENXIO) { 3696 /* Command Cleanup */ 3697 ASR_ccbRemove(sc, ccb); 3698 } 3699 crit_exit(); 3700 /* Free up in-kernel buffers */ 3701 while ((elm = SLIST_FIRST(&sgList)) 3702 != (struct ioctlSgList_S *)NULL) { 3703 SLIST_REMOVE_HEAD(&sgList, link); 3704 kfree (elm, M_TEMP); 3705 } 3706 kfree (Reply_Ptr, M_TEMP); 3707 asr_free_ccb(ccb); 3708 return (EIO); 3709 } 3710 /* Check every second for BlinkLed */ 3711 tsleep((caddr_t)ccb, 0, "asr", hz); 3712 } 3713 crit_exit(); 3714 3715 debug_usr_cmd_printf ("Outbound: "); 3716 debug_usr_cmd_dump_message(Reply_Ptr); 3717 3718 I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode( 3719 &(Reply_Ptr->StdReplyFrame), 3720 (ccb->ccb_h.status != CAM_REQ_CMP)); 3721 3722 if (ReplySizeInBytes >= (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) 3723 - I2O_SCSI_SENSE_DATA_SZ - sizeof(U32))) { 3724 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setTransferCount(Reply_Ptr, 3725 ccb->csio.dxfer_len - ccb->csio.resid); 3726 } 3727 if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) && (ReplySizeInBytes 3728 > (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) 3729 - I2O_SCSI_SENSE_DATA_SZ))) { 3730 int size = ReplySizeInBytes 3731 - sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) 3732 - I2O_SCSI_SENSE_DATA_SZ; 3733 3734 if (size > sizeof(ccb->csio.sense_data)) { 3735 size = sizeof(ccb->csio.sense_data); 3736 } 3737 bcopy ((caddr_t)&(ccb->csio.sense_data), (caddr_t)Reply_Ptr->SenseData, 3738 size); 3739 I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setAutoSenseTransferCount( 3740 Reply_Ptr, size); 3741 } 3742 3743 /* Free up in-kernel buffers */ 3744 while ((elm = SLIST_FIRST(&sgList)) != (struct ioctlSgList_S *)NULL) { 3745 /* Copy out as necessary */ 3746 if ((error == 0) 3747 /* DIR bit considered `valid', error due to ignorance works */ 3748 && ((I2O_FLAGS_COUNT_getFlags(&(elm->FlagsCount)) 3749 & I2O_SGL_FLAGS_DIR) == 0)) { 3750 error = copyout ((caddr_t)(elm->KernelSpace), 3751 elm->UserSpace, 3752 I2O_FLAGS_COUNT_getCount(&(elm->FlagsCount))); 3753 } 3754 SLIST_REMOVE_HEAD(&sgList, link); 3755 kfree (elm, M_TEMP); 3756 } 3757 if (error == 0) { 3758 /* Copy reply frame to user space */ 3759 error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply, 3760 ReplySizeInBytes); 3761 } 3762 kfree (Reply_Ptr, M_TEMP); 3763 asr_free_ccb(ccb); 3764 3765 return (error); 3766 } /* ASR_queue_i */ 3767 3768 /*----------------------------------------------------------------------*/ 3769 /* Function asr_ioctl */ 3770 /*----------------------------------------------------------------------*/ 3771 /* The parameters passed to this function are : */ 3772 /* dev : Device number. */ 3773 /* cmd : Ioctl Command */ 3774 /* data : User Argument Passed In. */ 3775 /* flag : Mode Parameter */ 3776 /* proc : Process Parameter */ 3777 /* */ 3778 /* This function is the user interface into this adapter driver */ 3779 /* */ 3780 /* Return : zero if OK, error code if not */ 3781 /*----------------------------------------------------------------------*/ 3782 3783 STATIC int 3784 asr_ioctl(struct dev_ioctl_args *ap) 3785 { 3786 cdev_t dev = ap->a_head.a_dev; 3787 caddr_t data = ap->a_data; 3788 int i, j; 3789 OUT int error = 0; 3790 Asr_softc_t * sc = ASR_get_sc (dev); 3791 3792 if (sc != (Asr_softc_t *)NULL) 3793 switch(ap->a_cmd) { 3794 3795 case DPT_SIGNATURE: 3796 # if (dsDescription_size != 50) 3797 case DPT_SIGNATURE + ((50 - dsDescription_size) << 16): 3798 # endif 3799 if (ap->a_cmd & 0xFFFF0000) { 3800 (void)bcopy ((caddr_t)(&ASR_sig), data, 3801 sizeof(dpt_sig_S)); 3802 return (0); 3803 } 3804 /* Traditional version of the ioctl interface */ 3805 case DPT_SIGNATURE & 0x0000FFFF: 3806 return (copyout ((caddr_t)(&ASR_sig), *((caddr_t *)data), 3807 sizeof(dpt_sig_S))); 3808 3809 /* Traditional version of the ioctl interface */ 3810 case DPT_CTRLINFO & 0x0000FFFF: 3811 case DPT_CTRLINFO: { 3812 struct { 3813 u_int16_t length; 3814 u_int16_t drvrHBAnum; 3815 u_int32_t baseAddr; 3816 u_int16_t blinkState; 3817 u_int8_t pciBusNum; 3818 u_int8_t pciDeviceNum; 3819 u_int16_t hbaFlags; 3820 u_int16_t Interrupt; 3821 u_int32_t reserved1; 3822 u_int32_t reserved2; 3823 u_int32_t reserved3; 3824 } CtlrInfo; 3825 3826 bzero (&CtlrInfo, sizeof(CtlrInfo)); 3827 CtlrInfo.length = sizeof(CtlrInfo) - sizeof(u_int16_t); 3828 CtlrInfo.drvrHBAnum = asr_unit(dev); 3829 CtlrInfo.baseAddr = (u_long)sc->ha_Base; 3830 i = ASR_getBlinkLedCode (sc); 3831 if (i == -1) { 3832 i = 0; 3833 } 3834 CtlrInfo.blinkState = i; 3835 CtlrInfo.pciBusNum = sc->ha_pciBusNum; 3836 CtlrInfo.pciDeviceNum = sc->ha_pciDeviceNum; 3837 #define FLG_OSD_PCI_VALID 0x0001 3838 #define FLG_OSD_DMA 0x0002 3839 #define FLG_OSD_I2O 0x0004 3840 CtlrInfo.hbaFlags = FLG_OSD_PCI_VALID | FLG_OSD_DMA | FLG_OSD_I2O; 3841 CtlrInfo.Interrupt = sc->ha_irq; 3842 if (ap->a_cmd & 0xFFFF0000) { 3843 bcopy (&CtlrInfo, data, sizeof(CtlrInfo)); 3844 } else { 3845 error = copyout (&CtlrInfo, *(caddr_t *)data, sizeof(CtlrInfo)); 3846 } 3847 } return (error); 3848 3849 /* Traditional version of the ioctl interface */ 3850 case DPT_SYSINFO & 0x0000FFFF: 3851 case DPT_SYSINFO: { 3852 sysInfo_S Info; 3853 char * cp; 3854 /* Kernel Specific ptok `hack' */ 3855 # define ptok(a) ((char *)(a) + KERNBASE) 3856 3857 bzero (&Info, sizeof(Info)); 3858 3859 /* Appears I am the only person in the Kernel doing this */ 3860 outb (0x70, 0x12); 3861 i = inb(0x71); 3862 j = i >> 4; 3863 if (i == 0x0f) { 3864 outb (0x70, 0x19); 3865 j = inb (0x71); 3866 } 3867 Info.drive0CMOS = j; 3868 3869 j = i & 0x0f; 3870 if (i == 0x0f) { 3871 outb (0x70, 0x1a); 3872 j = inb (0x71); 3873 } 3874 Info.drive1CMOS = j; 3875 3876 Info.numDrives = *((char *)ptok(0x475)); 3877 3878 Info.processorFamily = ASR_sig.dsProcessorFamily; 3879 switch (cpu) { 3880 case CPU_386SX: case CPU_386: 3881 Info.processorType = PROC_386; break; 3882 case CPU_486SX: case CPU_486: 3883 Info.processorType = PROC_486; break; 3884 case CPU_586: 3885 Info.processorType = PROC_PENTIUM; break; 3886 case CPU_686: 3887 Info.processorType = PROC_SEXIUM; break; 3888 } 3889 Info.osType = OS_BSDI_UNIX; 3890 Info.osMajorVersion = osrelease[0] - '0'; 3891 Info.osMinorVersion = osrelease[2] - '0'; 3892 /* Info.osRevision = 0; */ 3893 /* Info.osSubRevision = 0; */ 3894 Info.busType = SI_PCI_BUS; 3895 Info.flags = SI_CMOS_Valid | SI_NumDrivesValid 3896 | SI_OSversionValid | SI_BusTypeValid | SI_NO_SmartROM; 3897 3898 /* Go Out And Look For I2O SmartROM */ 3899 for(j = 0xC8000; j < 0xE0000; j += 2048) { 3900 int k; 3901 3902 cp = ptok(j); 3903 if (*((unsigned short *)cp) != 0xAA55) { 3904 continue; 3905 } 3906 j += (cp[2] * 512) - 2048; 3907 if ((*((u_long *)(cp + 6)) 3908 != ('S' + (' ' * 256) + (' ' * 65536L))) 3909 || (*((u_long *)(cp + 10)) 3910 != ('I' + ('2' * 256) + ('0' * 65536L)))) { 3911 continue; 3912 } 3913 cp += 0x24; 3914 for (k = 0; k < 64; ++k) { 3915 if (*((unsigned short *)cp) 3916 == (' ' + ('v' * 256))) { 3917 break; 3918 } 3919 } 3920 if (k < 64) { 3921 Info.smartROMMajorVersion 3922 = *((unsigned char *)(cp += 4)) - '0'; 3923 Info.smartROMMinorVersion 3924 = *((unsigned char *)(cp += 2)); 3925 Info.smartROMRevision 3926 = *((unsigned char *)(++cp)); 3927 Info.flags |= SI_SmartROMverValid; 3928 Info.flags &= ~SI_NO_SmartROM; 3929 break; 3930 } 3931 } 3932 /* Get The Conventional Memory Size From CMOS */ 3933 outb (0x70, 0x16); 3934 j = inb (0x71); 3935 j <<= 8; 3936 outb (0x70, 0x15); 3937 j |= inb(0x71); 3938 Info.conventionalMemSize = j; 3939 3940 /* Get The Extended Memory Found At Power On From CMOS */ 3941 outb (0x70, 0x31); 3942 j = inb (0x71); 3943 j <<= 8; 3944 outb (0x70, 0x30); 3945 j |= inb(0x71); 3946 Info.extendedMemSize = j; 3947 Info.flags |= SI_MemorySizeValid; 3948 3949 # if (defined(THIS_IS_BROKEN)) 3950 /* If There Is 1 or 2 Drives Found, Set Up Drive Parameters */ 3951 if (Info.numDrives > 0) { 3952 /* 3953 * Get The Pointer From Int 41 For The First 3954 * Drive Parameters 3955 */ 3956 j = ((unsigned)(*((unsigned short *)ptok(0x104+2))) << 4) 3957 + (unsigned)(*((unsigned short *)ptok(0x104+0))); 3958 /* 3959 * It appears that SmartROM's Int41/Int46 pointers 3960 * use memory that gets stepped on by the kernel 3961 * loading. We no longer have access to this 3962 * geometry information but try anyways (!?) 3963 */ 3964 Info.drives[0].cylinders = *((unsigned char *)ptok(j)); 3965 ++j; 3966 Info.drives[0].cylinders += ((int)*((unsigned char *) 3967 ptok(j))) << 8; 3968 ++j; 3969 Info.drives[0].heads = *((unsigned char *)ptok(j)); 3970 j += 12; 3971 Info.drives[0].sectors = *((unsigned char *)ptok(j)); 3972 Info.flags |= SI_DriveParamsValid; 3973 if ((Info.drives[0].cylinders == 0) 3974 || (Info.drives[0].heads == 0) 3975 || (Info.drives[0].sectors == 0)) { 3976 Info.flags &= ~SI_DriveParamsValid; 3977 } 3978 if (Info.numDrives > 1) { 3979 /* 3980 * Get The Pointer From Int 46 For The 3981 * Second Drive Parameters 3982 */ 3983 j = ((unsigned)(*((unsigned short *)ptok(0x118+2))) << 4) 3984 + (unsigned)(*((unsigned short *)ptok(0x118+0))); 3985 Info.drives[1].cylinders = *((unsigned char *) 3986 ptok(j)); 3987 ++j; 3988 Info.drives[1].cylinders += ((int) 3989 *((unsigned char *)ptok(j))) << 8; 3990 ++j; 3991 Info.drives[1].heads = *((unsigned char *) 3992 ptok(j)); 3993 j += 12; 3994 Info.drives[1].sectors = *((unsigned char *) 3995 ptok(j)); 3996 if ((Info.drives[1].cylinders == 0) 3997 || (Info.drives[1].heads == 0) 3998 || (Info.drives[1].sectors == 0)) { 3999 Info.flags &= ~SI_DriveParamsValid; 4000 } 4001 } 4002 } 4003 # endif 4004 /* Copy Out The Info Structure To The User */ 4005 if (ap->a_cmd & 0xFFFF0000) { 4006 bcopy (&Info, data, sizeof(Info)); 4007 } else { 4008 error = copyout (&Info, *(caddr_t *)data, sizeof(Info)); 4009 } 4010 return (error); } 4011 4012 /* Get The BlinkLED State */ 4013 case DPT_BLINKLED: 4014 i = ASR_getBlinkLedCode (sc); 4015 if (i == -1) { 4016 i = 0; 4017 } 4018 if (ap->a_cmd & 0xFFFF0000) { 4019 bcopy ((caddr_t)(&i), data, sizeof(i)); 4020 } else { 4021 error = copyout (&i, *(caddr_t *)data, sizeof(i)); 4022 } 4023 break; 4024 4025 /* Send an I2O command */ 4026 case I2OUSRCMD: 4027 return (ASR_queue_i (sc, *((PI2O_MESSAGE_FRAME *)data))); 4028 4029 /* Reset and re-initialize the adapter */ 4030 case I2ORESETCMD: 4031 return (ASR_reset (sc)); 4032 4033 /* Rescan the LCT table and resynchronize the information */ 4034 case I2ORESCANCMD: 4035 return (ASR_rescan (sc)); 4036 } 4037 return (EINVAL); 4038 } /* asr_ioctl */ 4039