1 /*- 2 * Copyright (c) 1999,2000 Michael Smith 3 * Copyright (c) 2000 BSDi 4 * Copyright (c) 2005 Scott Long 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 /*- 29 * Copyright (c) 2002 Eric Moore 30 * Copyright (c) 2002, 2004 LSI Logic Corporation 31 * All rights reserved. 32 * 33 * Redistribution and use in source and binary forms, with or without 34 * modification, are permitted provided that the following conditions 35 * are met: 36 * 1. Redistributions of source code must retain the above copyright 37 * notice, this list of conditions and the following disclaimer. 38 * 2. Redistributions in binary form must reproduce the above copyright 39 * notice, this list of conditions and the following disclaimer in the 40 * documentation and/or other materials provided with the distribution. 41 * 3. The party using or redistributing the source code and binary forms 42 * agrees to the disclaimer below and the terms and conditions set forth 43 * herein. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 46 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 47 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 48 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 49 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 50 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 51 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 52 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 53 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 54 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 55 * SUCH DAMAGE. 56 * 57 * $FreeBSD: src/sys/dev/amr/amr.c,v 1.97 2012/04/20 20:27:31 jhb Exp $ 58 */ 59 60 /* 61 * Driver for the AMI MegaRaid family of controllers. 62 */ 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/malloc.h> 67 #include <sys/kernel.h> 68 #include <sys/proc.h> 69 #include <sys/sysctl.h> 70 #include <sys/sysmsg.h> 71 72 #include <sys/bio.h> 73 #include <sys/bus.h> 74 #include <sys/conf.h> 75 #include <sys/stat.h> 76 77 #include <machine/cpu.h> 78 #include <sys/rman.h> 79 80 #include <bus/pci/pcireg.h> 81 #include <bus/pci/pcivar.h> 82 83 #include <dev/raid/amr/amrio.h> 84 #include <dev/raid/amr/amrreg.h> 85 #include <dev/raid/amr/amrvar.h> 86 #define AMR_DEFINE_TABLES 87 #include <dev/raid/amr/amr_tables.h> 88 89 SYSCTL_NODE(_hw, OID_AUTO, amr, CTLFLAG_RD, 0, "AMR driver parameters"); 90 91 static d_open_t amr_open; 92 static d_close_t amr_close; 93 static d_ioctl_t amr_ioctl; 94 95 static struct dev_ops amr_ops = { 96 { "amr", 0, 0 }, 97 .d_open = amr_open, 98 .d_close = amr_close, 99 .d_ioctl = amr_ioctl, 100 }; 101 102 int linux_no_adapter = 0; 103 /* 104 * Initialisation, bus interface. 105 */ 106 static void amr_startup(void *arg); 107 108 /* 109 * Command wrappers 110 */ 111 static int amr_query_controller(struct amr_softc *sc); 112 static void *amr_enquiry(struct amr_softc *sc, size_t bufsize, 113 u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status); 114 static void amr_completeio(struct amr_command *ac); 115 static int amr_support_ext_cdb(struct amr_softc *sc); 116 117 /* 118 * Command buffer allocation. 119 */ 120 static void amr_alloccmd_cluster(struct amr_softc *sc); 121 static void amr_freecmd_cluster(struct amr_command_cluster *acc); 122 123 /* 124 * Command processing. 125 */ 126 static int amr_bio_command(struct amr_softc *sc, struct amr_command **acp); 127 static int amr_wait_command(struct amr_command *ac); 128 static int amr_mapcmd(struct amr_command *ac); 129 static void amr_unmapcmd(struct amr_command *ac); 130 static int amr_start(struct amr_command *ac); 131 static void amr_complete(void *context, ac_qhead_t *head); 132 static void amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 133 static void amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 134 static void amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 135 static void amr_abort_load(struct amr_command *ac); 136 137 #if 0 138 /* 139 * Status monitoring 140 */ 141 static void amr_periodic(void *data); 142 #endif 143 144 /* 145 * Interface-specific shims 146 */ 147 static int amr_quartz_submit_command(struct amr_command *ac); 148 static int amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 149 static int amr_quartz_poll_command(struct amr_command *ac); 150 static int amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac); 151 152 static int amr_std_submit_command(struct amr_command *ac); 153 static int amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave); 154 static int amr_std_poll_command(struct amr_command *ac); 155 static void amr_std_attach_mailbox(struct amr_softc *sc); 156 157 #ifdef AMR_BOARD_INIT 158 static int amr_quartz_init(struct amr_softc *sc); 159 static int amr_std_init(struct amr_softc *sc); 160 #endif 161 162 /* 163 * Debugging 164 */ 165 static void amr_describe_controller(struct amr_softc *sc); 166 #ifdef AMR_DEBUG 167 #if 0 168 static void amr_printcommand(struct amr_command *ac); 169 #endif 170 #endif 171 172 static void amr_init_sysctl(struct amr_softc *sc); 173 static int amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr, 174 int32_t flag, struct sysmsg *sm); 175 176 static MALLOC_DEFINE(M_AMR, "amr", "AMR memory"); 177 178 /******************************************************************************** 179 ******************************************************************************** 180 Inline Glue 181 ******************************************************************************** 182 ********************************************************************************/ 183 184 /******************************************************************************** 185 ******************************************************************************** 186 Public Interfaces 187 ******************************************************************************** 188 ********************************************************************************/ 189 190 /******************************************************************************** 191 * Initialise the controller and softc. 192 */ 193 int 194 amr_attach(struct amr_softc *sc) 195 { 196 device_t child; 197 198 debug_called(1); 199 200 /* 201 * Initialise per-controller queues. 202 */ 203 amr_init_qhead(&sc->amr_freecmds); 204 amr_init_qhead(&sc->amr_ready); 205 TAILQ_INIT(&sc->amr_cmd_clusters); 206 bioq_init(&sc->amr_bioq); 207 208 debug(2, "queue init done"); 209 210 /* 211 * Configure for this controller type. 212 */ 213 if (AMR_IS_QUARTZ(sc)) { 214 sc->amr_submit_command = amr_quartz_submit_command; 215 sc->amr_get_work = amr_quartz_get_work; 216 sc->amr_poll_command = amr_quartz_poll_command; 217 sc->amr_poll_command1 = amr_quartz_poll_command1; 218 } else { 219 sc->amr_submit_command = amr_std_submit_command; 220 sc->amr_get_work = amr_std_get_work; 221 sc->amr_poll_command = amr_std_poll_command; 222 amr_std_attach_mailbox(sc); 223 } 224 225 #ifdef AMR_BOARD_INIT 226 if ((AMR_IS_QUARTZ(sc) ? amr_quartz_init(sc) : amr_std_init(sc))) 227 return(ENXIO); 228 #endif 229 230 /* 231 * Allocate initial commands. 232 */ 233 amr_alloccmd_cluster(sc); 234 235 /* 236 * Quiz controller for features and limits. 237 */ 238 if (amr_query_controller(sc)) 239 return(ENXIO); 240 241 debug(2, "controller query complete"); 242 243 /* 244 * preallocate the remaining commands. 245 */ 246 while (sc->amr_nextslot < sc->amr_maxio) 247 amr_alloccmd_cluster(sc); 248 249 /* 250 * Setup sysctls. 251 */ 252 sysctl_ctx_init(&sc->amr_sysctl_ctx); 253 sc->amr_sysctl_tree = SYSCTL_ADD_NODE(&sc->amr_sysctl_ctx, 254 SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO, 255 device_get_nameunit(sc->amr_dev), CTLFLAG_RD, 0, ""); 256 if (sc->amr_sysctl_tree == NULL) { 257 device_printf(sc->amr_dev, "can't add sysctl node\n"); 258 return (EINVAL); 259 } 260 amr_init_sysctl(sc); 261 262 /* 263 * Attach our 'real' SCSI channels to CAM. 264 */ 265 child = device_add_child(sc->amr_dev, "amrp", -1); 266 sc->amr_pass = child; 267 if (child != NULL) { 268 device_set_softc(child, sc); 269 device_set_desc(child, "SCSI Passthrough Bus"); 270 bus_generic_attach(sc->amr_dev); 271 } 272 273 /* 274 * Create the control device. 275 */ 276 sc->amr_dev_t = make_dev(&amr_ops, device_get_unit(sc->amr_dev), UID_ROOT, GID_OPERATOR, 277 S_IRUSR | S_IWUSR, "amr%d", device_get_unit(sc->amr_dev)); 278 sc->amr_dev_t->si_drv1 = sc; 279 linux_no_adapter++; 280 if (device_get_unit(sc->amr_dev) == 0) 281 make_dev_alias(sc->amr_dev_t, "megadev0"); 282 283 /* 284 * Schedule ourselves to bring the controller up once interrupts are 285 * available. 286 */ 287 bzero(&sc->amr_ich, sizeof(struct intr_config_hook)); 288 sc->amr_ich.ich_func = amr_startup; 289 sc->amr_ich.ich_arg = sc; 290 sc->amr_ich.ich_desc = "amr"; 291 if (config_intrhook_establish(&sc->amr_ich) != 0) { 292 device_printf(sc->amr_dev, "can't establish configuration hook\n"); 293 return(ENOMEM); 294 } 295 296 /* 297 * Print a little information about the controller. 298 */ 299 amr_describe_controller(sc); 300 301 debug(2, "attach complete"); 302 return(0); 303 } 304 305 /******************************************************************************** 306 * Locate disk resources and attach children to them. 307 */ 308 static void 309 amr_startup(void *arg) 310 { 311 struct amr_softc *sc = (struct amr_softc *)arg; 312 struct amr_logdrive *dr; 313 int i, error; 314 315 debug_called(1); 316 callout_init(&sc->amr_timeout); 317 318 /* pull ourselves off the intrhook chain */ 319 if (sc->amr_ich.ich_func) 320 config_intrhook_disestablish(&sc->amr_ich); 321 sc->amr_ich.ich_func = NULL; 322 323 /* get up-to-date drive information */ 324 if (amr_query_controller(sc)) { 325 device_printf(sc->amr_dev, "can't scan controller for drives\n"); 326 return; 327 } 328 329 /* iterate over available drives */ 330 for (i = 0, dr = &sc->amr_drive[0]; (i < AMR_MAXLD) && (dr->al_size != 0xffffffff); i++, dr++) { 331 /* are we already attached to this drive? */ 332 if (dr->al_disk == 0) { 333 /* generate geometry information */ 334 if (dr->al_size > 0x200000) { /* extended translation? */ 335 dr->al_heads = 255; 336 dr->al_sectors = 63; 337 } else { 338 dr->al_heads = 64; 339 dr->al_sectors = 32; 340 } 341 dr->al_cylinders = dr->al_size / (dr->al_heads * dr->al_sectors); 342 343 dr->al_disk = device_add_child(sc->amr_dev, NULL, -1); 344 if (dr->al_disk == 0) 345 device_printf(sc->amr_dev, "device_add_child failed\n"); 346 device_set_ivars(dr->al_disk, dr); 347 } 348 } 349 350 if ((error = bus_generic_attach(sc->amr_dev)) != 0) 351 device_printf(sc->amr_dev, "bus_generic_attach returned %d\n", error); 352 353 /* mark controller back up */ 354 sc->amr_state &= ~AMR_STATE_SHUTDOWN; 355 356 /* interrupts will be enabled before we do anything more */ 357 sc->amr_state |= AMR_STATE_INTEN; 358 359 #if 0 360 /* 361 * Start the timeout routine. 362 */ 363 sc->amr_timeout = timeout(amr_periodic, sc, hz); 364 #endif 365 366 return; 367 } 368 369 static void 370 amr_init_sysctl(struct amr_softc *sc) 371 { 372 373 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 374 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 375 OID_AUTO, "allow_volume_configure", CTLFLAG_RW, &sc->amr_allow_vol_config, 0, 376 ""); 377 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 378 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 379 OID_AUTO, "nextslot", CTLFLAG_RD, &sc->amr_nextslot, 0, 380 ""); 381 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 382 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 383 OID_AUTO, "busyslots", CTLFLAG_RD, &sc->amr_busyslots, 0, 384 ""); 385 SYSCTL_ADD_INT(&sc->amr_sysctl_ctx, 386 SYSCTL_CHILDREN(sc->amr_sysctl_tree), 387 OID_AUTO, "maxio", CTLFLAG_RD, &sc->amr_maxio, 0, 388 ""); 389 } 390 391 392 /******************************************************************************* 393 * Free resources associated with a controller instance 394 */ 395 void 396 amr_free(struct amr_softc *sc) 397 { 398 struct amr_command_cluster *acc; 399 400 /* detach from CAM */ 401 if (sc->amr_pass != NULL) 402 device_delete_child(sc->amr_dev, sc->amr_pass); 403 404 /* cancel status timeout */ 405 callout_stop(&sc->amr_timeout); 406 407 /* throw away any command buffers */ 408 while ((acc = TAILQ_FIRST(&sc->amr_cmd_clusters)) != NULL) { 409 TAILQ_REMOVE(&sc->amr_cmd_clusters, acc, acc_link); 410 amr_freecmd_cluster(acc); 411 } 412 413 /* destroy control device */ 414 if(sc->amr_dev_t != NULL) 415 destroy_dev(sc->amr_dev_t); 416 dev_ops_remove_minor(&amr_ops, device_get_unit(sc->amr_dev)); 417 418 #if 0 /* XXX swildner */ 419 if (mtx_initialized(&sc->amr_hw_lock)) 420 mtx_destroy(&sc->amr_hw_lock); 421 422 if (mtx_initialized(&sc->amr_list_lock)) 423 mtx_destroy(&sc->amr_list_lock); 424 #endif 425 426 if (sc->amr_sysctl_tree != NULL) 427 sysctl_ctx_free(&sc->amr_sysctl_ctx); 428 429 lockuninit(&sc->amr_hw_lock); 430 lockuninit(&sc->amr_list_lock); 431 } 432 433 /******************************************************************************* 434 * Receive a bio structure from a child device and queue it on a particular 435 * disk resource, then poke the disk resource to start as much work as it can. 436 */ 437 int 438 amr_submit_bio(struct amr_softc *sc, struct bio *bio) 439 { 440 debug_called(2); 441 442 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 443 amr_enqueue_bio(sc, bio); 444 amr_startio(sc); 445 lockmgr(&sc->amr_list_lock, LK_RELEASE); 446 return(0); 447 } 448 449 /******************************************************************************** 450 * Accept an open operation on the control device. 451 */ 452 static int 453 amr_open(struct dev_open_args *ap) 454 { 455 cdev_t dev = ap->a_head.a_dev; 456 int unit = minor(dev); 457 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 458 459 debug_called(1); 460 461 sc->amr_state |= AMR_STATE_OPEN; 462 return(0); 463 } 464 465 /******************************************************************************** 466 * Accept the last close on the control device. 467 */ 468 static int 469 amr_close(struct dev_close_args *ap) 470 { 471 cdev_t dev = ap->a_head.a_dev; 472 int unit = minor(dev); 473 struct amr_softc *sc = devclass_get_softc(devclass_find("amr"), unit); 474 475 debug_called(1); 476 477 sc->amr_state &= ~AMR_STATE_OPEN; 478 return (0); 479 } 480 481 /******************************************************************************** 482 * Handle controller-specific control operations. 483 */ 484 static void 485 amr_rescan_drives(struct cdev *dev) 486 { 487 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 488 int i, error = 0; 489 490 sc->amr_state |= AMR_STATE_REMAP_LD; 491 while (sc->amr_busyslots) { 492 device_printf(sc->amr_dev, "idle controller\n"); 493 amr_done(sc); 494 } 495 496 /* mark ourselves as in-shutdown */ 497 sc->amr_state |= AMR_STATE_SHUTDOWN; 498 499 /* flush controller */ 500 device_printf(sc->amr_dev, "flushing cache..."); 501 kprintf("%s\n", amr_flush(sc) ? "failed" : "done"); 502 503 /* delete all our child devices */ 504 for(i = 0 ; i < AMR_MAXLD; i++) { 505 if(sc->amr_drive[i].al_disk != 0) { 506 if((error = device_delete_child(sc->amr_dev, 507 sc->amr_drive[i].al_disk)) != 0) 508 goto shutdown_out; 509 510 sc->amr_drive[i].al_disk = 0; 511 } 512 } 513 514 shutdown_out: 515 amr_startup(sc); 516 } 517 518 /* 519 * Bug-for-bug compatibility with Linux! 520 * Some apps will send commands with inlen and outlen set to 0, 521 * even though they expect data to be transfered to them from the 522 * card. Linux accidentally allows this by allocating a 4KB 523 * buffer for the transfer anyways, but it then throws it away 524 * without copying it back to the app. 525 * 526 * The amr(4) firmware relies on this feature. In fact, it assumes 527 * the buffer is always a power of 2 up to a max of 64k. There is 528 * also at least one case where it assumes a buffer less than 16k is 529 * greater than 16k. Force a minimum buffer size of 32k and round 530 * sizes between 32k and 64k up to 64k as a workaround. 531 */ 532 static unsigned long 533 amr_ioctl_buffer_length(unsigned long len) 534 { 535 536 if (len <= 32 * 1024) 537 return (32 * 1024); 538 if (len <= 64 * 1024) 539 return (64 * 1024); 540 return (len); 541 } 542 543 int 544 amr_linux_ioctl_int(struct cdev *dev, u_long cmd, caddr_t addr, int32_t flag, 545 struct sysmsg *sm) 546 { 547 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 548 struct amr_command *ac; 549 struct amr_mailbox *mb; 550 struct amr_linux_ioctl ali; 551 void *dp, *temp; 552 int error; 553 int adapter, len, ac_flags = 0; 554 int logical_drives_changed = 0; 555 u_int32_t linux_version = 0x02100000; 556 u_int8_t status; 557 struct amr_passthrough *ap; /* 60 bytes */ 558 559 error = 0; 560 dp = NULL; 561 ac = NULL; 562 ap = NULL; 563 564 if ((error = copyin(addr, &ali, sizeof(ali))) != 0) 565 return (error); 566 switch (ali.ui.fcs.opcode) { 567 case 0x82: 568 switch(ali.ui.fcs.subopcode) { 569 case 'e': 570 copyout(&linux_version, (void *)(uintptr_t)ali.data, 571 sizeof(linux_version)); 572 error = 0; 573 break; 574 575 case 'm': 576 copyout(&linux_no_adapter, (void *)(uintptr_t)ali.data, 577 sizeof(linux_no_adapter)); 578 sm->sm_result.iresult = linux_no_adapter; 579 error = 0; 580 break; 581 582 default: 583 kprintf("Unknown subopcode\n"); 584 error = ENOIOCTL; 585 break; 586 } 587 break; 588 589 case 0x80: 590 case 0x81: 591 if (ali.ui.fcs.opcode == 0x80) 592 len = max(ali.outlen, ali.inlen); 593 else 594 len = ali.ui.fcs.length; 595 596 adapter = (ali.ui.fcs.adapno) ^ 'm' << 8; 597 598 mb = (void *)&ali.mbox[0]; 599 600 if ((ali.mbox[0] == FC_DEL_LOGDRV && ali.mbox[2] == OP_DEL_LOGDRV) || /* delete */ 601 (ali.mbox[0] == AMR_CMD_CONFIG && ali.mbox[2] == 0x0d)) { /* create */ 602 if (sc->amr_allow_vol_config == 0) { 603 error = EPERM; 604 break; 605 } 606 logical_drives_changed = 1; 607 } 608 609 if (ali.mbox[0] == AMR_CMD_PASS) { 610 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 611 while ((ac = amr_alloccmd(sc)) == NULL) 612 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 613 lockmgr(&sc->amr_list_lock, LK_RELEASE); 614 ap = &ac->ac_ccb->ccb_pthru; 615 616 error = copyin((void *)(uintptr_t)mb->mb_physaddr, ap, 617 sizeof(struct amr_passthrough)); 618 if (error) 619 break; 620 621 if (ap->ap_data_transfer_length) 622 dp = kmalloc(ap->ap_data_transfer_length, M_AMR, 623 M_WAITOK | M_ZERO); 624 625 if (ali.inlen) { 626 error = copyin((void *)(uintptr_t)ap->ap_data_transfer_address, 627 dp, ap->ap_data_transfer_length); 628 if (error) 629 break; 630 } 631 632 ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT|AMR_CMD_CCB; 633 bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox)); 634 ac->ac_mailbox.mb_command = AMR_CMD_PASS; 635 ac->ac_flags = ac_flags; 636 637 ac->ac_data = dp; 638 ac->ac_length = ap->ap_data_transfer_length; 639 temp = (void *)(uintptr_t)ap->ap_data_transfer_address; 640 641 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 642 error = amr_wait_command(ac); 643 lockmgr(&sc->amr_list_lock, LK_RELEASE); 644 if (error) 645 break; 646 647 status = ac->ac_status; 648 error = copyout(&status, &((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_scsi_status, sizeof(status)); 649 if (error) 650 break; 651 652 if (ali.outlen) { 653 error = copyout(dp, temp, ap->ap_data_transfer_length); 654 if (error) 655 break; 656 } 657 error = copyout(ap->ap_request_sense_area, ((struct amr_passthrough *)(uintptr_t)mb->mb_physaddr)->ap_request_sense_area, ap->ap_request_sense_length); 658 if (error) 659 break; 660 661 error = 0; 662 break; 663 } else if (ali.mbox[0] == AMR_CMD_PASS_64) { 664 kprintf("No AMR_CMD_PASS_64\n"); 665 error = ENOIOCTL; 666 break; 667 } else if (ali.mbox[0] == AMR_CMD_EXTPASS) { 668 kprintf("No AMR_CMD_EXTPASS\n"); 669 error = ENOIOCTL; 670 break; 671 } else { 672 len = amr_ioctl_buffer_length(imax(ali.inlen, ali.outlen)); 673 674 dp = kmalloc(len, M_AMR, M_WAITOK | M_ZERO); 675 676 if (ali.inlen) { 677 error = copyin((void *)(uintptr_t)mb->mb_physaddr, dp, len); 678 if (error) 679 break; 680 } 681 682 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 683 while ((ac = amr_alloccmd(sc)) == NULL) 684 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 685 686 ac_flags = AMR_CMD_DATAIN|AMR_CMD_DATAOUT; 687 bzero(&ac->ac_mailbox, sizeof(ac->ac_mailbox)); 688 bcopy(&ali.mbox[0], &ac->ac_mailbox, sizeof(ali.mbox)); 689 690 ac->ac_length = len; 691 ac->ac_data = dp; 692 ac->ac_flags = ac_flags; 693 694 error = amr_wait_command(ac); 695 lockmgr(&sc->amr_list_lock, LK_RELEASE); 696 if (error) 697 break; 698 699 status = ac->ac_status; 700 error = copyout(&status, &((struct amr_mailbox *)&((struct amr_linux_ioctl *)addr)->mbox[0])->mb_status, sizeof(status)); 701 if (ali.outlen) { 702 error = copyout(dp, (void *)(uintptr_t)mb->mb_physaddr, ali.outlen); 703 if (error) 704 break; 705 } 706 707 error = 0; 708 if (logical_drives_changed) 709 amr_rescan_drives(dev); 710 break; 711 } 712 break; 713 714 default: 715 debug(1, "unknown linux ioctl 0x%lx", cmd); 716 kprintf("unknown linux ioctl 0x%lx\n", cmd); 717 error = ENOIOCTL; 718 break; 719 } 720 721 /* 722 * At this point, we know that there is a lock held and that these 723 * objects have been allocated. 724 */ 725 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 726 if (ac != NULL) 727 amr_releasecmd(ac); 728 lockmgr(&sc->amr_list_lock, LK_RELEASE); 729 if (dp != NULL) 730 kfree(dp, M_AMR); 731 return(error); 732 } 733 734 static int 735 amr_ioctl(struct dev_ioctl_args *ap) 736 { 737 cdev_t dev = ap->a_head.a_dev; 738 caddr_t addr = ap->a_data; 739 u_long cmd = ap->a_cmd; 740 struct amr_softc *sc = (struct amr_softc *)dev->si_drv1; 741 union { 742 void *_p; 743 struct amr_user_ioctl *au; 744 #ifdef AMR_IO_COMMAND32 745 struct amr_user_ioctl32 *au32; 746 #endif 747 int *result; 748 } arg; 749 struct amr_command *ac; 750 struct amr_mailbox_ioctl *mbi; 751 void *dp, *au_buffer; 752 unsigned long au_length, real_length; 753 unsigned char *au_cmd; 754 int *au_statusp, au_direction; 755 int error; 756 struct amr_passthrough *_ap; /* 60 bytes */ 757 int logical_drives_changed = 0; 758 759 debug_called(1); 760 761 arg._p = (void *)addr; 762 763 error = 0; 764 dp = NULL; 765 ac = NULL; 766 _ap = NULL; 767 768 switch(cmd) { 769 770 case AMR_IO_VERSION: 771 debug(1, "AMR_IO_VERSION"); 772 *arg.result = AMR_IO_VERSION_NUMBER; 773 return(0); 774 775 #ifdef AMR_IO_COMMAND32 776 /* 777 * Accept ioctl-s from 32-bit binaries on non-32-bit 778 * platforms, such as AMD. LSI's MEGAMGR utility is 779 * the only example known today... -mi 780 */ 781 case AMR_IO_COMMAND32: 782 debug(1, "AMR_IO_COMMAND32 0x%x", arg.au32->au_cmd[0]); 783 au_cmd = arg.au32->au_cmd; 784 au_buffer = (void *)(u_int64_t)arg.au32->au_buffer; 785 au_length = arg.au32->au_length; 786 au_direction = arg.au32->au_direction; 787 au_statusp = &arg.au32->au_status; 788 break; 789 #endif 790 791 case AMR_IO_COMMAND: 792 debug(1, "AMR_IO_COMMAND 0x%x", arg.au->au_cmd[0]); 793 au_cmd = arg.au->au_cmd; 794 au_buffer = (void *)arg.au->au_buffer; 795 au_length = arg.au->au_length; 796 au_direction = arg.au->au_direction; 797 au_statusp = &arg.au->au_status; 798 break; 799 800 case 0xc0046d00: 801 case 0xc06e6d00: /* Linux emulation */ 802 { 803 devclass_t devclass; 804 struct amr_linux_ioctl ali; 805 int adapter, error; 806 807 devclass = devclass_find("amr"); 808 if (devclass == NULL) 809 return (ENOENT); 810 811 error = copyin(addr, &ali, sizeof(ali)); 812 if (error) 813 return (error); 814 if (ali.ui.fcs.opcode == 0x82) 815 adapter = 0; 816 else 817 adapter = (ali.ui.fcs.adapno) ^ 'm' << 8; 818 819 sc = devclass_get_softc(devclass, adapter); 820 if (sc == NULL) 821 return (ENOENT); 822 823 return (amr_linux_ioctl_int(sc->amr_dev_t, cmd, addr, 0, ap->a_sysmsg)); 824 } 825 default: 826 debug(1, "unknown ioctl 0x%lx", cmd); 827 return(ENOIOCTL); 828 } 829 830 if ((au_cmd[0] == FC_DEL_LOGDRV && au_cmd[1] == OP_DEL_LOGDRV) || /* delete */ 831 (au_cmd[0] == AMR_CMD_CONFIG && au_cmd[1] == 0x0d)) { /* create */ 832 if (sc->amr_allow_vol_config == 0) { 833 error = EPERM; 834 goto out; 835 } 836 logical_drives_changed = 1; 837 } 838 839 /* handle inbound data buffer */ 840 real_length = amr_ioctl_buffer_length(au_length); 841 if (au_length != 0 && au_cmd[0] != 0x06) { 842 if ((dp = kmalloc(real_length, M_AMR, M_WAITOK|M_ZERO)) == NULL) { 843 error = ENOMEM; 844 goto out; 845 } 846 if ((error = copyin(au_buffer, dp, au_length)) != 0) { 847 kfree(dp, M_AMR); 848 return (error); 849 } 850 debug(2, "copyin %ld bytes from %p -> %p", au_length, au_buffer, dp); 851 } 852 853 /* Allocate this now before the mutex gets held */ 854 855 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 856 while ((ac = amr_alloccmd(sc)) == NULL) 857 lksleep(sc, &sc->amr_list_lock, 0, "amrioc", hz); 858 859 /* handle SCSI passthrough command */ 860 if (au_cmd[0] == AMR_CMD_PASS) { 861 int len; 862 863 _ap = &ac->ac_ccb->ccb_pthru; 864 bzero(_ap, sizeof(struct amr_passthrough)); 865 866 /* copy cdb */ 867 len = au_cmd[2]; 868 _ap->ap_cdb_length = len; 869 bcopy(au_cmd + 3, _ap->ap_cdb, len); 870 871 /* build passthrough */ 872 _ap->ap_timeout = au_cmd[len + 3] & 0x07; 873 _ap->ap_ars = (au_cmd[len + 3] & 0x08) ? 1 : 0; 874 _ap->ap_islogical = (au_cmd[len + 3] & 0x80) ? 1 : 0; 875 _ap->ap_logical_drive_no = au_cmd[len + 4]; 876 _ap->ap_channel = au_cmd[len + 5]; 877 _ap->ap_scsi_id = au_cmd[len + 6]; 878 _ap->ap_request_sense_length = 14; 879 _ap->ap_data_transfer_length = au_length; 880 /* XXX what about the request-sense area? does the caller want it? */ 881 882 /* build command */ 883 ac->ac_mailbox.mb_command = AMR_CMD_PASS; 884 ac->ac_flags = AMR_CMD_CCB; 885 886 } else { 887 /* direct command to controller */ 888 mbi = (struct amr_mailbox_ioctl *)&ac->ac_mailbox; 889 890 /* copy pertinent mailbox items */ 891 mbi->mb_command = au_cmd[0]; 892 mbi->mb_channel = au_cmd[1]; 893 mbi->mb_param = au_cmd[2]; 894 mbi->mb_pad[0] = au_cmd[3]; 895 mbi->mb_drive = au_cmd[4]; 896 ac->ac_flags = 0; 897 } 898 899 /* build the command */ 900 ac->ac_data = dp; 901 ac->ac_length = real_length; 902 ac->ac_flags |= AMR_CMD_DATAIN|AMR_CMD_DATAOUT; 903 904 /* run the command */ 905 error = amr_wait_command(ac); 906 lockmgr(&sc->amr_list_lock, LK_RELEASE); 907 if (error) 908 goto out; 909 910 /* copy out data and set status */ 911 if (au_length != 0) { 912 error = copyout(dp, au_buffer, au_length); 913 } 914 debug(2, "copyout %ld bytes from %p -> %p", au_length, dp, au_buffer); 915 if (dp != NULL) 916 debug(2, "%p status 0x%x", dp, ac->ac_status); 917 *au_statusp = ac->ac_status; 918 919 out: 920 /* 921 * At this point, we know that there is a lock held and that these 922 * objects have been allocated. 923 */ 924 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 925 if (ac != NULL) 926 amr_releasecmd(ac); 927 lockmgr(&sc->amr_list_lock, LK_RELEASE); 928 if (dp != NULL) 929 kfree(dp, M_AMR); 930 931 if (logical_drives_changed) 932 amr_rescan_drives(dev); 933 934 return(error); 935 } 936 937 #if 0 938 /******************************************************************************** 939 ******************************************************************************** 940 Status Monitoring 941 ******************************************************************************** 942 ********************************************************************************/ 943 944 /******************************************************************************** 945 * Perform a periodic check of the controller status 946 */ 947 static void 948 amr_periodic(void *data) 949 { 950 struct amr_softc *sc = (struct amr_softc *)data; 951 952 debug_called(2); 953 954 /* XXX perform periodic status checks here */ 955 956 /* compensate for missed interrupts */ 957 amr_done(sc); 958 959 /* reschedule */ 960 callout_reset(&sc->amr_timeout, hz, amr_periodic, sc); 961 } 962 #endif 963 964 /******************************************************************************** 965 ******************************************************************************** 966 Command Wrappers 967 ******************************************************************************** 968 ********************************************************************************/ 969 970 /******************************************************************************** 971 * Interrogate the controller for the operational parameters we require. 972 */ 973 static int 974 amr_query_controller(struct amr_softc *sc) 975 { 976 struct amr_enquiry3 *aex; 977 struct amr_prodinfo *ap; 978 struct amr_enquiry *ae; 979 int ldrv; 980 int status; 981 982 /* 983 * Greater than 10 byte cdb support 984 */ 985 sc->support_ext_cdb = amr_support_ext_cdb(sc); 986 987 if(sc->support_ext_cdb) { 988 debug(2,"supports extended CDBs."); 989 } 990 991 /* 992 * Try to issue an ENQUIRY3 command 993 */ 994 if ((aex = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_ENQ3, 995 AMR_CONFIG_ENQ3_SOLICITED_FULL, &status)) != NULL) { 996 997 /* 998 * Fetch current state of logical drives. 999 */ 1000 for (ldrv = 0; ldrv < aex->ae_numldrives; ldrv++) { 1001 sc->amr_drive[ldrv].al_size = aex->ae_drivesize[ldrv]; 1002 sc->amr_drive[ldrv].al_state = aex->ae_drivestate[ldrv]; 1003 sc->amr_drive[ldrv].al_properties = aex->ae_driveprop[ldrv]; 1004 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 1005 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 1006 } 1007 kfree(aex, M_AMR); 1008 1009 /* 1010 * Get product info for channel count. 1011 */ 1012 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) == NULL) { 1013 device_printf(sc->amr_dev, "can't obtain product data from controller\n"); 1014 return(1); 1015 } 1016 sc->amr_maxdrives = 40; 1017 sc->amr_maxchan = ap->ap_nschan; 1018 sc->amr_maxio = ap->ap_maxio; 1019 sc->amr_type |= AMR_TYPE_40LD; 1020 kfree(ap, M_AMR); 1021 1022 ap = amr_enquiry(sc, 0, FC_DEL_LOGDRV, OP_SUP_DEL_LOGDRV, 0, &status); 1023 if (ap != NULL) 1024 kfree(ap, M_AMR); 1025 if (!status) { 1026 sc->amr_ld_del_supported = 1; 1027 device_printf(sc->amr_dev, "delete logical drives supported by controller\n"); 1028 } 1029 } else { 1030 1031 /* failed, try the 8LD ENQUIRY commands */ 1032 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) == NULL) { 1033 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) == NULL) { 1034 device_printf(sc->amr_dev, "can't obtain configuration data from controller\n"); 1035 return(1); 1036 } 1037 ae->ae_signature = 0; 1038 } 1039 1040 /* 1041 * Fetch current state of logical drives. 1042 */ 1043 for (ldrv = 0; ldrv < ae->ae_ldrv.al_numdrives; ldrv++) { 1044 sc->amr_drive[ldrv].al_size = ae->ae_ldrv.al_size[ldrv]; 1045 sc->amr_drive[ldrv].al_state = ae->ae_ldrv.al_state[ldrv]; 1046 sc->amr_drive[ldrv].al_properties = ae->ae_ldrv.al_properties[ldrv]; 1047 debug(2, " drive %d: %d state %x properties %x\n", ldrv, sc->amr_drive[ldrv].al_size, 1048 sc->amr_drive[ldrv].al_state, sc->amr_drive[ldrv].al_properties); 1049 } 1050 1051 sc->amr_maxdrives = 8; 1052 sc->amr_maxchan = ae->ae_adapter.aa_channels; 1053 sc->amr_maxio = ae->ae_adapter.aa_maxio; 1054 kfree(ae, M_AMR); 1055 } 1056 1057 /* 1058 * Mark remaining drives as unused. 1059 */ 1060 for (; ldrv < AMR_MAXLD; ldrv++) 1061 sc->amr_drive[ldrv].al_size = 0xffffffff; 1062 1063 /* 1064 * Cap the maximum number of outstanding I/Os. AMI's Linux driver doesn't trust 1065 * the controller's reported value, and lockups have been seen when we do. 1066 */ 1067 sc->amr_maxio = imin(sc->amr_maxio, AMR_LIMITCMD); 1068 1069 return(0); 1070 } 1071 1072 /******************************************************************************** 1073 * Run a generic enquiry-style command. 1074 */ 1075 static void * 1076 amr_enquiry(struct amr_softc *sc, size_t bufsize, u_int8_t cmd, u_int8_t cmdsub, u_int8_t cmdqual, int *status) 1077 { 1078 struct amr_command *ac; 1079 void *result; 1080 u_int8_t *mbox; 1081 int error; 1082 1083 debug_called(1); 1084 1085 error = 1; 1086 result = NULL; 1087 1088 /* get ourselves a command buffer */ 1089 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1090 ac = amr_alloccmd(sc); 1091 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1092 if (ac == NULL) 1093 goto out; 1094 /* allocate the response structure */ 1095 if ((result = kmalloc(bufsize, M_AMR, M_ZERO|M_NOWAIT)) == NULL) 1096 goto out; 1097 /* set command flags */ 1098 1099 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAIN; 1100 1101 /* point the command at our data */ 1102 ac->ac_data = result; 1103 ac->ac_length = bufsize; 1104 1105 /* build the command proper */ 1106 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 1107 mbox[0] = cmd; 1108 mbox[2] = cmdsub; 1109 mbox[3] = cmdqual; 1110 *status = 0; 1111 1112 /* can't assume that interrupts are going to work here, so play it safe */ 1113 if (sc->amr_poll_command(ac)) 1114 goto out; 1115 error = ac->ac_status; 1116 *status = ac->ac_status; 1117 1118 out: 1119 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1120 if (ac != NULL) 1121 amr_releasecmd(ac); 1122 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1123 if ((error != 0) && (result != NULL)) { 1124 kfree(result, M_AMR); 1125 result = NULL; 1126 } 1127 return(result); 1128 } 1129 1130 /******************************************************************************** 1131 * Flush the controller's internal cache, return status. 1132 */ 1133 int 1134 amr_flush(struct amr_softc *sc) 1135 { 1136 struct amr_command *ac; 1137 int error; 1138 1139 /* get ourselves a command buffer */ 1140 error = 1; 1141 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1142 ac = amr_alloccmd(sc); 1143 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1144 if (ac == NULL) 1145 goto out; 1146 /* set command flags */ 1147 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1148 1149 /* build the command proper */ 1150 ac->ac_mailbox.mb_command = AMR_CMD_FLUSH; 1151 1152 /* we have to poll, as the system may be going down or otherwise damaged */ 1153 if (sc->amr_poll_command(ac)) 1154 goto out; 1155 error = ac->ac_status; 1156 1157 out: 1158 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1159 if (ac != NULL) 1160 amr_releasecmd(ac); 1161 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1162 return(error); 1163 } 1164 1165 /******************************************************************************** 1166 * Detect extented cdb >> greater than 10 byte cdb support 1167 * returns '1' means this support exist 1168 * returns '0' means this support doesn't exist 1169 */ 1170 static int 1171 amr_support_ext_cdb(struct amr_softc *sc) 1172 { 1173 struct amr_command *ac; 1174 u_int8_t *mbox; 1175 int error; 1176 1177 /* get ourselves a command buffer */ 1178 error = 0; 1179 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1180 ac = amr_alloccmd(sc); 1181 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1182 if (ac == NULL) 1183 goto out; 1184 /* set command flags */ 1185 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1186 1187 /* build the command proper */ 1188 mbox = (u_int8_t *)&ac->ac_mailbox; /* XXX want a real structure for this? */ 1189 mbox[0] = 0xA4; 1190 mbox[2] = 0x16; 1191 1192 1193 /* we have to poll, as the system may be going down or otherwise damaged */ 1194 if (sc->amr_poll_command(ac)) 1195 goto out; 1196 if( ac->ac_status == AMR_STATUS_SUCCESS ) { 1197 error = 1; 1198 } 1199 1200 out: 1201 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1202 if (ac != NULL) 1203 amr_releasecmd(ac); 1204 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1205 return(error); 1206 } 1207 1208 /******************************************************************************** 1209 * Try to find I/O work for the controller from one or more of the work queues. 1210 * 1211 * We make the assumption that if the controller is not ready to take a command 1212 * at some given time, it will generate an interrupt at some later time when 1213 * it is. 1214 */ 1215 void 1216 amr_startio(struct amr_softc *sc) 1217 { 1218 struct amr_command *ac; 1219 1220 /* spin until something prevents us from doing any work */ 1221 for (;;) { 1222 1223 /* Don't bother to queue commands no bounce buffers are available. */ 1224 if (sc->amr_state & AMR_STATE_QUEUE_FRZN) 1225 break; 1226 1227 /* try to get a ready command */ 1228 ac = amr_dequeue_ready(sc); 1229 1230 /* if that failed, build a command from a bio */ 1231 if (ac == NULL) 1232 (void)amr_bio_command(sc, &ac); 1233 1234 /* if that failed, build a command from a ccb */ 1235 if ((ac == NULL) && (sc->amr_cam_command != NULL)) 1236 sc->amr_cam_command(sc, &ac); 1237 1238 /* if we don't have anything to do, give up */ 1239 if (ac == NULL) 1240 break; 1241 1242 /* try to give the command to the controller; if this fails save it for later and give up */ 1243 if (amr_start(ac)) { 1244 debug(2, "controller busy, command deferred"); 1245 amr_requeue_ready(ac); /* XXX schedule retry very soon? */ 1246 break; 1247 } 1248 } 1249 } 1250 1251 /******************************************************************************** 1252 * Handle completion of an I/O command. 1253 */ 1254 static void 1255 amr_completeio(struct amr_command *ac) 1256 { 1257 struct amr_softc *sc = ac->ac_sc; 1258 static struct timeval lastfail; 1259 static int curfail; 1260 struct buf *bp = ac->ac_bio->bio_buf; 1261 1262 if (ac->ac_status != AMR_STATUS_SUCCESS) { /* could be more verbose here? */ 1263 bp->b_error = EIO; 1264 bp->b_flags |= B_ERROR; 1265 1266 if (ppsratecheck(&lastfail, &curfail, 1)) 1267 device_printf(sc->amr_dev, "I/O error - 0x%x\n", ac->ac_status); 1268 /* amr_printcommand(ac);*/ 1269 } 1270 amrd_intr(ac->ac_bio); 1271 lockmgr(&ac->ac_sc->amr_list_lock, LK_EXCLUSIVE); 1272 amr_releasecmd(ac); 1273 lockmgr(&ac->ac_sc->amr_list_lock, LK_RELEASE); 1274 } 1275 1276 /******************************************************************************** 1277 ******************************************************************************** 1278 Command Processing 1279 ******************************************************************************** 1280 ********************************************************************************/ 1281 1282 /******************************************************************************** 1283 * Convert a bio off the top of the bio queue into a command. 1284 */ 1285 static int 1286 amr_bio_command(struct amr_softc *sc, struct amr_command **acp) 1287 { 1288 struct amr_command *ac; 1289 struct amrd_softc *amrd; 1290 struct bio *bio; 1291 struct buf *bp; 1292 int error; 1293 int blkcount; 1294 int driveno; 1295 int cmd; 1296 1297 ac = NULL; 1298 error = 0; 1299 1300 /* get a command */ 1301 if ((ac = amr_alloccmd(sc)) == NULL) 1302 return (ENOMEM); 1303 1304 /* get a bio to work on */ 1305 if ((bio = amr_dequeue_bio(sc)) == NULL) { 1306 amr_releasecmd(ac); 1307 return (0); 1308 } 1309 1310 /* connect the bio to the command */ 1311 bp = bio->bio_buf; 1312 ac->ac_complete = amr_completeio; 1313 ac->ac_bio = bio; 1314 ac->ac_data = bp->b_data; 1315 ac->ac_length = bp->b_bcount; 1316 cmd = 0; 1317 switch (bp->b_cmd) { 1318 case BUF_CMD_READ: 1319 ac->ac_flags |= AMR_CMD_DATAIN; 1320 if (AMR_IS_SG64(sc)) { 1321 cmd = AMR_CMD_LREAD64; 1322 ac->ac_flags |= AMR_CMD_SG64; 1323 } else 1324 cmd = AMR_CMD_LREAD; 1325 break; 1326 case BUF_CMD_WRITE: 1327 ac->ac_flags |= AMR_CMD_DATAOUT; 1328 if (AMR_IS_SG64(sc)) { 1329 cmd = AMR_CMD_LWRITE64; 1330 ac->ac_flags |= AMR_CMD_SG64; 1331 } else 1332 cmd = AMR_CMD_LWRITE; 1333 break; 1334 case BUF_CMD_FLUSH: 1335 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 1336 cmd = AMR_CMD_FLUSH; 1337 break; 1338 default: 1339 panic("Invalid bio command"); 1340 } 1341 amrd = (struct amrd_softc *)bio->bio_driver_info; 1342 driveno = amrd->amrd_drive - sc->amr_drive; 1343 blkcount = (bp->b_bcount + AMR_BLKSIZE - 1) / AMR_BLKSIZE; 1344 1345 ac->ac_mailbox.mb_command = cmd; 1346 if (bp->b_cmd & (BUF_CMD_READ|BUF_CMD_WRITE)) { 1347 ac->ac_mailbox.mb_blkcount = blkcount; 1348 ac->ac_mailbox.mb_lba = bio->bio_offset / AMR_BLKSIZE; 1349 if (((bio->bio_offset / AMR_BLKSIZE) + blkcount) > sc->amr_drive[driveno].al_size) { 1350 device_printf(sc->amr_dev, 1351 "I/O beyond end of unit (%lld,%d > %lu)\n", 1352 (long long)(bio->bio_offset / AMR_BLKSIZE), blkcount, 1353 (u_long)sc->amr_drive[driveno].al_size); 1354 } 1355 } 1356 ac->ac_mailbox.mb_drive = driveno; 1357 if (sc->amr_state & AMR_STATE_REMAP_LD) 1358 ac->ac_mailbox.mb_drive |= 0x80; 1359 1360 /* we fill in the s/g related data when the command is mapped */ 1361 1362 1363 *acp = ac; 1364 return(error); 1365 } 1366 1367 /******************************************************************************** 1368 * Take a command, submit it to the controller and sleep until it completes 1369 * or fails. Interrupts must be enabled, returns nonzero on error. 1370 */ 1371 static int 1372 amr_wait_command(struct amr_command *ac) 1373 { 1374 int error = 0; 1375 struct amr_softc *sc = ac->ac_sc; 1376 1377 debug_called(1); 1378 1379 ac->ac_complete = NULL; 1380 ac->ac_flags |= AMR_CMD_SLEEP; 1381 if ((error = amr_start(ac)) != 0) { 1382 return(error); 1383 } 1384 1385 while ((ac->ac_flags & AMR_CMD_BUSY) && (error != EWOULDBLOCK)) { 1386 error = lksleep(ac,&sc->amr_list_lock, 0, "amrwcmd", 0); 1387 } 1388 1389 return(error); 1390 } 1391 1392 /******************************************************************************** 1393 * Take a command, submit it to the controller and busy-wait for it to return. 1394 * Returns nonzero on error. Can be safely called with interrupts enabled. 1395 */ 1396 static int 1397 amr_std_poll_command(struct amr_command *ac) 1398 { 1399 struct amr_softc *sc = ac->ac_sc; 1400 int error, count; 1401 1402 debug_called(2); 1403 1404 ac->ac_complete = NULL; 1405 if ((error = amr_start(ac)) != 0) 1406 return(error); 1407 1408 count = 0; 1409 do { 1410 /* 1411 * Poll for completion, although the interrupt handler may beat us to it. 1412 * Note that the timeout here is somewhat arbitrary. 1413 */ 1414 amr_done(sc); 1415 DELAY(1000); 1416 } while ((ac->ac_flags & AMR_CMD_BUSY) && (count++ < 1000)); 1417 if (!(ac->ac_flags & AMR_CMD_BUSY)) { 1418 error = 0; 1419 } else { 1420 /* XXX the slot is now marked permanently busy */ 1421 error = EIO; 1422 device_printf(sc->amr_dev, "polled command timeout\n"); 1423 } 1424 return(error); 1425 } 1426 1427 static void 1428 amr_setup_polled_dmamap(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1429 { 1430 struct amr_command *ac = arg; 1431 struct amr_softc *sc = ac->ac_sc; 1432 int mb_channel; 1433 1434 if (err) { 1435 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1436 ac->ac_status = AMR_STATUS_ABORTED; 1437 return; 1438 } 1439 1440 amr_setup_sg(arg, segs, nsegs, err); 1441 1442 /* for AMR_CMD_CONFIG Read/Write the s/g count goes elsewhere */ 1443 mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel; 1444 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG && 1445 ((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) || 1446 (mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG))) 1447 ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments; 1448 1449 ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments; 1450 ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr; 1451 if (AC_IS_SG64(ac)) { 1452 ac->ac_sg64_hi = 0; 1453 ac->ac_sg64_lo = ac->ac_sgbusaddr; 1454 } 1455 1456 sc->amr_poll_command1(sc, ac); 1457 } 1458 1459 /******************************************************************************** 1460 * Take a command, submit it to the controller and busy-wait for it to return. 1461 * Returns nonzero on error. Can be safely called with interrupts enabled. 1462 */ 1463 static int 1464 amr_quartz_poll_command(struct amr_command *ac) 1465 { 1466 struct amr_softc *sc = ac->ac_sc; 1467 int error; 1468 1469 debug_called(2); 1470 1471 error = 0; 1472 1473 if (AC_IS_SG64(ac)) { 1474 ac->ac_tag = sc->amr_buffer64_dmat; 1475 ac->ac_datamap = ac->ac_dma64map; 1476 } else { 1477 ac->ac_tag = sc->amr_buffer_dmat; 1478 ac->ac_datamap = ac->ac_dmamap; 1479 } 1480 1481 /* now we have a slot, we can map the command (unmapped in amr_complete) */ 1482 if (ac->ac_data != NULL && ac->ac_length != 0) { 1483 if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data, 1484 ac->ac_length, amr_setup_polled_dmamap, ac, BUS_DMA_NOWAIT) != 0) { 1485 error = 1; 1486 } 1487 } else { 1488 error = amr_quartz_poll_command1(sc, ac); 1489 } 1490 1491 return (error); 1492 } 1493 1494 static int 1495 amr_quartz_poll_command1(struct amr_softc *sc, struct amr_command *ac) 1496 { 1497 int count, error; 1498 1499 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 1500 if ((sc->amr_state & AMR_STATE_INTEN) == 0) { 1501 count=0; 1502 while (sc->amr_busyslots) { 1503 lksleep(sc, &sc->amr_hw_lock, PCATCH, "amrpoll", hz); 1504 if(count++>10) { 1505 break; 1506 } 1507 } 1508 1509 if(sc->amr_busyslots) { 1510 device_printf(sc->amr_dev, "adapter is busy\n"); 1511 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 1512 if (ac->ac_data != NULL) { 1513 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1514 } 1515 ac->ac_status=0; 1516 return(1); 1517 } 1518 } 1519 1520 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, AMR_MBOX_CMDSIZE); 1521 1522 /* clear the poll/ack fields in the mailbox */ 1523 sc->amr_mailbox->mb_ident = 0xFE; 1524 sc->amr_mailbox->mb_nstatus = 0xFF; 1525 sc->amr_mailbox->mb_status = 0xFF; 1526 sc->amr_mailbox->mb_poll = 0; 1527 sc->amr_mailbox->mb_ack = 0; 1528 sc->amr_mailbox->mb_busy = 1; 1529 1530 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 1531 1532 while(sc->amr_mailbox->mb_nstatus == 0xFF) 1533 DELAY(1); 1534 while(sc->amr_mailbox->mb_status == 0xFF) 1535 DELAY(1); 1536 ac->ac_status=sc->amr_mailbox->mb_status; 1537 error = (ac->ac_status !=AMR_STATUS_SUCCESS) ? 1:0; 1538 while(sc->amr_mailbox->mb_poll != 0x77) 1539 DELAY(1); 1540 sc->amr_mailbox->mb_poll = 0; 1541 sc->amr_mailbox->mb_ack = 0x77; 1542 1543 /* acknowledge that we have the commands */ 1544 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_ACK); 1545 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK) 1546 DELAY(1); 1547 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 1548 1549 /* unmap the command's data buffer */ 1550 if (ac->ac_flags & AMR_CMD_DATAIN) { 1551 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTREAD); 1552 } 1553 if (ac->ac_flags & AMR_CMD_DATAOUT) { 1554 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, BUS_DMASYNC_POSTWRITE); 1555 } 1556 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1557 1558 return(error); 1559 } 1560 1561 static __inline int 1562 amr_freeslot(struct amr_command *ac) 1563 { 1564 struct amr_softc *sc = ac->ac_sc; 1565 int slot; 1566 1567 debug_called(3); 1568 1569 slot = ac->ac_slot; 1570 if (sc->amr_busycmd[slot] == NULL) 1571 panic("amr: slot %d not busy?", slot); 1572 1573 sc->amr_busycmd[slot] = NULL; 1574 atomic_subtract_int(&sc->amr_busyslots, 1); 1575 1576 return (0); 1577 } 1578 1579 /******************************************************************************** 1580 * Map/unmap (ac)'s data in the controller's addressable space as required. 1581 * 1582 * These functions may be safely called multiple times on a given command. 1583 */ 1584 static void 1585 amr_setup_sg(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 1586 { 1587 struct amr_command *ac = (struct amr_command *)arg; 1588 struct amr_sgentry *sg; 1589 struct amr_sg64entry *sg64; 1590 int flags, i; 1591 1592 debug_called(3); 1593 1594 /* get base address of s/g table */ 1595 sg = ac->ac_sg.sg32; 1596 sg64 = ac->ac_sg.sg64; 1597 1598 if (AC_IS_SG64(ac)) { 1599 ac->ac_nsegments = nsegments; 1600 ac->ac_mb_physaddr = 0xffffffff; 1601 for (i = 0; i < nsegments; i++, sg64++) { 1602 sg64->sg_addr = segs[i].ds_addr; 1603 sg64->sg_count = segs[i].ds_len; 1604 } 1605 } else { 1606 /* decide whether we need to populate the s/g table */ 1607 if (nsegments < 2) { 1608 ac->ac_nsegments = 0; 1609 ac->ac_mb_physaddr = segs[0].ds_addr; 1610 } else { 1611 ac->ac_nsegments = nsegments; 1612 ac->ac_mb_physaddr = ac->ac_sgbusaddr; 1613 for (i = 0; i < nsegments; i++, sg++) { 1614 sg->sg_addr = segs[i].ds_addr; 1615 sg->sg_count = segs[i].ds_len; 1616 } 1617 } 1618 } 1619 1620 flags = 0; 1621 if (ac->ac_flags & AMR_CMD_DATAIN) 1622 flags |= BUS_DMASYNC_PREREAD; 1623 if (ac->ac_flags & AMR_CMD_DATAOUT) 1624 flags |= BUS_DMASYNC_PREWRITE; 1625 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flags); 1626 ac->ac_flags |= AMR_CMD_MAPPED; 1627 } 1628 1629 static void 1630 amr_setup_data(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1631 { 1632 struct amr_command *ac = arg; 1633 struct amr_softc *sc = ac->ac_sc; 1634 int mb_channel; 1635 1636 if (err) { 1637 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1638 amr_abort_load(ac); 1639 return; 1640 } 1641 1642 amr_setup_sg(arg, segs, nsegs, err); 1643 1644 /* for AMR_CMD_CONFIG Read/Write the s/g count goes elsewhere */ 1645 mb_channel = ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_channel; 1646 if (ac->ac_mailbox.mb_command == AMR_CMD_CONFIG && 1647 ((mb_channel == AMR_CONFIG_READ_NVRAM_CONFIG) || 1648 (mb_channel == AMR_CONFIG_WRITE_NVRAM_CONFIG))) 1649 ((struct amr_mailbox_ioctl *)&ac->ac_mailbox)->mb_param = ac->ac_nsegments; 1650 1651 ac->ac_mailbox.mb_nsgelem = ac->ac_nsegments; 1652 ac->ac_mailbox.mb_physaddr = ac->ac_mb_physaddr; 1653 if (AC_IS_SG64(ac)) { 1654 ac->ac_sg64_hi = 0; 1655 ac->ac_sg64_lo = ac->ac_sgbusaddr; 1656 } 1657 1658 if (sc->amr_submit_command(ac) == EBUSY) { 1659 amr_freeslot(ac); 1660 amr_requeue_ready(ac); 1661 } 1662 } 1663 1664 static void 1665 amr_setup_ccb(void *arg, bus_dma_segment_t *segs, int nsegs, int err) 1666 { 1667 struct amr_command *ac = arg; 1668 struct amr_softc *sc = ac->ac_sc; 1669 struct amr_passthrough *ap = &ac->ac_ccb->ccb_pthru; 1670 struct amr_ext_passthrough *aep = &ac->ac_ccb->ccb_epthru; 1671 1672 if (err) { 1673 device_printf(sc->amr_dev, "error %d in %s", err, __FUNCTION__); 1674 amr_abort_load(ac); 1675 return; 1676 } 1677 1678 /* Set up the mailbox portion of the command to point at the ccb */ 1679 ac->ac_mailbox.mb_nsgelem = 0; 1680 ac->ac_mailbox.mb_physaddr = ac->ac_ccb_busaddr; 1681 1682 amr_setup_sg(arg, segs, nsegs, err); 1683 1684 switch (ac->ac_mailbox.mb_command) { 1685 case AMR_CMD_EXTPASS: 1686 aep->ap_no_sg_elements = ac->ac_nsegments; 1687 aep->ap_data_transfer_address = ac->ac_mb_physaddr; 1688 break; 1689 case AMR_CMD_PASS: 1690 ap->ap_no_sg_elements = ac->ac_nsegments; 1691 ap->ap_data_transfer_address = ac->ac_mb_physaddr; 1692 break; 1693 default: 1694 panic("Unknown ccb command"); 1695 } 1696 1697 if (sc->amr_submit_command(ac) == EBUSY) { 1698 amr_freeslot(ac); 1699 amr_requeue_ready(ac); 1700 } 1701 } 1702 1703 static int 1704 amr_mapcmd(struct amr_command *ac) 1705 { 1706 bus_dmamap_callback_t *cb; 1707 struct amr_softc *sc = ac->ac_sc; 1708 1709 debug_called(3); 1710 1711 if (AC_IS_SG64(ac)) { 1712 ac->ac_tag = sc->amr_buffer64_dmat; 1713 ac->ac_datamap = ac->ac_dma64map; 1714 } else { 1715 ac->ac_tag = sc->amr_buffer_dmat; 1716 ac->ac_datamap = ac->ac_dmamap; 1717 } 1718 1719 if (ac->ac_flags & AMR_CMD_CCB) 1720 cb = amr_setup_ccb; 1721 else 1722 cb = amr_setup_data; 1723 1724 /* if the command involves data at all, and hasn't been mapped */ 1725 if ((ac->ac_flags & AMR_CMD_MAPPED) == 0 && (ac->ac_data != NULL)) { 1726 /* map the data buffers into bus space and build the s/g list */ 1727 if (bus_dmamap_load(ac->ac_tag, ac->ac_datamap, ac->ac_data, 1728 ac->ac_length, cb, ac, 0) == EINPROGRESS) { 1729 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1730 } 1731 } else { 1732 if (sc->amr_submit_command(ac) == EBUSY) { 1733 amr_freeslot(ac); 1734 amr_requeue_ready(ac); 1735 } 1736 } 1737 1738 return (0); 1739 } 1740 1741 static void 1742 amr_unmapcmd(struct amr_command *ac) 1743 { 1744 int flag; 1745 1746 debug_called(3); 1747 1748 /* if the command involved data at all and was mapped */ 1749 if (ac->ac_flags & AMR_CMD_MAPPED) { 1750 1751 if (ac->ac_data != NULL) { 1752 1753 flag = 0; 1754 if (ac->ac_flags & AMR_CMD_DATAIN) 1755 flag |= BUS_DMASYNC_POSTREAD; 1756 if (ac->ac_flags & AMR_CMD_DATAOUT) 1757 flag |= BUS_DMASYNC_POSTWRITE; 1758 1759 bus_dmamap_sync(ac->ac_tag, ac->ac_datamap, flag); 1760 bus_dmamap_unload(ac->ac_tag, ac->ac_datamap); 1761 } 1762 1763 ac->ac_flags &= ~AMR_CMD_MAPPED; 1764 } 1765 } 1766 1767 static void 1768 amr_abort_load(struct amr_command *ac) 1769 { 1770 ac_qhead_t head; 1771 struct amr_softc *sc = ac->ac_sc; 1772 1773 KKASSERT(lockstatus(&sc->amr_list_lock, curthread) != 0); 1774 1775 ac->ac_status = AMR_STATUS_ABORTED; 1776 amr_init_qhead(&head); 1777 amr_enqueue_completed(ac, &head); 1778 1779 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1780 amr_complete(sc, &head); 1781 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1782 } 1783 1784 /******************************************************************************** 1785 * Take a command and give it to the controller, returns 0 if successful, or 1786 * EBUSY if the command should be retried later. 1787 */ 1788 static int 1789 amr_start(struct amr_command *ac) 1790 { 1791 struct amr_softc *sc; 1792 int error = 0; 1793 int slot; 1794 1795 debug_called(3); 1796 1797 /* mark command as busy so that polling consumer can tell */ 1798 sc = ac->ac_sc; 1799 ac->ac_flags |= AMR_CMD_BUSY; 1800 1801 /* get a command slot (freed in amr_done) */ 1802 slot = ac->ac_slot; 1803 if (sc->amr_busycmd[slot] != NULL) 1804 panic("amr: slot %d busy?", slot); 1805 sc->amr_busycmd[slot] = ac; 1806 atomic_add_int(&sc->amr_busyslots, 1); 1807 1808 /* Now we have a slot, we can map the command (unmapped in amr_complete). */ 1809 if ((error = amr_mapcmd(ac)) == ENOMEM) { 1810 /* 1811 * Memroy resources are short, so free the slot and let this be tried 1812 * later. 1813 */ 1814 amr_freeslot(ac); 1815 } 1816 1817 return (error); 1818 } 1819 1820 /******************************************************************************** 1821 * Extract one or more completed commands from the controller (sc) 1822 * 1823 * Returns nonzero if any commands on the work queue were marked as completed. 1824 */ 1825 1826 int 1827 amr_done(struct amr_softc *sc) 1828 { 1829 ac_qhead_t head; 1830 struct amr_command *ac; 1831 struct amr_mailbox mbox; 1832 int i, idx, result; 1833 1834 debug_called(3); 1835 1836 /* See if there's anything for us to do */ 1837 result = 0; 1838 amr_init_qhead(&head); 1839 1840 /* loop collecting completed commands */ 1841 for (;;) { 1842 /* poll for a completed command's identifier and status */ 1843 if (sc->amr_get_work(sc, &mbox)) { 1844 result = 1; 1845 1846 /* iterate over completed commands in this result */ 1847 for (i = 0; i < mbox.mb_nstatus; i++) { 1848 /* get pointer to busy command */ 1849 idx = mbox.mb_completed[i] - 1; 1850 ac = sc->amr_busycmd[idx]; 1851 1852 /* really a busy command? */ 1853 if (ac != NULL) { 1854 1855 /* pull the command from the busy index */ 1856 amr_freeslot(ac); 1857 1858 /* save status for later use */ 1859 ac->ac_status = mbox.mb_status; 1860 amr_enqueue_completed(ac, &head); 1861 debug(3, "completed command with status %x", mbox.mb_status); 1862 } else { 1863 device_printf(sc->amr_dev, "bad slot %d completed\n", idx); 1864 } 1865 } 1866 } else 1867 break; /* no work */ 1868 } 1869 1870 /* handle completion and timeouts */ 1871 amr_complete(sc, &head); 1872 1873 return(result); 1874 } 1875 1876 /******************************************************************************** 1877 * Do completion processing on done commands on (sc) 1878 */ 1879 1880 static void 1881 amr_complete(void *context, ac_qhead_t *head) 1882 { 1883 struct amr_softc *sc = (struct amr_softc *)context; 1884 struct amr_command *ac; 1885 1886 debug_called(3); 1887 1888 /* pull completed commands off the queue */ 1889 for (;;) { 1890 ac = amr_dequeue_completed(sc, head); 1891 if (ac == NULL) 1892 break; 1893 1894 /* unmap the command's data buffer */ 1895 amr_unmapcmd(ac); 1896 1897 /* 1898 * Is there a completion handler? 1899 */ 1900 if (ac->ac_complete != NULL) { 1901 /* unbusy the command */ 1902 ac->ac_flags &= ~AMR_CMD_BUSY; 1903 ac->ac_complete(ac); 1904 1905 /* 1906 * Is someone sleeping on this one? 1907 */ 1908 } else { 1909 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1910 ac->ac_flags &= ~AMR_CMD_BUSY; 1911 if (ac->ac_flags & AMR_CMD_SLEEP) { 1912 /* unbusy the command */ 1913 wakeup(ac); 1914 } 1915 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1916 } 1917 1918 if(!sc->amr_busyslots) { 1919 wakeup(sc); 1920 } 1921 } 1922 1923 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 1924 sc->amr_state &= ~AMR_STATE_QUEUE_FRZN; 1925 amr_startio(sc); 1926 lockmgr(&sc->amr_list_lock, LK_RELEASE); 1927 } 1928 1929 /******************************************************************************** 1930 ******************************************************************************** 1931 Command Buffer Management 1932 ******************************************************************************** 1933 ********************************************************************************/ 1934 1935 /******************************************************************************** 1936 * Get a new command buffer. 1937 * 1938 * This may return NULL in low-memory cases. 1939 * 1940 * If possible, we recycle a command buffer that's been used before. 1941 */ 1942 struct amr_command * 1943 amr_alloccmd(struct amr_softc *sc) 1944 { 1945 struct amr_command *ac; 1946 1947 debug_called(3); 1948 1949 ac = amr_dequeue_free(sc); 1950 if (ac == NULL) { 1951 sc->amr_state |= AMR_STATE_QUEUE_FRZN; 1952 return(NULL); 1953 } 1954 1955 /* clear out significant fields */ 1956 ac->ac_status = 0; 1957 bzero(&ac->ac_mailbox, sizeof(struct amr_mailbox)); 1958 ac->ac_flags = 0; 1959 ac->ac_bio = NULL; 1960 ac->ac_data = NULL; 1961 ac->ac_complete = NULL; 1962 ac->ac_retries = 0; 1963 ac->ac_tag = NULL; 1964 ac->ac_datamap = NULL; 1965 return(ac); 1966 } 1967 1968 /******************************************************************************** 1969 * Release a command buffer for recycling. 1970 */ 1971 void 1972 amr_releasecmd(struct amr_command *ac) 1973 { 1974 debug_called(3); 1975 1976 amr_enqueue_free(ac); 1977 } 1978 1979 /******************************************************************************** 1980 * Allocate a new command cluster and initialise it. 1981 */ 1982 static void 1983 amr_alloccmd_cluster(struct amr_softc *sc) 1984 { 1985 struct amr_command_cluster *acc; 1986 struct amr_command *ac; 1987 int i, nextslot; 1988 1989 /* 1990 * If we haven't found the real limit yet, let us have a couple of 1991 * commands in order to be able to probe. 1992 */ 1993 if (sc->amr_maxio == 0) 1994 sc->amr_maxio = 2; 1995 1996 if (sc->amr_nextslot > sc->amr_maxio) 1997 return; 1998 acc = kmalloc(AMR_CMD_CLUSTERSIZE, M_AMR, M_NOWAIT | M_ZERO); 1999 if (acc != NULL) { 2000 nextslot = sc->amr_nextslot; 2001 lockmgr(&sc->amr_list_lock, LK_EXCLUSIVE); 2002 TAILQ_INSERT_TAIL(&sc->amr_cmd_clusters, acc, acc_link); 2003 lockmgr(&sc->amr_list_lock, LK_RELEASE); 2004 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) { 2005 ac = &acc->acc_command[i]; 2006 ac->ac_sc = sc; 2007 ac->ac_slot = nextslot; 2008 2009 /* 2010 * The SG table for each slot is a fixed size and is assumed to 2011 * to hold 64-bit s/g objects when the driver is configured to do 2012 * 64-bit DMA. 32-bit DMA commands still use the same table, but 2013 * cast down to 32-bit objects. 2014 */ 2015 if (AMR_IS_SG64(sc)) { 2016 ac->ac_sgbusaddr = sc->amr_sgbusaddr + 2017 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sg64entry)); 2018 ac->ac_sg.sg64 = sc->amr_sg64table + (ac->ac_slot * AMR_NSEG); 2019 } else { 2020 ac->ac_sgbusaddr = sc->amr_sgbusaddr + 2021 (ac->ac_slot * AMR_NSEG * sizeof(struct amr_sgentry)); 2022 ac->ac_sg.sg32 = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 2023 } 2024 2025 ac->ac_ccb = sc->amr_ccb + ac->ac_slot; 2026 ac->ac_ccb_busaddr = sc->amr_ccb_busaddr + 2027 (ac->ac_slot * sizeof(union amr_ccb)); 2028 2029 if (bus_dmamap_create(sc->amr_buffer_dmat, 0, &ac->ac_dmamap)) 2030 break; 2031 if (AMR_IS_SG64(sc) && 2032 (bus_dmamap_create(sc->amr_buffer64_dmat, 0,&ac->ac_dma64map))) 2033 break; 2034 amr_releasecmd(ac); 2035 if (++nextslot > sc->amr_maxio) 2036 break; 2037 } 2038 sc->amr_nextslot = nextslot; 2039 } 2040 } 2041 2042 /******************************************************************************** 2043 * Free a command cluster 2044 */ 2045 static void 2046 amr_freecmd_cluster(struct amr_command_cluster *acc) 2047 { 2048 struct amr_softc *sc = acc->acc_command[0].ac_sc; 2049 int i; 2050 2051 for (i = 0; i < AMR_CMD_CLUSTERCOUNT; i++) { 2052 if (acc->acc_command[i].ac_sc == NULL) 2053 break; 2054 bus_dmamap_destroy(sc->amr_buffer_dmat, acc->acc_command[i].ac_dmamap); 2055 if (AMR_IS_SG64(sc)) 2056 bus_dmamap_destroy(sc->amr_buffer64_dmat, acc->acc_command[i].ac_dma64map); 2057 } 2058 kfree(acc, M_AMR); 2059 } 2060 2061 /******************************************************************************** 2062 ******************************************************************************** 2063 Interface-specific Shims 2064 ******************************************************************************** 2065 ********************************************************************************/ 2066 2067 /******************************************************************************** 2068 * Tell the controller that the mailbox contains a valid command 2069 */ 2070 static int 2071 amr_quartz_submit_command(struct amr_command *ac) 2072 { 2073 struct amr_softc *sc = ac->ac_sc; 2074 static struct timeval lastfail; 2075 static int curfail; 2076 int i = 0; 2077 2078 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 2079 while (sc->amr_mailbox->mb_busy && (i++ < 10)) { 2080 DELAY(1); 2081 /* This is a no-op read that flushes pending mailbox updates */ 2082 AMR_QGET_ODB(sc); 2083 } 2084 if (sc->amr_mailbox->mb_busy) { 2085 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2086 if (ac->ac_retries++ > 1000) { 2087 if (ppsratecheck(&lastfail, &curfail, 1)) 2088 device_printf(sc->amr_dev, "Too many retries on command %p. " 2089 "Controller is likely dead\n", ac); 2090 ac->ac_retries = 0; 2091 } 2092 return (EBUSY); 2093 } 2094 2095 /* 2096 * Save the slot number so that we can locate this command when complete. 2097 * Note that ident = 0 seems to be special, so we don't use it. 2098 */ 2099 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; /* will be coppied into mbox */ 2100 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14); 2101 sc->amr_mailbox->mb_busy = 1; 2102 sc->amr_mailbox->mb_poll = 0; 2103 sc->amr_mailbox->mb_ack = 0; 2104 sc->amr_mailbox64->sg64_hi = ac->ac_sg64_hi; 2105 sc->amr_mailbox64->sg64_lo = ac->ac_sg64_lo; 2106 2107 AMR_QPUT_IDB(sc, sc->amr_mailboxphys | AMR_QIDB_SUBMIT); 2108 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2109 return(0); 2110 } 2111 2112 static int 2113 amr_std_submit_command(struct amr_command *ac) 2114 { 2115 struct amr_softc *sc = ac->ac_sc; 2116 static struct timeval lastfail; 2117 static int curfail; 2118 2119 lockmgr(&sc->amr_hw_lock, LK_EXCLUSIVE); 2120 if (AMR_SGET_MBSTAT(sc) & AMR_SMBOX_BUSYFLAG) { 2121 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2122 if (ac->ac_retries++ > 1000) { 2123 if (ppsratecheck(&lastfail, &curfail, 1)) 2124 device_printf(sc->amr_dev, "Too many retries on command %p. " 2125 "Controller is likely dead\n", ac); 2126 ac->ac_retries = 0; 2127 } 2128 return (EBUSY); 2129 } 2130 2131 /* 2132 * Save the slot number so that we can locate this command when complete. 2133 * Note that ident = 0 seems to be special, so we don't use it. 2134 */ 2135 ac->ac_mailbox.mb_ident = ac->ac_slot + 1; /* will be coppied into mbox */ 2136 bcopy(&ac->ac_mailbox, (void *)(uintptr_t)(volatile void *)sc->amr_mailbox, 14); 2137 sc->amr_mailbox->mb_busy = 1; 2138 sc->amr_mailbox->mb_poll = 0; 2139 sc->amr_mailbox->mb_ack = 0; 2140 2141 AMR_SPOST_COMMAND(sc); 2142 lockmgr(&sc->amr_hw_lock, LK_RELEASE); 2143 return(0); 2144 } 2145 2146 /******************************************************************************** 2147 * Claim any work that the controller has completed; acknowledge completion, 2148 * save details of the completion in (mbsave) 2149 */ 2150 static int 2151 amr_quartz_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 2152 { 2153 int worked, i; 2154 u_int32_t outd; 2155 u_int8_t nstatus; 2156 u_int8_t completed[46]; 2157 2158 debug_called(3); 2159 2160 worked = 0; 2161 2162 /* work waiting for us? */ 2163 if ((outd = AMR_QGET_ODB(sc)) == AMR_QODB_READY) { 2164 2165 /* acknowledge interrupt */ 2166 AMR_QPUT_ODB(sc, AMR_QODB_READY); 2167 2168 while ((nstatus = sc->amr_mailbox->mb_nstatus) == 0xff) 2169 DELAY(1); 2170 sc->amr_mailbox->mb_nstatus = 0xff; 2171 2172 /* wait until fw wrote out all completions */ 2173 for (i = 0; i < nstatus; i++) { 2174 while ((completed[i] = sc->amr_mailbox->mb_completed[i]) == 0xff) 2175 DELAY(1); 2176 sc->amr_mailbox->mb_completed[i] = 0xff; 2177 } 2178 2179 /* Save information for later processing */ 2180 mbsave->mb_nstatus = nstatus; 2181 mbsave->mb_status = sc->amr_mailbox->mb_status; 2182 sc->amr_mailbox->mb_status = 0xff; 2183 2184 for (i = 0; i < nstatus; i++) 2185 mbsave->mb_completed[i] = completed[i]; 2186 2187 /* acknowledge that we have the commands */ 2188 AMR_QPUT_IDB(sc, AMR_QIDB_ACK); 2189 2190 #if 0 2191 #ifndef AMR_QUARTZ_GOFASTER 2192 /* 2193 * This waits for the controller to notice that we've taken the 2194 * command from it. It's very inefficient, and we shouldn't do it, 2195 * but if we remove this code, we stop completing commands under 2196 * load. 2197 * 2198 * Peter J says we shouldn't do this. The documentation says we 2199 * should. Who is right? 2200 */ 2201 while(AMR_QGET_IDB(sc) & AMR_QIDB_ACK) 2202 ; /* XXX aiee! what if it dies? */ 2203 #endif 2204 #endif 2205 2206 worked = 1; /* got some work */ 2207 } 2208 2209 return(worked); 2210 } 2211 2212 static int 2213 amr_std_get_work(struct amr_softc *sc, struct amr_mailbox *mbsave) 2214 { 2215 int worked; 2216 u_int8_t istat; 2217 2218 debug_called(3); 2219 2220 worked = 0; 2221 2222 /* check for valid interrupt status */ 2223 istat = AMR_SGET_ISTAT(sc); 2224 if ((istat & AMR_SINTR_VALID) != 0) { 2225 AMR_SPUT_ISTAT(sc, istat); /* ack interrupt status */ 2226 2227 /* save mailbox, which contains a list of completed commands */ 2228 bcopy((void *)(uintptr_t)(volatile void *)sc->amr_mailbox, mbsave, sizeof(*mbsave)); 2229 2230 AMR_SACK_INTERRUPT(sc); /* acknowledge we have the mailbox */ 2231 worked = 1; 2232 } 2233 2234 return(worked); 2235 } 2236 2237 /******************************************************************************** 2238 * Notify the controller of the mailbox location. 2239 */ 2240 static void 2241 amr_std_attach_mailbox(struct amr_softc *sc) 2242 { 2243 2244 /* program the mailbox physical address */ 2245 AMR_SBYTE_SET(sc, AMR_SMBOX_0, sc->amr_mailboxphys & 0xff); 2246 AMR_SBYTE_SET(sc, AMR_SMBOX_1, (sc->amr_mailboxphys >> 8) & 0xff); 2247 AMR_SBYTE_SET(sc, AMR_SMBOX_2, (sc->amr_mailboxphys >> 16) & 0xff); 2248 AMR_SBYTE_SET(sc, AMR_SMBOX_3, (sc->amr_mailboxphys >> 24) & 0xff); 2249 AMR_SBYTE_SET(sc, AMR_SMBOX_ENABLE, AMR_SMBOX_ADDR); 2250 2251 /* clear any outstanding interrupt and enable interrupts proper */ 2252 AMR_SACK_INTERRUPT(sc); 2253 AMR_SENABLE_INTR(sc); 2254 } 2255 2256 #ifdef AMR_BOARD_INIT 2257 /******************************************************************************** 2258 * Initialise the controller 2259 */ 2260 static int 2261 amr_quartz_init(struct amr_softc *sc) 2262 { 2263 int status, ostatus; 2264 2265 device_printf(sc->amr_dev, "initial init status %x\n", AMR_QGET_INITSTATUS(sc)); 2266 2267 AMR_QRESET(sc); 2268 2269 ostatus = 0xff; 2270 while ((status = AMR_QGET_INITSTATUS(sc)) != AMR_QINIT_DONE) { 2271 if (status != ostatus) { 2272 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_qinit, status)); 2273 ostatus = status; 2274 } 2275 switch (status) { 2276 case AMR_QINIT_NOMEM: 2277 return(ENOMEM); 2278 2279 case AMR_QINIT_SCAN: 2280 /* XXX we could print channel/target here */ 2281 break; 2282 } 2283 } 2284 return(0); 2285 } 2286 2287 static int 2288 amr_std_init(struct amr_softc *sc) 2289 { 2290 int status, ostatus; 2291 2292 device_printf(sc->amr_dev, "initial init status %x\n", AMR_SGET_INITSTATUS(sc)); 2293 2294 AMR_SRESET(sc); 2295 2296 ostatus = 0xff; 2297 while ((status = AMR_SGET_INITSTATUS(sc)) != AMR_SINIT_DONE) { 2298 if (status != ostatus) { 2299 device_printf(sc->amr_dev, "(%x) %s\n", status, amr_describe_code(amr_table_sinit, status)); 2300 ostatus = status; 2301 } 2302 switch (status) { 2303 case AMR_SINIT_NOMEM: 2304 return(ENOMEM); 2305 2306 case AMR_SINIT_INPROG: 2307 /* XXX we could print channel/target here? */ 2308 break; 2309 } 2310 } 2311 return(0); 2312 } 2313 #endif 2314 2315 /******************************************************************************** 2316 ******************************************************************************** 2317 Debugging 2318 ******************************************************************************** 2319 ********************************************************************************/ 2320 2321 /******************************************************************************** 2322 * Identify the controller and print some information about it. 2323 */ 2324 static void 2325 amr_describe_controller(struct amr_softc *sc) 2326 { 2327 struct amr_prodinfo *ap; 2328 struct amr_enquiry *ae; 2329 char *prod; 2330 int status; 2331 2332 /* 2333 * Try to get 40LD product info, which tells us what the card is labelled as. 2334 */ 2335 if ((ap = amr_enquiry(sc, 2048, AMR_CMD_CONFIG, AMR_CONFIG_PRODUCT_INFO, 0, &status)) != NULL) { 2336 device_printf(sc->amr_dev, "<LSILogic %.80s> Firmware %.16s, BIOS %.16s, %dMB RAM\n", 2337 ap->ap_product, ap->ap_firmware, ap->ap_bios, 2338 ap->ap_memsize); 2339 2340 kfree(ap, M_AMR); 2341 return; 2342 } 2343 2344 /* 2345 * Try 8LD extended ENQUIRY to get controller signature, and use lookup table. 2346 */ 2347 if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_EXT_ENQUIRY2, 0, 0, &status)) != NULL) { 2348 prod = amr_describe_code(amr_table_adaptertype, ae->ae_signature); 2349 2350 } else if ((ae = (struct amr_enquiry *)amr_enquiry(sc, 2048, AMR_CMD_ENQUIRY, 0, 0, &status)) != NULL) { 2351 2352 /* 2353 * Try to work it out based on the PCI signatures. 2354 */ 2355 switch (pci_get_device(sc->amr_dev)) { 2356 case 0x9010: 2357 prod = "Series 428"; 2358 break; 2359 case 0x9060: 2360 prod = "Series 434"; 2361 break; 2362 default: 2363 prod = "unknown controller"; 2364 break; 2365 } 2366 } else { 2367 device_printf(sc->amr_dev, "<unsupported controller>\n"); 2368 return; 2369 } 2370 2371 /* 2372 * HP NetRaid controllers have a special encoding of the firmware and 2373 * BIOS versions. The AMI version seems to have it as strings whereas 2374 * the HP version does it with a leading uppercase character and two 2375 * binary numbers. 2376 */ 2377 2378 if(ae->ae_adapter.aa_firmware[2] >= 'A' && 2379 ae->ae_adapter.aa_firmware[2] <= 'Z' && 2380 ae->ae_adapter.aa_firmware[1] < ' ' && 2381 ae->ae_adapter.aa_firmware[0] < ' ' && 2382 ae->ae_adapter.aa_bios[2] >= 'A' && 2383 ae->ae_adapter.aa_bios[2] <= 'Z' && 2384 ae->ae_adapter.aa_bios[1] < ' ' && 2385 ae->ae_adapter.aa_bios[0] < ' ') { 2386 2387 /* this looks like we have an HP NetRaid version of the MegaRaid */ 2388 2389 if(ae->ae_signature == AMR_SIG_438) { 2390 /* the AMI 438 is a NetRaid 3si in HP-land */ 2391 prod = "HP NetRaid 3si"; 2392 } 2393 2394 device_printf(sc->amr_dev, "<%s> Firmware %c.%02d.%02d, BIOS %c.%02d.%02d, %dMB RAM\n", 2395 prod, ae->ae_adapter.aa_firmware[2], 2396 ae->ae_adapter.aa_firmware[1], 2397 ae->ae_adapter.aa_firmware[0], 2398 ae->ae_adapter.aa_bios[2], 2399 ae->ae_adapter.aa_bios[1], 2400 ae->ae_adapter.aa_bios[0], 2401 ae->ae_adapter.aa_memorysize); 2402 } else { 2403 device_printf(sc->amr_dev, "<%s> Firmware %.4s, BIOS %.4s, %dMB RAM\n", 2404 prod, ae->ae_adapter.aa_firmware, ae->ae_adapter.aa_bios, 2405 ae->ae_adapter.aa_memorysize); 2406 } 2407 kfree(ae, M_AMR); 2408 } 2409 2410 int 2411 amr_dump_blocks(struct amr_softc *sc, int unit, u_int32_t lba, void *data, int blks) 2412 { 2413 struct amr_command *ac; 2414 int error = EIO; 2415 2416 debug_called(1); 2417 2418 sc->amr_state |= AMR_STATE_INTEN; 2419 2420 /* get ourselves a command buffer */ 2421 if ((ac = amr_alloccmd(sc)) == NULL) 2422 goto out; 2423 /* set command flags */ 2424 ac->ac_flags |= AMR_CMD_PRIORITY | AMR_CMD_DATAOUT; 2425 2426 /* point the command at our data */ 2427 ac->ac_data = data; 2428 ac->ac_length = blks * AMR_BLKSIZE; 2429 2430 /* build the command proper */ 2431 ac->ac_mailbox.mb_command = AMR_CMD_LWRITE; 2432 ac->ac_mailbox.mb_blkcount = blks; 2433 ac->ac_mailbox.mb_lba = lba; 2434 ac->ac_mailbox.mb_drive = unit; 2435 2436 /* can't assume that interrupts are going to work here, so play it safe */ 2437 if (sc->amr_poll_command(ac)) 2438 goto out; 2439 error = ac->ac_status; 2440 2441 out: 2442 if (ac != NULL) 2443 amr_releasecmd(ac); 2444 2445 sc->amr_state &= ~AMR_STATE_INTEN; 2446 return (error); 2447 } 2448 2449 2450 2451 #ifdef AMR_DEBUG 2452 /******************************************************************************** 2453 * Print the command (ac) in human-readable format 2454 */ 2455 #if 0 2456 static void 2457 amr_printcommand(struct amr_command *ac) 2458 { 2459 struct amr_softc *sc = ac->ac_sc; 2460 struct amr_sgentry *sg; 2461 int i; 2462 2463 device_printf(sc->amr_dev, "cmd %x ident %d drive %d\n", 2464 ac->ac_mailbox.mb_command, ac->ac_mailbox.mb_ident, ac->ac_mailbox.mb_drive); 2465 device_printf(sc->amr_dev, "blkcount %d lba %d\n", 2466 ac->ac_mailbox.mb_blkcount, ac->ac_mailbox.mb_lba); 2467 device_printf(sc->amr_dev, "virtaddr %p length %lu\n", ac->ac_data, (unsigned long)ac->ac_length); 2468 device_printf(sc->amr_dev, "sg physaddr %08x nsg %d\n", 2469 ac->ac_mailbox.mb_physaddr, ac->ac_mailbox.mb_nsgelem); 2470 device_printf(sc->amr_dev, "ccb %p bio %p\n", ac->ac_ccb_data, ac->ac_bio); 2471 2472 /* get base address of s/g table */ 2473 sg = sc->amr_sgtable + (ac->ac_slot * AMR_NSEG); 2474 for (i = 0; i < ac->ac_mailbox.mb_nsgelem; i++, sg++) 2475 device_printf(sc->amr_dev, " %x/%d\n", sg->sg_addr, sg->sg_count); 2476 } 2477 #endif 2478 #endif 2479