1 /* 2 * Copyright (c) 2007 Rui Paulo <rpaulo@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 16 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 17 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 18 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 22 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 23 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 24 * POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/coretemp/coretemp.c,v 1.2 2007/08/23 10:53:03 des Exp $ 27 */ 28 29 /* 30 * Device driver for Intel's On Die thermal sensor via MSR. 31 * First introduced in Intel's Core line of processors. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/bus.h> 36 #include <sys/systm.h> 37 #include <sys/types.h> 38 #include <sys/module.h> 39 #include <sys/conf.h> 40 #include <sys/kernel.h> 41 #include <sys/sensors.h> 42 #include <sys/proc.h> /* for curthread */ 43 #include <sys/sched.h> 44 45 #include <machine/specialreg.h> 46 #include <machine/cpufunc.h> 47 #include <machine/cputypes.h> 48 #include <machine/md_var.h> 49 50 struct coretemp_softc { 51 struct ksensordev sc_sensordev; 52 struct ksensor sc_sensor; 53 device_t sc_dev; 54 int sc_tjmax; 55 }; 56 57 /* 58 * Device methods. 59 */ 60 static void coretemp_identify(driver_t *driver, device_t parent); 61 static int coretemp_probe(device_t dev); 62 static int coretemp_attach(device_t dev); 63 static int coretemp_detach(device_t dev); 64 65 static int coretemp_get_temp(device_t dev); 66 static void coretemp_refresh(void *arg); 67 68 static device_method_t coretemp_methods[] = { 69 /* Device interface */ 70 DEVMETHOD(device_identify, coretemp_identify), 71 DEVMETHOD(device_probe, coretemp_probe), 72 DEVMETHOD(device_attach, coretemp_attach), 73 DEVMETHOD(device_detach, coretemp_detach), 74 75 {0, 0} 76 }; 77 78 static driver_t coretemp_driver = { 79 "coretemp", 80 coretemp_methods, 81 sizeof(struct coretemp_softc), 82 }; 83 84 static devclass_t coretemp_devclass; 85 DRIVER_MODULE(coretemp, cpu, coretemp_driver, coretemp_devclass, NULL, NULL); 86 87 static void 88 coretemp_identify(driver_t *driver, device_t parent) 89 { 90 device_t child; 91 u_int regs[4]; 92 93 /* Make sure we're not being doubly invoked. */ 94 if (device_find_child(parent, "coretemp", -1) != NULL) 95 return; 96 97 /* Check that CPUID is supported and the vendor is Intel.*/ 98 if (cpu_high == 0 || cpu_vendor_id != CPU_VENDOR_INTEL) 99 return; 100 /* 101 * CPUID 0x06 returns 1 if the processor has on-die thermal 102 * sensors. EBX[0:3] contains the number of sensors. 103 */ 104 do_cpuid(0x06, regs); 105 if ((regs[0] & 0x1) != 1) 106 return; 107 108 /* 109 * We add a child for each CPU since settings must be performed 110 * on each CPU in the SMP case. 111 */ 112 child = device_add_child(parent, "coretemp", -1); 113 if (child == NULL) 114 device_printf(parent, "add coretemp child failed\n"); 115 } 116 117 static int 118 coretemp_probe(device_t dev) 119 { 120 if (resource_disabled("coretemp", 0)) 121 return (ENXIO); 122 123 device_set_desc(dev, "CPU On-Die Thermal Sensors"); 124 125 return (BUS_PROBE_GENERIC); 126 } 127 128 static int 129 coretemp_attach(device_t dev) 130 { 131 struct coretemp_softc *sc = device_get_softc(dev); 132 device_t pdev; 133 uint64_t msr; 134 int cpu_model; 135 int cpu_mask; 136 137 sc->sc_dev = dev; 138 pdev = device_get_parent(dev); 139 cpu_model = (cpu_id >> 4) & 15; 140 /* extended model */ 141 cpu_model += ((cpu_id >> 16) & 0xf) << 4; 142 cpu_mask = cpu_id & 15; 143 144 /* 145 * Check for errata AE18. 146 * "Processor Digital Thermal Sensor (DTS) Readout stops 147 * updating upon returning from C3/C4 state." 148 * 149 * Adapted from the Linux coretemp driver. 150 */ 151 if (cpu_model == 0xe && cpu_mask < 0xc) { 152 msr = rdmsr(MSR_BIOS_SIGN); 153 msr = msr >> 32; 154 if (msr < 0x39) { 155 device_printf(dev, "not supported (Intel errata " 156 "AE18), try updating your BIOS\n"); 157 return (ENXIO); 158 } 159 } 160 /* 161 * On some Core 2 CPUs, there's an undocumented MSR that 162 * can tell us if Tj(max) is 100 or 85. 163 * 164 * The if-clause for CPUs having the MSR_IA32_EXT_CONFIG was adapted 165 * from the Linux coretemp driver. 166 */ 167 sc->sc_tjmax = 100; 168 if ((cpu_model == 0xf && cpu_mask >= 2) || cpu_model == 0xe) { 169 msr = rdmsr(MSR_IA32_EXT_CONFIG); 170 if (msr & (1 << 30)) 171 sc->sc_tjmax = 85; 172 } 173 174 /* 175 * Add hw.sensors.cpuN.temp0 MIB. 176 */ 177 strlcpy(sc->sc_sensordev.xname, device_get_nameunit(pdev), 178 sizeof(sc->sc_sensordev.xname)); 179 sc->sc_sensor.type = SENSOR_TEMP; 180 sensor_attach(&sc->sc_sensordev, &sc->sc_sensor); 181 if (sensor_task_register(sc, coretemp_refresh, 2)) { 182 device_printf(dev, "unable to register update task\n"); 183 return (ENXIO); 184 } 185 sensordev_install(&sc->sc_sensordev); 186 187 return (0); 188 } 189 190 static int 191 coretemp_detach(device_t dev) 192 { 193 struct coretemp_softc *sc = device_get_softc(dev); 194 195 sensordev_deinstall(&sc->sc_sensordev); 196 sensor_task_unregister(sc); 197 198 return (0); 199 } 200 201 202 static int 203 coretemp_get_temp(device_t dev) 204 { 205 uint64_t msr; 206 int temp, cpu, origcpu; 207 struct coretemp_softc *sc = device_get_softc(dev); 208 char stemp[16]; 209 210 cpu = device_get_unit(device_get_parent(dev)); 211 212 /* 213 * Bind to specific CPU to read the correct temperature. 214 * If not all CPUs are initialised, then only read from 215 * cpu0, returning -1 on all other CPUs. 216 */ 217 if (ncpus > 1) { 218 origcpu = mycpuid; 219 lwkt_migratecpu(cpu); 220 221 msr = rdmsr(MSR_THERM_STATUS); 222 223 lwkt_migratecpu(origcpu); 224 } else if (cpu != 0) 225 return (-1); 226 else 227 msr = rdmsr(MSR_THERM_STATUS); 228 229 /* 230 * Check for Thermal Status and Thermal Status Log. 231 */ 232 if ((msr & 0x3) == 0x3) 233 device_printf(dev, "PROCHOT asserted\n"); 234 235 /* 236 * Bit 31 contains "Reading valid" 237 */ 238 if (((msr >> 31) & 0x1) == 1) { 239 /* 240 * Starting on bit 16 and ending on bit 22. 241 */ 242 temp = sc->sc_tjmax - ((msr >> 16) & 0x7f); 243 } else 244 temp = -1; 245 246 /* 247 * Check for Critical Temperature Status and Critical 248 * Temperature Log. 249 * It doesn't really matter if the current temperature is 250 * invalid because the "Critical Temperature Log" bit will 251 * tell us if the Critical Temperature has been reached in 252 * past. It's not directly related to the current temperature. 253 * 254 * If we reach a critical level, allow devctl(4) to catch this 255 * and shutdown the system. 256 */ 257 if (((msr >> 4) & 0x3) == 0x3) { 258 device_printf(dev, "critical temperature detected, " 259 "suggest system shutdown\n"); 260 ksnprintf(stemp, sizeof(stemp), "%d", temp); 261 devctl_notify("coretemp", "Thermal", stemp, "notify=0xcc"); 262 } 263 264 return (temp); 265 } 266 267 static void 268 coretemp_refresh(void *arg) 269 { 270 struct coretemp_softc *sc = arg; 271 device_t dev = sc->sc_dev; 272 struct ksensor *s = &sc->sc_sensor; 273 int temp; 274 275 temp = coretemp_get_temp(dev); 276 277 if (temp == -1) { 278 s->flags |= SENSOR_FINVALID; 279 s->value = 0; 280 } else { 281 s->flags &= ~SENSOR_FINVALID; 282 s->value = temp * 1000000 + 273150000; 283 } 284 } 285