1 /* 2 * Copyright (c) 2002 M. Warner Losh. 3 * Copyright (c) 2000,2001 Jonathan Chen. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer, 11 * without modification, immediately at the beginning of the file. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in 14 * the documentation and/or other materials provided with the 15 * distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/dev/pccbb/pccbb.c,v 1.64 2002/11/23 23:09:45 imp Exp $ 30 * $DragonFly: src/sys/dev/pccard/pccbb/pccbb.c,v 1.3 2004/07/10 16:25:59 dillon Exp $ 31 */ 32 33 /* 34 * Copyright (c) 1998, 1999 and 2000 35 * HAYAKAWA Koichi. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by HAYAKAWA Koichi. 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 /* 64 * Driver for PCI to CardBus Bridge chips 65 * 66 * References: 67 * TI Datasheets: 68 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS 69 * 70 * Written by Jonathan Chen <jon@freebsd.org> 71 * The author would like to acknowledge: 72 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing 73 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things 74 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver 75 * * David Cross: Author of the initial ugly hack for a specific cardbus card 76 */ 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/proc.h> 81 #include <sys/errno.h> 82 #include <sys/kernel.h> 83 #include <sys/lock.h> 84 #include <sys/malloc.h> 85 #include <sys/sysctl.h> 86 #include <sys/kthread.h> 87 #include <sys/bus.h> 88 #include <machine/bus.h> 89 #include <sys/rman.h> 90 #include <machine/resource.h> 91 92 #include <bus/pci/pcireg.h> 93 #include <bus/pci/pcivar.h> 94 #include <machine/clock.h> 95 96 #include <bus/pccard/pccardreg.h> 97 #include <bus/pccard/pccardvar.h> 98 99 #include <dev/pccard/exca/excareg.h> 100 #include <dev/pccard/exca/excavar.h> 101 102 #include <dev/pccard/pccbb/pccbbreg.h> 103 #include <dev/pccard/pccbb/pccbbvar.h> 104 105 #include "power_if.h" 106 #include "card_if.h" 107 #include "pcib_if.h" 108 109 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0) 110 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0) 111 112 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \ 113 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE) 114 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \ 115 pci_write_config(DEV, REG, ( \ 116 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE) 117 118 #define CBB_START_MEM 0x88000000 119 #define CBB_START_32_IO 0x1000 120 #define CBB_START_16_IO 0x100 121 122 struct yenta_chipinfo { 123 uint32_t yc_id; 124 const char *yc_name; 125 int yc_chiptype; 126 } yc_chipsets[] = { 127 /* Texas Instruments chips */ 128 {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X}, 129 {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X}, 130 {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X}, 131 132 {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX}, 133 {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX}, 134 {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX}, 135 {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX}, 136 {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX}, 137 {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X}, 138 {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X}, 139 {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X}, 140 {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX}, 141 {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX}, 142 {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX}, 143 {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX}, 144 {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX}, 145 {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, /*SIC!*/ 146 {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX}, 147 {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX}, 148 {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX}, 149 {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX}, 150 {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX}, 151 {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX}, 152 {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX}, 153 154 /* Ricoh chips */ 155 {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X}, 156 {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X}, 157 {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X}, 158 {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X}, 159 {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X}, 160 {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X}, 161 162 /* Toshiba products */ 163 {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95}, 164 {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95}, 165 {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97}, 166 {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97}, 167 168 /* Cirrus Logic */ 169 {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS}, 170 {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS}, 171 {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS}, 172 173 /* 02Micro */ 174 {PCIC_ID_OZ6832, "O2Micro OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS}, 175 {PCIC_ID_OZ6860, "O2Micro OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS}, 176 {PCIC_ID_OZ6872, "O2Micro OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS}, 177 {PCIC_ID_OZ6912, "O2Micro OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS}, 178 {PCIC_ID_OZ6922, "O2Micro OZ6822 PCI-CardBus Bridge", CB_CIRRUS}, 179 {PCIC_ID_OZ6933, "O2Micro OZ6833 PCI-CardBus Bridge", CB_CIRRUS}, 180 181 /* sentinel */ 182 {0 /* null id */, "unknown", CB_UNKNOWN}, 183 }; 184 185 /* sysctl vars */ 186 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters"); 187 188 /* There's no way to say TUNEABLE_LONG to get the right types */ 189 u_long cbb_start_mem = CBB_START_MEM; 190 TUNABLE_INT("hw.cbb.start_memory", (int *)&cbb_start_mem); 191 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW, 192 &cbb_start_mem, CBB_START_MEM, 193 "Starting address for memory allocations"); 194 195 u_long cbb_start_16_io = CBB_START_16_IO; 196 TUNABLE_INT("hw.cbb.start_16_io", (int *)&cbb_start_16_io); 197 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW, 198 &cbb_start_16_io, CBB_START_16_IO, 199 "Starting ioport for 16-bit cards"); 200 201 u_long cbb_start_32_io = CBB_START_32_IO; 202 TUNABLE_INT("hw.cbb.start_32_io", (int *)&cbb_start_32_io); 203 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW, 204 &cbb_start_32_io, CBB_START_32_IO, 205 "Starting ioport for 32-bit cards"); 206 207 int cbb_debug = 0; 208 TUNABLE_INT("hw.cbb.debug", &cbb_debug); 209 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0, 210 "Verbose cardbus bridge debugging"); 211 212 static int cbb_chipset(uint32_t pci_id, const char **namep); 213 static int cbb_probe(device_t brdev); 214 static void cbb_chipinit(struct cbb_softc *sc); 215 static int cbb_attach(device_t brdev); 216 static void cbb_release_helper(device_t brdev); 217 static int cbb_detach(device_t brdev); 218 static int cbb_shutdown(device_t brdev); 219 static void cbb_driver_added(device_t brdev, driver_t *driver); 220 static void cbb_child_detached(device_t brdev, device_t child); 221 static void cbb_event_thread(void *arg); 222 static void cbb_insert(struct cbb_softc *sc); 223 static void cbb_removal(struct cbb_softc *sc); 224 static void cbb_intr(void *arg); 225 static int cbb_detect_voltage(device_t brdev); 226 static int cbb_power(device_t brdev, int volts); 227 static void cbb_cardbus_reset(device_t brdev); 228 static int cbb_cardbus_power_enable_socket(device_t brdev, 229 device_t child); 230 static void cbb_cardbus_power_disable_socket(device_t brdev, 231 device_t child); 232 static int cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, 233 uint32_t end); 234 static int cbb_cardbus_mem_open(device_t brdev, int win, 235 uint32_t start, uint32_t end); 236 static void cbb_cardbus_auto_open(struct cbb_softc *sc, int type); 237 static int cbb_cardbus_activate_resource(device_t brdev, device_t child, 238 int type, int rid, struct resource *res); 239 static int cbb_cardbus_deactivate_resource(device_t brdev, 240 device_t child, int type, int rid, struct resource *res); 241 static struct resource *cbb_cardbus_alloc_resource(device_t brdev, 242 device_t child, int type, int *rid, u_long start, 243 u_long end, u_long count, uint flags); 244 static int cbb_cardbus_release_resource(device_t brdev, device_t child, 245 int type, int rid, struct resource *res); 246 static int cbb_power_enable_socket(device_t brdev, device_t child); 247 static void cbb_power_disable_socket(device_t brdev, device_t child); 248 static int cbb_activate_resource(device_t brdev, device_t child, 249 int type, int rid, struct resource *r); 250 static int cbb_deactivate_resource(device_t brdev, device_t child, 251 int type, int rid, struct resource *r); 252 static struct resource *cbb_alloc_resource(device_t brdev, device_t child, 253 int type, int *rid, u_long start, u_long end, u_long count, 254 uint flags); 255 static int cbb_release_resource(device_t brdev, device_t child, 256 int type, int rid, struct resource *r); 257 static int cbb_read_ivar(device_t brdev, device_t child, int which, 258 uintptr_t *result); 259 static int cbb_write_ivar(device_t brdev, device_t child, int which, 260 uintptr_t value); 261 static int cbb_maxslots(device_t brdev); 262 static uint32_t cbb_read_config(device_t brdev, int b, int s, int f, 263 int reg, int width); 264 static void cbb_write_config(device_t brdev, int b, int s, int f, 265 int reg, uint32_t val, int width); 266 267 /* 268 */ 269 static __inline void 270 cbb_set(struct cbb_softc *sc, uint32_t reg, uint32_t val) 271 { 272 bus_space_write_4(sc->bst, sc->bsh, reg, val); 273 } 274 275 static __inline uint32_t 276 cbb_get(struct cbb_softc *sc, uint32_t reg) 277 { 278 return (bus_space_read_4(sc->bst, sc->bsh, reg)); 279 } 280 281 static __inline void 282 cbb_setb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) 283 { 284 cbb_set(sc, reg, cbb_get(sc, reg) | bits); 285 } 286 287 static __inline void 288 cbb_clrb(struct cbb_softc *sc, uint32_t reg, uint32_t bits) 289 { 290 cbb_set(sc, reg, cbb_get(sc, reg) & ~bits); 291 } 292 293 static void 294 cbb_remove_res(struct cbb_softc *sc, struct resource *res) 295 { 296 struct cbb_reslist *rle; 297 298 SLIST_FOREACH(rle, &sc->rl, link) { 299 if (rle->res == res) { 300 SLIST_REMOVE(&sc->rl, rle, cbb_reslist, link); 301 free(rle, M_DEVBUF); 302 return; 303 } 304 } 305 } 306 307 static struct resource * 308 cbb_find_res(struct cbb_softc *sc, int type, int rid) 309 { 310 struct cbb_reslist *rle; 311 312 SLIST_FOREACH(rle, &sc->rl, link) 313 if (SYS_RES_MEMORY == rle->type && rid == rle->rid) 314 return (rle->res); 315 return (NULL); 316 } 317 318 static void 319 cbb_insert_res(struct cbb_softc *sc, struct resource *res, int type, 320 int rid) 321 { 322 struct cbb_reslist *rle; 323 324 /* 325 * Need to record allocated resource so we can iterate through 326 * it later. 327 */ 328 rle = malloc(sizeof(struct cbb_reslist), M_DEVBUF, M_NOWAIT); 329 if (!res) 330 panic("cbb_cardbus_alloc_resource: can't record entry!"); 331 rle->res = res; 332 rle->type = type; 333 rle->rid = rid; 334 SLIST_INSERT_HEAD(&sc->rl, rle, link); 335 } 336 337 static void 338 cbb_destroy_res(struct cbb_softc *sc) 339 { 340 struct cbb_reslist *rle; 341 342 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) { 343 device_printf(sc->dev, "Danger Will Robinson: Resource " 344 "left allocated! This is a bug... " 345 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type, 346 rman_get_start(rle->res)); 347 SLIST_REMOVE_HEAD(&sc->rl, link); 348 free(rle, M_DEVBUF); 349 } 350 } 351 352 /************************************************************************/ 353 /* Probe/Attach */ 354 /************************************************************************/ 355 356 static int 357 cbb_chipset(uint32_t pci_id, const char **namep) 358 { 359 struct yenta_chipinfo *ycp; 360 361 for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp) 362 continue; 363 if (namep != NULL) 364 *namep = ycp->yc_name; 365 return (ycp->yc_chiptype); 366 } 367 368 static int 369 cbb_probe(device_t brdev) 370 { 371 const char *name; 372 uint32_t progif; 373 uint32_t subclass; 374 375 /* 376 * Do we know that we support the chipset? If so, then we 377 * accept the device. 378 */ 379 if (cbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) { 380 device_set_desc(brdev, name); 381 return (0); 382 } 383 384 /* 385 * We do support generic CardBus bridges. All that we've seen 386 * to date have progif 0 (the Yenta spec, and successors mandate 387 * this). We do not support PCI PCMCIA bridges (with one exception) 388 * with this driver since they generally are I/O mapped. Those 389 * are supported by the pcic driver. This should help us be more 390 * future proof. 391 */ 392 subclass = pci_get_subclass(brdev); 393 progif = pci_get_progif(brdev); 394 if (subclass == PCIS_BRIDGE_CARDBUS && progif == 0) { 395 device_set_desc(brdev, "PCI-CardBus Bridge"); 396 return (0); 397 } 398 return (ENXIO); 399 } 400 401 402 static void 403 cbb_chipinit(struct cbb_softc *sc) 404 { 405 uint32_t mux, sysctrl; 406 407 /* Set CardBus latency timer */ 408 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20) 409 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1); 410 411 /* Set PCI latency timer */ 412 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20) 413 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1); 414 415 /* Enable memory access */ 416 PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND, 417 | PCIM_CMD_MEMEN 418 | PCIM_CMD_PORTEN 419 | PCIM_CMD_BUSMASTEREN, 2); 420 421 /* disable Legacy IO */ 422 switch (sc->chipset) { 423 case CB_RF5C46X: 424 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL, 425 & ~(CBBM_BRIDGECTRL_RL_3E0_EN | 426 CBBM_BRIDGECTRL_RL_3E2_EN), 2); 427 break; 428 default: 429 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4); 430 break; 431 } 432 433 /* Use PCI interrupt for interrupt routing */ 434 PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL, 435 & ~(CBBM_BRIDGECTRL_MASTER_ABORT | 436 CBBM_BRIDGECTRL_INTR_IREQ_EN), 437 | CBBM_BRIDGECTRL_WRITE_POST_EN, 438 2); 439 440 /* 441 * XXX this should be a function table, ala OLDCARD. This means 442 * that we could more easily support ISA interrupts for pccard 443 * cards if we had to. 444 */ 445 switch (sc->chipset) { 446 case CB_TI113X: 447 /* 448 * The TI 1031, TI 1130 and TI 1131 all require another bit 449 * be set to enable PCI routing of interrupts, and then 450 * a bit for each of the CSC and Function interrupts we 451 * want routed. 452 */ 453 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL, 454 | CBBM_CBCTRL_113X_PCI_INTR | 455 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN, 456 1); 457 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL, 458 & ~(CBBM_DEVCTRL_INT_SERIAL | 459 CBBM_DEVCTRL_INT_PCI), 1); 460 break; 461 case CB_TI12XX: 462 /* 463 * Some TI 12xx (and [14][45]xx) based pci cards 464 * sometimes have issues with the MFUNC register not 465 * being initialized due to a bad EEPROM on board. 466 * Laptops that this matters on have this register 467 * properly initialized. 468 * 469 * The TI125X parts have a different register. 470 */ 471 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4); 472 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4); 473 if (mux == 0) { 474 mux = (mux & ~CBBM_MFUNC_PIN0) | 475 CBBM_MFUNC_PIN0_INTA; 476 if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0) 477 mux = (mux & ~CBBM_MFUNC_PIN1) | 478 CBBM_MFUNC_PIN1_INTB; 479 pci_write_config(sc->dev, CBBR_MFUNC, mux, 4); 480 } 481 /*FALLTHROUGH*/ 482 case CB_TI125X: 483 /* 484 * Disable zoom video. Some machines initialize this 485 * improperly and exerpience has shown that this helps 486 * on some machines. 487 */ 488 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4); 489 break; 490 case CB_TOPIC97: 491 /* 492 * Disable Zoom Video, ToPIC 97, 100. 493 */ 494 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1); 495 /* 496 * ToPIC 97, 100 497 * At offset 0xa1: INTERRUPT CONTROL register 498 * 0x1: Turn on INT interrupts. 499 */ 500 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL, 501 | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1); 502 goto topic_common; 503 case CB_TOPIC95: 504 /* 505 * SOCKETCTRL appears to be TOPIC 95/B specific 506 */ 507 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL, 508 | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4); 509 510 topic_common:; 511 /* 512 * At offset 0xa0: SLOT CONTROL 513 * 0x80 Enable CardBus Functionality 514 * 0x40 Enable CardBus and PC Card registers 515 * 0x20 Lock ID in exca regs 516 * 0x10 Write protect ID in config regs 517 * Clear the rest of the bits, which defaults the slot 518 * in legacy mode to 0x3e0 and offset 0. (legacy 519 * mode is determined elsewhere) 520 */ 521 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL, 522 CBBM_TOPIC_SLOTCTRL_SLOTON | 523 CBBM_TOPIC_SLOTCTRL_SLOTEN | 524 CBBM_TOPIC_SLOTCTRL_ID_LOCK | 525 CBBM_TOPIC_SLOTCTRL_ID_WP, 1); 526 527 /* 528 * At offset 0xa3 Card Detect Control Register 529 * 0x80 CARDBUS enbale 530 * 0x01 Cleared for hardware change detect 531 */ 532 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC, 533 | CBBM_TOPIC_CDC_CARDBUS, 534 & ~CBBM_TOPIC_CDC_SWDETECT, 4); 535 break; 536 } 537 538 /* 539 * Need to tell ExCA registers to route via PCI interrupts. There 540 * are two ways to do this. Once is to set INTR_ENABLE and the 541 * other is to set CSC to 0. Since both methods are mutually 542 * compatible, we do both. 543 */ 544 exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE); 545 exca_write(&sc->exca, EXCA_CSC_INTR, 0); 546 547 /* close all memory and io windows */ 548 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4); 549 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4); 550 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4); 551 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4); 552 pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4); 553 pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4); 554 pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4); 555 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4); 556 } 557 558 static int 559 cbb_attach(device_t brdev) 560 { 561 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(brdev); 562 int rid; 563 564 lockinit(&sc->lock, 0, "cbb", 0, 0); 565 sc->chipset = cbb_chipset(pci_get_devid(brdev), NULL); 566 sc->dev = brdev; 567 sc->cbdev = NULL; 568 sc->pccarddev = NULL; 569 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1); 570 sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1); 571 SLIST_INIT(&sc->rl); 572 STAILQ_INIT(&sc->intr_handlers); 573 574 #ifndef BURN_THE_BOATS 575 /* 576 * The PCI bus code should assign us memory in the absense 577 * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge 578 * up something here until the PCI/acpi code properly assigns the 579 * resource. 580 */ 581 #endif 582 rid = CBBR_SOCKBASE; 583 sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid, 584 0, ~0, 1, RF_ACTIVE); 585 if (!sc->base_res) { 586 #ifdef BURN_THE_BOATS 587 device_printf(brdev, "Could not map register memory\n"); 588 return (ENOMEM); 589 #else 590 uint32_t sockbase; 591 /* 592 * Generally, the BIOS will assign this memory for us. 593 * However, newer BIOSes do not because the MS design 594 * documents have mandated that this is for the OS 595 * to assign rather than the BIOS. This driver shouldn't 596 * be doing this, but until the pci bus code (or acpi) 597 * does this, we allow CardBus bridges to work on more 598 * machines. 599 */ 600 sockbase = pci_read_config(brdev, rid, 4); 601 if (sockbase < 0x100000 || sockbase >= 0xfffffff0) { 602 pci_write_config(brdev, rid, 0xffffffff, 4); 603 sockbase = pci_read_config(brdev, rid, 4); 604 sockbase = (sockbase & 0xfffffff0) & 605 -(sockbase & 0xfffffff0); 606 sc->base_res = bus_generic_alloc_resource( 607 device_get_parent(brdev), brdev, SYS_RES_MEMORY, 608 &rid, cbb_start_mem, ~0, sockbase, 609 RF_ACTIVE|rman_make_alignment_flags(sockbase)); 610 if (!sc->base_res) { 611 device_printf(brdev, 612 "Could not grab register memory\n"); 613 return (ENOMEM); 614 } 615 sc->flags |= CBB_KLUDGE_ALLOC; 616 pci_write_config(brdev, CBBR_SOCKBASE, 617 rman_get_start(sc->base_res), 4); 618 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n", 619 rman_get_start(sc->base_res))); 620 } else { 621 device_printf(brdev, "Could not map register memory\n"); 622 goto err; 623 } 624 #endif 625 } 626 627 sc->bst = rman_get_bustag(sc->base_res); 628 sc->bsh = rman_get_bushandle(sc->base_res); 629 exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET); 630 sc->exca.flags |= EXCA_HAS_MEMREG_WIN; 631 cbb_chipinit(sc); 632 633 /* attach children */ 634 sc->cbdev = device_add_child(brdev, "cardbus", -1); 635 if (sc->cbdev == NULL) 636 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n")); 637 else if (device_probe_and_attach(sc->cbdev) != 0) { 638 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n")); 639 sc->cbdev = NULL; 640 } 641 642 sc->pccarddev = device_add_child(brdev, "pccard", -1); 643 if (sc->pccarddev == NULL) 644 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n")); 645 else if (device_probe_and_attach(sc->pccarddev) != 0) { 646 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n")); 647 sc->pccarddev = NULL; 648 } 649 650 /* Map and establish the interrupt. */ 651 rid = 0; 652 sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1, 653 RF_SHAREABLE | RF_ACTIVE); 654 if (sc->irq_res == NULL) { 655 printf("cbb: Unable to map IRQ...\n"); 656 goto err; 657 return (ENOMEM); 658 } 659 660 if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_AV, cbb_intr, sc, 661 &sc->intrhand)) { 662 device_printf(brdev, "couldn't establish interrupt"); 663 goto err; 664 } 665 666 /* reset 16-bit pcmcia bus */ 667 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 668 669 /* turn off power */ 670 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 671 672 /* CSC Interrupt: Card detect interrupt on */ 673 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 674 675 /* reset interrupt */ 676 cbb_set(sc, CBB_SOCKET_EVENT, cbb_get(sc, CBB_SOCKET_EVENT)); 677 678 /* Start the thread */ 679 if (kthread_create(cbb_event_thread, sc, &sc->event_thread, 680 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) { 681 device_printf (sc->dev, "unable to create event thread.\n"); 682 panic ("cbb_create_event_thread"); 683 } 684 685 return (0); 686 err: 687 if (sc->irq_res) 688 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 689 if (sc->base_res) { 690 if (sc->flags & CBB_KLUDGE_ALLOC) 691 bus_generic_release_resource(device_get_parent(brdev), 692 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 693 sc->base_res); 694 else 695 bus_release_resource(brdev, SYS_RES_MEMORY, 696 CBBR_SOCKBASE, sc->base_res); 697 } 698 return (ENOMEM); 699 } 700 701 /* 702 * shutdown and detach both call the release helper to disable the interrupt 703 * and cleanup the resources. 704 */ 705 static 706 void 707 cbb_release_helper(device_t brdev) 708 { 709 struct cbb_softc *sc = device_get_softc(brdev); 710 711 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread); 712 sc->flags |= CBB_KTHREAD_DONE; 713 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread); 714 if (sc->flags & CBB_KTHREAD_RUNNING) { 715 wakeup(sc); 716 tsleep(cbb_detach, 0, "pccbb", 2); 717 } 718 719 /* 720 * Reset the bridge controller and reset the interrupt, then tear 721 * it down (which disables the interrupt) and de-power. 722 */ 723 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 724 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 725 726 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand); 727 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 728 729 /* 730 * Release interrupt and memory-mapped resources. Device memory 731 * cannot be safely accessed after we do this. 732 */ 733 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res); 734 if (sc->flags & CBB_KLUDGE_ALLOC) { 735 bus_generic_release_resource(device_get_parent(brdev), 736 brdev, SYS_RES_MEMORY, CBBR_SOCKBASE, 737 sc->base_res); 738 } else { 739 bus_release_resource(brdev, SYS_RES_MEMORY, 740 CBBR_SOCKBASE, sc->base_res); 741 } 742 } 743 744 static int 745 cbb_detach(device_t brdev) 746 { 747 device_t *devlist; 748 int numdevs; 749 int error; 750 int i; 751 752 device_get_children(brdev, &devlist, &numdevs); 753 754 error = 0; 755 for (i = 0; i < numdevs; i++) { 756 if (device_detach(devlist[i]) == 0) 757 device_delete_child(brdev, devlist[i]); 758 else 759 error++; 760 } 761 free (devlist, M_TEMP); 762 if (error == 0) 763 cbb_release_helper(brdev); 764 else 765 error = ENXIO; 766 return (error); 767 } 768 769 static int 770 cbb_shutdown(device_t brdev) 771 { 772 device_t *devlist; 773 int numdevs; 774 int i; 775 776 device_get_children(brdev, &devlist, &numdevs); 777 778 for (i = 0; i < numdevs; i++) { 779 if (device_shutdown(devlist[i]) == 0) 780 ; /* XXX delete the child without detach? */ 781 } 782 free (devlist, M_TEMP); 783 cbb_release_helper(brdev); 784 785 /* 786 * This may prevent bios confusion on reboot for some bioses 787 */ 788 pci_write_config(brdev, PCIR_COMMAND, 0, 2); 789 return (0); 790 } 791 792 static int 793 cbb_setup_intr(device_t dev, device_t child, struct resource *irq, 794 int flags, driver_intr_t *intr, void *arg, void **cookiep) 795 { 796 struct cbb_intrhand *ih; 797 struct cbb_softc *sc = device_get_softc(dev); 798 799 /* 800 * You aren't allowed to have fast interrupts for pccard/cardbus 801 * things since those interrupts are PCI and shared. Since we use 802 * the PCI interrupt for the status change interrupts, it can't be 803 * free for use by the driver. Fast interrupts must not be shared. 804 */ 805 ih = malloc(sizeof(struct cbb_intrhand), M_DEVBUF, M_NOWAIT); 806 if (ih == NULL) 807 return (ENOMEM); 808 *cookiep = ih; 809 ih->intr = intr; 810 ih->arg = arg; 811 STAILQ_INSERT_TAIL(&sc->intr_handlers, ih, entries); 812 /* 813 * XXX we should do what old card does to ensure that we don't 814 * XXX call the function's interrupt routine(s). 815 */ 816 /* 817 * XXX need to turn on ISA interrupts, if we ever support them, but 818 * XXX for now that's all we need to do. 819 */ 820 return (0); 821 } 822 823 static int 824 cbb_teardown_intr(device_t dev, device_t child, struct resource *irq, 825 void *cookie) 826 { 827 struct cbb_intrhand *ih; 828 struct cbb_softc *sc = device_get_softc(dev); 829 830 cbb_setb(sc, CBB_SOCKET_MASK, 0); /* Quiet hardware */ 831 /* XXX Need to do different things for ISA interrupts. */ 832 ih = (struct cbb_intrhand *) cookie; 833 STAILQ_REMOVE(&sc->intr_handlers, ih, cbb_intrhand, entries); 834 free(ih, M_DEVBUF); 835 return (0); 836 } 837 838 839 static void 840 cbb_driver_added(device_t brdev, driver_t *driver) 841 { 842 struct cbb_softc *sc = device_get_softc(brdev); 843 device_t *devlist; 844 int tmp; 845 int numdevs; 846 int wake; 847 uint32_t sockstate; 848 849 DEVICE_IDENTIFY(driver, brdev); 850 device_get_children(brdev, &devlist, &numdevs); 851 wake = 0; 852 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 853 for (tmp = 0; tmp < numdevs; tmp++) { 854 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT && 855 device_probe_and_attach(devlist[tmp]) == 0) { 856 if (devlist[tmp] == NULL) 857 /* NOTHING */; 858 else if (strcmp(driver->name, "cardbus") == 0) { 859 sc->cbdev = devlist[tmp]; 860 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) && 861 (sockstate & CBB_SOCKET_STAT_CB)) 862 wake++; 863 } else if (strcmp(driver->name, "pccard") == 0) { 864 sc->pccarddev = devlist[tmp]; 865 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) && 866 (sockstate & CBB_SOCKET_STAT_16BIT)) 867 wake++; 868 } else 869 device_printf(brdev, 870 "Unsupported child bus: %s\n", 871 driver->name); 872 } 873 } 874 free(devlist, M_TEMP); 875 876 if (wake > 0) { 877 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) 878 == 0) { 879 wakeup(sc); 880 } 881 } 882 } 883 884 static void 885 cbb_child_detached(device_t brdev, device_t child) 886 { 887 struct cbb_softc *sc = device_get_softc(brdev); 888 889 if (child == sc->cbdev) 890 sc->cbdev = NULL; 891 else if (child == sc->pccarddev) 892 sc->pccarddev = NULL; 893 else 894 device_printf(brdev, "Unknown child detached: %s %p/%p\n", 895 device_get_nameunit(child), sc->cbdev, sc->pccarddev); 896 } 897 898 /************************************************************************/ 899 /* Kthreads */ 900 /************************************************************************/ 901 902 static void 903 cbb_event_thread(void *arg) 904 { 905 struct cbb_softc *sc = arg; 906 uint32_t status; 907 int err; 908 909 /* 910 * We take out Giant here because we need it deep, down in 911 * the bowels of the vm system for mapping the memory we need 912 * to read the CIS. We also need it for kthread_exit, which 913 * drops it. 914 */ 915 sc->flags |= CBB_KTHREAD_RUNNING; 916 while (1) { 917 /* 918 * Check to see if we have anything first so that 919 * if there's a card already inserted, we do the 920 * right thing. 921 */ 922 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread); 923 if (sc->flags & CBB_KTHREAD_DONE) 924 break; 925 926 status = cbb_get(sc, CBB_SOCKET_STATE); 927 /* mtx_lock(&Giant); */ 928 if ((status & CBB_SOCKET_STAT_CD) == 0) 929 cbb_insert(sc); 930 else 931 cbb_removal(sc); 932 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread); 933 /* mtx_unlock(&Giant); */ 934 935 /* 936 * Wait until it has been 1s since the last time we 937 * get an interrupt. We handle the rest of the interrupt 938 * at the top of the loop. 939 */ 940 err = tsleep(sc, 0, "pccbb", 0); 941 while (err != EWOULDBLOCK && 942 (sc->flags & CBB_KTHREAD_DONE) == 0) 943 err = tsleep(sc, 0, "pccbb", 1 * hz); 944 } 945 sc->flags &= ~CBB_KTHREAD_RUNNING; 946 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread); 947 /* mtx_lock(&Giant); */ 948 kthread_exit(); 949 } 950 951 /************************************************************************/ 952 /* Insert/removal */ 953 /************************************************************************/ 954 955 static void 956 cbb_insert(struct cbb_softc *sc) 957 { 958 uint32_t sockevent, sockstate; 959 960 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 961 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 962 963 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n", 964 sockevent, sockstate)); 965 966 if (sockstate & CBB_SOCKET_STAT_16BIT) { 967 if (sc->pccarddev != NULL) { 968 sc->flags |= CBB_16BIT_CARD; 969 sc->flags |= CBB_CARD_OK; 970 if (CARD_ATTACH_CARD(sc->pccarddev) != 0) { 971 device_printf(sc->dev, 972 "PC Card card activation failed\n"); 973 sc->flags &= ~CBB_CARD_OK; 974 } 975 } else { 976 device_printf(sc->dev, 977 "PC Card inserted, but no pccard bus.\n"); 978 } 979 } else if (sockstate & CBB_SOCKET_STAT_CB) { 980 if (sc->cbdev != NULL) { 981 sc->flags &= ~CBB_16BIT_CARD; 982 sc->flags |= CBB_CARD_OK; 983 if (CARD_ATTACH_CARD(sc->cbdev) != 0) { 984 device_printf(sc->dev, 985 "CardBus card activation failed\n"); 986 sc->flags &= ~CBB_CARD_OK; 987 } 988 } else { 989 device_printf(sc->dev, 990 "CardBus card inserted, but no cardbus bus.\n"); 991 } 992 } else { 993 /* 994 * We should power the card down, and try again a couple of 995 * times if this happens. XXX 996 */ 997 device_printf (sc->dev, "Unsupported card type detected\n"); 998 } 999 } 1000 1001 static void 1002 cbb_removal(struct cbb_softc *sc) 1003 { 1004 if (sc->flags & CBB_16BIT_CARD) { 1005 if (sc->pccarddev != NULL) 1006 CARD_DETACH_CARD(sc->pccarddev); 1007 } else { 1008 if (sc->cbdev != NULL) 1009 CARD_DETACH_CARD(sc->cbdev); 1010 } 1011 cbb_destroy_res(sc); 1012 } 1013 1014 /************************************************************************/ 1015 /* Interrupt Handler */ 1016 /************************************************************************/ 1017 1018 static void 1019 cbb_intr(void *arg) 1020 { 1021 struct cbb_softc *sc = arg; 1022 uint32_t sockevent; 1023 struct cbb_intrhand *ih; 1024 1025 /* 1026 * This ISR needs work XXX 1027 */ 1028 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 1029 if (sockevent) { 1030 /* ack the interrupt */ 1031 cbb_setb(sc, CBB_SOCKET_EVENT, sockevent); 1032 1033 /* 1034 * If anything has happened to the socket, we assume that 1035 * the card is no longer OK, and we shouldn't call its 1036 * ISR. We set CARD_OK as soon as we've attached the 1037 * card. This helps in a noisy eject, which happens 1038 * all too often when users are ejecting their PC Cards. 1039 * 1040 * We use this method in preference to checking to see if 1041 * the card is still there because the check suffers from 1042 * a race condition in the bouncing case. Prior versions 1043 * of the pccard software used a similar trick and achieved 1044 * excellent results. 1045 */ 1046 if (sockevent & CBB_SOCKET_EVENT_CD) { 1047 lockmgr(&sc->lock, LK_EXCLUSIVE, NULL, curthread); 1048 sc->flags &= ~CBB_CARD_OK; 1049 lockmgr(&sc->lock, LK_RELEASE, NULL, curthread); 1050 wakeup(sc); 1051 } 1052 if (sockevent & CBB_SOCKET_EVENT_CSTS) { 1053 DPRINTF((" cstsevent occured: 0x%08x\n", 1054 cbb_get(sc, CBB_SOCKET_STATE))); 1055 } 1056 if (sockevent & CBB_SOCKET_EVENT_POWER) { 1057 DPRINTF((" pwrevent occured: 0x%08x\n", 1058 cbb_get(sc, CBB_SOCKET_STATE))); 1059 } 1060 /* Other bits? */ 1061 } 1062 if (sc->flags & CBB_CARD_OK) { 1063 STAILQ_FOREACH(ih, &sc->intr_handlers, entries) { 1064 (*ih->intr)(ih->arg); 1065 } 1066 1067 } 1068 } 1069 1070 /************************************************************************/ 1071 /* Generic Power functions */ 1072 /************************************************************************/ 1073 1074 static int 1075 cbb_detect_voltage(device_t brdev) 1076 { 1077 struct cbb_softc *sc = device_get_softc(brdev); 1078 uint32_t psr; 1079 int vol = CARD_UKN_CARD; 1080 1081 psr = cbb_get(sc, CBB_SOCKET_STATE); 1082 1083 if (psr & CBB_SOCKET_STAT_5VCARD) 1084 vol |= CARD_5V_CARD; 1085 if (psr & CBB_SOCKET_STAT_3VCARD) 1086 vol |= CARD_3V_CARD; 1087 if (psr & CBB_SOCKET_STAT_XVCARD) 1088 vol |= CARD_XV_CARD; 1089 if (psr & CBB_SOCKET_STAT_YVCARD) 1090 vol |= CARD_YV_CARD; 1091 1092 return (vol); 1093 } 1094 1095 static int 1096 cbb_power(device_t brdev, int volts) 1097 { 1098 uint32_t status, sock_ctrl; 1099 struct cbb_softc *sc = device_get_softc(brdev); 1100 int timeout; 1101 uint32_t sockevent; 1102 1103 DEVPRINTF((sc->dev, "cbb_power: %s and %s [%x]\n", 1104 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" : 1105 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" : 1106 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" : 1107 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" : 1108 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" : 1109 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" : 1110 "VCC-UNKNOWN", 1111 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" : 1112 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" : 1113 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" : 1114 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" : 1115 "VPP-UNKNOWN", 1116 volts)); 1117 1118 status = cbb_get(sc, CBB_SOCKET_STATE); 1119 sock_ctrl = cbb_get(sc, CBB_SOCKET_CONTROL); 1120 1121 switch (volts & CARD_VCCMASK) { 1122 case CARD_VCC_UC: 1123 break; 1124 case CARD_VCC_5V: 1125 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */ 1126 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1127 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V; 1128 } else { 1129 device_printf(sc->dev, 1130 "BAD voltage request: no 5 V card\n"); 1131 } 1132 break; 1133 case CARD_VCC_3V: 1134 if (CBB_SOCKET_STAT_3VCARD & status) { 1135 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1136 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V; 1137 } else { 1138 device_printf(sc->dev, 1139 "BAD voltage request: no 3.3 V card\n"); 1140 } 1141 break; 1142 case CARD_VCC_0V: 1143 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK; 1144 break; 1145 default: 1146 return (0); /* power NEVER changed */ 1147 break; 1148 } 1149 1150 switch (volts & CARD_VPPMASK) { 1151 case CARD_VPP_UC: 1152 break; 1153 case CARD_VPP_0V: 1154 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1155 break; 1156 case CARD_VPP_VCC: 1157 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1158 sock_ctrl |= ((sock_ctrl >> 4) & 0x07); 1159 break; 1160 case CARD_VPP_12V: 1161 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK; 1162 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V; 1163 break; 1164 } 1165 1166 if (cbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl) 1167 return (1); /* no change necessary */ 1168 1169 cbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl); 1170 status = cbb_get(sc, CBB_SOCKET_STATE); 1171 1172 /* 1173 * XXX This busy wait is bogus. We should wait for a power 1174 * interrupt and then whine if the status is bad. If we're 1175 * worried about the card not coming up, then we should also 1176 * schedule a timeout which we can cacel in the power interrupt. 1177 */ 1178 timeout = 20; 1179 do { 1180 DELAY(20*1000); 1181 sockevent = cbb_get(sc, CBB_SOCKET_EVENT); 1182 } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0); 1183 /* reset event status */ 1184 /* XXX should only reset EVENT_POWER */ 1185 cbb_set(sc, CBB_SOCKET_EVENT, sockevent); 1186 if (timeout < 0) { 1187 printf ("VCC supply failed.\n"); 1188 return (0); 1189 } 1190 1191 /* XXX 1192 * delay 400 ms: thgough the standard defines that the Vcc set-up time 1193 * is 20 ms, some PC-Card bridge requires longer duration. 1194 * XXX Note: We should check the stutus AFTER the delay to give time 1195 * for things to stabilize. 1196 */ 1197 DELAY(400*1000); 1198 1199 if (status & CBB_SOCKET_STAT_BADVCC) { 1200 device_printf(sc->dev, 1201 "bad Vcc request. ctrl=0x%x, status=0x%x\n", 1202 sock_ctrl ,status); 1203 printf("cbb_power: %s and %s [%x]\n", 1204 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" : 1205 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" : 1206 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" : 1207 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" : 1208 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" : 1209 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" : 1210 "VCC-UNKNOWN", 1211 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" : 1212 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V": 1213 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC": 1214 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" : 1215 "VPP-UNKNOWN", 1216 volts); 1217 return (0); 1218 } 1219 return (1); /* power changed correctly */ 1220 } 1221 1222 /* 1223 * detect the voltage for the card, and set it. Since the power 1224 * used is the square of the voltage, lower voltages is a big win 1225 * and what Windows does (and what Microsoft prefers). The MS paper 1226 * also talks about preferring the CIS entry as well. 1227 */ 1228 static int 1229 cbb_do_power(device_t brdev) 1230 { 1231 int voltage; 1232 1233 /* Prefer lowest voltage supported */ 1234 voltage = cbb_detect_voltage(brdev); 1235 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1236 if (voltage & CARD_YV_CARD) 1237 cbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC); 1238 else if (voltage & CARD_XV_CARD) 1239 cbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC); 1240 else if (voltage & CARD_3V_CARD) 1241 cbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC); 1242 else if (voltage & CARD_5V_CARD) 1243 cbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC); 1244 else { 1245 device_printf(brdev, "Unknown card voltage\n"); 1246 return (ENXIO); 1247 } 1248 return (0); 1249 } 1250 1251 /************************************************************************/ 1252 /* CardBus power functions */ 1253 /************************************************************************/ 1254 1255 static void 1256 cbb_cardbus_reset(device_t brdev) 1257 { 1258 struct cbb_softc *sc = device_get_softc(brdev); 1259 int delay_us; 1260 1261 delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000; 1262 1263 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2); 1264 1265 DELAY(delay_us); 1266 1267 /* If a card exists, unreset it! */ 1268 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) { 1269 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, 1270 &~CBBM_BRIDGECTRL_RESET, 2); 1271 DELAY(delay_us); 1272 } 1273 } 1274 1275 static int 1276 cbb_cardbus_power_enable_socket(device_t brdev, device_t child) 1277 { 1278 struct cbb_softc *sc = device_get_softc(brdev); 1279 int err; 1280 1281 if ((cbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 1282 CBB_SOCKET_STAT_CD) 1283 return (ENODEV); 1284 1285 err = cbb_do_power(brdev); 1286 if (err) 1287 return (err); 1288 cbb_cardbus_reset(brdev); 1289 return (0); 1290 } 1291 1292 static void 1293 cbb_cardbus_power_disable_socket(device_t brdev, device_t child) 1294 { 1295 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1296 cbb_cardbus_reset(brdev); 1297 } 1298 1299 /************************************************************************/ 1300 /* CardBus Resource */ 1301 /************************************************************************/ 1302 1303 static int 1304 cbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end) 1305 { 1306 int basereg; 1307 int limitreg; 1308 1309 if ((win < 0) || (win > 1)) { 1310 DEVPRINTF((brdev, 1311 "cbb_cardbus_io_open: window out of range %d\n", win)); 1312 return (EINVAL); 1313 } 1314 1315 basereg = win * 8 + CBBR_IOBASE0; 1316 limitreg = win * 8 + CBBR_IOLIMIT0; 1317 1318 pci_write_config(brdev, basereg, start, 4); 1319 pci_write_config(brdev, limitreg, end, 4); 1320 return (0); 1321 } 1322 1323 static int 1324 cbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end) 1325 { 1326 int basereg; 1327 int limitreg; 1328 1329 if ((win < 0) || (win > 1)) { 1330 DEVPRINTF((brdev, 1331 "cbb_cardbus_mem_open: window out of range %d\n", win)); 1332 return (EINVAL); 1333 } 1334 1335 basereg = win*8 + CBBR_MEMBASE0; 1336 limitreg = win*8 + CBBR_MEMLIMIT0; 1337 1338 pci_write_config(brdev, basereg, start, 4); 1339 pci_write_config(brdev, limitreg, end, 4); 1340 return (0); 1341 } 1342 1343 /* 1344 * XXX The following function belongs in the pci bus layer. 1345 */ 1346 static void 1347 cbb_cardbus_auto_open(struct cbb_softc *sc, int type) 1348 { 1349 uint32_t starts[2]; 1350 uint32_t ends[2]; 1351 struct cbb_reslist *rle; 1352 int align; 1353 int prefetchable[2]; 1354 uint32_t reg; 1355 1356 starts[0] = starts[1] = 0xffffffff; 1357 ends[0] = ends[1] = 0; 1358 1359 if (type == SYS_RES_MEMORY) 1360 align = CBB_MEMALIGN; 1361 else if (type == SYS_RES_IOPORT) 1362 align = CBB_IOALIGN; 1363 else 1364 align = 1; 1365 1366 SLIST_FOREACH(rle, &sc->rl, link) { 1367 if (rle->type != type) 1368 ; 1369 else if (rle->res == NULL) { 1370 device_printf(sc->dev, "WARNING: Resource not reserved? " 1371 "(type=%d, addr=%lx)\n", 1372 rle->type, rman_get_start(rle->res)); 1373 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) { 1374 /* XXX */ 1375 } else if (starts[0] == 0xffffffff) { 1376 starts[0] = rman_get_start(rle->res); 1377 ends[0] = rman_get_end(rle->res); 1378 prefetchable[0] = 1379 rman_get_flags(rle->res) & RF_PREFETCHABLE; 1380 } else if (rman_get_end(rle->res) > ends[0] && 1381 rman_get_start(rle->res) - ends[0] < 1382 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] == 1383 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1384 ends[0] = rman_get_end(rle->res); 1385 } else if (rman_get_start(rle->res) < starts[0] && 1386 starts[0] - rman_get_end(rle->res) < 1387 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] == 1388 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1389 starts[0] = rman_get_start(rle->res); 1390 } else if (starts[1] == 0xffffffff) { 1391 starts[1] = rman_get_start(rle->res); 1392 ends[1] = rman_get_end(rle->res); 1393 prefetchable[1] = 1394 rman_get_flags(rle->res) & RF_PREFETCHABLE; 1395 } else if (rman_get_end(rle->res) > ends[1] && 1396 rman_get_start(rle->res) - ends[1] < 1397 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] == 1398 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1399 ends[1] = rman_get_end(rle->res); 1400 } else if (rman_get_start(rle->res) < starts[1] && 1401 starts[1] - rman_get_end(rle->res) < 1402 CBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] == 1403 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) { 1404 starts[1] = rman_get_start(rle->res); 1405 } else { 1406 uint32_t diffs[2]; 1407 int win; 1408 1409 diffs[0] = diffs[1] = 0xffffffff; 1410 if (rman_get_start(rle->res) > ends[0]) 1411 diffs[0] = rman_get_start(rle->res) - ends[0]; 1412 else if (rman_get_end(rle->res) < starts[0]) 1413 diffs[0] = starts[0] - rman_get_end(rle->res); 1414 if (rman_get_start(rle->res) > ends[1]) 1415 diffs[1] = rman_get_start(rle->res) - ends[1]; 1416 else if (rman_get_end(rle->res) < starts[1]) 1417 diffs[1] = starts[1] - rman_get_end(rle->res); 1418 1419 win = (diffs[0] <= diffs[1])?0:1; 1420 if (rman_get_start(rle->res) > ends[win]) 1421 ends[win] = rman_get_end(rle->res); 1422 else if (rman_get_end(rle->res) < starts[win]) 1423 starts[win] = rman_get_start(rle->res); 1424 if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE)) 1425 prefetchable[win] = 0; 1426 } 1427 1428 if (starts[0] != 0xffffffff) 1429 starts[0] -= starts[0] % align; 1430 if (starts[1] != 0xffffffff) 1431 starts[1] -= starts[1] % align; 1432 if (ends[0] % align != 0) 1433 ends[0] += align - ends[0]%align - 1; 1434 if (ends[1] % align != 0) 1435 ends[1] += align - ends[1]%align - 1; 1436 } 1437 1438 if (type == SYS_RES_MEMORY) { 1439 cbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]); 1440 cbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]); 1441 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2); 1442 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0| 1443 CBBM_BRIDGECTRL_PREFETCH_1); 1444 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)| 1445 (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0); 1446 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2); 1447 } else if (type == SYS_RES_IOPORT) { 1448 cbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]); 1449 cbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]); 1450 } 1451 } 1452 1453 static int 1454 cbb_cardbus_activate_resource(device_t brdev, device_t child, int type, 1455 int rid, struct resource *res) 1456 { 1457 int ret; 1458 1459 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1460 type, rid, res); 1461 if (ret != 0) 1462 return (ret); 1463 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1464 return (0); 1465 } 1466 1467 static int 1468 cbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type, 1469 int rid, struct resource *res) 1470 { 1471 int ret; 1472 1473 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1474 type, rid, res); 1475 if (ret != 0) 1476 return (ret); 1477 cbb_cardbus_auto_open(device_get_softc(brdev), type); 1478 return (0); 1479 } 1480 1481 static struct resource * 1482 cbb_cardbus_alloc_resource(device_t brdev, device_t child, int type, 1483 int *rid, u_long start, u_long end, u_long count, uint flags) 1484 { 1485 struct cbb_softc *sc = device_get_softc(brdev); 1486 int tmp; 1487 struct resource *res; 1488 1489 switch (type) { 1490 case SYS_RES_IRQ: 1491 tmp = rman_get_start(sc->irq_res); 1492 if (start > tmp || end < tmp || count != 1) { 1493 device_printf(child, "requested interrupt %ld-%ld," 1494 "count = %ld not supported by cbb\n", 1495 start, end, count); 1496 return (NULL); 1497 } 1498 start = end = tmp; 1499 break; 1500 case SYS_RES_IOPORT: 1501 if (start <= cbb_start_32_io) 1502 start = cbb_start_32_io; 1503 if (end < start) 1504 end = start; 1505 break; 1506 case SYS_RES_MEMORY: 1507 if (start <= cbb_start_mem) 1508 start = cbb_start_mem; 1509 if (end < start) 1510 end = start; 1511 break; 1512 } 1513 1514 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1515 start, end, count, flags & ~RF_ACTIVE); 1516 if (res == NULL) { 1517 printf("cbb alloc res fail\n"); 1518 return (NULL); 1519 } 1520 cbb_insert_res(sc, res, type, *rid); 1521 if (flags & RF_ACTIVE) 1522 if (bus_activate_resource(child, type, *rid, res) != 0) { 1523 bus_release_resource(child, type, *rid, res); 1524 return (NULL); 1525 } 1526 1527 return (res); 1528 } 1529 1530 static int 1531 cbb_cardbus_release_resource(device_t brdev, device_t child, int type, 1532 int rid, struct resource *res) 1533 { 1534 struct cbb_softc *sc = device_get_softc(brdev); 1535 int error; 1536 1537 if (rman_get_flags(res) & RF_ACTIVE) { 1538 error = bus_deactivate_resource(child, type, rid, res); 1539 if (error != 0) 1540 return (error); 1541 } 1542 cbb_remove_res(sc, res); 1543 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1544 type, rid, res)); 1545 } 1546 1547 /************************************************************************/ 1548 /* PC Card Power Functions */ 1549 /************************************************************************/ 1550 1551 static int 1552 cbb_pcic_power_enable_socket(device_t brdev, device_t child) 1553 { 1554 struct cbb_softc *sc = device_get_softc(brdev); 1555 int err; 1556 1557 DPRINTF(("cbb_pcic_socket_enable:\n")); 1558 1559 /* power down/up the socket to reset */ 1560 err = cbb_do_power(brdev); 1561 if (err) 1562 return (err); 1563 exca_reset(&sc->exca, child); 1564 1565 return (0); 1566 } 1567 1568 static void 1569 cbb_pcic_power_disable_socket(device_t brdev, device_t child) 1570 { 1571 struct cbb_softc *sc = device_get_softc(brdev); 1572 1573 DPRINTF(("cbb_pcic_socket_disable\n")); 1574 1575 /* reset signal asserting... */ 1576 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET); 1577 DELAY(2*1000); 1578 1579 /* power down the socket */ 1580 cbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V); 1581 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE); 1582 1583 /* wait 300ms until power fails (Tpf). */ 1584 DELAY(300 * 1000); 1585 } 1586 1587 /************************************************************************/ 1588 /* POWER methods */ 1589 /************************************************************************/ 1590 1591 static int 1592 cbb_power_enable_socket(device_t brdev, device_t child) 1593 { 1594 struct cbb_softc *sc = device_get_softc(brdev); 1595 1596 if (sc->flags & CBB_16BIT_CARD) 1597 return (cbb_pcic_power_enable_socket(brdev, child)); 1598 else 1599 return (cbb_cardbus_power_enable_socket(brdev, child)); 1600 } 1601 1602 static void 1603 cbb_power_disable_socket(device_t brdev, device_t child) 1604 { 1605 struct cbb_softc *sc = device_get_softc(brdev); 1606 if (sc->flags & CBB_16BIT_CARD) 1607 cbb_pcic_power_disable_socket(brdev, child); 1608 else 1609 cbb_cardbus_power_disable_socket(brdev, child); 1610 } 1611 static int 1612 cbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid, 1613 struct resource *res) 1614 { 1615 int err; 1616 struct cbb_softc *sc = device_get_softc(brdev); 1617 if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */ 1618 switch (type) { 1619 case SYS_RES_IOPORT: 1620 err = exca_io_map(&sc->exca, 0, res); 1621 break; 1622 case SYS_RES_MEMORY: 1623 err = exca_mem_map(&sc->exca, 0, res); 1624 break; 1625 default: 1626 err = 0; 1627 break; 1628 } 1629 if (err) 1630 return (err); 1631 1632 } 1633 return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child, 1634 type, rid, res)); 1635 } 1636 1637 static int 1638 cbb_pcic_deactivate_resource(device_t brdev, device_t child, int type, 1639 int rid, struct resource *res) 1640 { 1641 struct cbb_softc *sc = device_get_softc(brdev); 1642 1643 if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */ 1644 switch (type) { 1645 case SYS_RES_IOPORT: 1646 if (exca_io_unmap_res(&sc->exca, res)) 1647 return (ENOENT); 1648 break; 1649 case SYS_RES_MEMORY: 1650 if (exca_mem_unmap_res(&sc->exca, res)) 1651 return (ENOENT); 1652 break; 1653 } 1654 } 1655 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child, 1656 type, rid, res)); 1657 } 1658 1659 static struct resource * 1660 cbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1661 u_long start, u_long end, u_long count, uint flags) 1662 { 1663 struct resource *res = NULL; 1664 struct cbb_softc *sc = device_get_softc(brdev); 1665 int tmp; 1666 1667 switch (type) { 1668 case SYS_RES_MEMORY: 1669 if (start < cbb_start_mem) 1670 start = cbb_start_mem; 1671 if (end < start) 1672 end = start; 1673 flags = (flags & ~RF_ALIGNMENT_MASK) | 1674 rman_make_alignment_flags(CBB_MEMALIGN); 1675 break; 1676 case SYS_RES_IOPORT: 1677 if (start < cbb_start_16_io) 1678 start = cbb_start_16_io; 1679 if (end < start) 1680 end = start; 1681 break; 1682 case SYS_RES_IRQ: 1683 tmp = rman_get_start(sc->irq_res); 1684 if (start > tmp || end < tmp || count != 1) { 1685 device_printf(child, "requested interrupt %ld-%ld," 1686 "count = %ld not supported by cbb\n", 1687 start, end, count); 1688 return (NULL); 1689 } 1690 flags |= RF_SHAREABLE; 1691 start = end = rman_get_start(sc->irq_res); 1692 break; 1693 } 1694 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid, 1695 start, end, count, flags & ~RF_ACTIVE); 1696 if (res == NULL) 1697 return (NULL); 1698 cbb_insert_res(sc, res, type, *rid); 1699 if (flags & RF_ACTIVE) { 1700 if (bus_activate_resource(child, type, *rid, res) != 0) { 1701 bus_release_resource(child, type, *rid, res); 1702 return (NULL); 1703 } 1704 } 1705 1706 return (res); 1707 } 1708 1709 static int 1710 cbb_pcic_release_resource(device_t brdev, device_t child, int type, 1711 int rid, struct resource *res) 1712 { 1713 struct cbb_softc *sc = device_get_softc(brdev); 1714 int error; 1715 1716 if (rman_get_flags(res) & RF_ACTIVE) { 1717 error = bus_deactivate_resource(child, type, rid, res); 1718 if (error != 0) 1719 return (error); 1720 } 1721 cbb_remove_res(sc, res); 1722 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child, 1723 type, rid, res)); 1724 } 1725 1726 /************************************************************************/ 1727 /* PC Card methods */ 1728 /************************************************************************/ 1729 1730 static int 1731 cbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid, 1732 uint32_t flags) 1733 { 1734 struct cbb_softc *sc = device_get_softc(brdev); 1735 struct resource *res; 1736 1737 if (type != SYS_RES_MEMORY) 1738 return (EINVAL); 1739 res = cbb_find_res(sc, type, rid); 1740 if (res == NULL) { 1741 device_printf(brdev, 1742 "set_res_flags: specified rid not found\n"); 1743 return (ENOENT); 1744 } 1745 return (exca_mem_set_flags(&sc->exca, res, flags)); 1746 } 1747 1748 static int 1749 cbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid, 1750 uint32_t cardaddr, uint32_t *deltap) 1751 { 1752 struct cbb_softc *sc = device_get_softc(brdev); 1753 struct resource *res; 1754 1755 res = cbb_find_res(sc, SYS_RES_MEMORY, rid); 1756 if (res == NULL) { 1757 device_printf(brdev, 1758 "set_memory_offset: specified rid not found\n"); 1759 return (ENOENT); 1760 } 1761 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap)); 1762 } 1763 1764 /************************************************************************/ 1765 /* BUS Methods */ 1766 /************************************************************************/ 1767 1768 1769 static int 1770 cbb_activate_resource(device_t brdev, device_t child, int type, int rid, 1771 struct resource *r) 1772 { 1773 struct cbb_softc *sc = device_get_softc(brdev); 1774 1775 if (sc->flags & CBB_16BIT_CARD) 1776 return (cbb_pcic_activate_resource(brdev, child, type, rid, r)); 1777 else 1778 return (cbb_cardbus_activate_resource(brdev, child, type, rid, 1779 r)); 1780 } 1781 1782 static int 1783 cbb_deactivate_resource(device_t brdev, device_t child, int type, 1784 int rid, struct resource *r) 1785 { 1786 struct cbb_softc *sc = device_get_softc(brdev); 1787 1788 if (sc->flags & CBB_16BIT_CARD) 1789 return (cbb_pcic_deactivate_resource(brdev, child, type, 1790 rid, r)); 1791 else 1792 return (cbb_cardbus_deactivate_resource(brdev, child, type, 1793 rid, r)); 1794 } 1795 1796 static struct resource * 1797 cbb_alloc_resource(device_t brdev, device_t child, int type, int *rid, 1798 u_long start, u_long end, u_long count, uint flags) 1799 { 1800 struct cbb_softc *sc = device_get_softc(brdev); 1801 1802 if (sc->flags & CBB_16BIT_CARD) 1803 return (cbb_pcic_alloc_resource(brdev, child, type, rid, 1804 start, end, count, flags)); 1805 else 1806 return (cbb_cardbus_alloc_resource(brdev, child, type, rid, 1807 start, end, count, flags)); 1808 } 1809 1810 static int 1811 cbb_release_resource(device_t brdev, device_t child, int type, int rid, 1812 struct resource *r) 1813 { 1814 struct cbb_softc *sc = device_get_softc(brdev); 1815 1816 if (sc->flags & CBB_16BIT_CARD) 1817 return (cbb_pcic_release_resource(brdev, child, type, 1818 rid, r)); 1819 else 1820 return (cbb_cardbus_release_resource(brdev, child, type, 1821 rid, r)); 1822 } 1823 1824 static int 1825 cbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result) 1826 { 1827 struct cbb_softc *sc = device_get_softc(brdev); 1828 1829 switch (which) { 1830 case PCIB_IVAR_BUS: 1831 *result = sc->secbus; 1832 return (0); 1833 } 1834 return (ENOENT); 1835 } 1836 1837 static int 1838 cbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value) 1839 { 1840 struct cbb_softc *sc = device_get_softc(brdev); 1841 1842 switch (which) { 1843 case PCIB_IVAR_BUS: 1844 sc->secbus = value; 1845 break; 1846 } 1847 return (ENOENT); 1848 } 1849 1850 /************************************************************************/ 1851 /* PCI compat methods */ 1852 /************************************************************************/ 1853 1854 static int 1855 cbb_maxslots(device_t brdev) 1856 { 1857 return (0); 1858 } 1859 1860 static uint32_t 1861 cbb_read_config(device_t brdev, int b, int s, int f, int reg, int width) 1862 { 1863 /* 1864 * Pass through to the next ppb up the chain (i.e. our grandparent). 1865 */ 1866 return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)), 1867 b, s, f, reg, width)); 1868 } 1869 1870 static void 1871 cbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val, 1872 int width) 1873 { 1874 /* 1875 * Pass through to the next ppb up the chain (i.e. our grandparent). 1876 */ 1877 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)), 1878 b, s, f, reg, val, width); 1879 } 1880 1881 static int 1882 cbb_suspend(device_t self) 1883 { 1884 int error = 0; 1885 struct cbb_softc *sc = device_get_softc(self); 1886 1887 bus_teardown_intr(self, sc->irq_res, sc->intrhand); 1888 sc->flags &= ~CBB_CARD_OK; /* Card is bogus now */ 1889 error = bus_generic_suspend(self); 1890 return (error); 1891 } 1892 1893 static int 1894 cbb_resume(device_t self) 1895 { 1896 int error = 0; 1897 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1898 uint32_t tmp; 1899 1900 /* 1901 * Some BIOSes will not save the BARs for the pci chips, so we 1902 * must do it ourselves. If the BAR is reset to 0 for an I/O 1903 * device, it will read back as 0x1, so no explicit test for 1904 * memory devices are needed. 1905 * 1906 * Note: The PCI bus code should do this automatically for us on 1907 * suspend/resume, but until it does, we have to cope. 1908 */ 1909 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4); 1910 DEVPRINTF((self, "PCI Memory allocated: %08lx\n", 1911 rman_get_start(sc->base_res))); 1912 1913 cbb_chipinit(sc); 1914 1915 /* reset interrupt -- Do we really need to do this? */ 1916 tmp = cbb_get(sc, CBB_SOCKET_EVENT); 1917 cbb_set(sc, CBB_SOCKET_EVENT, tmp); 1918 1919 /* re-establish the interrupt. */ 1920 if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_AV, cbb_intr, sc, 1921 &sc->intrhand)) { 1922 device_printf(self, "couldn't re-establish interrupt"); 1923 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res); 1924 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE, 1925 sc->base_res); 1926 sc->irq_res = NULL; 1927 sc->base_res = NULL; 1928 return (ENOMEM); 1929 } 1930 1931 /* CSC Interrupt: Card detect interrupt on */ 1932 cbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD); 1933 1934 /* Signal the thread to wakeup. */ 1935 wakeup(sc); 1936 1937 error = bus_generic_resume(self); 1938 1939 return (error); 1940 } 1941 1942 static int 1943 cbb_child_present(device_t self) 1944 { 1945 struct cbb_softc *sc = (struct cbb_softc *)device_get_softc(self); 1946 uint32_t sockstate; 1947 1948 sockstate = cbb_get(sc, CBB_SOCKET_STATE); 1949 return ((sockstate & CBB_SOCKET_STAT_CD) != 0 && 1950 (sc->flags & CBB_CARD_OK) != 0); 1951 } 1952 1953 static device_method_t cbb_methods[] = { 1954 /* Device interface */ 1955 DEVMETHOD(device_probe, cbb_probe), 1956 DEVMETHOD(device_attach, cbb_attach), 1957 DEVMETHOD(device_detach, cbb_detach), 1958 DEVMETHOD(device_shutdown, cbb_shutdown), 1959 DEVMETHOD(device_suspend, cbb_suspend), 1960 DEVMETHOD(device_resume, cbb_resume), 1961 1962 /* bus methods */ 1963 DEVMETHOD(bus_print_child, bus_generic_print_child), 1964 DEVMETHOD(bus_read_ivar, cbb_read_ivar), 1965 DEVMETHOD(bus_write_ivar, cbb_write_ivar), 1966 DEVMETHOD(bus_alloc_resource, cbb_alloc_resource), 1967 DEVMETHOD(bus_release_resource, cbb_release_resource), 1968 DEVMETHOD(bus_activate_resource, cbb_activate_resource), 1969 DEVMETHOD(bus_deactivate_resource, cbb_deactivate_resource), 1970 DEVMETHOD(bus_driver_added, cbb_driver_added), 1971 DEVMETHOD(bus_child_detached, cbb_child_detached), 1972 DEVMETHOD(bus_setup_intr, cbb_setup_intr), 1973 DEVMETHOD(bus_teardown_intr, cbb_teardown_intr), 1974 DEVMETHOD(bus_child_present, cbb_child_present), 1975 1976 /* 16-bit card interface */ 1977 DEVMETHOD(card_set_res_flags, cbb_pcic_set_res_flags), 1978 DEVMETHOD(card_set_memory_offset, cbb_pcic_set_memory_offset), 1979 1980 /* power interface */ 1981 DEVMETHOD(power_enable_socket, cbb_power_enable_socket), 1982 DEVMETHOD(power_disable_socket, cbb_power_disable_socket), 1983 1984 /* pcib compatibility interface */ 1985 DEVMETHOD(pcib_maxslots, cbb_maxslots), 1986 DEVMETHOD(pcib_read_config, cbb_read_config), 1987 DEVMETHOD(pcib_write_config, cbb_write_config), 1988 {0,0} 1989 }; 1990 1991 static driver_t cbb_driver = { 1992 "cbb", 1993 cbb_methods, 1994 sizeof(struct cbb_softc) 1995 }; 1996 1997 static devclass_t cbb_devclass; 1998 1999 DRIVER_MODULE(cbb, pci, cbb_driver, cbb_devclass, 0, 0); 2000 MODULE_VERSION(cbb, 1); 2001 MODULE_DEPEND(cbb, exca, 1, 1, 1); 2002