xref: /dflybsd-src/sys/dev/netif/sn/if_sn.c (revision 1f8e62c9ab8d2ecdefffbdf2ef5ed3db7376c6ec)
1 /*
2  * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. All advertising materials mentioning features or use of this software
14  *    must display the following acknowledgement:
15  *      This product includes software developed by Gardner Buchanan.
16  * 4. The name of Gardner Buchanan may not be used to endorse or promote
17  *    products derived from this software without specific prior written
18  *    permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  *   $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $
32  *   $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.12 2005/01/23 20:21:31 joerg Exp $
33  */
34 
35 /*
36  * This is a driver for SMC's 9000 series of Ethernet adapters.
37  *
38  * This FreeBSD driver is derived from the smc9194 Linux driver by
39  * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman.
40  * This driver also shamelessly borrows from the FreeBSD ep driver
41  * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca>
42  * All rights reserved.
43  *
44  * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded
45  * PC.  It is adapted from Erik Stahlman's Linux driver which worked
46  * with his EFA Info*Express SVC VLB adaptor.  According to SMC's databook,
47  * it will work for the entire SMC 9xxx series. (Ha Ha)
48  *
49  * "Features" of the SMC chip:
50  *   4608 byte packet memory. (for the 91C92.  Others have more)
51  *   EEPROM for configuration
52  *   AUI/TP selection
53  *
54  * Authors:
55  *      Erik Stahlman                   erik@vt.edu
56  *      Herb Peyerl                     hpeyerl@novatel.ca
57  *      Andres Vega Garcia              avega@sophia.inria.fr
58  *      Serge Babkin                    babkin@hq.icb.chel.su
59  *      Gardner Buchanan                gbuchanan@shl.com
60  *
61  * Sources:
62  *    o   SMC databook
63  *    o   "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)"
64  *    o   "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp"
65  *
66  * Known Bugs:
67  *    o   The hardware multicast filter isn't used yet.
68  *    o   Setting of the hardware address isn't supported.
69  *    o   Hardware padding isn't used.
70  */
71 
72 /*
73  * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT)
74  *
75  * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org>
76  *                       BSD-nomads, Tokyo, Japan.
77  */
78 /*
79  * Multicast support by Kei TANAKA <kei@pal.xerox.com>
80  * Special thanks to itojun@itojun.org
81  */
82 
83 #undef	SN_DEBUG	/* (by hosokawa) */
84 
85 #include <sys/param.h>
86 #include <sys/systm.h>
87 #include <sys/kernel.h>
88 #include <sys/errno.h>
89 #include <sys/sockio.h>
90 #include <sys/malloc.h>
91 #include <sys/mbuf.h>
92 #include <sys/socket.h>
93 #include <sys/syslog.h>
94 
95 #include <sys/module.h>
96 #include <sys/bus.h>
97 
98 #include <machine/bus.h>
99 #include <machine/resource.h>
100 #include <sys/rman.h>
101 
102 #include <net/ethernet.h>
103 #include <net/if.h>
104 #include <net/if_arp.h>
105 #include <net/if_dl.h>
106 #include <net/if_types.h>
107 #include <net/if_mib.h>
108 
109 #ifdef INET
110 #include <netinet/in.h>
111 #include <netinet/in_systm.h>
112 #include <netinet/in_var.h>
113 #include <netinet/ip.h>
114 #endif
115 
116 #ifdef NS
117 #include <netns/ns.h>
118 #include <netns/ns_if.h>
119 #endif
120 
121 #include <net/bpf.h>
122 #include <net/bpfdesc.h>
123 
124 #include <machine/clock.h>
125 
126 #include "if_snreg.h"
127 #include "if_snvar.h"
128 
129 /* Exported variables */
130 devclass_t sn_devclass;
131 
132 static int snioctl(struct ifnet * ifp, u_long, caddr_t, struct ucred *);
133 
134 static void snresume(struct ifnet *);
135 
136 void sninit(void *);
137 void snread(struct ifnet *);
138 void snreset(struct sn_softc *);
139 void snstart(struct ifnet *);
140 void snstop(struct sn_softc *);
141 void snwatchdog(struct ifnet *);
142 
143 static void sn_setmcast(struct sn_softc *);
144 static int sn_getmcf(struct arpcom *ac, u_char *mcf);
145 static u_int smc_crc(u_char *);
146 
147 DECLARE_DUMMY_MODULE(if_sn);
148 
149 /* I (GB) have been unlucky getting the hardware padding
150  * to work properly.
151  */
152 #define SW_PAD
153 
154 static const char *chip_ids[15] = {
155 	NULL, NULL, NULL,
156 	 /* 3 */ "SMC91C90/91C92",
157 	 /* 4 */ "SMC91C94",
158 	 /* 5 */ "SMC91C95",
159 	NULL,
160 	 /* 7 */ "SMC91C100",
161 	 /* 8 */ "SMC91C100FD",
162 	NULL, NULL, NULL,
163 	NULL, NULL, NULL
164 };
165 
166 int
167 sn_attach(device_t dev)
168 {
169 	struct sn_softc *sc = device_get_softc(dev);
170 	struct ifnet   *ifp = &sc->arpcom.ac_if;
171 	u_short         i;
172 	u_char         *p;
173 	struct ifaddr  *ifa;
174 	struct sockaddr_dl *sdl;
175 	int             rev;
176 	u_short         address;
177 	int		j;
178 
179 	sn_activate(dev);
180 
181 	snstop(sc);
182 
183 	sc->dev = dev;
184 	sc->pages_wanted = -1;
185 
186 	device_printf(dev, " ");
187 
188 	SMC_SELECT_BANK(3);
189 	rev = inw(BASE + REVISION_REG_W);
190 	if (chip_ids[(rev >> 4) & 0xF])
191 		printf("%s ", chip_ids[(rev >> 4) & 0xF]);
192 
193 	SMC_SELECT_BANK(1);
194 	i = inw(BASE + CONFIG_REG_W);
195 	printf("%s\n", i & CR_AUI_SELECT ? "AUI" : "UTP");
196 
197 	if (sc->pccard_enaddr)
198 		for (j = 0; j < 3; j++) {
199 			u_short	w;
200 
201 			w = (u_short)sc->arpcom.ac_enaddr[j * 2] |
202 				(((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8);
203 			outw(BASE + IAR_ADDR0_REG_W + j * 2, w);
204 		}
205 
206 	/*
207 	 * Read the station address from the chip. The MAC address is bank 1,
208 	 * regs 4 - 9
209 	 */
210 	SMC_SELECT_BANK(1);
211 	p = (u_char *) & sc->arpcom.ac_enaddr;
212 	for (i = 0; i < 6; i += 2) {
213 		address = inw(BASE + IAR_ADDR0_REG_W + i);
214 		p[i + 1] = address >> 8;
215 		p[i] = address & 0xFF;
216 	}
217 	ifp->if_softc = sc;
218 	if_initname(ifp, "sn", device_get_unit(dev));
219 	ifp->if_mtu = ETHERMTU;
220 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
221 	ifp->if_start = snstart;
222 	ifp->if_ioctl = snioctl;
223 	ifp->if_watchdog = snwatchdog;
224 	ifp->if_init = sninit;
225 	ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
226 	ifp->if_timer = 0;
227 
228 	ether_ifattach(ifp, sc->arpcom.ac_enaddr);
229 
230 	/*
231 	 * Fill the hardware address into ifa_addr if we find an AF_LINK
232 	 * entry. We need to do this so bpf's can get the hardware addr of
233 	 * this card. netstat likes this too!
234 	 */
235 	ifa = TAILQ_FIRST(&ifp->if_addrhead);
236 	while ((ifa != 0) && (ifa->ifa_addr != 0) &&
237 	       (ifa->ifa_addr->sa_family != AF_LINK))
238 		ifa = TAILQ_NEXT(ifa, ifa_link);
239 
240 	if ((ifa != 0) && (ifa->ifa_addr != 0)) {
241 		sdl = (struct sockaddr_dl *) ifa->ifa_addr;
242 		sdl->sdl_type = IFT_ETHER;
243 		sdl->sdl_alen = ETHER_ADDR_LEN;
244 		sdl->sdl_slen = 0;
245 		bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN);
246 	}
247 
248 	return 0;
249 }
250 
251 
252 /*
253  * Reset and initialize the chip
254  */
255 void
256 sninit(void *xsc)
257 {
258 	struct sn_softc *sc = xsc;
259 	struct ifnet *ifp = &sc->arpcom.ac_if;
260 	int             s;
261 	int             flags;
262 	int             mask;
263 
264 	s = splimp();
265 
266 	/*
267 	 * This resets the registers mostly to defaults, but doesn't affect
268 	 * EEPROM.  After the reset cycle, we pause briefly for the chip to
269 	 * be happy.
270 	 */
271 	SMC_SELECT_BANK(0);
272 	outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET);
273 	SMC_DELAY();
274 	outw(BASE + RECV_CONTROL_REG_W, 0x0000);
275 	SMC_DELAY();
276 	SMC_DELAY();
277 
278 	outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
279 
280 	/*
281 	 * Set the control register to automatically release succesfully
282 	 * transmitted packets (making the best use out of our limited
283 	 * memory) and to enable the EPH interrupt on certain TX errors.
284 	 */
285 	SMC_SELECT_BANK(1);
286 	outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |
287 				    CTR_CR_ENABLE | CTR_LE_ENABLE));
288 
289 	/* Set squelch level to 240mV (default 480mV) */
290 	flags = inw(BASE + CONFIG_REG_W);
291 	flags |= CR_SET_SQLCH;
292 	outw(BASE + CONFIG_REG_W, flags);
293 
294 	/*
295 	 * Reset the MMU and wait for it to be un-busy.
296 	 */
297 	SMC_SELECT_BANK(2);
298 	outw(BASE + MMU_CMD_REG_W, MMUCR_RESET);
299 	while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
300 		;
301 
302 	/*
303 	 * Disable all interrupts
304 	 */
305 	outb(BASE + INTR_MASK_REG_B, 0x00);
306 
307 	sn_setmcast(sc);
308 
309 	/*
310 	 * Set the transmitter control.  We want it enabled.
311 	 */
312 	flags = TCR_ENABLE;
313 
314 #ifndef SW_PAD
315 	/*
316 	 * I (GB) have been unlucky getting this to work.
317 	 */
318 	flags |= TCR_PAD_ENABLE;
319 #endif	/* SW_PAD */
320 
321 	outw(BASE + TXMIT_CONTROL_REG_W, flags);
322 
323 
324 	/*
325 	 * Now, enable interrupts
326 	 */
327 	SMC_SELECT_BANK(2);
328 
329 	mask = IM_EPH_INT |
330 		IM_RX_OVRN_INT |
331 		IM_RCV_INT |
332 		IM_TX_INT;
333 
334 	outb(BASE + INTR_MASK_REG_B, mask);
335 	sc->intr_mask = mask;
336 	sc->pages_wanted = -1;
337 
338 
339 	/*
340 	 * Mark the interface running but not active.
341 	 */
342 	ifp->if_flags |= IFF_RUNNING;
343 	ifp->if_flags &= ~IFF_OACTIVE;
344 
345 	/*
346 	 * Attempt to push out any waiting packets.
347 	 */
348 	snstart(ifp);
349 
350 	splx(s);
351 }
352 
353 
354 void
355 snstart(struct ifnet *ifp)
356 {
357 	struct sn_softc *sc = ifp->if_softc;
358 	u_int  len;
359 	struct mbuf *m;
360 	struct mbuf    *top;
361 	int             s, pad;
362 	int             mask;
363 	u_short         length;
364 	u_short         numPages;
365 	u_char          packet_no;
366 	int             time_out;
367 
368 	s = splimp();
369 
370 	if (sc->arpcom.ac_if.if_flags & IFF_OACTIVE) {
371 		splx(s);
372 		return;
373 	}
374 	if (sc->pages_wanted != -1) {
375 		splx(s);
376 		printf("%s: snstart() while memory allocation pending\n",
377 		       ifp->if_xname);
378 		return;
379 	}
380 startagain:
381 
382 	/*
383 	 * Sneak a peek at the next packet
384 	 */
385 	m = sc->arpcom.ac_if.if_snd.ifq_head;
386 	if (m == 0) {
387 		splx(s);
388 		return;
389 	}
390 	/*
391 	 * Compute the frame length and set pad to give an overall even
392 	 * number of bytes.  Below we assume that the packet length is even.
393 	 */
394 	for (len = 0, top = m; m; m = m->m_next)
395 		len += m->m_len;
396 
397 	pad = (len & 1);
398 
399 	/*
400 	 * We drop packets that are too large. Perhaps we should truncate
401 	 * them instead?
402 	 */
403 	if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
404 		printf("%s: large packet discarded (A)\n", ifp->if_xname);
405 		++sc->arpcom.ac_if.if_oerrors;
406 		IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
407 		m_freem(m);
408 		goto readcheck;
409 	}
410 #ifdef SW_PAD
411 
412 	/*
413 	 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
414 	 */
415 	if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
416 		pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
417 
418 #endif	/* SW_PAD */
419 
420 	length = pad + len;
421 
422 	/*
423 	 * The MMU wants the number of pages to be the number of 256 byte
424 	 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
425 	 * include space for the status word, byte count and control bytes in
426 	 * the allocation request.
427 	 */
428 	numPages = (length + 6) >> 8;
429 
430 
431 	/*
432 	 * Now, try to allocate the memory
433 	 */
434 	SMC_SELECT_BANK(2);
435 	outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages);
436 
437 	/*
438 	 * Wait a short amount of time to see if the allocation request
439 	 * completes.  Otherwise, I enable the interrupt and wait for
440 	 * completion asyncronously.
441 	 */
442 
443 	time_out = MEMORY_WAIT_TIME;
444 	do {
445 		if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT)
446 			break;
447 	} while (--time_out);
448 
449 	if (!time_out) {
450 
451 		/*
452 		 * No memory now.  Oh well, wait until the chip finds memory
453 		 * later.   Remember how many pages we were asking for and
454 		 * enable the allocation completion interrupt. Also set a
455 		 * watchdog in case  we miss the interrupt. We mark the
456 		 * interface active since there is no point in attempting an
457 		 * snstart() until after the memory is available.
458 		 */
459 		mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT;
460 		outb(BASE + INTR_MASK_REG_B, mask);
461 		sc->intr_mask = mask;
462 
463 		sc->arpcom.ac_if.if_timer = 1;
464 		sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
465 		sc->pages_wanted = numPages;
466 
467 		splx(s);
468 		return;
469 	}
470 	/*
471 	 * The memory allocation completed.  Check the results.
472 	 */
473 	packet_no = inb(BASE + ALLOC_RESULT_REG_B);
474 	if (packet_no & ARR_FAILED) {
475 		printf("%s: Memory allocation failed\n", ifp->if_xname);
476 		goto startagain;
477 	}
478 	/*
479 	 * We have a packet number, so tell the card to use it.
480 	 */
481 	outb(BASE + PACKET_NUM_REG_B, packet_no);
482 
483 	/*
484 	 * Point to the beginning of the packet
485 	 */
486 	outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
487 
488 	/*
489 	 * Send the packet length (+6 for status, length and control byte)
490 	 * and the status word (set to zeros)
491 	 */
492 	outw(BASE + DATA_REG_W, 0);
493 	outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
494 	outb(BASE + DATA_REG_B, (length + 6) >> 8);
495 
496 	/*
497 	 * Get the packet from the kernel.  This will include the Ethernet
498 	 * frame header, MAC Addresses etc.
499 	 */
500 	IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
501 
502 	/*
503 	 * Push out the data to the card.
504 	 */
505 	for (top = m; m != 0; m = m->m_next) {
506 
507 		/*
508 		 * Push out words.
509 		 */
510 		outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
511 
512 		/*
513 		 * Push out remaining byte.
514 		 */
515 		if (m->m_len & 1)
516 			outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
517 	}
518 
519 	/*
520 	 * Push out padding.
521 	 */
522 	while (pad > 1) {
523 		outw(BASE + DATA_REG_W, 0);
524 		pad -= 2;
525 	}
526 	if (pad)
527 		outb(BASE + DATA_REG_B, 0);
528 
529 	/*
530 	 * Push out control byte and unused packet byte The control byte is 0
531 	 * meaning the packet is even lengthed and no special CRC handling is
532 	 * desired.
533 	 */
534 	outw(BASE + DATA_REG_W, 0);
535 
536 	/*
537 	 * Enable the interrupts and let the chipset deal with it Also set a
538 	 * watchdog in case we miss the interrupt.
539 	 */
540 	mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
541 	outb(BASE + INTR_MASK_REG_B, mask);
542 	sc->intr_mask = mask;
543 
544 	outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
545 
546 	sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
547 	sc->arpcom.ac_if.if_timer = 1;
548 
549 	BPF_MTAP(ifp, top);
550 
551 	sc->arpcom.ac_if.if_opackets++;
552 	m_freem(top);
553 
554 
555 readcheck:
556 
557 	/*
558 	 * Is another packet coming in?  We don't want to overflow the tiny
559 	 * RX FIFO.  If nothing has arrived then attempt to queue another
560 	 * transmit packet.
561 	 */
562 	if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY)
563 		goto startagain;
564 
565 	splx(s);
566 	return;
567 }
568 
569 
570 
571 /* Resume a packet transmit operation after a memory allocation
572  * has completed.
573  *
574  * This is basically a hacked up copy of snstart() which handles
575  * a completed memory allocation the same way snstart() does.
576  * It then passes control to snstart to handle any other queued
577  * packets.
578  */
579 static void
580 snresume(struct ifnet *ifp)
581 {
582 	struct sn_softc *sc = ifp->if_softc;
583 	u_int  len;
584 	struct mbuf *m;
585 	struct mbuf    *top;
586 	int             pad;
587 	int             mask;
588 	u_short         length;
589 	u_short         numPages;
590 	u_short         pages_wanted;
591 	u_char          packet_no;
592 
593 	if (sc->pages_wanted < 0)
594 		return;
595 
596 	pages_wanted = sc->pages_wanted;
597 	sc->pages_wanted = -1;
598 
599 	/*
600 	 * Sneak a peek at the next packet
601 	 */
602 	m = sc->arpcom.ac_if.if_snd.ifq_head;
603 	if (m == 0) {
604 		printf("%s: snresume() with nothing to send\n", ifp->if_xname);
605 		return;
606 	}
607 	/*
608 	 * Compute the frame length and set pad to give an overall even
609 	 * number of bytes.  Below we assume that the packet length is even.
610 	 */
611 	for (len = 0, top = m; m; m = m->m_next)
612 		len += m->m_len;
613 
614 	pad = (len & 1);
615 
616 	/*
617 	 * We drop packets that are too large. Perhaps we should truncate
618 	 * them instead?
619 	 */
620 	if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) {
621 		printf("%s: large packet discarded (B)\n", ifp->if_xname);
622 		++sc->arpcom.ac_if.if_oerrors;
623 		IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
624 		m_freem(m);
625 		return;
626 	}
627 #ifdef SW_PAD
628 
629 	/*
630 	 * If HW padding is not turned on, then pad to ETHER_MIN_LEN.
631 	 */
632 	if (len < ETHER_MIN_LEN - ETHER_CRC_LEN)
633 		pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
634 
635 #endif	/* SW_PAD */
636 
637 	length = pad + len;
638 
639 
640 	/*
641 	 * The MMU wants the number of pages to be the number of 256 byte
642 	 * 'pages', minus 1 (A packet can't ever have 0 pages. We also
643 	 * include space for the status word, byte count and control bytes in
644 	 * the allocation request.
645 	 */
646 	numPages = (length + 6) >> 8;
647 
648 
649 	SMC_SELECT_BANK(2);
650 
651 	/*
652 	 * The memory allocation completed.  Check the results. If it failed,
653 	 * we simply set a watchdog timer and hope for the best.
654 	 */
655 	packet_no = inb(BASE + ALLOC_RESULT_REG_B);
656 	if (packet_no & ARR_FAILED) {
657 		printf("%s: Memory allocation failed.  Weird.\n", ifp->if_xname);
658 		sc->arpcom.ac_if.if_timer = 1;
659 		goto try_start;
660 	}
661 	/*
662 	 * We have a packet number, so tell the card to use it.
663 	 */
664 	outb(BASE + PACKET_NUM_REG_B, packet_no);
665 
666 	/*
667 	 * Now, numPages should match the pages_wanted recorded when the
668 	 * memory allocation was initiated.
669 	 */
670 	if (pages_wanted != numPages) {
671 		printf("%s: memory allocation wrong size.  Weird.\n", ifp->if_xname);
672 		/*
673 		 * If the allocation was the wrong size we simply release the
674 		 * memory once it is granted. Wait for the MMU to be un-busy.
675 		 */
676 		while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
677 			;
678 		outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
679 
680 		return;
681 	}
682 	/*
683 	 * Point to the beginning of the packet
684 	 */
685 	outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000);
686 
687 	/*
688 	 * Send the packet length (+6 for status, length and control byte)
689 	 * and the status word (set to zeros)
690 	 */
691 	outw(BASE + DATA_REG_W, 0);
692 	outb(BASE + DATA_REG_B, (length + 6) & 0xFF);
693 	outb(BASE + DATA_REG_B, (length + 6) >> 8);
694 
695 	/*
696 	 * Get the packet from the kernel.  This will include the Ethernet
697 	 * frame header, MAC Addresses etc.
698 	 */
699 	IF_DEQUEUE(&sc->arpcom.ac_if.if_snd, m);
700 
701 	/*
702 	 * Push out the data to the card.
703 	 */
704 	for (top = m; m != 0; m = m->m_next) {
705 
706 		/*
707 		 * Push out words.
708 		 */
709 		outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2);
710 
711 		/*
712 		 * Push out remaining byte.
713 		 */
714 		if (m->m_len & 1)
715 			outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1));
716 	}
717 
718 	/*
719 	 * Push out padding.
720 	 */
721 	while (pad > 1) {
722 		outw(BASE + DATA_REG_W, 0);
723 		pad -= 2;
724 	}
725 	if (pad)
726 		outb(BASE + DATA_REG_B, 0);
727 
728 	/*
729 	 * Push out control byte and unused packet byte The control byte is 0
730 	 * meaning the packet is even lengthed and no special CRC handling is
731 	 * desired.
732 	 */
733 	outw(BASE + DATA_REG_W, 0);
734 
735 	/*
736 	 * Enable the interrupts and let the chipset deal with it Also set a
737 	 * watchdog in case we miss the interrupt.
738 	 */
739 	mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT);
740 	outb(BASE + INTR_MASK_REG_B, mask);
741 	sc->intr_mask = mask;
742 	outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE);
743 
744 	BPF_MTAP(ifp, top);
745 
746 	sc->arpcom.ac_if.if_opackets++;
747 	m_freem(top);
748 
749 try_start:
750 
751 	/*
752 	 * Now pass control to snstart() to queue any additional packets
753 	 */
754 	sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
755 	snstart(ifp);
756 
757 	/*
758 	 * We've sent something, so we're active.  Set a watchdog in case the
759 	 * TX_EMPTY interrupt is lost.
760 	 */
761 	sc->arpcom.ac_if.if_flags |= IFF_OACTIVE;
762 	sc->arpcom.ac_if.if_timer = 1;
763 
764 	return;
765 }
766 
767 
768 void
769 sn_intr(void *arg)
770 {
771 	int             status, interrupts;
772 	struct sn_softc *sc = (struct sn_softc *) arg;
773 	struct ifnet   *ifp = &sc->arpcom.ac_if;
774 	int             x;
775 
776 	/*
777 	 * Chip state registers
778 	 */
779 	u_char          mask;
780 	u_char          packet_no;
781 	u_short         tx_status;
782 	u_short         card_stats;
783 
784 	/*
785 	 * if_ep.c did this, so I do too.  Yet if_ed.c doesn't. I wonder...
786 	 */
787 	x = splbio();
788 
789 	/*
790 	 * Clear the watchdog.
791 	 */
792 	ifp->if_timer = 0;
793 
794 	SMC_SELECT_BANK(2);
795 
796 	/*
797 	 * Obtain the current interrupt mask and clear the hardware mask
798 	 * while servicing interrupts.
799 	 */
800 	mask = inb(BASE + INTR_MASK_REG_B);
801 	outb(BASE + INTR_MASK_REG_B, 0x00);
802 
803 	/*
804 	 * Get the set of interrupts which occurred and eliminate any which
805 	 * are masked.
806 	 */
807 	interrupts = inb(BASE + INTR_STAT_REG_B);
808 	status = interrupts & mask;
809 
810 	/*
811 	 * Now, process each of the interrupt types.
812 	 */
813 
814 	/*
815 	 * Receive Overrun.
816 	 */
817 	if (status & IM_RX_OVRN_INT) {
818 
819 		/*
820 		 * Acknowlege Interrupt
821 		 */
822 		SMC_SELECT_BANK(2);
823 		outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT);
824 
825 		++sc->arpcom.ac_if.if_ierrors;
826 	}
827 	/*
828 	 * Got a packet.
829 	 */
830 	if (status & IM_RCV_INT) {
831 #if 1
832 		int             packet_number;
833 
834 		SMC_SELECT_BANK(2);
835 		packet_number = inw(BASE + FIFO_PORTS_REG_W);
836 
837 		if (packet_number & FIFO_REMPTY) {
838 
839 			/*
840 			 * we got called , but nothing was on the FIFO
841 			 */
842 			printf("sn: Receive interrupt with nothing on FIFO\n");
843 
844 			goto out;
845 		}
846 #endif
847 		snread(ifp);
848 	}
849 	/*
850 	 * An on-card memory allocation came through.
851 	 */
852 	if (status & IM_ALLOC_INT) {
853 
854 		/*
855 		 * Disable this interrupt.
856 		 */
857 		mask &= ~IM_ALLOC_INT;
858 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
859 		snresume(&sc->arpcom.ac_if);
860 	}
861 	/*
862 	 * TX Completion.  Handle a transmit error message. This will only be
863 	 * called when there is an error, because of the AUTO_RELEASE mode.
864 	 */
865 	if (status & IM_TX_INT) {
866 
867 		/*
868 		 * Acknowlege Interrupt
869 		 */
870 		SMC_SELECT_BANK(2);
871 		outb(BASE + INTR_ACK_REG_B, IM_TX_INT);
872 
873 		packet_no = inw(BASE + FIFO_PORTS_REG_W);
874 		packet_no &= FIFO_TX_MASK;
875 
876 		/*
877 		 * select this as the packet to read from
878 		 */
879 		outb(BASE + PACKET_NUM_REG_B, packet_no);
880 
881 		/*
882 		 * Position the pointer to the first word from this packet
883 		 */
884 		outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);
885 
886 		/*
887 		 * Fetch the TX status word.  The value found here will be a
888 		 * copy of the EPH_STATUS_REG_W at the time the transmit
889 		 * failed.
890 		 */
891 		tx_status = inw(BASE + DATA_REG_W);
892 
893 		if (tx_status & EPHSR_TX_SUC) {
894 			device_printf(sc->dev,
895 			    "Successful packet caused interrupt\n");
896 		} else {
897 			++sc->arpcom.ac_if.if_oerrors;
898 		}
899 
900 		if (tx_status & EPHSR_LATCOL)
901 			++sc->arpcom.ac_if.if_collisions;
902 
903 		/*
904 		 * Some of these errors will have disabled transmit.
905 		 * Re-enable transmit now.
906 		 */
907 		SMC_SELECT_BANK(0);
908 
909 #ifdef SW_PAD
910 		outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE);
911 #else
912 		outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);
913 #endif	/* SW_PAD */
914 
915 		/*
916 		 * kill the failed packet. Wait for the MMU to be un-busy.
917 		 */
918 		SMC_SELECT_BANK(2);
919 		while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
920 			;
921 		outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT);
922 
923 		/*
924 		 * Attempt to queue more transmits.
925 		 */
926 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
927 		snstart(&sc->arpcom.ac_if);
928 	}
929 	/*
930 	 * Transmit underrun.  We use this opportunity to update transmit
931 	 * statistics from the card.
932 	 */
933 	if (status & IM_TX_EMPTY_INT) {
934 
935 		/*
936 		 * Acknowlege Interrupt
937 		 */
938 		SMC_SELECT_BANK(2);
939 		outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT);
940 
941 		/*
942 		 * Disable this interrupt.
943 		 */
944 		mask &= ~IM_TX_EMPTY_INT;
945 
946 		SMC_SELECT_BANK(0);
947 		card_stats = inw(BASE + COUNTER_REG_W);
948 
949 		/*
950 		 * Single collisions
951 		 */
952 		sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK;
953 
954 		/*
955 		 * Multiple collisions
956 		 */
957 		sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
958 
959 		SMC_SELECT_BANK(2);
960 
961 		/*
962 		 * Attempt to enqueue some more stuff.
963 		 */
964 		sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
965 		snstart(&sc->arpcom.ac_if);
966 	}
967 	/*
968 	 * Some other error.  Try to fix it by resetting the adapter.
969 	 */
970 	if (status & IM_EPH_INT) {
971 		snstop(sc);
972 		sninit(sc);
973 	}
974 
975 out:
976 	/*
977 	 * Handled all interrupt sources.
978 	 */
979 
980 	SMC_SELECT_BANK(2);
981 
982 	/*
983 	 * Reestablish interrupts from mask which have not been deselected
984 	 * during this interrupt.  Note that the hardware mask, which was set
985 	 * to 0x00 at the start of this service routine, may have been
986 	 * updated by one or more of the interrupt handers and we must let
987 	 * those new interrupts stay enabled here.
988 	 */
989 	mask |= inb(BASE + INTR_MASK_REG_B);
990 	outb(BASE + INTR_MASK_REG_B, mask);
991 	sc->intr_mask = mask;
992 
993 	splx(x);
994 }
995 
996 void
997 snread(struct ifnet *ifp)
998 {
999         struct sn_softc *sc = ifp->if_softc;
1000 	struct mbuf    *m;
1001 	short           status;
1002 	int             packet_number;
1003 	u_short         packet_length;
1004 	u_char         *data;
1005 
1006 	SMC_SELECT_BANK(2);
1007 #if 0
1008 	packet_number = inw(BASE + FIFO_PORTS_REG_W);
1009 
1010 	if (packet_number & FIFO_REMPTY) {
1011 
1012 		/*
1013 		 * we got called , but nothing was on the FIFO
1014 		 */
1015 		printf("sn: Receive interrupt with nothing on FIFO\n");
1016 		return;
1017 	}
1018 #endif
1019 read_another:
1020 
1021 	/*
1022 	 * Start reading from the start of the packet. Since PTR_RCV is set,
1023 	 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK.
1024 	 */
1025 	outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);
1026 
1027 	/*
1028 	 * First two words are status and packet_length
1029 	 */
1030 	status = inw(BASE + DATA_REG_W);
1031 	packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK;
1032 
1033 	/*
1034 	 * The packet length contains 3 extra words: status, length, and a
1035 	 * extra word with the control byte.
1036 	 */
1037 	packet_length -= 6;
1038 
1039 	/*
1040 	 * Account for receive errors and discard.
1041 	 */
1042 	if (status & RS_ERRORS) {
1043 		++ifp->if_ierrors;
1044 		goto out;
1045 	}
1046 	/*
1047 	 * A packet is received.
1048 	 */
1049 
1050 	/*
1051 	 * Adjust for odd-length packet.
1052 	 */
1053 	if (status & RS_ODDFRAME)
1054 		packet_length++;
1055 
1056 	/*
1057 	 * Allocate a header mbuf from the kernel.
1058 	 */
1059 	MGETHDR(m, MB_DONTWAIT, MT_DATA);
1060 	if (m == NULL)
1061 		goto out;
1062 
1063 	m->m_pkthdr.rcvif = ifp;
1064 	m->m_pkthdr.len = m->m_len = packet_length;
1065 
1066 	/*
1067 	 * Attach an mbuf cluster
1068 	 */
1069 	MCLGET(m, MB_DONTWAIT);
1070 
1071 	/*
1072 	 * Insist on getting a cluster
1073 	 */
1074 	if ((m->m_flags & M_EXT) == 0) {
1075 		m_freem(m);
1076 		++ifp->if_ierrors;
1077 		printf("sn: snread() kernel memory allocation problem\n");
1078 		goto out;
1079 	}
1080 
1081 	/*
1082 	 * Get packet, including link layer address, from interface.
1083 	 */
1084 
1085 	data = mtod(m, u_char *);
1086 	insw(BASE + DATA_REG_W, data, packet_length >> 1);
1087 	if (packet_length & 1) {
1088 		data += packet_length & ~1;
1089 		*data = inb(BASE + DATA_REG_B);
1090 	}
1091 	++ifp->if_ipackets;
1092 
1093 	m->m_pkthdr.len = m->m_len = packet_length;
1094 
1095 	(*ifp->if_input)(ifp, m);
1096 
1097 out:
1098 
1099 	/*
1100 	 * Error or good, tell the card to get rid of this packet Wait for
1101 	 * the MMU to be un-busy.
1102 	 */
1103 	SMC_SELECT_BANK(2);
1104 	while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY)	/* NOTHING */
1105 		;
1106 	outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE);
1107 
1108 	/*
1109 	 * Check whether another packet is ready
1110 	 */
1111 	packet_number = inw(BASE + FIFO_PORTS_REG_W);
1112 	if (packet_number & FIFO_REMPTY) {
1113 		return;
1114 	}
1115 	goto read_another;
1116 }
1117 
1118 
1119 /*
1120  * Handle IOCTLS.  This function is completely stolen from if_ep.c
1121  * As with its progenitor, it does not handle hardware address
1122  * changes.
1123  */
1124 static int
1125 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
1126 {
1127 	struct sn_softc *sc = ifp->if_softc;
1128 	int             s, error = 0;
1129 
1130 	s = splimp();
1131 
1132 	switch (cmd) {
1133 	case SIOCSIFADDR:
1134 	case SIOCGIFADDR:
1135 	case SIOCSIFMTU:
1136 		error = ether_ioctl(ifp, cmd, data);
1137 		break;
1138 
1139 	case SIOCSIFFLAGS:
1140 		if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) {
1141 			ifp->if_flags &= ~IFF_RUNNING;
1142 			snstop(sc);
1143 			break;
1144 		} else {
1145 			/* reinitialize card on any parameter change */
1146 			sninit(sc);
1147 			break;
1148 		}
1149 		break;
1150 
1151 #ifdef notdef
1152 	case SIOCGHWADDR:
1153 		bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data,
1154 		      sizeof(sc->sc_addr));
1155 		break;
1156 #endif
1157 
1158 	case SIOCADDMULTI:
1159 	    /* update multicast filter list. */
1160 	    sn_setmcast(sc);
1161 	    error = 0;
1162 	    break;
1163 	case SIOCDELMULTI:
1164 	    /* update multicast filter list. */
1165 	    sn_setmcast(sc);
1166 	    error = 0;
1167 	    break;
1168 	default:
1169 		error = EINVAL;
1170 	}
1171 
1172 	splx(s);
1173 
1174 	return (error);
1175 }
1176 
1177 void
1178 snreset(struct sn_softc *sc)
1179 {
1180 	int	s;
1181 
1182 	s = splimp();
1183 	snstop(sc);
1184 	sninit(sc);
1185 
1186 	splx(s);
1187 }
1188 
1189 void
1190 snwatchdog(struct ifnet *ifp)
1191 {
1192 	int	s;
1193 	s = splimp();
1194 	sn_intr(ifp->if_softc);
1195 	splx(s);
1196 }
1197 
1198 
1199 /* 1. zero the interrupt mask
1200  * 2. clear the enable receive flag
1201  * 3. clear the enable xmit flags
1202  */
1203 void
1204 snstop(struct sn_softc *sc)
1205 {
1206 
1207 	struct ifnet   *ifp = &sc->arpcom.ac_if;
1208 
1209 	/*
1210 	 * Clear interrupt mask; disable all interrupts.
1211 	 */
1212 	SMC_SELECT_BANK(2);
1213 	outb(BASE + INTR_MASK_REG_B, 0x00);
1214 
1215 	/*
1216 	 * Disable transmitter and Receiver
1217 	 */
1218 	SMC_SELECT_BANK(0);
1219 	outw(BASE + RECV_CONTROL_REG_W, 0x0000);
1220 	outw(BASE + TXMIT_CONTROL_REG_W, 0x0000);
1221 
1222 	/*
1223 	 * Cancel watchdog.
1224 	 */
1225 	ifp->if_timer = 0;
1226 }
1227 
1228 
1229 int
1230 sn_activate(device_t dev)
1231 {
1232 	struct sn_softc *sc = device_get_softc(dev);
1233 	int err;
1234 
1235 	sc->port_rid = 0;
1236 	sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
1237 	    0, ~0, SMC_IO_EXTENT, RF_ACTIVE);
1238 	if (!sc->port_res) {
1239 #ifdef SN_DEBUG
1240 		device_printf(dev, "Cannot allocate ioport\n");
1241 #endif
1242 		return ENOMEM;
1243 	}
1244 
1245 	sc->irq_rid = 0;
1246 	sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
1247 	    0, ~0, 1, RF_ACTIVE);
1248 	if (!sc->irq_res) {
1249 #ifdef SN_DEBUG
1250 		device_printf(dev, "Cannot allocate irq\n");
1251 #endif
1252 		sn_deactivate(dev);
1253 		return ENOMEM;
1254 	}
1255 	if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc,
1256 	    &sc->intrhand)) != 0) {
1257 		sn_deactivate(dev);
1258 		return err;
1259 	}
1260 
1261 	sc->sn_io_addr = rman_get_start(sc->port_res);
1262 	return (0);
1263 }
1264 
1265 void
1266 sn_deactivate(device_t dev)
1267 {
1268 	struct sn_softc *sc = device_get_softc(dev);
1269 
1270 	if (sc->intrhand)
1271 		bus_teardown_intr(dev, sc->irq_res, sc->intrhand);
1272 	sc->intrhand = 0;
1273 	if (sc->port_res)
1274 		bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid,
1275 		    sc->port_res);
1276 	sc->port_res = 0;
1277 	if (sc->irq_res)
1278 		bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid,
1279 		    sc->irq_res);
1280 	sc->irq_res = 0;
1281 	return;
1282 }
1283 
1284 /*
1285  * Function: sn_probe( device_t dev, int pccard )
1286  *
1287  * Purpose:
1288  *      Tests to see if a given ioaddr points to an SMC9xxx chip.
1289  *      Tries to cause as little damage as possible if it's not a SMC chip.
1290  *      Returns a 0 on success
1291  *
1292  * Algorithm:
1293  *      (1) see if the high byte of BANK_SELECT is 0x33
1294  *      (2) compare the ioaddr with the base register's address
1295  *      (3) see if I recognize the chip ID in the appropriate register
1296  *
1297  *
1298  */
1299 int
1300 sn_probe(device_t dev, int pccard)
1301 {
1302 	struct sn_softc *sc = device_get_softc(dev);
1303 	u_int           bank;
1304 	u_short         revision_register;
1305 	u_short         base_address_register;
1306 	u_short		ioaddr;
1307 	int		err;
1308 
1309 	if ((err = sn_activate(dev)) != 0)
1310 		return err;
1311 
1312 	ioaddr = sc->sn_io_addr;
1313 
1314 	/*
1315 	 * First, see if the high byte is 0x33
1316 	 */
1317 	bank = inw(ioaddr + BANK_SELECT_REG_W);
1318 	if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1319 #ifdef	SN_DEBUG
1320 		device_printf(dev, "test1 failed\n");
1321 #endif
1322 		goto error;
1323 	}
1324 	/*
1325 	 * The above MIGHT indicate a device, but I need to write to further
1326 	 * test this.  Go to bank 0, then test that the register still
1327 	 * reports the high byte is 0x33.
1328 	 */
1329 	outw(ioaddr + BANK_SELECT_REG_W, 0x0000);
1330 	bank = inw(ioaddr + BANK_SELECT_REG_W);
1331 	if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) {
1332 #ifdef	SN_DEBUG
1333 		device_printf(dev, "test2 failed\n");
1334 #endif
1335 		goto error;
1336 	}
1337 	/*
1338 	 * well, we've already written once, so hopefully another time won't
1339 	 * hurt.  This time, I need to switch the bank register to bank 1, so
1340 	 * I can access the base address register.  The contents of the
1341 	 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected
1342 	 * to match the I/O port address where the adapter is being probed.
1343 	 */
1344 	outw(ioaddr + BANK_SELECT_REG_W, 0x0001);
1345 	base_address_register = inw(ioaddr + BASE_ADDR_REG_W);
1346 
1347 	/*
1348 	 * This test is nonsence on PC-card architecture, so if
1349 	 * pccard == 1, skip this test. (hosokawa)
1350 	 */
1351 	if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) {
1352 
1353 		/*
1354 		 * Well, the base address register didn't match.  Must not
1355 		 * have been a SMC chip after all.
1356 		 */
1357 		/*
1358 		 * printf("sn: ioaddr %x doesn't match card configuration
1359 		 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 );
1360 		 */
1361 
1362 #ifdef	SN_DEBUG
1363 		device_printf(dev, "test3 failed ioaddr = 0x%x, "
1364 		    "base_address_register = 0x%x\n", ioaddr,
1365 		    base_address_register >> 3 & 0x3E0);
1366 #endif
1367 		goto error;
1368 	}
1369 	/*
1370 	 * Check if the revision register is something that I recognize.
1371 	 * These might need to be added to later, as future revisions could
1372 	 * be added.
1373 	 */
1374 	outw(ioaddr + BANK_SELECT_REG_W, 0x3);
1375 	revision_register = inw(ioaddr + REVISION_REG_W);
1376 	if (!chip_ids[(revision_register >> 4) & 0xF]) {
1377 
1378 		/*
1379 		 * I don't regonize this chip, so...
1380 		 */
1381 #ifdef	SN_DEBUG
1382 		device_printf(dev, "test4 failed\n");
1383 #endif
1384 		goto error;
1385 	}
1386 	/*
1387 	 * at this point I'll assume that the chip is an SMC9xxx. It might be
1388 	 * prudent to check a listing of MAC addresses against the hardware
1389 	 * address, or do some other tests.
1390 	 */
1391 	sn_deactivate(dev);
1392 	return 0;
1393  error:
1394 	sn_deactivate(dev);
1395 	return ENXIO;
1396 }
1397 
1398 #define MCFSZ 8
1399 
1400 static void
1401 sn_setmcast(struct sn_softc *sc)
1402 {
1403 	struct ifnet *ifp = (struct ifnet *)sc;
1404 	int flags;
1405 
1406 	/*
1407 	 * Set the receiver filter.  We want receive enabled and auto strip
1408 	 * of CRC from received packet.  If we are promiscuous then set that
1409 	 * bit too.
1410 	 */
1411 	flags = RCR_ENABLE | RCR_STRIP_CRC;
1412 
1413 	if (ifp->if_flags & IFF_PROMISC) {
1414 		flags |= RCR_PROMISC | RCR_ALMUL;
1415 	} else if (ifp->if_flags & IFF_ALLMULTI) {
1416 		flags |= RCR_ALMUL;
1417 	} else {
1418 		u_char mcf[MCFSZ];
1419 		if (sn_getmcf(&sc->arpcom, mcf)) {
1420 			/* set filter */
1421 			SMC_SELECT_BANK(3);
1422 			outw(BASE + MULTICAST1_REG_W,
1423 			    ((u_short)mcf[1] << 8) |  mcf[0]);
1424 			outw(BASE + MULTICAST2_REG_W,
1425 			    ((u_short)mcf[3] << 8) |  mcf[2]);
1426 			outw(BASE + MULTICAST3_REG_W,
1427 			    ((u_short)mcf[5] << 8) |  mcf[4]);
1428 			outw(BASE + MULTICAST4_REG_W,
1429 			    ((u_short)mcf[7] << 8) |  mcf[6]);
1430 		} else {
1431 			flags |= RCR_ALMUL;
1432 		}
1433 	}
1434 	SMC_SELECT_BANK(0);
1435 	outw(BASE + RECV_CONTROL_REG_W, flags);
1436 }
1437 
1438 static int
1439 sn_getmcf(struct arpcom *ac, u_char *mcf)
1440 {
1441 	int i;
1442 	u_int index, index2;
1443 	u_char *af = (u_char *) mcf;
1444 	struct ifmultiaddr *ifma;
1445 
1446 	bzero(mcf, MCFSZ);
1447 
1448 	for (ifma = ac->ac_if.if_multiaddrs.lh_first; ifma;
1449 	     ifma = ifma->ifma_link.le_next) {
1450 	    if (ifma->ifma_addr->sa_family != AF_LINK)
1451 		return 0;
1452 	    index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f;
1453 	    index2 = 0;
1454 	    for (i = 0; i < 6; i++) {
1455 		index2 <<= 1;
1456 		index2 |= (index & 0x01);
1457 		index >>= 1;
1458 	    }
1459 	    af[index2 >> 3] |= 1 << (index2 & 7);
1460 	}
1461 	return 1;  /* use multicast filter */
1462 }
1463 
1464 static u_int
1465 smc_crc(u_char *s)
1466 {
1467 	int perByte;
1468 	int perBit;
1469 	const u_int poly = 0xedb88320;
1470 	u_int v = 0xffffffff;
1471 	u_char c;
1472 
1473 	for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) {
1474 		c = s[perByte];
1475 		for (perBit = 0; perBit < 8; perBit++) {
1476 			v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0);
1477 			c >>= 1;
1478 		}
1479 	}
1480 	return v;
1481 }
1482