1 /* 2 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed by Gardner Buchanan. 16 * 4. The name of Gardner Buchanan may not be used to endorse or promote 17 * products derived from this software without specific prior written 18 * permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $FreeBSD: src/sys/dev/sn/if_sn.c,v 1.7.2.3 2001/02/04 04:38:38 toshi Exp $ 32 * $DragonFly: src/sys/dev/netif/sn/if_sn.c,v 1.13 2005/02/20 05:45:11 joerg Exp $ 33 */ 34 35 /* 36 * This is a driver for SMC's 9000 series of Ethernet adapters. 37 * 38 * This FreeBSD driver is derived from the smc9194 Linux driver by 39 * Erik Stahlman and is Copyright (C) 1996 by Erik Stahlman. 40 * This driver also shamelessly borrows from the FreeBSD ep driver 41 * which is Copyright (C) 1994 Herb Peyerl <hpeyerl@novatel.ca> 42 * All rights reserved. 43 * 44 * It is set up for my SMC91C92 equipped Ampro LittleBoard embedded 45 * PC. It is adapted from Erik Stahlman's Linux driver which worked 46 * with his EFA Info*Express SVC VLB adaptor. According to SMC's databook, 47 * it will work for the entire SMC 9xxx series. (Ha Ha) 48 * 49 * "Features" of the SMC chip: 50 * 4608 byte packet memory. (for the 91C92. Others have more) 51 * EEPROM for configuration 52 * AUI/TP selection 53 * 54 * Authors: 55 * Erik Stahlman erik@vt.edu 56 * Herb Peyerl hpeyerl@novatel.ca 57 * Andres Vega Garcia avega@sophia.inria.fr 58 * Serge Babkin babkin@hq.icb.chel.su 59 * Gardner Buchanan gbuchanan@shl.com 60 * 61 * Sources: 62 * o SMC databook 63 * o "smc9194.c:v0.10(FIXED) 02/15/96 by Erik Stahlman (erik@vt.edu)" 64 * o "if_ep.c,v 1.19 1995/01/24 20:53:45 davidg Exp" 65 * 66 * Known Bugs: 67 * o The hardware multicast filter isn't used yet. 68 * o Setting of the hardware address isn't supported. 69 * o Hardware padding isn't used. 70 */ 71 72 /* 73 * Modifications for Megahertz X-Jack Ethernet Card (XJ-10BT) 74 * 75 * Copyright (c) 1996 by Tatsumi Hosokawa <hosokawa@jp.FreeBSD.org> 76 * BSD-nomads, Tokyo, Japan. 77 */ 78 /* 79 * Multicast support by Kei TANAKA <kei@pal.xerox.com> 80 * Special thanks to itojun@itojun.org 81 */ 82 83 #undef SN_DEBUG /* (by hosokawa) */ 84 85 #include <sys/param.h> 86 #include <sys/systm.h> 87 #include <sys/kernel.h> 88 #include <sys/errno.h> 89 #include <sys/sockio.h> 90 #include <sys/malloc.h> 91 #include <sys/mbuf.h> 92 #include <sys/socket.h> 93 #include <sys/syslog.h> 94 95 #include <sys/module.h> 96 #include <sys/bus.h> 97 98 #include <machine/bus.h> 99 #include <machine/resource.h> 100 #include <sys/rman.h> 101 102 #include <net/ethernet.h> 103 #include <net/if.h> 104 #include <net/ifq_var.h> 105 #include <net/if_arp.h> 106 #include <net/if_dl.h> 107 #include <net/if_types.h> 108 #include <net/if_mib.h> 109 110 #ifdef INET 111 #include <netinet/in.h> 112 #include <netinet/in_systm.h> 113 #include <netinet/in_var.h> 114 #include <netinet/ip.h> 115 #endif 116 117 #ifdef NS 118 #include <netns/ns.h> 119 #include <netns/ns_if.h> 120 #endif 121 122 #include <net/bpf.h> 123 #include <net/bpfdesc.h> 124 125 #include <machine/clock.h> 126 127 #include "if_snreg.h" 128 #include "if_snvar.h" 129 130 /* Exported variables */ 131 devclass_t sn_devclass; 132 133 static int snioctl(struct ifnet * ifp, u_long, caddr_t, struct ucred *); 134 135 static void snresume(struct ifnet *); 136 137 void sninit(void *); 138 void snread(struct ifnet *); 139 void snreset(struct sn_softc *); 140 void snstart(struct ifnet *); 141 void snstop(struct sn_softc *); 142 void snwatchdog(struct ifnet *); 143 144 static void sn_setmcast(struct sn_softc *); 145 static int sn_getmcf(struct arpcom *ac, u_char *mcf); 146 static u_int smc_crc(u_char *); 147 148 DECLARE_DUMMY_MODULE(if_sn); 149 150 /* I (GB) have been unlucky getting the hardware padding 151 * to work properly. 152 */ 153 #define SW_PAD 154 155 static const char *chip_ids[15] = { 156 NULL, NULL, NULL, 157 /* 3 */ "SMC91C90/91C92", 158 /* 4 */ "SMC91C94", 159 /* 5 */ "SMC91C95", 160 NULL, 161 /* 7 */ "SMC91C100", 162 /* 8 */ "SMC91C100FD", 163 NULL, NULL, NULL, 164 NULL, NULL, NULL 165 }; 166 167 int 168 sn_attach(device_t dev) 169 { 170 struct sn_softc *sc = device_get_softc(dev); 171 struct ifnet *ifp = &sc->arpcom.ac_if; 172 u_short i; 173 u_char *p; 174 struct ifaddr *ifa; 175 struct sockaddr_dl *sdl; 176 int rev; 177 u_short address; 178 int j; 179 180 sn_activate(dev); 181 182 snstop(sc); 183 184 sc->dev = dev; 185 sc->pages_wanted = -1; 186 187 device_printf(dev, " "); 188 189 SMC_SELECT_BANK(3); 190 rev = inw(BASE + REVISION_REG_W); 191 if (chip_ids[(rev >> 4) & 0xF]) 192 printf("%s ", chip_ids[(rev >> 4) & 0xF]); 193 194 SMC_SELECT_BANK(1); 195 i = inw(BASE + CONFIG_REG_W); 196 printf("%s\n", i & CR_AUI_SELECT ? "AUI" : "UTP"); 197 198 if (sc->pccard_enaddr) 199 for (j = 0; j < 3; j++) { 200 u_short w; 201 202 w = (u_short)sc->arpcom.ac_enaddr[j * 2] | 203 (((u_short)sc->arpcom.ac_enaddr[j * 2 + 1]) << 8); 204 outw(BASE + IAR_ADDR0_REG_W + j * 2, w); 205 } 206 207 /* 208 * Read the station address from the chip. The MAC address is bank 1, 209 * regs 4 - 9 210 */ 211 SMC_SELECT_BANK(1); 212 p = (u_char *) & sc->arpcom.ac_enaddr; 213 for (i = 0; i < 6; i += 2) { 214 address = inw(BASE + IAR_ADDR0_REG_W + i); 215 p[i + 1] = address >> 8; 216 p[i] = address & 0xFF; 217 } 218 ifp->if_softc = sc; 219 if_initname(ifp, "sn", device_get_unit(dev)); 220 ifp->if_mtu = ETHERMTU; 221 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 222 ifp->if_start = snstart; 223 ifp->if_ioctl = snioctl; 224 ifp->if_watchdog = snwatchdog; 225 ifp->if_init = sninit; 226 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN); 227 ifq_set_ready(&ifp->if_snd); 228 ifp->if_timer = 0; 229 230 ether_ifattach(ifp, sc->arpcom.ac_enaddr); 231 232 /* 233 * Fill the hardware address into ifa_addr if we find an AF_LINK 234 * entry. We need to do this so bpf's can get the hardware addr of 235 * this card. netstat likes this too! 236 */ 237 ifa = TAILQ_FIRST(&ifp->if_addrhead); 238 while ((ifa != 0) && (ifa->ifa_addr != 0) && 239 (ifa->ifa_addr->sa_family != AF_LINK)) 240 ifa = TAILQ_NEXT(ifa, ifa_link); 241 242 if ((ifa != 0) && (ifa->ifa_addr != 0)) { 243 sdl = (struct sockaddr_dl *) ifa->ifa_addr; 244 sdl->sdl_type = IFT_ETHER; 245 sdl->sdl_alen = ETHER_ADDR_LEN; 246 sdl->sdl_slen = 0; 247 bcopy(sc->arpcom.ac_enaddr, LLADDR(sdl), ETHER_ADDR_LEN); 248 } 249 250 return 0; 251 } 252 253 254 /* 255 * Reset and initialize the chip 256 */ 257 void 258 sninit(void *xsc) 259 { 260 struct sn_softc *sc = xsc; 261 struct ifnet *ifp = &sc->arpcom.ac_if; 262 int s; 263 int flags; 264 int mask; 265 266 s = splimp(); 267 268 /* 269 * This resets the registers mostly to defaults, but doesn't affect 270 * EEPROM. After the reset cycle, we pause briefly for the chip to 271 * be happy. 272 */ 273 SMC_SELECT_BANK(0); 274 outw(BASE + RECV_CONTROL_REG_W, RCR_SOFTRESET); 275 SMC_DELAY(); 276 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 277 SMC_DELAY(); 278 SMC_DELAY(); 279 280 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 281 282 /* 283 * Set the control register to automatically release succesfully 284 * transmitted packets (making the best use out of our limited 285 * memory) and to enable the EPH interrupt on certain TX errors. 286 */ 287 SMC_SELECT_BANK(1); 288 outw(BASE + CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE | 289 CTR_CR_ENABLE | CTR_LE_ENABLE)); 290 291 /* Set squelch level to 240mV (default 480mV) */ 292 flags = inw(BASE + CONFIG_REG_W); 293 flags |= CR_SET_SQLCH; 294 outw(BASE + CONFIG_REG_W, flags); 295 296 /* 297 * Reset the MMU and wait for it to be un-busy. 298 */ 299 SMC_SELECT_BANK(2); 300 outw(BASE + MMU_CMD_REG_W, MMUCR_RESET); 301 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 302 ; 303 304 /* 305 * Disable all interrupts 306 */ 307 outb(BASE + INTR_MASK_REG_B, 0x00); 308 309 sn_setmcast(sc); 310 311 /* 312 * Set the transmitter control. We want it enabled. 313 */ 314 flags = TCR_ENABLE; 315 316 #ifndef SW_PAD 317 /* 318 * I (GB) have been unlucky getting this to work. 319 */ 320 flags |= TCR_PAD_ENABLE; 321 #endif /* SW_PAD */ 322 323 outw(BASE + TXMIT_CONTROL_REG_W, flags); 324 325 326 /* 327 * Now, enable interrupts 328 */ 329 SMC_SELECT_BANK(2); 330 331 mask = IM_EPH_INT | 332 IM_RX_OVRN_INT | 333 IM_RCV_INT | 334 IM_TX_INT; 335 336 outb(BASE + INTR_MASK_REG_B, mask); 337 sc->intr_mask = mask; 338 sc->pages_wanted = -1; 339 340 341 /* 342 * Mark the interface running but not active. 343 */ 344 ifp->if_flags |= IFF_RUNNING; 345 ifp->if_flags &= ~IFF_OACTIVE; 346 347 /* 348 * Attempt to push out any waiting packets. 349 */ 350 snstart(ifp); 351 352 splx(s); 353 } 354 355 356 void 357 snstart(struct ifnet *ifp) 358 { 359 struct sn_softc *sc = ifp->if_softc; 360 u_int len; 361 struct mbuf *m; 362 struct mbuf *top; 363 int s, pad; 364 int mask; 365 u_short length; 366 u_short numPages; 367 u_char packet_no; 368 int time_out; 369 370 s = splimp(); 371 372 if (ifp->if_flags & IFF_OACTIVE) { 373 splx(s); 374 return; 375 } 376 if (sc->pages_wanted != -1) { 377 splx(s); 378 printf("%s: snstart() while memory allocation pending\n", 379 ifp->if_xname); 380 return; 381 } 382 startagain: 383 384 /* 385 * Sneak a peek at the next packet 386 */ 387 m = ifq_poll(&ifp->if_snd); 388 if (m == 0) { 389 splx(s); 390 return; 391 } 392 /* 393 * Compute the frame length and set pad to give an overall even 394 * number of bytes. Below we assume that the packet length is even. 395 */ 396 for (len = 0, top = m; m; m = m->m_next) 397 len += m->m_len; 398 399 pad = (len & 1); 400 401 /* 402 * We drop packets that are too large. Perhaps we should truncate 403 * them instead? 404 */ 405 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 406 printf("%s: large packet discarded (A)\n", ifp->if_xname); 407 ++sc->arpcom.ac_if.if_oerrors; 408 m = ifq_dequeue(&ifp->if_snd); 409 m_freem(m); 410 goto readcheck; 411 } 412 #ifdef SW_PAD 413 414 /* 415 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 416 */ 417 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 418 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 419 420 #endif /* SW_PAD */ 421 422 length = pad + len; 423 424 /* 425 * The MMU wants the number of pages to be the number of 256 byte 426 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 427 * include space for the status word, byte count and control bytes in 428 * the allocation request. 429 */ 430 numPages = (length + 6) >> 8; 431 432 433 /* 434 * Now, try to allocate the memory 435 */ 436 SMC_SELECT_BANK(2); 437 outw(BASE + MMU_CMD_REG_W, MMUCR_ALLOC | numPages); 438 439 /* 440 * Wait a short amount of time to see if the allocation request 441 * completes. Otherwise, I enable the interrupt and wait for 442 * completion asyncronously. 443 */ 444 445 time_out = MEMORY_WAIT_TIME; 446 do { 447 if (inb(BASE + INTR_STAT_REG_B) & IM_ALLOC_INT) 448 break; 449 } while (--time_out); 450 451 if (!time_out) { 452 453 /* 454 * No memory now. Oh well, wait until the chip finds memory 455 * later. Remember how many pages we were asking for and 456 * enable the allocation completion interrupt. Also set a 457 * watchdog in case we miss the interrupt. We mark the 458 * interface active since there is no point in attempting an 459 * snstart() until after the memory is available. 460 */ 461 mask = inb(BASE + INTR_MASK_REG_B) | IM_ALLOC_INT; 462 outb(BASE + INTR_MASK_REG_B, mask); 463 sc->intr_mask = mask; 464 465 ifp->if_timer = 1; 466 ifp->if_flags |= IFF_OACTIVE; 467 sc->pages_wanted = numPages; 468 469 splx(s); 470 return; 471 } 472 /* 473 * The memory allocation completed. Check the results. 474 */ 475 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 476 if (packet_no & ARR_FAILED) { 477 printf("%s: Memory allocation failed\n", ifp->if_xname); 478 goto startagain; 479 } 480 /* 481 * We have a packet number, so tell the card to use it. 482 */ 483 outb(BASE + PACKET_NUM_REG_B, packet_no); 484 485 /* 486 * Point to the beginning of the packet 487 */ 488 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 489 490 /* 491 * Send the packet length (+6 for status, length and control byte) 492 * and the status word (set to zeros) 493 */ 494 outw(BASE + DATA_REG_W, 0); 495 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 496 outb(BASE + DATA_REG_B, (length + 6) >> 8); 497 498 /* 499 * Get the packet from the kernel. This will include the Ethernet 500 * frame header, MAC Addresses etc. 501 */ 502 m = ifq_dequeue(&ifp->if_snd); 503 504 /* 505 * Push out the data to the card. 506 */ 507 for (top = m; m != 0; m = m->m_next) { 508 509 /* 510 * Push out words. 511 */ 512 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 513 514 /* 515 * Push out remaining byte. 516 */ 517 if (m->m_len & 1) 518 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 519 } 520 521 /* 522 * Push out padding. 523 */ 524 while (pad > 1) { 525 outw(BASE + DATA_REG_W, 0); 526 pad -= 2; 527 } 528 if (pad) 529 outb(BASE + DATA_REG_B, 0); 530 531 /* 532 * Push out control byte and unused packet byte The control byte is 0 533 * meaning the packet is even lengthed and no special CRC handling is 534 * desired. 535 */ 536 outw(BASE + DATA_REG_W, 0); 537 538 /* 539 * Enable the interrupts and let the chipset deal with it Also set a 540 * watchdog in case we miss the interrupt. 541 */ 542 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 543 outb(BASE + INTR_MASK_REG_B, mask); 544 sc->intr_mask = mask; 545 546 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 547 548 ifp->if_flags |= IFF_OACTIVE; 549 ifp->if_timer = 1; 550 551 BPF_MTAP(ifp, top); 552 553 ifp->if_opackets++; 554 m_freem(top); 555 556 readcheck: 557 558 /* 559 * Is another packet coming in? We don't want to overflow the tiny 560 * RX FIFO. If nothing has arrived then attempt to queue another 561 * transmit packet. 562 */ 563 if (inw(BASE + FIFO_PORTS_REG_W) & FIFO_REMPTY) 564 goto startagain; 565 566 splx(s); 567 return; 568 } 569 570 571 572 /* Resume a packet transmit operation after a memory allocation 573 * has completed. 574 * 575 * This is basically a hacked up copy of snstart() which handles 576 * a completed memory allocation the same way snstart() does. 577 * It then passes control to snstart to handle any other queued 578 * packets. 579 */ 580 static void 581 snresume(struct ifnet *ifp) 582 { 583 struct sn_softc *sc = ifp->if_softc; 584 u_int len; 585 struct mbuf *m; 586 struct mbuf *top; 587 int pad; 588 int mask; 589 u_short length; 590 u_short numPages; 591 u_short pages_wanted; 592 u_char packet_no; 593 594 if (sc->pages_wanted < 0) 595 return; 596 597 pages_wanted = sc->pages_wanted; 598 sc->pages_wanted = -1; 599 600 /* 601 * Sneak a peek at the next packet 602 */ 603 m = ifq_poll(&ifp->if_snd); 604 if (m == 0) { 605 printf("%s: snresume() with nothing to send\n", ifp->if_xname); 606 return; 607 } 608 /* 609 * Compute the frame length and set pad to give an overall even 610 * number of bytes. Below we assume that the packet length is even. 611 */ 612 for (len = 0, top = m; m; m = m->m_next) 613 len += m->m_len; 614 615 pad = (len & 1); 616 617 /* 618 * We drop packets that are too large. Perhaps we should truncate 619 * them instead? 620 */ 621 if (len + pad > ETHER_MAX_LEN - ETHER_CRC_LEN) { 622 printf("%s: large packet discarded (B)\n", ifp->if_xname); 623 ++ifp->if_oerrors; 624 ifq_dequeue(&ifp->if_snd); 625 m_freem(m); 626 return; 627 } 628 #ifdef SW_PAD 629 630 /* 631 * If HW padding is not turned on, then pad to ETHER_MIN_LEN. 632 */ 633 if (len < ETHER_MIN_LEN - ETHER_CRC_LEN) 634 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 635 636 #endif /* SW_PAD */ 637 638 length = pad + len; 639 640 641 /* 642 * The MMU wants the number of pages to be the number of 256 byte 643 * 'pages', minus 1 (A packet can't ever have 0 pages. We also 644 * include space for the status word, byte count and control bytes in 645 * the allocation request. 646 */ 647 numPages = (length + 6) >> 8; 648 649 650 SMC_SELECT_BANK(2); 651 652 /* 653 * The memory allocation completed. Check the results. If it failed, 654 * we simply set a watchdog timer and hope for the best. 655 */ 656 packet_no = inb(BASE + ALLOC_RESULT_REG_B); 657 if (packet_no & ARR_FAILED) { 658 printf("%s: Memory allocation failed. Weird.\n", ifp->if_xname); 659 ifp->if_timer = 1; 660 goto try_start; 661 } 662 /* 663 * We have a packet number, so tell the card to use it. 664 */ 665 outb(BASE + PACKET_NUM_REG_B, packet_no); 666 667 /* 668 * Now, numPages should match the pages_wanted recorded when the 669 * memory allocation was initiated. 670 */ 671 if (pages_wanted != numPages) { 672 printf("%s: memory allocation wrong size. Weird.\n", ifp->if_xname); 673 /* 674 * If the allocation was the wrong size we simply release the 675 * memory once it is granted. Wait for the MMU to be un-busy. 676 */ 677 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 678 ; 679 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 680 681 return; 682 } 683 /* 684 * Point to the beginning of the packet 685 */ 686 outw(BASE + POINTER_REG_W, PTR_AUTOINC | 0x0000); 687 688 /* 689 * Send the packet length (+6 for status, length and control byte) 690 * and the status word (set to zeros) 691 */ 692 outw(BASE + DATA_REG_W, 0); 693 outb(BASE + DATA_REG_B, (length + 6) & 0xFF); 694 outb(BASE + DATA_REG_B, (length + 6) >> 8); 695 696 /* 697 * Get the packet from the kernel. This will include the Ethernet 698 * frame header, MAC Addresses etc. 699 */ 700 m = ifq_dequeue(&ifp->if_snd); 701 702 /* 703 * Push out the data to the card. 704 */ 705 for (top = m; m != 0; m = m->m_next) { 706 707 /* 708 * Push out words. 709 */ 710 outsw(BASE + DATA_REG_W, mtod(m, caddr_t), m->m_len / 2); 711 712 /* 713 * Push out remaining byte. 714 */ 715 if (m->m_len & 1) 716 outb(BASE + DATA_REG_B, *(mtod(m, caddr_t) + m->m_len - 1)); 717 } 718 719 /* 720 * Push out padding. 721 */ 722 while (pad > 1) { 723 outw(BASE + DATA_REG_W, 0); 724 pad -= 2; 725 } 726 if (pad) 727 outb(BASE + DATA_REG_B, 0); 728 729 /* 730 * Push out control byte and unused packet byte The control byte is 0 731 * meaning the packet is even lengthed and no special CRC handling is 732 * desired. 733 */ 734 outw(BASE + DATA_REG_W, 0); 735 736 /* 737 * Enable the interrupts and let the chipset deal with it Also set a 738 * watchdog in case we miss the interrupt. 739 */ 740 mask = inb(BASE + INTR_MASK_REG_B) | (IM_TX_INT | IM_TX_EMPTY_INT); 741 outb(BASE + INTR_MASK_REG_B, mask); 742 sc->intr_mask = mask; 743 outw(BASE + MMU_CMD_REG_W, MMUCR_ENQUEUE); 744 745 BPF_MTAP(ifp, top); 746 747 ifp->if_opackets++; 748 m_freem(top); 749 750 try_start: 751 752 /* 753 * Now pass control to snstart() to queue any additional packets 754 */ 755 ifp->if_flags &= ~IFF_OACTIVE; 756 snstart(ifp); 757 758 /* 759 * We've sent something, so we're active. Set a watchdog in case the 760 * TX_EMPTY interrupt is lost. 761 */ 762 ifp->if_flags |= IFF_OACTIVE; 763 ifp->if_timer = 1; 764 } 765 766 767 void 768 sn_intr(void *arg) 769 { 770 int status, interrupts; 771 struct sn_softc *sc = (struct sn_softc *) arg; 772 struct ifnet *ifp = &sc->arpcom.ac_if; 773 int x; 774 775 /* 776 * Chip state registers 777 */ 778 u_char mask; 779 u_char packet_no; 780 u_short tx_status; 781 u_short card_stats; 782 783 /* 784 * if_ep.c did this, so I do too. Yet if_ed.c doesn't. I wonder... 785 */ 786 x = splbio(); 787 788 /* 789 * Clear the watchdog. 790 */ 791 ifp->if_timer = 0; 792 793 SMC_SELECT_BANK(2); 794 795 /* 796 * Obtain the current interrupt mask and clear the hardware mask 797 * while servicing interrupts. 798 */ 799 mask = inb(BASE + INTR_MASK_REG_B); 800 outb(BASE + INTR_MASK_REG_B, 0x00); 801 802 /* 803 * Get the set of interrupts which occurred and eliminate any which 804 * are masked. 805 */ 806 interrupts = inb(BASE + INTR_STAT_REG_B); 807 status = interrupts & mask; 808 809 /* 810 * Now, process each of the interrupt types. 811 */ 812 813 /* 814 * Receive Overrun. 815 */ 816 if (status & IM_RX_OVRN_INT) { 817 818 /* 819 * Acknowlege Interrupt 820 */ 821 SMC_SELECT_BANK(2); 822 outb(BASE + INTR_ACK_REG_B, IM_RX_OVRN_INT); 823 824 ++sc->arpcom.ac_if.if_ierrors; 825 } 826 /* 827 * Got a packet. 828 */ 829 if (status & IM_RCV_INT) { 830 #if 1 831 int packet_number; 832 833 SMC_SELECT_BANK(2); 834 packet_number = inw(BASE + FIFO_PORTS_REG_W); 835 836 if (packet_number & FIFO_REMPTY) { 837 838 /* 839 * we got called , but nothing was on the FIFO 840 */ 841 printf("sn: Receive interrupt with nothing on FIFO\n"); 842 843 goto out; 844 } 845 #endif 846 snread(ifp); 847 } 848 /* 849 * An on-card memory allocation came through. 850 */ 851 if (status & IM_ALLOC_INT) { 852 853 /* 854 * Disable this interrupt. 855 */ 856 mask &= ~IM_ALLOC_INT; 857 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 858 snresume(&sc->arpcom.ac_if); 859 } 860 /* 861 * TX Completion. Handle a transmit error message. This will only be 862 * called when there is an error, because of the AUTO_RELEASE mode. 863 */ 864 if (status & IM_TX_INT) { 865 866 /* 867 * Acknowlege Interrupt 868 */ 869 SMC_SELECT_BANK(2); 870 outb(BASE + INTR_ACK_REG_B, IM_TX_INT); 871 872 packet_no = inw(BASE + FIFO_PORTS_REG_W); 873 packet_no &= FIFO_TX_MASK; 874 875 /* 876 * select this as the packet to read from 877 */ 878 outb(BASE + PACKET_NUM_REG_B, packet_no); 879 880 /* 881 * Position the pointer to the first word from this packet 882 */ 883 outw(BASE + POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000); 884 885 /* 886 * Fetch the TX status word. The value found here will be a 887 * copy of the EPH_STATUS_REG_W at the time the transmit 888 * failed. 889 */ 890 tx_status = inw(BASE + DATA_REG_W); 891 892 if (tx_status & EPHSR_TX_SUC) { 893 device_printf(sc->dev, 894 "Successful packet caused interrupt\n"); 895 } else { 896 ++sc->arpcom.ac_if.if_oerrors; 897 } 898 899 if (tx_status & EPHSR_LATCOL) 900 ++sc->arpcom.ac_if.if_collisions; 901 902 /* 903 * Some of these errors will have disabled transmit. 904 * Re-enable transmit now. 905 */ 906 SMC_SELECT_BANK(0); 907 908 #ifdef SW_PAD 909 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE); 910 #else 911 outw(BASE + TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE); 912 #endif /* SW_PAD */ 913 914 /* 915 * kill the failed packet. Wait for the MMU to be un-busy. 916 */ 917 SMC_SELECT_BANK(2); 918 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 919 ; 920 outw(BASE + MMU_CMD_REG_W, MMUCR_FREEPKT); 921 922 /* 923 * Attempt to queue more transmits. 924 */ 925 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 926 snstart(&sc->arpcom.ac_if); 927 } 928 /* 929 * Transmit underrun. We use this opportunity to update transmit 930 * statistics from the card. 931 */ 932 if (status & IM_TX_EMPTY_INT) { 933 934 /* 935 * Acknowlege Interrupt 936 */ 937 SMC_SELECT_BANK(2); 938 outb(BASE + INTR_ACK_REG_B, IM_TX_EMPTY_INT); 939 940 /* 941 * Disable this interrupt. 942 */ 943 mask &= ~IM_TX_EMPTY_INT; 944 945 SMC_SELECT_BANK(0); 946 card_stats = inw(BASE + COUNTER_REG_W); 947 948 /* 949 * Single collisions 950 */ 951 sc->arpcom.ac_if.if_collisions += card_stats & ECR_COLN_MASK; 952 953 /* 954 * Multiple collisions 955 */ 956 sc->arpcom.ac_if.if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 957 958 SMC_SELECT_BANK(2); 959 960 /* 961 * Attempt to enqueue some more stuff. 962 */ 963 sc->arpcom.ac_if.if_flags &= ~IFF_OACTIVE; 964 snstart(&sc->arpcom.ac_if); 965 } 966 /* 967 * Some other error. Try to fix it by resetting the adapter. 968 */ 969 if (status & IM_EPH_INT) { 970 snstop(sc); 971 sninit(sc); 972 } 973 974 out: 975 /* 976 * Handled all interrupt sources. 977 */ 978 979 SMC_SELECT_BANK(2); 980 981 /* 982 * Reestablish interrupts from mask which have not been deselected 983 * during this interrupt. Note that the hardware mask, which was set 984 * to 0x00 at the start of this service routine, may have been 985 * updated by one or more of the interrupt handers and we must let 986 * those new interrupts stay enabled here. 987 */ 988 mask |= inb(BASE + INTR_MASK_REG_B); 989 outb(BASE + INTR_MASK_REG_B, mask); 990 sc->intr_mask = mask; 991 992 splx(x); 993 } 994 995 void 996 snread(struct ifnet *ifp) 997 { 998 struct sn_softc *sc = ifp->if_softc; 999 struct mbuf *m; 1000 short status; 1001 int packet_number; 1002 u_short packet_length; 1003 u_char *data; 1004 1005 SMC_SELECT_BANK(2); 1006 #if 0 1007 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1008 1009 if (packet_number & FIFO_REMPTY) { 1010 1011 /* 1012 * we got called , but nothing was on the FIFO 1013 */ 1014 printf("sn: Receive interrupt with nothing on FIFO\n"); 1015 return; 1016 } 1017 #endif 1018 read_another: 1019 1020 /* 1021 * Start reading from the start of the packet. Since PTR_RCV is set, 1022 * packet number is found in FIFO_PORTS_REG_W, FIFO_RX_MASK. 1023 */ 1024 outw(BASE + POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000); 1025 1026 /* 1027 * First two words are status and packet_length 1028 */ 1029 status = inw(BASE + DATA_REG_W); 1030 packet_length = inw(BASE + DATA_REG_W) & RLEN_MASK; 1031 1032 /* 1033 * The packet length contains 3 extra words: status, length, and a 1034 * extra word with the control byte. 1035 */ 1036 packet_length -= 6; 1037 1038 /* 1039 * Account for receive errors and discard. 1040 */ 1041 if (status & RS_ERRORS) { 1042 ++ifp->if_ierrors; 1043 goto out; 1044 } 1045 /* 1046 * A packet is received. 1047 */ 1048 1049 /* 1050 * Adjust for odd-length packet. 1051 */ 1052 if (status & RS_ODDFRAME) 1053 packet_length++; 1054 1055 /* 1056 * Allocate a header mbuf from the kernel. 1057 */ 1058 MGETHDR(m, MB_DONTWAIT, MT_DATA); 1059 if (m == NULL) 1060 goto out; 1061 1062 m->m_pkthdr.rcvif = ifp; 1063 m->m_pkthdr.len = m->m_len = packet_length; 1064 1065 /* 1066 * Attach an mbuf cluster 1067 */ 1068 MCLGET(m, MB_DONTWAIT); 1069 1070 /* 1071 * Insist on getting a cluster 1072 */ 1073 if ((m->m_flags & M_EXT) == 0) { 1074 m_freem(m); 1075 ++ifp->if_ierrors; 1076 printf("sn: snread() kernel memory allocation problem\n"); 1077 goto out; 1078 } 1079 1080 /* 1081 * Get packet, including link layer address, from interface. 1082 */ 1083 1084 data = mtod(m, u_char *); 1085 insw(BASE + DATA_REG_W, data, packet_length >> 1); 1086 if (packet_length & 1) { 1087 data += packet_length & ~1; 1088 *data = inb(BASE + DATA_REG_B); 1089 } 1090 ++ifp->if_ipackets; 1091 1092 m->m_pkthdr.len = m->m_len = packet_length; 1093 1094 (*ifp->if_input)(ifp, m); 1095 1096 out: 1097 1098 /* 1099 * Error or good, tell the card to get rid of this packet Wait for 1100 * the MMU to be un-busy. 1101 */ 1102 SMC_SELECT_BANK(2); 1103 while (inw(BASE + MMU_CMD_REG_W) & MMUCR_BUSY) /* NOTHING */ 1104 ; 1105 outw(BASE + MMU_CMD_REG_W, MMUCR_RELEASE); 1106 1107 /* 1108 * Check whether another packet is ready 1109 */ 1110 packet_number = inw(BASE + FIFO_PORTS_REG_W); 1111 if (packet_number & FIFO_REMPTY) { 1112 return; 1113 } 1114 goto read_another; 1115 } 1116 1117 1118 /* 1119 * Handle IOCTLS. This function is completely stolen from if_ep.c 1120 * As with its progenitor, it does not handle hardware address 1121 * changes. 1122 */ 1123 static int 1124 snioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr) 1125 { 1126 struct sn_softc *sc = ifp->if_softc; 1127 int s, error = 0; 1128 1129 s = splimp(); 1130 1131 switch (cmd) { 1132 case SIOCSIFADDR: 1133 case SIOCGIFADDR: 1134 case SIOCSIFMTU: 1135 error = ether_ioctl(ifp, cmd, data); 1136 break; 1137 1138 case SIOCSIFFLAGS: 1139 if ((ifp->if_flags & IFF_UP) == 0 && ifp->if_flags & IFF_RUNNING) { 1140 ifp->if_flags &= ~IFF_RUNNING; 1141 snstop(sc); 1142 break; 1143 } else { 1144 /* reinitialize card on any parameter change */ 1145 sninit(sc); 1146 break; 1147 } 1148 break; 1149 1150 #ifdef notdef 1151 case SIOCGHWADDR: 1152 bcopy((caddr_t) sc->sc_addr, (caddr_t) & ifr->ifr_data, 1153 sizeof(sc->sc_addr)); 1154 break; 1155 #endif 1156 1157 case SIOCADDMULTI: 1158 /* update multicast filter list. */ 1159 sn_setmcast(sc); 1160 error = 0; 1161 break; 1162 case SIOCDELMULTI: 1163 /* update multicast filter list. */ 1164 sn_setmcast(sc); 1165 error = 0; 1166 break; 1167 default: 1168 error = EINVAL; 1169 } 1170 1171 splx(s); 1172 1173 return (error); 1174 } 1175 1176 void 1177 snreset(struct sn_softc *sc) 1178 { 1179 int s; 1180 1181 s = splimp(); 1182 snstop(sc); 1183 sninit(sc); 1184 1185 splx(s); 1186 } 1187 1188 void 1189 snwatchdog(struct ifnet *ifp) 1190 { 1191 int s; 1192 s = splimp(); 1193 sn_intr(ifp->if_softc); 1194 splx(s); 1195 } 1196 1197 1198 /* 1. zero the interrupt mask 1199 * 2. clear the enable receive flag 1200 * 3. clear the enable xmit flags 1201 */ 1202 void 1203 snstop(struct sn_softc *sc) 1204 { 1205 1206 struct ifnet *ifp = &sc->arpcom.ac_if; 1207 1208 /* 1209 * Clear interrupt mask; disable all interrupts. 1210 */ 1211 SMC_SELECT_BANK(2); 1212 outb(BASE + INTR_MASK_REG_B, 0x00); 1213 1214 /* 1215 * Disable transmitter and Receiver 1216 */ 1217 SMC_SELECT_BANK(0); 1218 outw(BASE + RECV_CONTROL_REG_W, 0x0000); 1219 outw(BASE + TXMIT_CONTROL_REG_W, 0x0000); 1220 1221 /* 1222 * Cancel watchdog. 1223 */ 1224 ifp->if_timer = 0; 1225 } 1226 1227 1228 int 1229 sn_activate(device_t dev) 1230 { 1231 struct sn_softc *sc = device_get_softc(dev); 1232 int err; 1233 1234 sc->port_rid = 0; 1235 sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid, 1236 0, ~0, SMC_IO_EXTENT, RF_ACTIVE); 1237 if (!sc->port_res) { 1238 #ifdef SN_DEBUG 1239 device_printf(dev, "Cannot allocate ioport\n"); 1240 #endif 1241 return ENOMEM; 1242 } 1243 1244 sc->irq_rid = 0; 1245 sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid, 1246 0, ~0, 1, RF_ACTIVE); 1247 if (!sc->irq_res) { 1248 #ifdef SN_DEBUG 1249 device_printf(dev, "Cannot allocate irq\n"); 1250 #endif 1251 sn_deactivate(dev); 1252 return ENOMEM; 1253 } 1254 if ((err = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_NET, sn_intr, sc, 1255 &sc->intrhand)) != 0) { 1256 sn_deactivate(dev); 1257 return err; 1258 } 1259 1260 sc->sn_io_addr = rman_get_start(sc->port_res); 1261 return (0); 1262 } 1263 1264 void 1265 sn_deactivate(device_t dev) 1266 { 1267 struct sn_softc *sc = device_get_softc(dev); 1268 1269 if (sc->intrhand) 1270 bus_teardown_intr(dev, sc->irq_res, sc->intrhand); 1271 sc->intrhand = 0; 1272 if (sc->port_res) 1273 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 1274 sc->port_res); 1275 sc->port_res = 0; 1276 if (sc->irq_res) 1277 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, 1278 sc->irq_res); 1279 sc->irq_res = 0; 1280 return; 1281 } 1282 1283 /* 1284 * Function: sn_probe( device_t dev, int pccard ) 1285 * 1286 * Purpose: 1287 * Tests to see if a given ioaddr points to an SMC9xxx chip. 1288 * Tries to cause as little damage as possible if it's not a SMC chip. 1289 * Returns a 0 on success 1290 * 1291 * Algorithm: 1292 * (1) see if the high byte of BANK_SELECT is 0x33 1293 * (2) compare the ioaddr with the base register's address 1294 * (3) see if I recognize the chip ID in the appropriate register 1295 * 1296 * 1297 */ 1298 int 1299 sn_probe(device_t dev, int pccard) 1300 { 1301 struct sn_softc *sc = device_get_softc(dev); 1302 u_int bank; 1303 u_short revision_register; 1304 u_short base_address_register; 1305 u_short ioaddr; 1306 int err; 1307 1308 if ((err = sn_activate(dev)) != 0) 1309 return err; 1310 1311 ioaddr = sc->sn_io_addr; 1312 1313 /* 1314 * First, see if the high byte is 0x33 1315 */ 1316 bank = inw(ioaddr + BANK_SELECT_REG_W); 1317 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1318 #ifdef SN_DEBUG 1319 device_printf(dev, "test1 failed\n"); 1320 #endif 1321 goto error; 1322 } 1323 /* 1324 * The above MIGHT indicate a device, but I need to write to further 1325 * test this. Go to bank 0, then test that the register still 1326 * reports the high byte is 0x33. 1327 */ 1328 outw(ioaddr + BANK_SELECT_REG_W, 0x0000); 1329 bank = inw(ioaddr + BANK_SELECT_REG_W); 1330 if ((bank & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 1331 #ifdef SN_DEBUG 1332 device_printf(dev, "test2 failed\n"); 1333 #endif 1334 goto error; 1335 } 1336 /* 1337 * well, we've already written once, so hopefully another time won't 1338 * hurt. This time, I need to switch the bank register to bank 1, so 1339 * I can access the base address register. The contents of the 1340 * BASE_ADDR_REG_W register, after some jiggery pokery, is expected 1341 * to match the I/O port address where the adapter is being probed. 1342 */ 1343 outw(ioaddr + BANK_SELECT_REG_W, 0x0001); 1344 base_address_register = inw(ioaddr + BASE_ADDR_REG_W); 1345 1346 /* 1347 * This test is nonsence on PC-card architecture, so if 1348 * pccard == 1, skip this test. (hosokawa) 1349 */ 1350 if (!pccard && (ioaddr != (base_address_register >> 3 & 0x3E0))) { 1351 1352 /* 1353 * Well, the base address register didn't match. Must not 1354 * have been a SMC chip after all. 1355 */ 1356 /* 1357 * printf("sn: ioaddr %x doesn't match card configuration 1358 * (%x)\n", ioaddr, base_address_register >> 3 & 0x3E0 ); 1359 */ 1360 1361 #ifdef SN_DEBUG 1362 device_printf(dev, "test3 failed ioaddr = 0x%x, " 1363 "base_address_register = 0x%x\n", ioaddr, 1364 base_address_register >> 3 & 0x3E0); 1365 #endif 1366 goto error; 1367 } 1368 /* 1369 * Check if the revision register is something that I recognize. 1370 * These might need to be added to later, as future revisions could 1371 * be added. 1372 */ 1373 outw(ioaddr + BANK_SELECT_REG_W, 0x3); 1374 revision_register = inw(ioaddr + REVISION_REG_W); 1375 if (!chip_ids[(revision_register >> 4) & 0xF]) { 1376 1377 /* 1378 * I don't regonize this chip, so... 1379 */ 1380 #ifdef SN_DEBUG 1381 device_printf(dev, "test4 failed\n"); 1382 #endif 1383 goto error; 1384 } 1385 /* 1386 * at this point I'll assume that the chip is an SMC9xxx. It might be 1387 * prudent to check a listing of MAC addresses against the hardware 1388 * address, or do some other tests. 1389 */ 1390 sn_deactivate(dev); 1391 return 0; 1392 error: 1393 sn_deactivate(dev); 1394 return ENXIO; 1395 } 1396 1397 #define MCFSZ 8 1398 1399 static void 1400 sn_setmcast(struct sn_softc *sc) 1401 { 1402 struct ifnet *ifp = (struct ifnet *)sc; 1403 int flags; 1404 1405 /* 1406 * Set the receiver filter. We want receive enabled and auto strip 1407 * of CRC from received packet. If we are promiscuous then set that 1408 * bit too. 1409 */ 1410 flags = RCR_ENABLE | RCR_STRIP_CRC; 1411 1412 if (ifp->if_flags & IFF_PROMISC) { 1413 flags |= RCR_PROMISC | RCR_ALMUL; 1414 } else if (ifp->if_flags & IFF_ALLMULTI) { 1415 flags |= RCR_ALMUL; 1416 } else { 1417 u_char mcf[MCFSZ]; 1418 if (sn_getmcf(&sc->arpcom, mcf)) { 1419 /* set filter */ 1420 SMC_SELECT_BANK(3); 1421 outw(BASE + MULTICAST1_REG_W, 1422 ((u_short)mcf[1] << 8) | mcf[0]); 1423 outw(BASE + MULTICAST2_REG_W, 1424 ((u_short)mcf[3] << 8) | mcf[2]); 1425 outw(BASE + MULTICAST3_REG_W, 1426 ((u_short)mcf[5] << 8) | mcf[4]); 1427 outw(BASE + MULTICAST4_REG_W, 1428 ((u_short)mcf[7] << 8) | mcf[6]); 1429 } else { 1430 flags |= RCR_ALMUL; 1431 } 1432 } 1433 SMC_SELECT_BANK(0); 1434 outw(BASE + RECV_CONTROL_REG_W, flags); 1435 } 1436 1437 static int 1438 sn_getmcf(struct arpcom *ac, u_char *mcf) 1439 { 1440 int i; 1441 u_int index, index2; 1442 u_char *af = (u_char *) mcf; 1443 struct ifmultiaddr *ifma; 1444 1445 bzero(mcf, MCFSZ); 1446 1447 for (ifma = ac->ac_if.if_multiaddrs.lh_first; ifma; 1448 ifma = ifma->ifma_link.le_next) { 1449 if (ifma->ifma_addr->sa_family != AF_LINK) 1450 return 0; 1451 index = smc_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)) & 0x3f; 1452 index2 = 0; 1453 for (i = 0; i < 6; i++) { 1454 index2 <<= 1; 1455 index2 |= (index & 0x01); 1456 index >>= 1; 1457 } 1458 af[index2 >> 3] |= 1 << (index2 & 7); 1459 } 1460 return 1; /* use multicast filter */ 1461 } 1462 1463 static u_int 1464 smc_crc(u_char *s) 1465 { 1466 int perByte; 1467 int perBit; 1468 const u_int poly = 0xedb88320; 1469 u_int v = 0xffffffff; 1470 u_char c; 1471 1472 for (perByte = 0; perByte < ETHER_ADDR_LEN; perByte++) { 1473 c = s[perByte]; 1474 for (perBit = 0; perBit < 8; perBit++) { 1475 v = (v >> 1)^(((v ^ c) & 0x01) ? poly : 0); 1476 c >>= 1; 1477 } 1478 } 1479 return v; 1480 } 1481