191b30d50SMatthew Dillon /* $FreeBSD$ */
2feb94d24SRui Paulo
3feb94d24SRui Paulo /*-
45fdff524SSepherosa Ziehau * Copyright (c) 2006
55fdff524SSepherosa Ziehau * Damien Bergamini <damien.bergamini@free.fr>
65fdff524SSepherosa Ziehau *
75fdff524SSepherosa Ziehau * Permission to use, copy, modify, and distribute this software for any
85fdff524SSepherosa Ziehau * purpose with or without fee is hereby granted, provided that the above
95fdff524SSepherosa Ziehau * copyright notice and this permission notice appear in all copies.
105fdff524SSepherosa Ziehau *
115fdff524SSepherosa Ziehau * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
125fdff524SSepherosa Ziehau * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
135fdff524SSepherosa Ziehau * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
145fdff524SSepherosa Ziehau * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
155fdff524SSepherosa Ziehau * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
165fdff524SSepherosa Ziehau * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
175fdff524SSepherosa Ziehau * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
185fdff524SSepherosa Ziehau */
195fdff524SSepherosa Ziehau
2091b30d50SMatthew Dillon #include <sys/cdefs.h>
2191b30d50SMatthew Dillon __FBSDID("$FreeBSD$");
2291b30d50SMatthew Dillon
23feb94d24SRui Paulo /*-
245fdff524SSepherosa Ziehau * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
255fdff524SSepherosa Ziehau * http://www.ralinktech.com/
265fdff524SSepherosa Ziehau */
275fdff524SSepherosa Ziehau
285fdff524SSepherosa Ziehau #include <sys/param.h>
29feb94d24SRui Paulo #include <sys/sysctl.h>
30feb94d24SRui Paulo #include <sys/sockio.h>
31feb94d24SRui Paulo #include <sys/mbuf.h>
32feb94d24SRui Paulo #include <sys/kernel.h>
33feb94d24SRui Paulo #include <sys/socket.h>
34feb94d24SRui Paulo #include <sys/systm.h>
35feb94d24SRui Paulo #include <sys/malloc.h>
36feb94d24SRui Paulo #include <sys/lock.h>
37feb94d24SRui Paulo #include <sys/module.h>
385fdff524SSepherosa Ziehau #include <sys/bus.h>
395fdff524SSepherosa Ziehau #include <sys/endian.h>
40d83c779aSSascha Wildner #include <sys/firmware.h>
4191b30d50SMatthew Dillon
4293d249f7SMatthew Dillon #if defined(__DragonFly__)
4393d249f7SMatthew Dillon /* empty */
4493d249f7SMatthew Dillon #else
4591b30d50SMatthew Dillon #include <machine/bus.h>
4691b30d50SMatthew Dillon #include <machine/resource.h>
4793d249f7SMatthew Dillon #endif
4850b4e549SSepherosa Ziehau #include <sys/rman.h>
495fdff524SSepherosa Ziehau
505fdff524SSepherosa Ziehau #include <net/bpf.h>
515fdff524SSepherosa Ziehau #include <net/if.h>
5291b30d50SMatthew Dillon #include <net/if_var.h>
535fdff524SSepherosa Ziehau #include <net/if_arp.h>
545fdff524SSepherosa Ziehau #include <net/ethernet.h>
555fdff524SSepherosa Ziehau #include <net/if_dl.h>
565fdff524SSepherosa Ziehau #include <net/if_media.h>
57feb94d24SRui Paulo #include <net/if_types.h>
585fdff524SSepherosa Ziehau
5993d249f7SMatthew Dillon #include <netproto/802_11/ieee80211_var.h>
6093d249f7SMatthew Dillon #include <netproto/802_11/ieee80211_radiotap.h>
6193d249f7SMatthew Dillon #include <netproto/802_11/ieee80211_regdomain.h>
6293d249f7SMatthew Dillon #include <netproto/802_11/ieee80211_ratectl.h>
63feb94d24SRui Paulo
64feb94d24SRui Paulo #include <netinet/in.h>
65feb94d24SRui Paulo #include <netinet/in_systm.h>
66feb94d24SRui Paulo #include <netinet/in_var.h>
67feb94d24SRui Paulo #include <netinet/ip.h>
68feb94d24SRui Paulo #include <netinet/if_ether.h>
695fdff524SSepherosa Ziehau
7093d249f7SMatthew Dillon #include <dev/netif/ral/rt2661reg.h>
7193d249f7SMatthew Dillon #include <dev/netif/ral/rt2661var.h>
725fdff524SSepherosa Ziehau
73feb94d24SRui Paulo #define RAL_DEBUG
745fdff524SSepherosa Ziehau #ifdef RAL_DEBUG
75feb94d24SRui Paulo #define DPRINTF(sc, fmt, ...) do { \
76feb94d24SRui Paulo if (sc->sc_debug > 0) \
7793d249f7SMatthew Dillon kprintf(fmt, __VA_ARGS__); \
78feb94d24SRui Paulo } while (0)
79feb94d24SRui Paulo #define DPRINTFN(sc, n, fmt, ...) do { \
80feb94d24SRui Paulo if (sc->sc_debug >= (n)) \
8193d249f7SMatthew Dillon kprintf(fmt, __VA_ARGS__); \
82feb94d24SRui Paulo } while (0)
835fdff524SSepherosa Ziehau #else
84feb94d24SRui Paulo #define DPRINTF(sc, fmt, ...)
85feb94d24SRui Paulo #define DPRINTFN(sc, n, fmt, ...)
865fdff524SSepherosa Ziehau #endif
875fdff524SSepherosa Ziehau
88feb94d24SRui Paulo static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
8991b30d50SMatthew Dillon const char [IFNAMSIZ], int, enum ieee80211_opmode,
9091b30d50SMatthew Dillon int, const uint8_t [IEEE80211_ADDR_LEN],
9191b30d50SMatthew Dillon const uint8_t [IEEE80211_ADDR_LEN]);
92feb94d24SRui Paulo static void rt2661_vap_delete(struct ieee80211vap *);
935fdff524SSepherosa Ziehau static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
945fdff524SSepherosa Ziehau int);
955fdff524SSepherosa Ziehau static int rt2661_alloc_tx_ring(struct rt2661_softc *,
965fdff524SSepherosa Ziehau struct rt2661_tx_ring *, int);
975fdff524SSepherosa Ziehau static void rt2661_reset_tx_ring(struct rt2661_softc *,
985fdff524SSepherosa Ziehau struct rt2661_tx_ring *);
995fdff524SSepherosa Ziehau static void rt2661_free_tx_ring(struct rt2661_softc *,
1005fdff524SSepherosa Ziehau struct rt2661_tx_ring *);
1015fdff524SSepherosa Ziehau static int rt2661_alloc_rx_ring(struct rt2661_softc *,
1025fdff524SSepherosa Ziehau struct rt2661_rx_ring *, int);
1035fdff524SSepherosa Ziehau static void rt2661_reset_rx_ring(struct rt2661_softc *,
1045fdff524SSepherosa Ziehau struct rt2661_rx_ring *);
1055fdff524SSepherosa Ziehau static void rt2661_free_rx_ring(struct rt2661_softc *,
1065fdff524SSepherosa Ziehau struct rt2661_rx_ring *);
107feb94d24SRui Paulo static int rt2661_newstate(struct ieee80211vap *,
1085fdff524SSepherosa Ziehau enum ieee80211_state, int);
1095fdff524SSepherosa Ziehau static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
1105fdff524SSepherosa Ziehau static void rt2661_rx_intr(struct rt2661_softc *);
1115fdff524SSepherosa Ziehau static void rt2661_tx_intr(struct rt2661_softc *);
1125fdff524SSepherosa Ziehau static void rt2661_tx_dma_intr(struct rt2661_softc *,
1135fdff524SSepherosa Ziehau struct rt2661_tx_ring *);
1145fdff524SSepherosa Ziehau static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
1155fdff524SSepherosa Ziehau static void rt2661_mcu_wakeup(struct rt2661_softc *);
1165fdff524SSepherosa Ziehau static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
117feb94d24SRui Paulo static void rt2661_scan_start(struct ieee80211com *);
118feb94d24SRui Paulo static void rt2661_scan_end(struct ieee80211com *);
119feb94d24SRui Paulo static void rt2661_set_channel(struct ieee80211com *);
1205fdff524SSepherosa Ziehau static void rt2661_setup_tx_desc(struct rt2661_softc *,
1215fdff524SSepherosa Ziehau struct rt2661_tx_desc *, uint32_t, uint16_t, int,
122feb94d24SRui Paulo int, const bus_dma_segment_t *, int, int);
1235fdff524SSepherosa Ziehau static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
1245fdff524SSepherosa Ziehau struct ieee80211_node *, int);
1255fdff524SSepherosa Ziehau static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
1265fdff524SSepherosa Ziehau struct ieee80211_node *);
12791b30d50SMatthew Dillon static int rt2661_transmit(struct ieee80211com *, struct mbuf *);
12891b30d50SMatthew Dillon static void rt2661_start(struct rt2661_softc *);
129feb94d24SRui Paulo static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
130feb94d24SRui Paulo const struct ieee80211_bpf_params *);
13191b30d50SMatthew Dillon static void rt2661_watchdog(void *);
13291b30d50SMatthew Dillon static void rt2661_parent(struct ieee80211com *);
1335fdff524SSepherosa Ziehau static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
1345fdff524SSepherosa Ziehau uint8_t);
1355fdff524SSepherosa Ziehau static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
1365fdff524SSepherosa Ziehau static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
1375fdff524SSepherosa Ziehau uint32_t);
1385fdff524SSepherosa Ziehau static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
1395fdff524SSepherosa Ziehau uint16_t);
1405fdff524SSepherosa Ziehau static void rt2661_select_antenna(struct rt2661_softc *);
1415fdff524SSepherosa Ziehau static void rt2661_enable_mrr(struct rt2661_softc *);
1425fdff524SSepherosa Ziehau static void rt2661_set_txpreamble(struct rt2661_softc *);
143feb94d24SRui Paulo static void rt2661_set_basicrates(struct rt2661_softc *,
1445fdff524SSepherosa Ziehau const struct ieee80211_rateset *);
1455fdff524SSepherosa Ziehau static void rt2661_select_band(struct rt2661_softc *,
1465fdff524SSepherosa Ziehau struct ieee80211_channel *);
1475fdff524SSepherosa Ziehau static void rt2661_set_chan(struct rt2661_softc *,
1485fdff524SSepherosa Ziehau struct ieee80211_channel *);
1495fdff524SSepherosa Ziehau static void rt2661_set_bssid(struct rt2661_softc *,
1505fdff524SSepherosa Ziehau const uint8_t *);
1515fdff524SSepherosa Ziehau static void rt2661_set_macaddr(struct rt2661_softc *,
1525fdff524SSepherosa Ziehau const uint8_t *);
1534f898719SImre Vadász static void rt2661_update_promisc(struct ieee80211com *);
1545fdff524SSepherosa Ziehau static int rt2661_wme_update(struct ieee80211com *) __unused;
1554f898719SImre Vadász static void rt2661_update_slot(struct ieee80211com *);
1565fdff524SSepherosa Ziehau static const char *rt2661_get_rf(int);
157feb94d24SRui Paulo static void rt2661_read_eeprom(struct rt2661_softc *,
158feb94d24SRui Paulo uint8_t macaddr[IEEE80211_ADDR_LEN]);
1595fdff524SSepherosa Ziehau static int rt2661_bbp_init(struct rt2661_softc *);
160feb94d24SRui Paulo static void rt2661_init_locked(struct rt2661_softc *);
1615fdff524SSepherosa Ziehau static void rt2661_init(void *);
162feb94d24SRui Paulo static void rt2661_stop_locked(struct rt2661_softc *);
1635fdff524SSepherosa Ziehau static void rt2661_stop(void *);
164feb94d24SRui Paulo static int rt2661_load_microcode(struct rt2661_softc *);
165feb94d24SRui Paulo #ifdef notyet
166feb94d24SRui Paulo static void rt2661_rx_tune(struct rt2661_softc *);
167feb94d24SRui Paulo static void rt2661_radar_start(struct rt2661_softc *);
168feb94d24SRui Paulo static int rt2661_radar_stop(struct rt2661_softc *);
169feb94d24SRui Paulo #endif
170feb94d24SRui Paulo static int rt2661_prepare_beacon(struct rt2661_softc *,
171feb94d24SRui Paulo struct ieee80211vap *);
1725fdff524SSepherosa Ziehau static void rt2661_enable_tsf_sync(struct rt2661_softc *);
173feb94d24SRui Paulo static void rt2661_enable_tsf(struct rt2661_softc *);
174feb94d24SRui Paulo static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
1755fdff524SSepherosa Ziehau
1765fdff524SSepherosa Ziehau static const struct {
1775fdff524SSepherosa Ziehau uint32_t reg;
1785fdff524SSepherosa Ziehau uint32_t val;
1795fdff524SSepherosa Ziehau } rt2661_def_mac[] = {
1805fdff524SSepherosa Ziehau RT2661_DEF_MAC
1815fdff524SSepherosa Ziehau };
1825fdff524SSepherosa Ziehau
1835fdff524SSepherosa Ziehau static const struct {
1845fdff524SSepherosa Ziehau uint8_t reg;
1855fdff524SSepherosa Ziehau uint8_t val;
1865fdff524SSepherosa Ziehau } rt2661_def_bbp[] = {
1875fdff524SSepherosa Ziehau RT2661_DEF_BBP
1885fdff524SSepherosa Ziehau };
1895fdff524SSepherosa Ziehau
190feb94d24SRui Paulo static const struct rfprog {
191feb94d24SRui Paulo uint8_t chan;
192feb94d24SRui Paulo uint32_t r1, r2, r3, r4;
193feb94d24SRui Paulo } rt2661_rf5225_1[] = {
194feb94d24SRui Paulo RT2661_RF5225_1
195feb94d24SRui Paulo }, rt2661_rf5225_2[] = {
196feb94d24SRui Paulo RT2661_RF5225_2
1976c40999eSSepherosa Ziehau };
19899fda2c4SSepherosa Ziehau
1995fdff524SSepherosa Ziehau int
rt2661_attach(device_t dev,int id)2005fdff524SSepherosa Ziehau rt2661_attach(device_t dev, int id)
2015fdff524SSepherosa Ziehau {
2025fdff524SSepherosa Ziehau struct rt2661_softc *sc = device_get_softc(dev);
20391b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
204feb94d24SRui Paulo uint32_t val;
20591b30d50SMatthew Dillon uint8_t bands[IEEE80211_MODE_BYTES];
206feb94d24SRui Paulo int error, ac, ntries;
2075fdff524SSepherosa Ziehau
208feb94d24SRui Paulo sc->sc_id = id;
209feb94d24SRui Paulo sc->sc_dev = dev;
2105fdff524SSepherosa Ziehau
21193d249f7SMatthew Dillon #if defined(__DragonFly__)
21293d249f7SMatthew Dillon lockinit(&sc->sc_mtx, device_get_nameunit(dev), 0, LK_CANRECURSE);
21393d249f7SMatthew Dillon #else
21491b30d50SMatthew Dillon mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
21591b30d50SMatthew Dillon MTX_DEF | MTX_RECURSE);
21693d249f7SMatthew Dillon #endif
217feb94d24SRui Paulo
21891b30d50SMatthew Dillon callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
21991b30d50SMatthew Dillon mbufq_init(&sc->sc_snd, ifqmaxlen);
2205fdff524SSepherosa Ziehau
2215fdff524SSepherosa Ziehau /* wait for NIC to initialize */
2225fdff524SSepherosa Ziehau for (ntries = 0; ntries < 1000; ntries++) {
2235fdff524SSepherosa Ziehau if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
2245fdff524SSepherosa Ziehau break;
2255fdff524SSepherosa Ziehau DELAY(1000);
2265fdff524SSepherosa Ziehau }
2275fdff524SSepherosa Ziehau if (ntries == 1000) {
2285fdff524SSepherosa Ziehau device_printf(sc->sc_dev,
2295fdff524SSepherosa Ziehau "timeout waiting for NIC to initialize\n");
2305fdff524SSepherosa Ziehau error = EIO;
231feb94d24SRui Paulo goto fail1;
2325fdff524SSepherosa Ziehau }
2335fdff524SSepherosa Ziehau
2345fdff524SSepherosa Ziehau /* retrieve RF rev. no and various other things from EEPROM */
23591b30d50SMatthew Dillon rt2661_read_eeprom(sc, ic->ic_macaddr);
2365fdff524SSepherosa Ziehau
237feb94d24SRui Paulo device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
2385fdff524SSepherosa Ziehau rt2661_get_rf(sc->rf_rev));
2395fdff524SSepherosa Ziehau
2405fdff524SSepherosa Ziehau /*
2415fdff524SSepherosa Ziehau * Allocate Tx and Rx rings.
2425fdff524SSepherosa Ziehau */
2435fdff524SSepherosa Ziehau for (ac = 0; ac < 4; ac++) {
2445fdff524SSepherosa Ziehau error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
2455fdff524SSepherosa Ziehau RT2661_TX_RING_COUNT);
2465fdff524SSepherosa Ziehau if (error != 0) {
2475fdff524SSepherosa Ziehau device_printf(sc->sc_dev,
2485fdff524SSepherosa Ziehau "could not allocate Tx ring %d\n", ac);
249feb94d24SRui Paulo goto fail2;
2505fdff524SSepherosa Ziehau }
2515fdff524SSepherosa Ziehau }
2525fdff524SSepherosa Ziehau
2535fdff524SSepherosa Ziehau error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
2545fdff524SSepherosa Ziehau if (error != 0) {
2555fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
256feb94d24SRui Paulo goto fail2;
2575fdff524SSepherosa Ziehau }
2585fdff524SSepherosa Ziehau
2595fdff524SSepherosa Ziehau error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
2605fdff524SSepherosa Ziehau if (error != 0) {
2615fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not allocate Rx ring\n");
262feb94d24SRui Paulo goto fail3;
2635fdff524SSepherosa Ziehau }
2645fdff524SSepherosa Ziehau
26513f98998SMatthew Dillon ic->ic_softc = sc;
2664f898719SImre Vadász ic->ic_name = device_get_nameunit(dev);
267feb94d24SRui Paulo ic->ic_opmode = IEEE80211_M_STA;
2685fdff524SSepherosa Ziehau ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
269e3ab8063SSepherosa Ziehau
2705fdff524SSepherosa Ziehau /* set device capabilities */
2715fdff524SSepherosa Ziehau ic->ic_caps =
272feb94d24SRui Paulo IEEE80211_C_STA /* station mode */
273feb94d24SRui Paulo | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
274feb94d24SRui Paulo | IEEE80211_C_HOSTAP /* hostap mode */
275feb94d24SRui Paulo | IEEE80211_C_MONITOR /* monitor mode */
276feb94d24SRui Paulo | IEEE80211_C_AHDEMO /* adhoc demo mode */
277feb94d24SRui Paulo | IEEE80211_C_WDS /* 4-address traffic works */
278feb94d24SRui Paulo | IEEE80211_C_MBSS /* mesh point link mode */
279feb94d24SRui Paulo | IEEE80211_C_SHPREAMBLE /* short preamble supported */
280feb94d24SRui Paulo | IEEE80211_C_SHSLOT /* short slot time supported */
281feb94d24SRui Paulo | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
282feb94d24SRui Paulo | IEEE80211_C_BGSCAN /* capable of bg scanning */
2835fdff524SSepherosa Ziehau #ifdef notyet
284feb94d24SRui Paulo | IEEE80211_C_TXFRAG /* handle tx frags */
285feb94d24SRui Paulo | IEEE80211_C_WME /* 802.11e */
2865fdff524SSepherosa Ziehau #endif
287feb94d24SRui Paulo ;
2885fdff524SSepherosa Ziehau
28991b30d50SMatthew Dillon memset(bands, 0, sizeof(bands));
29091b30d50SMatthew Dillon setbit(bands, IEEE80211_MODE_11B);
29191b30d50SMatthew Dillon setbit(bands, IEEE80211_MODE_11G);
292feb94d24SRui Paulo if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325)
29391b30d50SMatthew Dillon setbit(bands, IEEE80211_MODE_11A);
29491b30d50SMatthew Dillon ieee80211_init_channels(ic, NULL, bands);
2955717dc1aSSepherosa Ziehau
29691b30d50SMatthew Dillon ieee80211_ifattach(ic);
297feb94d24SRui Paulo #if 0
298feb94d24SRui Paulo ic->ic_wme.wme_update = rt2661_wme_update;
299feb94d24SRui Paulo #endif
300feb94d24SRui Paulo ic->ic_scan_start = rt2661_scan_start;
301feb94d24SRui Paulo ic->ic_scan_end = rt2661_scan_end;
302feb94d24SRui Paulo ic->ic_set_channel = rt2661_set_channel;
3035fdff524SSepherosa Ziehau ic->ic_updateslot = rt2661_update_slot;
304feb94d24SRui Paulo ic->ic_update_promisc = rt2661_update_promisc;
305feb94d24SRui Paulo ic->ic_raw_xmit = rt2661_raw_xmit;
30691b30d50SMatthew Dillon ic->ic_transmit = rt2661_transmit;
30791b30d50SMatthew Dillon ic->ic_parent = rt2661_parent;
308feb94d24SRui Paulo ic->ic_vap_create = rt2661_vap_create;
309feb94d24SRui Paulo ic->ic_vap_delete = rt2661_vap_delete;
3105717dc1aSSepherosa Ziehau
311feb94d24SRui Paulo ieee80211_radiotap_attach(ic,
312feb94d24SRui Paulo &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
313feb94d24SRui Paulo RT2661_TX_RADIOTAP_PRESENT,
314feb94d24SRui Paulo &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
315feb94d24SRui Paulo RT2661_RX_RADIOTAP_PRESENT);
3165717dc1aSSepherosa Ziehau
317feb94d24SRui Paulo #ifdef RAL_DEBUG
31891b30d50SMatthew Dillon SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
31991b30d50SMatthew Dillon SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
320feb94d24SRui Paulo "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
321feb94d24SRui Paulo #endif
3225fdff524SSepherosa Ziehau if (bootverbose)
3235fdff524SSepherosa Ziehau ieee80211_announce(ic);
324feb94d24SRui Paulo
3255fdff524SSepherosa Ziehau return 0;
326feb94d24SRui Paulo
327feb94d24SRui Paulo fail3: rt2661_free_tx_ring(sc, &sc->mgtq);
328feb94d24SRui Paulo fail2: while (--ac >= 0)
329feb94d24SRui Paulo rt2661_free_tx_ring(sc, &sc->txq[ac]);
33093d249f7SMatthew Dillon #if defined(__DragonFly__)
33193d249f7SMatthew Dillon fail1: lockuninit(&sc->sc_mtx);
33293d249f7SMatthew Dillon #else
33391b30d50SMatthew Dillon fail1: mtx_destroy(&sc->sc_mtx);
33493d249f7SMatthew Dillon #endif
3355fdff524SSepherosa Ziehau return error;
3365fdff524SSepherosa Ziehau }
3375fdff524SSepherosa Ziehau
3385fdff524SSepherosa Ziehau int
rt2661_detach(void * xsc)3395fdff524SSepherosa Ziehau rt2661_detach(void *xsc)
3405fdff524SSepherosa Ziehau {
3415fdff524SSepherosa Ziehau struct rt2661_softc *sc = xsc;
34291b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
3435fdff524SSepherosa Ziehau
34491b30d50SMatthew Dillon RAL_LOCK(sc);
345feb94d24SRui Paulo rt2661_stop_locked(sc);
34691b30d50SMatthew Dillon RAL_UNLOCK(sc);
3475fdff524SSepherosa Ziehau
3485fdff524SSepherosa Ziehau ieee80211_ifdetach(ic);
34991b30d50SMatthew Dillon mbufq_drain(&sc->sc_snd);
3505fdff524SSepherosa Ziehau
3515fdff524SSepherosa Ziehau rt2661_free_tx_ring(sc, &sc->txq[0]);
3525fdff524SSepherosa Ziehau rt2661_free_tx_ring(sc, &sc->txq[1]);
3535fdff524SSepherosa Ziehau rt2661_free_tx_ring(sc, &sc->txq[2]);
3545fdff524SSepherosa Ziehau rt2661_free_tx_ring(sc, &sc->txq[3]);
3555fdff524SSepherosa Ziehau rt2661_free_tx_ring(sc, &sc->mgtq);
3565fdff524SSepherosa Ziehau rt2661_free_rx_ring(sc, &sc->rxq);
3575fdff524SSepherosa Ziehau
35893d249f7SMatthew Dillon #if defined(__DragonFly__)
35993d249f7SMatthew Dillon lockuninit(&sc->sc_mtx);
36093d249f7SMatthew Dillon #else
36191b30d50SMatthew Dillon mtx_destroy(&sc->sc_mtx);
36293d249f7SMatthew Dillon #endif
3635fdff524SSepherosa Ziehau
3645fdff524SSepherosa Ziehau return 0;
3655fdff524SSepherosa Ziehau }
3665fdff524SSepherosa Ziehau
367feb94d24SRui Paulo static struct ieee80211vap *
rt2661_vap_create(struct ieee80211com * ic,const char name[IFNAMSIZ],int unit,enum ieee80211_opmode opmode,int flags,const uint8_t bssid[IEEE80211_ADDR_LEN],const uint8_t mac[IEEE80211_ADDR_LEN])36891b30d50SMatthew Dillon rt2661_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
36918ef6e46SSascha Wildner enum ieee80211_opmode opmode, int flags,
370feb94d24SRui Paulo const uint8_t bssid[IEEE80211_ADDR_LEN],
371feb94d24SRui Paulo const uint8_t mac[IEEE80211_ADDR_LEN])
372feb94d24SRui Paulo {
37391b30d50SMatthew Dillon struct rt2661_softc *sc = ic->ic_softc;
374feb94d24SRui Paulo struct rt2661_vap *rvp;
375feb94d24SRui Paulo struct ieee80211vap *vap;
376feb94d24SRui Paulo
377feb94d24SRui Paulo switch (opmode) {
378feb94d24SRui Paulo case IEEE80211_M_STA:
379feb94d24SRui Paulo case IEEE80211_M_IBSS:
380feb94d24SRui Paulo case IEEE80211_M_AHDEMO:
381feb94d24SRui Paulo case IEEE80211_M_MONITOR:
382feb94d24SRui Paulo case IEEE80211_M_HOSTAP:
383feb94d24SRui Paulo case IEEE80211_M_MBSS:
384feb94d24SRui Paulo /* XXXRP: TBD */
385feb94d24SRui Paulo if (!TAILQ_EMPTY(&ic->ic_vaps)) {
38691b30d50SMatthew Dillon device_printf(sc->sc_dev, "only 1 vap supported\n");
387feb94d24SRui Paulo return NULL;
388feb94d24SRui Paulo }
389feb94d24SRui Paulo if (opmode == IEEE80211_M_STA)
390feb94d24SRui Paulo flags |= IEEE80211_CLONE_NOBEACONS;
391feb94d24SRui Paulo break;
392feb94d24SRui Paulo case IEEE80211_M_WDS:
393feb94d24SRui Paulo if (TAILQ_EMPTY(&ic->ic_vaps) ||
394feb94d24SRui Paulo ic->ic_opmode != IEEE80211_M_HOSTAP) {
39591b30d50SMatthew Dillon device_printf(sc->sc_dev,
39691b30d50SMatthew Dillon "wds only supported in ap mode\n");
397feb94d24SRui Paulo return NULL;
398feb94d24SRui Paulo }
399feb94d24SRui Paulo /*
400feb94d24SRui Paulo * Silently remove any request for a unique
401feb94d24SRui Paulo * bssid; WDS vap's always share the local
402feb94d24SRui Paulo * mac address.
403feb94d24SRui Paulo */
404feb94d24SRui Paulo flags &= ~IEEE80211_CLONE_BSSID;
405feb94d24SRui Paulo break;
406feb94d24SRui Paulo default:
40791b30d50SMatthew Dillon device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
408feb94d24SRui Paulo return NULL;
409feb94d24SRui Paulo }
41093d249f7SMatthew Dillon rvp = kmalloc(sizeof(struct rt2661_vap), M_80211_VAP, M_WAITOK | M_ZERO);
411feb94d24SRui Paulo vap = &rvp->ral_vap;
41291b30d50SMatthew Dillon ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
413feb94d24SRui Paulo
414feb94d24SRui Paulo /* override state transition machine */
415feb94d24SRui Paulo rvp->ral_newstate = vap->iv_newstate;
416feb94d24SRui Paulo vap->iv_newstate = rt2661_newstate;
417feb94d24SRui Paulo #if 0
418feb94d24SRui Paulo vap->iv_update_beacon = rt2661_beacon_update;
419feb94d24SRui Paulo #endif
420feb94d24SRui Paulo
421feb94d24SRui Paulo ieee80211_ratectl_init(vap);
422feb94d24SRui Paulo /* complete setup */
42391b30d50SMatthew Dillon ieee80211_vap_attach(vap, ieee80211_media_change,
42491b30d50SMatthew Dillon ieee80211_media_status, mac);
425feb94d24SRui Paulo if (TAILQ_FIRST(&ic->ic_vaps) == vap)
426feb94d24SRui Paulo ic->ic_opmode = opmode;
427feb94d24SRui Paulo return vap;
428feb94d24SRui Paulo }
429feb94d24SRui Paulo
430feb94d24SRui Paulo static void
rt2661_vap_delete(struct ieee80211vap * vap)431feb94d24SRui Paulo rt2661_vap_delete(struct ieee80211vap *vap)
432feb94d24SRui Paulo {
433feb94d24SRui Paulo struct rt2661_vap *rvp = RT2661_VAP(vap);
434feb94d24SRui Paulo
435feb94d24SRui Paulo ieee80211_ratectl_deinit(vap);
436feb94d24SRui Paulo ieee80211_vap_detach(vap);
43793d249f7SMatthew Dillon kfree(rvp, M_80211_VAP);
438feb94d24SRui Paulo }
439feb94d24SRui Paulo
4405fdff524SSepherosa Ziehau void
rt2661_shutdown(void * xsc)4415fdff524SSepherosa Ziehau rt2661_shutdown(void *xsc)
4425fdff524SSepherosa Ziehau {
4435fdff524SSepherosa Ziehau struct rt2661_softc *sc = xsc;
4445fdff524SSepherosa Ziehau
4455fdff524SSepherosa Ziehau rt2661_stop(sc);
4465fdff524SSepherosa Ziehau }
4475fdff524SSepherosa Ziehau
4485fdff524SSepherosa Ziehau void
rt2661_suspend(void * xsc)4495fdff524SSepherosa Ziehau rt2661_suspend(void *xsc)
4505fdff524SSepherosa Ziehau {
4515fdff524SSepherosa Ziehau struct rt2661_softc *sc = xsc;
4525fdff524SSepherosa Ziehau
4535fdff524SSepherosa Ziehau rt2661_stop(sc);
4545fdff524SSepherosa Ziehau }
4555fdff524SSepherosa Ziehau
4565fdff524SSepherosa Ziehau void
rt2661_resume(void * xsc)4575fdff524SSepherosa Ziehau rt2661_resume(void *xsc)
4585fdff524SSepherosa Ziehau {
4595fdff524SSepherosa Ziehau struct rt2661_softc *sc = xsc;
4605fdff524SSepherosa Ziehau
46191b30d50SMatthew Dillon if (sc->sc_ic.ic_nrunning > 0)
462feb94d24SRui Paulo rt2661_init(sc);
4635fdff524SSepherosa Ziehau }
4645fdff524SSepherosa Ziehau
4655fdff524SSepherosa Ziehau static void
rt2661_dma_map_addr(void * arg,bus_dma_segment_t * segs,int nseg,int error)4665fdff524SSepherosa Ziehau rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
4675fdff524SSepherosa Ziehau {
4685fdff524SSepherosa Ziehau if (error != 0)
4695fdff524SSepherosa Ziehau return;
4705fdff524SSepherosa Ziehau
4715fdff524SSepherosa Ziehau KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
4725fdff524SSepherosa Ziehau
4735fdff524SSepherosa Ziehau *(bus_addr_t *)arg = segs[0].ds_addr;
4745fdff524SSepherosa Ziehau }
4755fdff524SSepherosa Ziehau
4765fdff524SSepherosa Ziehau static int
rt2661_alloc_tx_ring(struct rt2661_softc * sc,struct rt2661_tx_ring * ring,int count)4775fdff524SSepherosa Ziehau rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
4785fdff524SSepherosa Ziehau int count)
4795fdff524SSepherosa Ziehau {
4805fdff524SSepherosa Ziehau int i, error;
4815fdff524SSepherosa Ziehau
4825fdff524SSepherosa Ziehau ring->count = count;
4835fdff524SSepherosa Ziehau ring->queued = 0;
484feb94d24SRui Paulo ring->cur = ring->next = ring->stat = 0;
4855fdff524SSepherosa Ziehau
48693d249f7SMatthew Dillon #if defined(__DragonFly__)
48793d249f7SMatthew Dillon error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
488*030b0c8cSMichael Neumann BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
48993d249f7SMatthew Dillon count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
49093d249f7SMatthew Dillon 0, &ring->desc_dmat);
49193d249f7SMatthew Dillon #else
49291b30d50SMatthew Dillon error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
493feb94d24SRui Paulo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
494feb94d24SRui Paulo count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
49591b30d50SMatthew Dillon 0, NULL, NULL, &ring->desc_dmat);
49693d249f7SMatthew Dillon #endif
4975fdff524SSepherosa Ziehau if (error != 0) {
4985fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not create desc DMA tag\n");
4995fdff524SSepherosa Ziehau goto fail;
5005fdff524SSepherosa Ziehau }
5015fdff524SSepherosa Ziehau
5025fdff524SSepherosa Ziehau error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
503feb94d24SRui Paulo BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
5045fdff524SSepherosa Ziehau if (error != 0) {
5055fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not allocate DMA memory\n");
5065fdff524SSepherosa Ziehau goto fail;
5075fdff524SSepherosa Ziehau }
5085fdff524SSepherosa Ziehau
5095fdff524SSepherosa Ziehau error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
5105fdff524SSepherosa Ziehau count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
5115fdff524SSepherosa Ziehau 0);
5125fdff524SSepherosa Ziehau if (error != 0) {
5135fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not load desc DMA map\n");
5145fdff524SSepherosa Ziehau goto fail;
5155fdff524SSepherosa Ziehau }
5165fdff524SSepherosa Ziehau
51793d249f7SMatthew Dillon ring->data = kmalloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
51893d249f7SMatthew Dillon M_INTWAIT | M_ZERO);
519feb94d24SRui Paulo if (ring->data == NULL) {
520feb94d24SRui Paulo device_printf(sc->sc_dev, "could not allocate soft data\n");
521feb94d24SRui Paulo error = ENOMEM;
522feb94d24SRui Paulo goto fail;
523feb94d24SRui Paulo }
5245fdff524SSepherosa Ziehau
52593d249f7SMatthew Dillon #if defined(__DragonFly__)
52693d249f7SMatthew Dillon error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
527*030b0c8cSMichael Neumann BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, MCLBYTES,
52893d249f7SMatthew Dillon RT2661_MAX_SCATTER, MCLBYTES, 0, &ring->data_dmat);
52993d249f7SMatthew Dillon #else
53091b30d50SMatthew Dillon error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
531feb94d24SRui Paulo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
53291b30d50SMatthew Dillon RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
53393d249f7SMatthew Dillon #endif
5345fdff524SSepherosa Ziehau if (error != 0) {
5355fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not create data DMA tag\n");
5365fdff524SSepherosa Ziehau goto fail;
5375fdff524SSepherosa Ziehau }
5385fdff524SSepherosa Ziehau
5395fdff524SSepherosa Ziehau for (i = 0; i < count; i++) {
5405fdff524SSepherosa Ziehau error = bus_dmamap_create(ring->data_dmat, 0,
5415fdff524SSepherosa Ziehau &ring->data[i].map);
5425fdff524SSepherosa Ziehau if (error != 0) {
5435fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not create DMA map\n");
5445fdff524SSepherosa Ziehau goto fail;
5455fdff524SSepherosa Ziehau }
5465fdff524SSepherosa Ziehau }
547feb94d24SRui Paulo
5485fdff524SSepherosa Ziehau return 0;
5495fdff524SSepherosa Ziehau
5505fdff524SSepherosa Ziehau fail: rt2661_free_tx_ring(sc, ring);
5515fdff524SSepherosa Ziehau return error;
5525fdff524SSepherosa Ziehau }
5535fdff524SSepherosa Ziehau
5545fdff524SSepherosa Ziehau static void
rt2661_reset_tx_ring(struct rt2661_softc * sc,struct rt2661_tx_ring * ring)5555fdff524SSepherosa Ziehau rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
5565fdff524SSepherosa Ziehau {
5575fdff524SSepherosa Ziehau struct rt2661_tx_desc *desc;
558feb94d24SRui Paulo struct rt2661_tx_data *data;
5595fdff524SSepherosa Ziehau int i;
5605fdff524SSepherosa Ziehau
5615fdff524SSepherosa Ziehau for (i = 0; i < ring->count; i++) {
5625fdff524SSepherosa Ziehau desc = &ring->desc[i];
5635fdff524SSepherosa Ziehau data = &ring->data[i];
5645fdff524SSepherosa Ziehau
5655fdff524SSepherosa Ziehau if (data->m != NULL) {
5665fdff524SSepherosa Ziehau bus_dmamap_sync(ring->data_dmat, data->map,
5675fdff524SSepherosa Ziehau BUS_DMASYNC_POSTWRITE);
5685fdff524SSepherosa Ziehau bus_dmamap_unload(ring->data_dmat, data->map);
5695fdff524SSepherosa Ziehau m_freem(data->m);
5705fdff524SSepherosa Ziehau data->m = NULL;
5715fdff524SSepherosa Ziehau }
5725fdff524SSepherosa Ziehau
573feb94d24SRui Paulo if (data->ni != NULL) {
574feb94d24SRui Paulo ieee80211_free_node(data->ni);
575feb94d24SRui Paulo data->ni = NULL;
576feb94d24SRui Paulo }
577feb94d24SRui Paulo
5785fdff524SSepherosa Ziehau desc->flags = 0;
5795fdff524SSepherosa Ziehau }
5805fdff524SSepherosa Ziehau
5815fdff524SSepherosa Ziehau bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
5825fdff524SSepherosa Ziehau
5835fdff524SSepherosa Ziehau ring->queued = 0;
584feb94d24SRui Paulo ring->cur = ring->next = ring->stat = 0;
5855fdff524SSepherosa Ziehau }
5865fdff524SSepherosa Ziehau
5875fdff524SSepherosa Ziehau static void
rt2661_free_tx_ring(struct rt2661_softc * sc,struct rt2661_tx_ring * ring)5885fdff524SSepherosa Ziehau rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
5895fdff524SSepherosa Ziehau {
590feb94d24SRui Paulo struct rt2661_tx_data *data;
5915fdff524SSepherosa Ziehau int i;
5925fdff524SSepherosa Ziehau
5935fdff524SSepherosa Ziehau if (ring->desc != NULL) {
5945fdff524SSepherosa Ziehau bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
5955fdff524SSepherosa Ziehau BUS_DMASYNC_POSTWRITE);
5965fdff524SSepherosa Ziehau bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
5975fdff524SSepherosa Ziehau bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
5985fdff524SSepherosa Ziehau }
5995fdff524SSepherosa Ziehau
600feb94d24SRui Paulo if (ring->desc_dmat != NULL)
6015fdff524SSepherosa Ziehau bus_dma_tag_destroy(ring->desc_dmat);
6025fdff524SSepherosa Ziehau
6035fdff524SSepherosa Ziehau if (ring->data != NULL) {
6045fdff524SSepherosa Ziehau for (i = 0; i < ring->count; i++) {
6055fdff524SSepherosa Ziehau data = &ring->data[i];
6065fdff524SSepherosa Ziehau
6075fdff524SSepherosa Ziehau if (data->m != NULL) {
6085fdff524SSepherosa Ziehau bus_dmamap_sync(ring->data_dmat, data->map,
6095fdff524SSepherosa Ziehau BUS_DMASYNC_POSTWRITE);
6105fdff524SSepherosa Ziehau bus_dmamap_unload(ring->data_dmat, data->map);
6115fdff524SSepherosa Ziehau m_freem(data->m);
6125fdff524SSepherosa Ziehau }
6135fdff524SSepherosa Ziehau
614feb94d24SRui Paulo if (data->ni != NULL)
615feb94d24SRui Paulo ieee80211_free_node(data->ni);
616feb94d24SRui Paulo
617feb94d24SRui Paulo if (data->map != NULL)
6185fdff524SSepherosa Ziehau bus_dmamap_destroy(ring->data_dmat, data->map);
6195fdff524SSepherosa Ziehau }
6205fdff524SSepherosa Ziehau
62193d249f7SMatthew Dillon kfree(ring->data, M_DEVBUF);
6225fdff524SSepherosa Ziehau }
6235fdff524SSepherosa Ziehau
624feb94d24SRui Paulo if (ring->data_dmat != NULL)
6255fdff524SSepherosa Ziehau bus_dma_tag_destroy(ring->data_dmat);
6265fdff524SSepherosa Ziehau }
6275fdff524SSepherosa Ziehau
6285fdff524SSepherosa Ziehau static int
rt2661_alloc_rx_ring(struct rt2661_softc * sc,struct rt2661_rx_ring * ring,int count)6295fdff524SSepherosa Ziehau rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
6305fdff524SSepherosa Ziehau int count)
6315fdff524SSepherosa Ziehau {
6325fdff524SSepherosa Ziehau struct rt2661_rx_desc *desc;
633feb94d24SRui Paulo struct rt2661_rx_data *data;
6345fdff524SSepherosa Ziehau bus_addr_t physaddr;
6355fdff524SSepherosa Ziehau int i, error;
6365fdff524SSepherosa Ziehau
6375fdff524SSepherosa Ziehau ring->count = count;
6385fdff524SSepherosa Ziehau ring->cur = ring->next = 0;
6395fdff524SSepherosa Ziehau
64093d249f7SMatthew Dillon #if defined(__DragonFly__)
64193d249f7SMatthew Dillon error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
642*030b0c8cSMichael Neumann BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
64393d249f7SMatthew Dillon count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
64493d249f7SMatthew Dillon 0, &ring->desc_dmat);
64593d249f7SMatthew Dillon #else
64691b30d50SMatthew Dillon error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
647feb94d24SRui Paulo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
648feb94d24SRui Paulo count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
64991b30d50SMatthew Dillon 0, NULL, NULL, &ring->desc_dmat);
65093d249f7SMatthew Dillon #endif
6515fdff524SSepherosa Ziehau if (error != 0) {
6525fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not create desc DMA tag\n");
6535fdff524SSepherosa Ziehau goto fail;
6545fdff524SSepherosa Ziehau }
6555fdff524SSepherosa Ziehau
6565fdff524SSepherosa Ziehau error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
657feb94d24SRui Paulo BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
6585fdff524SSepherosa Ziehau if (error != 0) {
6595fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not allocate DMA memory\n");
6605fdff524SSepherosa Ziehau goto fail;
6615fdff524SSepherosa Ziehau }
6625fdff524SSepherosa Ziehau
6635fdff524SSepherosa Ziehau error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
6645fdff524SSepherosa Ziehau count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
6655fdff524SSepherosa Ziehau 0);
6665fdff524SSepherosa Ziehau if (error != 0) {
6675fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not load desc DMA map\n");
6685fdff524SSepherosa Ziehau goto fail;
6695fdff524SSepherosa Ziehau }
6705fdff524SSepherosa Ziehau
67193d249f7SMatthew Dillon ring->data = kmalloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
67293d249f7SMatthew Dillon M_INTWAIT | M_ZERO);
673feb94d24SRui Paulo if (ring->data == NULL) {
674feb94d24SRui Paulo device_printf(sc->sc_dev, "could not allocate soft data\n");
675feb94d24SRui Paulo error = ENOMEM;
676feb94d24SRui Paulo goto fail;
677feb94d24SRui Paulo }
6785fdff524SSepherosa Ziehau
6795fdff524SSepherosa Ziehau /*
6805fdff524SSepherosa Ziehau * Pre-allocate Rx buffers and populate Rx ring.
6815fdff524SSepherosa Ziehau */
68293d249f7SMatthew Dillon #if defined(__DragonFly__)
68393d249f7SMatthew Dillon error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
684*030b0c8cSMichael Neumann BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, MCLBYTES,
68593d249f7SMatthew Dillon 1, MCLBYTES, 0, &ring->data_dmat);
68693d249f7SMatthew Dillon #else
68791b30d50SMatthew Dillon error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
688feb94d24SRui Paulo BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
68991b30d50SMatthew Dillon 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
69093d249f7SMatthew Dillon #endif
6915fdff524SSepherosa Ziehau if (error != 0) {
6925fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not create data DMA tag\n");
6935fdff524SSepherosa Ziehau goto fail;
6945fdff524SSepherosa Ziehau }
6955fdff524SSepherosa Ziehau
6965fdff524SSepherosa Ziehau for (i = 0; i < count; i++) {
6975fdff524SSepherosa Ziehau desc = &sc->rxq.desc[i];
6985fdff524SSepherosa Ziehau data = &sc->rxq.data[i];
6995fdff524SSepherosa Ziehau
7005fdff524SSepherosa Ziehau error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
7015fdff524SSepherosa Ziehau if (error != 0) {
7025fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not create DMA map\n");
7035fdff524SSepherosa Ziehau goto fail;
7045fdff524SSepherosa Ziehau }
7055fdff524SSepherosa Ziehau
706b5523eacSSascha Wildner data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
7075fdff524SSepherosa Ziehau if (data->m == NULL) {
7085fdff524SSepherosa Ziehau device_printf(sc->sc_dev,
7095fdff524SSepherosa Ziehau "could not allocate rx mbuf\n");
7105fdff524SSepherosa Ziehau error = ENOMEM;
7115fdff524SSepherosa Ziehau goto fail;
7125fdff524SSepherosa Ziehau }
7135fdff524SSepherosa Ziehau
7145fdff524SSepherosa Ziehau error = bus_dmamap_load(ring->data_dmat, data->map,
7155fdff524SSepherosa Ziehau mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
7165fdff524SSepherosa Ziehau &physaddr, 0);
7175fdff524SSepherosa Ziehau if (error != 0) {
7185fdff524SSepherosa Ziehau device_printf(sc->sc_dev,
7195fdff524SSepherosa Ziehau "could not load rx buf DMA map");
7205fdff524SSepherosa Ziehau goto fail;
7215fdff524SSepherosa Ziehau }
7225fdff524SSepherosa Ziehau
7235fdff524SSepherosa Ziehau desc->flags = htole32(RT2661_RX_BUSY);
7245fdff524SSepherosa Ziehau desc->physaddr = htole32(physaddr);
7255fdff524SSepherosa Ziehau }
7265fdff524SSepherosa Ziehau
7275fdff524SSepherosa Ziehau bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
7285fdff524SSepherosa Ziehau
7295fdff524SSepherosa Ziehau return 0;
7305fdff524SSepherosa Ziehau
7315fdff524SSepherosa Ziehau fail: rt2661_free_rx_ring(sc, ring);
7325fdff524SSepherosa Ziehau return error;
7335fdff524SSepherosa Ziehau }
7345fdff524SSepherosa Ziehau
7355fdff524SSepherosa Ziehau static void
rt2661_reset_rx_ring(struct rt2661_softc * sc,struct rt2661_rx_ring * ring)7365fdff524SSepherosa Ziehau rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
7375fdff524SSepherosa Ziehau {
7385fdff524SSepherosa Ziehau int i;
7395fdff524SSepherosa Ziehau
7405fdff524SSepherosa Ziehau for (i = 0; i < ring->count; i++)
7415fdff524SSepherosa Ziehau ring->desc[i].flags = htole32(RT2661_RX_BUSY);
7425fdff524SSepherosa Ziehau
7435fdff524SSepherosa Ziehau bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
7445fdff524SSepherosa Ziehau
7455fdff524SSepherosa Ziehau ring->cur = ring->next = 0;
7465fdff524SSepherosa Ziehau }
7475fdff524SSepherosa Ziehau
7485fdff524SSepherosa Ziehau static void
rt2661_free_rx_ring(struct rt2661_softc * sc,struct rt2661_rx_ring * ring)7495fdff524SSepherosa Ziehau rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
7505fdff524SSepherosa Ziehau {
751feb94d24SRui Paulo struct rt2661_rx_data *data;
7525fdff524SSepherosa Ziehau int i;
7535fdff524SSepherosa Ziehau
7545fdff524SSepherosa Ziehau if (ring->desc != NULL) {
7555fdff524SSepherosa Ziehau bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
7565fdff524SSepherosa Ziehau BUS_DMASYNC_POSTWRITE);
7575fdff524SSepherosa Ziehau bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
7585fdff524SSepherosa Ziehau bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
7595fdff524SSepherosa Ziehau }
7605fdff524SSepherosa Ziehau
761feb94d24SRui Paulo if (ring->desc_dmat != NULL)
7625fdff524SSepherosa Ziehau bus_dma_tag_destroy(ring->desc_dmat);
7635fdff524SSepherosa Ziehau
7645fdff524SSepherosa Ziehau if (ring->data != NULL) {
7655fdff524SSepherosa Ziehau for (i = 0; i < ring->count; i++) {
7665fdff524SSepherosa Ziehau data = &ring->data[i];
7675fdff524SSepherosa Ziehau
7685fdff524SSepherosa Ziehau if (data->m != NULL) {
7695fdff524SSepherosa Ziehau bus_dmamap_sync(ring->data_dmat, data->map,
7705fdff524SSepherosa Ziehau BUS_DMASYNC_POSTREAD);
7715fdff524SSepherosa Ziehau bus_dmamap_unload(ring->data_dmat, data->map);
7725fdff524SSepherosa Ziehau m_freem(data->m);
7735fdff524SSepherosa Ziehau }
7745fdff524SSepherosa Ziehau
775feb94d24SRui Paulo if (data->map != NULL)
7765fdff524SSepherosa Ziehau bus_dmamap_destroy(ring->data_dmat, data->map);
7775fdff524SSepherosa Ziehau }
7785fdff524SSepherosa Ziehau
77993d249f7SMatthew Dillon kfree(ring->data, M_DEVBUF);
7805fdff524SSepherosa Ziehau }
7815fdff524SSepherosa Ziehau
782feb94d24SRui Paulo if (ring->data_dmat != NULL)
7835fdff524SSepherosa Ziehau bus_dma_tag_destroy(ring->data_dmat);
7845fdff524SSepherosa Ziehau }
7855fdff524SSepherosa Ziehau
7865fdff524SSepherosa Ziehau static int
rt2661_newstate(struct ieee80211vap * vap,enum ieee80211_state nstate,int arg)787feb94d24SRui Paulo rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
7885fdff524SSepherosa Ziehau {
789feb94d24SRui Paulo struct rt2661_vap *rvp = RT2661_VAP(vap);
790feb94d24SRui Paulo struct ieee80211com *ic = vap->iv_ic;
7914f1aaf2fSImre Vadász struct rt2661_softc *sc = ic->ic_softc;
7925fdff524SSepherosa Ziehau int error;
7935fdff524SSepherosa Ziehau
794feb94d24SRui Paulo if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
7955fdff524SSepherosa Ziehau uint32_t tmp;
7965fdff524SSepherosa Ziehau
7975fdff524SSepherosa Ziehau /* abort TSF synchronization */
7985fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
7995fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
8005fdff524SSepherosa Ziehau }
8015fdff524SSepherosa Ziehau
802feb94d24SRui Paulo error = rvp->ral_newstate(vap, nstate, arg);
8035fdff524SSepherosa Ziehau
804feb94d24SRui Paulo if (error == 0 && nstate == IEEE80211_S_RUN) {
805feb94d24SRui Paulo struct ieee80211_node *ni = vap->iv_bss;
8065fdff524SSepherosa Ziehau
807feb94d24SRui Paulo if (vap->iv_opmode != IEEE80211_M_MONITOR) {
8085fdff524SSepherosa Ziehau rt2661_enable_mrr(sc);
8095fdff524SSepherosa Ziehau rt2661_set_txpreamble(sc);
810feb94d24SRui Paulo rt2661_set_basicrates(sc, &ni->ni_rates);
8115fdff524SSepherosa Ziehau rt2661_set_bssid(sc, ni->ni_bssid);
8125fdff524SSepherosa Ziehau }
8135fdff524SSepherosa Ziehau
814feb94d24SRui Paulo if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
815feb94d24SRui Paulo vap->iv_opmode == IEEE80211_M_IBSS ||
816feb94d24SRui Paulo vap->iv_opmode == IEEE80211_M_MBSS) {
817feb94d24SRui Paulo error = rt2661_prepare_beacon(sc, vap);
818feb94d24SRui Paulo if (error != 0)
819feb94d24SRui Paulo return error;
8205fdff524SSepherosa Ziehau }
821feb94d24SRui Paulo if (vap->iv_opmode != IEEE80211_M_MONITOR)
8225fdff524SSepherosa Ziehau rt2661_enable_tsf_sync(sc);
823feb94d24SRui Paulo else
824feb94d24SRui Paulo rt2661_enable_tsf(sc);
82599fda2c4SSepherosa Ziehau }
826feb94d24SRui Paulo return error;
8275fdff524SSepherosa Ziehau }
8285fdff524SSepherosa Ziehau
8295fdff524SSepherosa Ziehau /*
8305fdff524SSepherosa Ziehau * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
8315fdff524SSepherosa Ziehau * 93C66).
8325fdff524SSepherosa Ziehau */
8335fdff524SSepherosa Ziehau static uint16_t
rt2661_eeprom_read(struct rt2661_softc * sc,uint8_t addr)8345fdff524SSepherosa Ziehau rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
8355fdff524SSepherosa Ziehau {
8365fdff524SSepherosa Ziehau uint32_t tmp;
8375fdff524SSepherosa Ziehau uint16_t val;
8385fdff524SSepherosa Ziehau int n;
8395fdff524SSepherosa Ziehau
8405fdff524SSepherosa Ziehau /* clock C once before the first command */
8415fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, 0);
8425fdff524SSepherosa Ziehau
8435fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S);
8445fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
8455fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S);
8465fdff524SSepherosa Ziehau
8475fdff524SSepherosa Ziehau /* write start bit (1) */
8485fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
8495fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
8505fdff524SSepherosa Ziehau
8515fdff524SSepherosa Ziehau /* write READ opcode (10) */
8525fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
8535fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
8545fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S);
8555fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
8565fdff524SSepherosa Ziehau
8575fdff524SSepherosa Ziehau /* write address (A5-A0 or A7-A0) */
8585fdff524SSepherosa Ziehau n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
8595fdff524SSepherosa Ziehau for (; n >= 0; n--) {
8605fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S |
8615fdff524SSepherosa Ziehau (((addr >> n) & 1) << RT2661_SHIFT_D));
8625fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S |
8635fdff524SSepherosa Ziehau (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
8645fdff524SSepherosa Ziehau }
8655fdff524SSepherosa Ziehau
8665fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S);
8675fdff524SSepherosa Ziehau
8685fdff524SSepherosa Ziehau /* read data Q15-Q0 */
8695fdff524SSepherosa Ziehau val = 0;
8705fdff524SSepherosa Ziehau for (n = 15; n >= 0; n--) {
8715fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
8725fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
8735fdff524SSepherosa Ziehau val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
8745fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S);
8755fdff524SSepherosa Ziehau }
8765fdff524SSepherosa Ziehau
8775fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, 0);
8785fdff524SSepherosa Ziehau
8795fdff524SSepherosa Ziehau /* clear Chip Select and clock C */
8805fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_S);
8815fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, 0);
8825fdff524SSepherosa Ziehau RT2661_EEPROM_CTL(sc, RT2661_C);
8835fdff524SSepherosa Ziehau
8845fdff524SSepherosa Ziehau return val;
8855fdff524SSepherosa Ziehau }
8865fdff524SSepherosa Ziehau
8875fdff524SSepherosa Ziehau static void
rt2661_tx_intr(struct rt2661_softc * sc)8885fdff524SSepherosa Ziehau rt2661_tx_intr(struct rt2661_softc *sc)
8895fdff524SSepherosa Ziehau {
890feb94d24SRui Paulo struct rt2661_tx_ring *txq;
891feb94d24SRui Paulo struct rt2661_tx_data *data;
892feb94d24SRui Paulo uint32_t val;
89391b30d50SMatthew Dillon int error, qid, retrycnt;
894feb94d24SRui Paulo struct ieee80211vap *vap;
8955fdff524SSepherosa Ziehau
8965fdff524SSepherosa Ziehau for (;;) {
897feb94d24SRui Paulo struct ieee80211_node *ni;
898feb94d24SRui Paulo struct mbuf *m;
899e3ab8063SSepherosa Ziehau
9005fdff524SSepherosa Ziehau val = RAL_READ(sc, RT2661_STA_CSR4);
9015fdff524SSepherosa Ziehau if (!(val & RT2661_TX_STAT_VALID))
9025fdff524SSepherosa Ziehau break;
9035fdff524SSepherosa Ziehau
904feb94d24SRui Paulo /* retrieve the queue in which this frame was sent */
905feb94d24SRui Paulo qid = RT2661_TX_QID(val);
906feb94d24SRui Paulo txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
9075fdff524SSepherosa Ziehau
9085fdff524SSepherosa Ziehau /* retrieve rate control algorithm context */
909feb94d24SRui Paulo data = &txq->data[txq->stat];
910feb94d24SRui Paulo m = data->m;
911feb94d24SRui Paulo data->m = NULL;
912feb94d24SRui Paulo ni = data->ni;
913feb94d24SRui Paulo data->ni = NULL;
9145fdff524SSepherosa Ziehau
915feb94d24SRui Paulo /* if no frame has been sent, ignore */
916feb94d24SRui Paulo if (ni == NULL)
917feb94d24SRui Paulo continue;
91891b30d50SMatthew Dillon else
919051377a2SJoe Talbott vap = ni->ni_vap;
920051377a2SJoe Talbott
921feb94d24SRui Paulo switch (RT2661_TX_RESULT(val)) {
9225fdff524SSepherosa Ziehau case RT2661_TX_SUCCESS:
9235fdff524SSepherosa Ziehau retrycnt = RT2661_TX_RETRYCNT(val);
924feb94d24SRui Paulo
925feb94d24SRui Paulo DPRINTFN(sc, 10, "data frame sent successfully after "
926feb94d24SRui Paulo "%d retries\n", retrycnt);
927feb94d24SRui Paulo if (data->rix != IEEE80211_FIXED_RATE_NONE)
928feb94d24SRui Paulo ieee80211_ratectl_tx_complete(vap, ni,
929feb94d24SRui Paulo IEEE80211_RATECTL_TX_SUCCESS,
930feb94d24SRui Paulo &retrycnt, NULL);
93191b30d50SMatthew Dillon error = 0;
9325fdff524SSepherosa Ziehau break;
9335fdff524SSepherosa Ziehau
9345fdff524SSepherosa Ziehau case RT2661_TX_RETRY_FAIL:
935feb94d24SRui Paulo retrycnt = RT2661_TX_RETRYCNT(val);
936feb94d24SRui Paulo
937feb94d24SRui Paulo DPRINTFN(sc, 9, "%s\n",
938feb94d24SRui Paulo "sending data frame failed (too much retries)");
939feb94d24SRui Paulo if (data->rix != IEEE80211_FIXED_RATE_NONE)
940feb94d24SRui Paulo ieee80211_ratectl_tx_complete(vap, ni,
941feb94d24SRui Paulo IEEE80211_RATECTL_TX_FAILURE,
942feb94d24SRui Paulo &retrycnt, NULL);
94391b30d50SMatthew Dillon error = 1;
9445fdff524SSepherosa Ziehau break;
9455fdff524SSepherosa Ziehau
9465fdff524SSepherosa Ziehau default:
9475fdff524SSepherosa Ziehau /* other failure */
9485fdff524SSepherosa Ziehau device_printf(sc->sc_dev,
9495fdff524SSepherosa Ziehau "sending data frame failed 0x%08x\n", val);
95091b30d50SMatthew Dillon error = 1;
9515fdff524SSepherosa Ziehau }
9525fdff524SSepherosa Ziehau
953feb94d24SRui Paulo DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
954e3ab8063SSepherosa Ziehau
955feb94d24SRui Paulo txq->queued--;
956feb94d24SRui Paulo if (++txq->stat >= txq->count) /* faster than % count */
957feb94d24SRui Paulo txq->stat = 0;
958feb94d24SRui Paulo
95991b30d50SMatthew Dillon ieee80211_tx_complete(ni, m, error);
9605fdff524SSepherosa Ziehau }
961feb94d24SRui Paulo
962feb94d24SRui Paulo sc->sc_tx_timer = 0;
963feb94d24SRui Paulo
96491b30d50SMatthew Dillon rt2661_start(sc);
9655fdff524SSepherosa Ziehau }
9665fdff524SSepherosa Ziehau
9675fdff524SSepherosa Ziehau static void
rt2661_tx_dma_intr(struct rt2661_softc * sc,struct rt2661_tx_ring * txq)9685fdff524SSepherosa Ziehau rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
9695fdff524SSepherosa Ziehau {
9705fdff524SSepherosa Ziehau struct rt2661_tx_desc *desc;
971feb94d24SRui Paulo struct rt2661_tx_data *data;
9725fdff524SSepherosa Ziehau
9735fdff524SSepherosa Ziehau bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
9745fdff524SSepherosa Ziehau
9755fdff524SSepherosa Ziehau for (;;) {
9765fdff524SSepherosa Ziehau desc = &txq->desc[txq->next];
9775fdff524SSepherosa Ziehau data = &txq->data[txq->next];
9785fdff524SSepherosa Ziehau
9795fdff524SSepherosa Ziehau if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
9805fdff524SSepherosa Ziehau !(le32toh(desc->flags) & RT2661_TX_VALID))
9815fdff524SSepherosa Ziehau break;
9825fdff524SSepherosa Ziehau
9835fdff524SSepherosa Ziehau bus_dmamap_sync(txq->data_dmat, data->map,
9845fdff524SSepherosa Ziehau BUS_DMASYNC_POSTWRITE);
9855fdff524SSepherosa Ziehau bus_dmamap_unload(txq->data_dmat, data->map);
9865fdff524SSepherosa Ziehau
9875fdff524SSepherosa Ziehau /* descriptor is no longer valid */
9885fdff524SSepherosa Ziehau desc->flags &= ~htole32(RT2661_TX_VALID);
9895fdff524SSepherosa Ziehau
990feb94d24SRui Paulo DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
9915fdff524SSepherosa Ziehau
9925fdff524SSepherosa Ziehau if (++txq->next >= txq->count) /* faster than % count */
9935fdff524SSepherosa Ziehau txq->next = 0;
9945fdff524SSepherosa Ziehau }
9955fdff524SSepherosa Ziehau
9965fdff524SSepherosa Ziehau bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
9975fdff524SSepherosa Ziehau }
9985fdff524SSepherosa Ziehau
9995fdff524SSepherosa Ziehau static void
rt2661_rx_intr(struct rt2661_softc * sc)10005fdff524SSepherosa Ziehau rt2661_rx_intr(struct rt2661_softc *sc)
10015fdff524SSepherosa Ziehau {
100291b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
10035fdff524SSepherosa Ziehau struct rt2661_rx_desc *desc;
1004feb94d24SRui Paulo struct rt2661_rx_data *data;
10055fdff524SSepherosa Ziehau bus_addr_t physaddr;
1006feb94d24SRui Paulo struct ieee80211_frame *wh;
10075fdff524SSepherosa Ziehau struct ieee80211_node *ni;
10085fdff524SSepherosa Ziehau struct mbuf *mnew, *m;
10095fdff524SSepherosa Ziehau int error;
10105fdff524SSepherosa Ziehau
10115fdff524SSepherosa Ziehau bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
10125fdff524SSepherosa Ziehau BUS_DMASYNC_POSTREAD);
10135fdff524SSepherosa Ziehau
10145fdff524SSepherosa Ziehau for (;;) {
1015feb94d24SRui Paulo int8_t rssi, nf;
1016a6b13394SSepherosa Ziehau
10175fdff524SSepherosa Ziehau desc = &sc->rxq.desc[sc->rxq.cur];
10185fdff524SSepherosa Ziehau data = &sc->rxq.data[sc->rxq.cur];
10195fdff524SSepherosa Ziehau
1020feb94d24SRui Paulo if (le32toh(desc->flags) & RT2661_RX_BUSY)
10215fdff524SSepherosa Ziehau break;
10225fdff524SSepherosa Ziehau
1023feb94d24SRui Paulo if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1024feb94d24SRui Paulo (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
10255fdff524SSepherosa Ziehau /*
10265fdff524SSepherosa Ziehau * This should not happen since we did not request
10275fdff524SSepherosa Ziehau * to receive those frames when we filled TXRX_CSR0.
10285fdff524SSepherosa Ziehau */
1029feb94d24SRui Paulo DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1030feb94d24SRui Paulo le32toh(desc->flags));
103193d249f7SMatthew Dillon #if defined(__DragonFly__)
103293d249f7SMatthew Dillon /* not implemented */
103393d249f7SMatthew Dillon #else
103491b30d50SMatthew Dillon counter_u64_add(ic->ic_ierrors, 1);
103593d249f7SMatthew Dillon #endif
10365fdff524SSepherosa Ziehau goto skip;
10375fdff524SSepherosa Ziehau }
10385fdff524SSepherosa Ziehau
1039feb94d24SRui Paulo if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
104093d249f7SMatthew Dillon #if defined(__DragonFly__)
104193d249f7SMatthew Dillon /* not implemented */
104293d249f7SMatthew Dillon #else
104391b30d50SMatthew Dillon counter_u64_add(ic->ic_ierrors, 1);
104493d249f7SMatthew Dillon #endif
10455fdff524SSepherosa Ziehau goto skip;
10465fdff524SSepherosa Ziehau }
10475fdff524SSepherosa Ziehau
10485fdff524SSepherosa Ziehau /*
10495fdff524SSepherosa Ziehau * Try to allocate a new mbuf for this ring element and load it
10505fdff524SSepherosa Ziehau * before processing the current mbuf. If the ring element
10515fdff524SSepherosa Ziehau * cannot be loaded, drop the received packet and reuse the old
10525fdff524SSepherosa Ziehau * mbuf. In the unlikely case that the old mbuf can't be
10535fdff524SSepherosa Ziehau * reloaded either, explicitly panic.
10545fdff524SSepherosa Ziehau */
1055b5523eacSSascha Wildner mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
10565fdff524SSepherosa Ziehau if (mnew == NULL) {
105793d249f7SMatthew Dillon #if defined(__DragonFly__)
105893d249f7SMatthew Dillon /* not implemented */
105993d249f7SMatthew Dillon #else
106091b30d50SMatthew Dillon counter_u64_add(ic->ic_ierrors, 1);
106193d249f7SMatthew Dillon #endif
10625fdff524SSepherosa Ziehau goto skip;
10635fdff524SSepherosa Ziehau }
10645fdff524SSepherosa Ziehau
10655fdff524SSepherosa Ziehau bus_dmamap_sync(sc->rxq.data_dmat, data->map,
10665fdff524SSepherosa Ziehau BUS_DMASYNC_POSTREAD);
10675fdff524SSepherosa Ziehau bus_dmamap_unload(sc->rxq.data_dmat, data->map);
10685fdff524SSepherosa Ziehau
10695fdff524SSepherosa Ziehau error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
10705fdff524SSepherosa Ziehau mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
10715fdff524SSepherosa Ziehau &physaddr, 0);
10725fdff524SSepherosa Ziehau if (error != 0) {
10735fdff524SSepherosa Ziehau m_freem(mnew);
10745fdff524SSepherosa Ziehau
10755fdff524SSepherosa Ziehau /* try to reload the old mbuf */
10765fdff524SSepherosa Ziehau error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
10775fdff524SSepherosa Ziehau mtod(data->m, void *), MCLBYTES,
10785fdff524SSepherosa Ziehau rt2661_dma_map_addr, &physaddr, 0);
10795fdff524SSepherosa Ziehau if (error != 0) {
10805fdff524SSepherosa Ziehau /* very unlikely that it will fail... */
10815fdff524SSepherosa Ziehau panic("%s: could not load old rx mbuf",
10825fdff524SSepherosa Ziehau device_get_name(sc->sc_dev));
10835fdff524SSepherosa Ziehau }
108493d249f7SMatthew Dillon #if defined(__DragonFly__)
108593d249f7SMatthew Dillon /* not implemented */
108693d249f7SMatthew Dillon #else
108791b30d50SMatthew Dillon counter_u64_add(ic->ic_ierrors, 1);
108893d249f7SMatthew Dillon #endif
10895fdff524SSepherosa Ziehau goto skip;
10905fdff524SSepherosa Ziehau }
10915fdff524SSepherosa Ziehau
10925fdff524SSepherosa Ziehau /*
10935fdff524SSepherosa Ziehau * New mbuf successfully loaded, update Rx ring and continue
10945fdff524SSepherosa Ziehau * processing.
10955fdff524SSepherosa Ziehau */
10965fdff524SSepherosa Ziehau m = data->m;
10975fdff524SSepherosa Ziehau data->m = mnew;
10985fdff524SSepherosa Ziehau desc->physaddr = htole32(physaddr);
10995fdff524SSepherosa Ziehau
11005fdff524SSepherosa Ziehau /* finalize mbuf */
1101feb94d24SRui Paulo m->m_pkthdr.len = m->m_len =
1102feb94d24SRui Paulo (le32toh(desc->flags) >> 16) & 0xfff;
11035fdff524SSepherosa Ziehau
1104feb94d24SRui Paulo rssi = rt2661_get_rssi(sc, desc->rssi);
1105d2eb9874SSepherosa Ziehau /* Error happened during RSSI conversion. */
1106d2eb9874SSepherosa Ziehau if (rssi < 0)
1107feb94d24SRui Paulo rssi = -30; /* XXX ignored by net80211 */
1108feb94d24SRui Paulo nf = RT2661_NOISE_FLOOR;
1109d2eb9874SSepherosa Ziehau
1110feb94d24SRui Paulo if (ieee80211_radiotap_active(ic)) {
11115fdff524SSepherosa Ziehau struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
11125fdff524SSepherosa Ziehau uint32_t tsf_lo, tsf_hi;
11135fdff524SSepherosa Ziehau
11145fdff524SSepherosa Ziehau /* get timestamp (low and high 32 bits) */
11155fdff524SSepherosa Ziehau tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
11165fdff524SSepherosa Ziehau tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
11175fdff524SSepherosa Ziehau
11185fdff524SSepherosa Ziehau tap->wr_tsf =
11195fdff524SSepherosa Ziehau htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
11205fdff524SSepherosa Ziehau tap->wr_flags = 0;
1121feb94d24SRui Paulo tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1122feb94d24SRui Paulo (desc->flags & htole32(RT2661_RX_OFDM)) ?
1123feb94d24SRui Paulo IEEE80211_T_OFDM : IEEE80211_T_CCK);
1124feb94d24SRui Paulo tap->wr_antsignal = nf + rssi;
1125feb94d24SRui Paulo tap->wr_antnoise = nf;
11265fdff524SSepherosa Ziehau }
1127feb94d24SRui Paulo sc->sc_flags |= RAL_INPUT_RUNNING;
112891b30d50SMatthew Dillon RAL_UNLOCK(sc);
1129feb94d24SRui Paulo wh = mtod(m, struct ieee80211_frame *);
11305fdff524SSepherosa Ziehau
11315fdff524SSepherosa Ziehau /* send the frame to the 802.11 layer */
1132feb94d24SRui Paulo ni = ieee80211_find_rxnode(ic,
1133feb94d24SRui Paulo (struct ieee80211_frame_min *)wh);
1134feb94d24SRui Paulo if (ni != NULL) {
1135feb94d24SRui Paulo (void) ieee80211_input(ni, m, rssi, nf);
11365fdff524SSepherosa Ziehau ieee80211_free_node(ni);
1137feb94d24SRui Paulo } else
1138feb94d24SRui Paulo (void) ieee80211_input_all(ic, m, rssi, nf);
1139feb94d24SRui Paulo
114091b30d50SMatthew Dillon RAL_LOCK(sc);
1141feb94d24SRui Paulo sc->sc_flags &= ~RAL_INPUT_RUNNING;
11425fdff524SSepherosa Ziehau
11435fdff524SSepherosa Ziehau skip: desc->flags |= htole32(RT2661_RX_BUSY);
11445fdff524SSepherosa Ziehau
1145feb94d24SRui Paulo DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
11465fdff524SSepherosa Ziehau
11475fdff524SSepherosa Ziehau sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
11485fdff524SSepherosa Ziehau }
11495fdff524SSepherosa Ziehau
11505fdff524SSepherosa Ziehau bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
11515fdff524SSepherosa Ziehau BUS_DMASYNC_PREWRITE);
11525fdff524SSepherosa Ziehau }
11535fdff524SSepherosa Ziehau
11545fdff524SSepherosa Ziehau /* ARGSUSED */
11555fdff524SSepherosa Ziehau static void
rt2661_mcu_beacon_expire(struct rt2661_softc * sc)11565fdff524SSepherosa Ziehau rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
11575fdff524SSepherosa Ziehau {
11585fdff524SSepherosa Ziehau /* do nothing */
11595fdff524SSepherosa Ziehau }
11605fdff524SSepherosa Ziehau
11615fdff524SSepherosa Ziehau static void
rt2661_mcu_wakeup(struct rt2661_softc * sc)11625fdff524SSepherosa Ziehau rt2661_mcu_wakeup(struct rt2661_softc *sc)
11635fdff524SSepherosa Ziehau {
11645fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
11655fdff524SSepherosa Ziehau
11665fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
11675fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
11685fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
11695fdff524SSepherosa Ziehau
11705fdff524SSepherosa Ziehau /* send wakeup command to MCU */
11715fdff524SSepherosa Ziehau rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
11725fdff524SSepherosa Ziehau }
11735fdff524SSepherosa Ziehau
11745fdff524SSepherosa Ziehau static void
rt2661_mcu_cmd_intr(struct rt2661_softc * sc)11755fdff524SSepherosa Ziehau rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
11765fdff524SSepherosa Ziehau {
11775fdff524SSepherosa Ziehau RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
11785fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
11795fdff524SSepherosa Ziehau }
11805fdff524SSepherosa Ziehau
1181feb94d24SRui Paulo void
rt2661_intr(void * arg)11825fdff524SSepherosa Ziehau rt2661_intr(void *arg)
11835fdff524SSepherosa Ziehau {
11845fdff524SSepherosa Ziehau struct rt2661_softc *sc = arg;
11855fdff524SSepherosa Ziehau uint32_t r1, r2;
11865fdff524SSepherosa Ziehau
118791b30d50SMatthew Dillon RAL_LOCK(sc);
118891b30d50SMatthew Dillon
11895fdff524SSepherosa Ziehau /* disable MAC and MCU interrupts */
11905fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
11915fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
11925fdff524SSepherosa Ziehau
11935fdff524SSepherosa Ziehau /* don't re-enable interrupts if we're shutting down */
119491b30d50SMatthew Dillon if (!(sc->sc_flags & RAL_RUNNING)) {
119591b30d50SMatthew Dillon RAL_UNLOCK(sc);
11965fdff524SSepherosa Ziehau return;
1197feb94d24SRui Paulo }
11985fdff524SSepherosa Ziehau
11995fdff524SSepherosa Ziehau r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
12005fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
12015fdff524SSepherosa Ziehau
12025fdff524SSepherosa Ziehau r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
12035fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
12045fdff524SSepherosa Ziehau
12055fdff524SSepherosa Ziehau if (r1 & RT2661_MGT_DONE)
12065fdff524SSepherosa Ziehau rt2661_tx_dma_intr(sc, &sc->mgtq);
12075fdff524SSepherosa Ziehau
12085fdff524SSepherosa Ziehau if (r1 & RT2661_RX_DONE)
12095fdff524SSepherosa Ziehau rt2661_rx_intr(sc);
12105fdff524SSepherosa Ziehau
12115fdff524SSepherosa Ziehau if (r1 & RT2661_TX0_DMA_DONE)
12125fdff524SSepherosa Ziehau rt2661_tx_dma_intr(sc, &sc->txq[0]);
12135fdff524SSepherosa Ziehau
12145fdff524SSepherosa Ziehau if (r1 & RT2661_TX1_DMA_DONE)
12155fdff524SSepherosa Ziehau rt2661_tx_dma_intr(sc, &sc->txq[1]);
12165fdff524SSepherosa Ziehau
12175fdff524SSepherosa Ziehau if (r1 & RT2661_TX2_DMA_DONE)
12185fdff524SSepherosa Ziehau rt2661_tx_dma_intr(sc, &sc->txq[2]);
12195fdff524SSepherosa Ziehau
12205fdff524SSepherosa Ziehau if (r1 & RT2661_TX3_DMA_DONE)
12215fdff524SSepherosa Ziehau rt2661_tx_dma_intr(sc, &sc->txq[3]);
12225fdff524SSepherosa Ziehau
12235fdff524SSepherosa Ziehau if (r1 & RT2661_TX_DONE)
12245fdff524SSepherosa Ziehau rt2661_tx_intr(sc);
12255fdff524SSepherosa Ziehau
12265fdff524SSepherosa Ziehau if (r2 & RT2661_MCU_CMD_DONE)
12275fdff524SSepherosa Ziehau rt2661_mcu_cmd_intr(sc);
12285fdff524SSepherosa Ziehau
12295fdff524SSepherosa Ziehau if (r2 & RT2661_MCU_BEACON_EXPIRE)
12305fdff524SSepherosa Ziehau rt2661_mcu_beacon_expire(sc);
12315fdff524SSepherosa Ziehau
12325fdff524SSepherosa Ziehau if (r2 & RT2661_MCU_WAKEUP)
12335fdff524SSepherosa Ziehau rt2661_mcu_wakeup(sc);
12345fdff524SSepherosa Ziehau
12355fdff524SSepherosa Ziehau /* re-enable MAC and MCU interrupts */
12365fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
12375fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
12385fdff524SSepherosa Ziehau
123991b30d50SMatthew Dillon RAL_UNLOCK(sc);
12405fdff524SSepherosa Ziehau }
12415fdff524SSepherosa Ziehau
12425fdff524SSepherosa Ziehau static uint8_t
rt2661_plcp_signal(int rate)12435fdff524SSepherosa Ziehau rt2661_plcp_signal(int rate)
12445fdff524SSepherosa Ziehau {
12455fdff524SSepherosa Ziehau switch (rate) {
12465fdff524SSepherosa Ziehau /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
12475fdff524SSepherosa Ziehau case 12: return 0xb;
12485fdff524SSepherosa Ziehau case 18: return 0xf;
12495fdff524SSepherosa Ziehau case 24: return 0xa;
12505fdff524SSepherosa Ziehau case 36: return 0xe;
12515fdff524SSepherosa Ziehau case 48: return 0x9;
12525fdff524SSepherosa Ziehau case 72: return 0xd;
12535fdff524SSepherosa Ziehau case 96: return 0x8;
12545fdff524SSepherosa Ziehau case 108: return 0xc;
12555fdff524SSepherosa Ziehau
1256feb94d24SRui Paulo /* CCK rates (NB: not IEEE std, device-specific) */
1257feb94d24SRui Paulo case 2: return 0x0;
1258feb94d24SRui Paulo case 4: return 0x1;
1259feb94d24SRui Paulo case 11: return 0x2;
1260feb94d24SRui Paulo case 22: return 0x3;
12615fdff524SSepherosa Ziehau }
1262feb94d24SRui Paulo return 0xff; /* XXX unsupported/unknown rate */
12635fdff524SSepherosa Ziehau }
12645fdff524SSepherosa Ziehau
12655fdff524SSepherosa Ziehau static void
rt2661_setup_tx_desc(struct rt2661_softc * sc,struct rt2661_tx_desc * desc,uint32_t flags,uint16_t xflags,int len,int rate,const bus_dma_segment_t * segs,int nsegs,int ac)12665fdff524SSepherosa Ziehau rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
12675fdff524SSepherosa Ziehau uint32_t flags, uint16_t xflags, int len, int rate,
1268feb94d24SRui Paulo const bus_dma_segment_t *segs, int nsegs, int ac)
12695fdff524SSepherosa Ziehau {
127091b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
12715fdff524SSepherosa Ziehau uint16_t plcp_length;
12725fdff524SSepherosa Ziehau int i, remainder;
12735fdff524SSepherosa Ziehau
12745fdff524SSepherosa Ziehau desc->flags = htole32(flags);
12755fdff524SSepherosa Ziehau desc->flags |= htole32(len << 16);
1276feb94d24SRui Paulo desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
12775fdff524SSepherosa Ziehau
12785fdff524SSepherosa Ziehau desc->xflags = htole16(xflags);
12795fdff524SSepherosa Ziehau desc->xflags |= htole16(nsegs << 13);
12805fdff524SSepherosa Ziehau
12815fdff524SSepherosa Ziehau desc->wme = htole16(
12825fdff524SSepherosa Ziehau RT2661_QID(ac) |
12835fdff524SSepherosa Ziehau RT2661_AIFSN(2) |
12845fdff524SSepherosa Ziehau RT2661_LOGCWMIN(4) |
12855fdff524SSepherosa Ziehau RT2661_LOGCWMAX(10));
12865fdff524SSepherosa Ziehau
12875fdff524SSepherosa Ziehau /*
1288feb94d24SRui Paulo * Remember in which queue this frame was sent. This field is driver
1289feb94d24SRui Paulo * private data only. It will be made available by the NIC in STA_CSR4
1290feb94d24SRui Paulo * on Tx interrupts.
12915fdff524SSepherosa Ziehau */
1292feb94d24SRui Paulo desc->qid = ac;
12935fdff524SSepherosa Ziehau
12945fdff524SSepherosa Ziehau /* setup PLCP fields */
12955fdff524SSepherosa Ziehau desc->plcp_signal = rt2661_plcp_signal(rate);
12965fdff524SSepherosa Ziehau desc->plcp_service = 4;
12975fdff524SSepherosa Ziehau
12985fdff524SSepherosa Ziehau len += IEEE80211_CRC_LEN;
1299feb94d24SRui Paulo if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
13005fdff524SSepherosa Ziehau desc->flags |= htole32(RT2661_TX_OFDM);
13015fdff524SSepherosa Ziehau
13025fdff524SSepherosa Ziehau plcp_length = len & 0xfff;
13035fdff524SSepherosa Ziehau desc->plcp_length_hi = plcp_length >> 6;
13045fdff524SSepherosa Ziehau desc->plcp_length_lo = plcp_length & 0x3f;
13055fdff524SSepherosa Ziehau } else {
130691b30d50SMatthew Dillon plcp_length = howmany(16 * len, rate);
13075fdff524SSepherosa Ziehau if (rate == 22) {
13085fdff524SSepherosa Ziehau remainder = (16 * len) % 22;
13095fdff524SSepherosa Ziehau if (remainder != 0 && remainder < 7)
13105fdff524SSepherosa Ziehau desc->plcp_service |= RT2661_PLCP_LENGEXT;
13115fdff524SSepherosa Ziehau }
13125fdff524SSepherosa Ziehau desc->plcp_length_hi = plcp_length >> 8;
13135fdff524SSepherosa Ziehau desc->plcp_length_lo = plcp_length & 0xff;
13145fdff524SSepherosa Ziehau
13155fdff524SSepherosa Ziehau if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
13165fdff524SSepherosa Ziehau desc->plcp_signal |= 0x08;
13175fdff524SSepherosa Ziehau }
13185fdff524SSepherosa Ziehau
13195fdff524SSepherosa Ziehau /* RT2x61 supports scatter with up to 5 segments */
13205fdff524SSepherosa Ziehau for (i = 0; i < nsegs; i++) {
13215fdff524SSepherosa Ziehau desc->addr[i] = htole32(segs[i].ds_addr);
13225fdff524SSepherosa Ziehau desc->len [i] = htole16(segs[i].ds_len);
13235fdff524SSepherosa Ziehau }
13245fdff524SSepherosa Ziehau }
13255fdff524SSepherosa Ziehau
13265fdff524SSepherosa Ziehau static int
rt2661_tx_mgt(struct rt2661_softc * sc,struct mbuf * m0,struct ieee80211_node * ni)13275fdff524SSepherosa Ziehau rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
13285fdff524SSepherosa Ziehau struct ieee80211_node *ni)
13295fdff524SSepherosa Ziehau {
1330feb94d24SRui Paulo struct ieee80211vap *vap = ni->ni_vap;
1331feb94d24SRui Paulo struct ieee80211com *ic = ni->ni_ic;
13325fdff524SSepherosa Ziehau struct rt2661_tx_desc *desc;
1333feb94d24SRui Paulo struct rt2661_tx_data *data;
13345fdff524SSepherosa Ziehau struct ieee80211_frame *wh;
1335feb94d24SRui Paulo struct ieee80211_key *k;
1336feb94d24SRui Paulo bus_dma_segment_t segs[RT2661_MAX_SCATTER];
13375fdff524SSepherosa Ziehau uint16_t dur;
13385fdff524SSepherosa Ziehau uint32_t flags = 0; /* XXX HWSEQ */
1339feb94d24SRui Paulo int nsegs, rate, error;
13405fdff524SSepherosa Ziehau
13415fdff524SSepherosa Ziehau desc = &sc->mgtq.desc[sc->mgtq.cur];
13425fdff524SSepherosa Ziehau data = &sc->mgtq.data[sc->mgtq.cur];
13435fdff524SSepherosa Ziehau
1344feb94d24SRui Paulo rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
13455fdff524SSepherosa Ziehau
1346feb94d24SRui Paulo wh = mtod(m0, struct ieee80211_frame *);
1347feb94d24SRui Paulo
1348085ff963SMatthew Dillon if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1349feb94d24SRui Paulo k = ieee80211_crypto_encap(ni, m0);
1350feb94d24SRui Paulo if (k == NULL) {
1351feb94d24SRui Paulo m_freem(m0);
1352feb94d24SRui Paulo return ENOBUFS;
1353feb94d24SRui Paulo }
1354feb94d24SRui Paulo }
1355feb94d24SRui Paulo
135693d249f7SMatthew Dillon #if defined(__DragonFly__)
135793d249f7SMatthew Dillon error = bus_dmamap_load_mbuf_segment(sc->mgtq.data_dmat, data->map, m0,
1358877608c7SMatthew Dillon segs, 1, &nsegs, BUS_DMA_NOWAIT);
135993d249f7SMatthew Dillon #else
136091b30d50SMatthew Dillon error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0,
136191b30d50SMatthew Dillon segs, &nsegs, 0);
136293d249f7SMatthew Dillon #endif
13635fdff524SSepherosa Ziehau if (error != 0) {
13645fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
13655fdff524SSepherosa Ziehau error);
13665fdff524SSepherosa Ziehau m_freem(m0);
13675fdff524SSepherosa Ziehau return error;
13685fdff524SSepherosa Ziehau }
13695fdff524SSepherosa Ziehau
1370feb94d24SRui Paulo if (ieee80211_radiotap_active_vap(vap)) {
13715fdff524SSepherosa Ziehau struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
13725fdff524SSepherosa Ziehau
13735fdff524SSepherosa Ziehau tap->wt_flags = 0;
13745fdff524SSepherosa Ziehau tap->wt_rate = rate;
13755fdff524SSepherosa Ziehau
1376feb94d24SRui Paulo ieee80211_radiotap_tx(vap, m0);
13775fdff524SSepherosa Ziehau }
13785fdff524SSepherosa Ziehau
13795fdff524SSepherosa Ziehau data->m = m0;
1380feb94d24SRui Paulo data->ni = ni;
1381feb94d24SRui Paulo /* management frames are not taken into account for amrr */
1382feb94d24SRui Paulo data->rix = IEEE80211_FIXED_RATE_NONE;
13835fdff524SSepherosa Ziehau
13845fdff524SSepherosa Ziehau wh = mtod(m0, struct ieee80211_frame *);
13855fdff524SSepherosa Ziehau
13865fdff524SSepherosa Ziehau if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
13875fdff524SSepherosa Ziehau flags |= RT2661_TX_NEED_ACK;
13885fdff524SSepherosa Ziehau
1389feb94d24SRui Paulo dur = ieee80211_ack_duration(ic->ic_rt,
1390feb94d24SRui Paulo rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
13915fdff524SSepherosa Ziehau *(uint16_t *)wh->i_dur = htole16(dur);
13925fdff524SSepherosa Ziehau
13935fdff524SSepherosa Ziehau /* tell hardware to add timestamp in probe responses */
13945fdff524SSepherosa Ziehau if ((wh->i_fc[0] &
13955fdff524SSepherosa Ziehau (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
13965fdff524SSepherosa Ziehau (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
13975fdff524SSepherosa Ziehau flags |= RT2661_TX_TIMESTAMP;
13985fdff524SSepherosa Ziehau }
13995fdff524SSepherosa Ziehau
14005fdff524SSepherosa Ziehau rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1401feb94d24SRui Paulo m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
14025fdff524SSepherosa Ziehau
14035fdff524SSepherosa Ziehau bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
14045fdff524SSepherosa Ziehau bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
14055fdff524SSepherosa Ziehau BUS_DMASYNC_PREWRITE);
14065fdff524SSepherosa Ziehau
1407feb94d24SRui Paulo DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1408feb94d24SRui Paulo m0->m_pkthdr.len, sc->mgtq.cur, rate);
14095fdff524SSepherosa Ziehau
14105fdff524SSepherosa Ziehau /* kick mgt */
14115fdff524SSepherosa Ziehau sc->mgtq.queued++;
14125fdff524SSepherosa Ziehau sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
14135fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
14145fdff524SSepherosa Ziehau
14155fdff524SSepherosa Ziehau return 0;
14165fdff524SSepherosa Ziehau }
14175fdff524SSepherosa Ziehau
1418feb94d24SRui Paulo static int
rt2661_sendprot(struct rt2661_softc * sc,int ac,const struct mbuf * m,struct ieee80211_node * ni,int prot,int rate)1419feb94d24SRui Paulo rt2661_sendprot(struct rt2661_softc *sc, int ac,
1420feb94d24SRui Paulo const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
14215fdff524SSepherosa Ziehau {
1422feb94d24SRui Paulo struct ieee80211com *ic = ni->ni_ic;
1423feb94d24SRui Paulo struct rt2661_tx_ring *txq = &sc->txq[ac];
1424feb94d24SRui Paulo const struct ieee80211_frame *wh;
1425feb94d24SRui Paulo struct rt2661_tx_desc *desc;
1426feb94d24SRui Paulo struct rt2661_tx_data *data;
1427feb94d24SRui Paulo struct mbuf *mprot;
142891b30d50SMatthew Dillon int protrate, ackrate, pktlen, flags, isshort, error;
1429feb94d24SRui Paulo uint16_t dur;
1430feb94d24SRui Paulo bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1431feb94d24SRui Paulo int nsegs;
14325fdff524SSepherosa Ziehau
1433feb94d24SRui Paulo KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1434feb94d24SRui Paulo ("protection %d", prot));
1435feb94d24SRui Paulo
1436feb94d24SRui Paulo wh = mtod(m, const struct ieee80211_frame *);
1437feb94d24SRui Paulo pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1438feb94d24SRui Paulo
1439feb94d24SRui Paulo protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
144091b30d50SMatthew Dillon ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1441feb94d24SRui Paulo
1442feb94d24SRui Paulo isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1443feb94d24SRui Paulo dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1444feb94d24SRui Paulo + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1445feb94d24SRui Paulo flags = RT2661_TX_MORE_FRAG;
1446feb94d24SRui Paulo if (prot == IEEE80211_PROT_RTSCTS) {
1447feb94d24SRui Paulo /* NB: CTS is the same size as an ACK */
1448feb94d24SRui Paulo dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1449feb94d24SRui Paulo flags |= RT2661_TX_NEED_ACK;
1450feb94d24SRui Paulo mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1451feb94d24SRui Paulo } else {
1452feb94d24SRui Paulo mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1453feb94d24SRui Paulo }
1454feb94d24SRui Paulo if (mprot == NULL) {
1455feb94d24SRui Paulo /* XXX stat + msg */
1456feb94d24SRui Paulo return ENOBUFS;
14575fdff524SSepherosa Ziehau }
14585fdff524SSepherosa Ziehau
1459feb94d24SRui Paulo data = &txq->data[txq->cur];
1460feb94d24SRui Paulo desc = &txq->desc[txq->cur];
14615fdff524SSepherosa Ziehau
146293d249f7SMatthew Dillon #if defined(__DragonFly__)
146393d249f7SMatthew Dillon error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, mprot,
1464877608c7SMatthew Dillon segs, 1, &nsegs, BUS_DMA_NOWAIT);
146593d249f7SMatthew Dillon #else
146691b30d50SMatthew Dillon error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs,
146791b30d50SMatthew Dillon &nsegs, 0);
146893d249f7SMatthew Dillon #endif
1469feb94d24SRui Paulo if (error != 0) {
1470feb94d24SRui Paulo device_printf(sc->sc_dev,
1471feb94d24SRui Paulo "could not map mbuf (error %d)\n", error);
1472feb94d24SRui Paulo m_freem(mprot);
1473feb94d24SRui Paulo return error;
1474feb94d24SRui Paulo }
14755fdff524SSepherosa Ziehau
1476feb94d24SRui Paulo data->m = mprot;
1477feb94d24SRui Paulo data->ni = ieee80211_ref_node(ni);
1478feb94d24SRui Paulo /* ctl frames are not taken into account for amrr */
1479feb94d24SRui Paulo data->rix = IEEE80211_FIXED_RATE_NONE;
14805fdff524SSepherosa Ziehau
1481feb94d24SRui Paulo rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1482feb94d24SRui Paulo protrate, segs, 1, ac);
1483feb94d24SRui Paulo
1484feb94d24SRui Paulo bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1485feb94d24SRui Paulo bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1486feb94d24SRui Paulo
1487feb94d24SRui Paulo txq->queued++;
1488feb94d24SRui Paulo txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1489feb94d24SRui Paulo
1490feb94d24SRui Paulo return 0;
14915fdff524SSepherosa Ziehau }
14925fdff524SSepherosa Ziehau
14935fdff524SSepherosa Ziehau static int
rt2661_tx_data(struct rt2661_softc * sc,struct mbuf * m0,struct ieee80211_node * ni,int ac)14945fdff524SSepherosa Ziehau rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
14955fdff524SSepherosa Ziehau struct ieee80211_node *ni, int ac)
14965fdff524SSepherosa Ziehau {
1497feb94d24SRui Paulo struct ieee80211vap *vap = ni->ni_vap;
149891b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
14995fdff524SSepherosa Ziehau struct rt2661_tx_ring *txq = &sc->txq[ac];
15005fdff524SSepherosa Ziehau struct rt2661_tx_desc *desc;
1501feb94d24SRui Paulo struct rt2661_tx_data *data;
15025fdff524SSepherosa Ziehau struct ieee80211_frame *wh;
1503feb94d24SRui Paulo const struct ieee80211_txparam *tp;
1504feb94d24SRui Paulo struct ieee80211_key *k;
15055fdff524SSepherosa Ziehau const struct chanAccParams *cap;
15065fdff524SSepherosa Ziehau struct mbuf *mnew;
1507feb94d24SRui Paulo bus_dma_segment_t segs[RT2661_MAX_SCATTER];
15085fdff524SSepherosa Ziehau uint16_t dur;
1509feb94d24SRui Paulo uint32_t flags;
1510feb94d24SRui Paulo int error, nsegs, rate, noack = 0;
15115fdff524SSepherosa Ziehau
15125fdff524SSepherosa Ziehau wh = mtod(m0, struct ieee80211_frame *);
1513feb94d24SRui Paulo
1514feb94d24SRui Paulo tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1515feb94d24SRui Paulo if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1516feb94d24SRui Paulo rate = tp->mcastrate;
1517feb94d24SRui Paulo } else if (m0->m_flags & M_EAPOL) {
1518feb94d24SRui Paulo rate = tp->mgmtrate;
1519feb94d24SRui Paulo } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1520feb94d24SRui Paulo rate = tp->ucastrate;
1521feb94d24SRui Paulo } else {
152291b30d50SMatthew Dillon (void) ieee80211_ratectl_rate(ni, NULL, 0);
1523feb94d24SRui Paulo rate = ni->ni_txrate;
1524feb94d24SRui Paulo }
1525feb94d24SRui Paulo rate &= IEEE80211_RATE_VAL;
1526feb94d24SRui Paulo
15275fdff524SSepherosa Ziehau if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
15285fdff524SSepherosa Ziehau cap = &ic->ic_wme.wme_chanParams;
15295fdff524SSepherosa Ziehau noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
15305fdff524SSepherosa Ziehau }
15315fdff524SSepherosa Ziehau
1532085ff963SMatthew Dillon if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1533feb94d24SRui Paulo k = ieee80211_crypto_encap(ni, m0);
15345fdff524SSepherosa Ziehau if (k == NULL) {
15355fdff524SSepherosa Ziehau m_freem(m0);
15365fdff524SSepherosa Ziehau return ENOBUFS;
15375fdff524SSepherosa Ziehau }
15385fdff524SSepherosa Ziehau
15395fdff524SSepherosa Ziehau /* packet header may have moved, reset our local pointer */
15405fdff524SSepherosa Ziehau wh = mtod(m0, struct ieee80211_frame *);
15415fdff524SSepherosa Ziehau }
15425fdff524SSepherosa Ziehau
1543feb94d24SRui Paulo flags = 0;
1544feb94d24SRui Paulo if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1545feb94d24SRui Paulo int prot = IEEE80211_PROT_NONE;
1546feb94d24SRui Paulo if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1547feb94d24SRui Paulo prot = IEEE80211_PROT_RTSCTS;
1548feb94d24SRui Paulo else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1549feb94d24SRui Paulo ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1550feb94d24SRui Paulo prot = ic->ic_protmode;
1551feb94d24SRui Paulo if (prot != IEEE80211_PROT_NONE) {
1552feb94d24SRui Paulo error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1553feb94d24SRui Paulo if (error) {
15545fdff524SSepherosa Ziehau m_freem(m0);
15555fdff524SSepherosa Ziehau return error;
15565fdff524SSepherosa Ziehau }
15575fdff524SSepherosa Ziehau flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
15585fdff524SSepherosa Ziehau }
1559feb94d24SRui Paulo }
15605fdff524SSepherosa Ziehau
15615fdff524SSepherosa Ziehau data = &txq->data[txq->cur];
15625fdff524SSepherosa Ziehau desc = &txq->desc[txq->cur];
15635fdff524SSepherosa Ziehau
156493d249f7SMatthew Dillon #if defined(__DragonFly__)
156593d249f7SMatthew Dillon error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map, m0,
1566877608c7SMatthew Dillon segs, 1, &nsegs, BUS_DMA_NOWAIT);
156793d249f7SMatthew Dillon #else
156891b30d50SMatthew Dillon error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs,
156991b30d50SMatthew Dillon &nsegs, 0);
157093d249f7SMatthew Dillon #endif
15715fdff524SSepherosa Ziehau if (error != 0 && error != EFBIG) {
15725fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
15735fdff524SSepherosa Ziehau error);
15745fdff524SSepherosa Ziehau m_freem(m0);
15755fdff524SSepherosa Ziehau return error;
15765fdff524SSepherosa Ziehau }
15775fdff524SSepherosa Ziehau if (error != 0) {
1578b5523eacSSascha Wildner mnew = m_defrag(m0, M_NOWAIT);
15795fdff524SSepherosa Ziehau if (mnew == NULL) {
15805fdff524SSepherosa Ziehau device_printf(sc->sc_dev,
15815fdff524SSepherosa Ziehau "could not defragment mbuf\n");
15825fdff524SSepherosa Ziehau m_freem(m0);
15835fdff524SSepherosa Ziehau return ENOBUFS;
15845fdff524SSepherosa Ziehau }
15855fdff524SSepherosa Ziehau m0 = mnew;
15865fdff524SSepherosa Ziehau
158793d249f7SMatthew Dillon #if defined(__DragonFly__)
158893d249f7SMatthew Dillon error = bus_dmamap_load_mbuf_segment(txq->data_dmat, data->map,
1589877608c7SMatthew Dillon m0, segs, 1, &nsegs, BUS_DMA_NOWAIT);
159093d249f7SMatthew Dillon #else
159191b30d50SMatthew Dillon error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0,
159291b30d50SMatthew Dillon segs, &nsegs, 0);
159393d249f7SMatthew Dillon #endif
15945fdff524SSepherosa Ziehau if (error != 0) {
15955fdff524SSepherosa Ziehau device_printf(sc->sc_dev,
15965fdff524SSepherosa Ziehau "could not map mbuf (error %d)\n", error);
15975fdff524SSepherosa Ziehau m_freem(m0);
15985fdff524SSepherosa Ziehau return error;
15995fdff524SSepherosa Ziehau }
16005fdff524SSepherosa Ziehau
16015fdff524SSepherosa Ziehau /* packet header have moved, reset our local pointer */
16025fdff524SSepherosa Ziehau wh = mtod(m0, struct ieee80211_frame *);
16035fdff524SSepherosa Ziehau }
16045fdff524SSepherosa Ziehau
1605feb94d24SRui Paulo if (ieee80211_radiotap_active_vap(vap)) {
16065fdff524SSepherosa Ziehau struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
16075fdff524SSepherosa Ziehau
16085fdff524SSepherosa Ziehau tap->wt_flags = 0;
16095fdff524SSepherosa Ziehau tap->wt_rate = rate;
16105fdff524SSepherosa Ziehau
1611feb94d24SRui Paulo ieee80211_radiotap_tx(vap, m0);
16125fdff524SSepherosa Ziehau }
16135fdff524SSepherosa Ziehau
16145fdff524SSepherosa Ziehau data->m = m0;
1615feb94d24SRui Paulo data->ni = ni;
16169dd87f8aSSepherosa Ziehau
1617feb94d24SRui Paulo /* remember link conditions for rate adaptation algorithm */
1618feb94d24SRui Paulo if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1619feb94d24SRui Paulo data->rix = ni->ni_txrate;
1620feb94d24SRui Paulo /* XXX probably need last rssi value and not avg */
1621feb94d24SRui Paulo data->rssi = ic->ic_node_getrssi(ni);
1622feb94d24SRui Paulo } else
1623feb94d24SRui Paulo data->rix = IEEE80211_FIXED_RATE_NONE;
16245fdff524SSepherosa Ziehau
16255fdff524SSepherosa Ziehau if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
16265fdff524SSepherosa Ziehau flags |= RT2661_TX_NEED_ACK;
16275fdff524SSepherosa Ziehau
1628feb94d24SRui Paulo dur = ieee80211_ack_duration(ic->ic_rt,
1629feb94d24SRui Paulo rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
16305fdff524SSepherosa Ziehau *(uint16_t *)wh->i_dur = htole16(dur);
16315fdff524SSepherosa Ziehau }
16325fdff524SSepherosa Ziehau
1633feb94d24SRui Paulo rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1634feb94d24SRui Paulo nsegs, ac);
16355fdff524SSepherosa Ziehau
16365fdff524SSepherosa Ziehau bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
16375fdff524SSepherosa Ziehau bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
16385fdff524SSepherosa Ziehau
1639feb94d24SRui Paulo DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1640feb94d24SRui Paulo m0->m_pkthdr.len, txq->cur, rate);
16415fdff524SSepherosa Ziehau
16425fdff524SSepherosa Ziehau /* kick Tx */
16435fdff524SSepherosa Ziehau txq->queued++;
16445fdff524SSepherosa Ziehau txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
16455fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
16465fdff524SSepherosa Ziehau
16475fdff524SSepherosa Ziehau return 0;
16485fdff524SSepherosa Ziehau }
16495fdff524SSepherosa Ziehau
165091b30d50SMatthew Dillon static int
rt2661_transmit(struct ieee80211com * ic,struct mbuf * m)165191b30d50SMatthew Dillon rt2661_transmit(struct ieee80211com *ic, struct mbuf *m)
1652feb94d24SRui Paulo {
165391b30d50SMatthew Dillon struct rt2661_softc *sc = ic->ic_softc;
165491b30d50SMatthew Dillon int error;
165591b30d50SMatthew Dillon
165691b30d50SMatthew Dillon RAL_LOCK(sc);
165791b30d50SMatthew Dillon if ((sc->sc_flags & RAL_RUNNING) == 0) {
165891b30d50SMatthew Dillon RAL_UNLOCK(sc);
165991b30d50SMatthew Dillon return (ENXIO);
166091b30d50SMatthew Dillon }
166191b30d50SMatthew Dillon error = mbufq_enqueue(&sc->sc_snd, m);
166291b30d50SMatthew Dillon if (error) {
166391b30d50SMatthew Dillon RAL_UNLOCK(sc);
166491b30d50SMatthew Dillon return (error);
166591b30d50SMatthew Dillon }
166691b30d50SMatthew Dillon rt2661_start(sc);
166791b30d50SMatthew Dillon RAL_UNLOCK(sc);
166891b30d50SMatthew Dillon
166991b30d50SMatthew Dillon return (0);
167091b30d50SMatthew Dillon }
167191b30d50SMatthew Dillon
167291b30d50SMatthew Dillon static void
rt2661_start(struct rt2661_softc * sc)167391b30d50SMatthew Dillon rt2661_start(struct rt2661_softc *sc)
167491b30d50SMatthew Dillon {
1675feb94d24SRui Paulo struct mbuf *m;
1676feb94d24SRui Paulo struct ieee80211_node *ni;
1677feb94d24SRui Paulo int ac;
1678feb94d24SRui Paulo
167991b30d50SMatthew Dillon RAL_LOCK_ASSERT(sc);
168091b30d50SMatthew Dillon
1681feb94d24SRui Paulo /* prevent management frames from being sent if we're not ready */
168291b30d50SMatthew Dillon if (!(sc->sc_flags & RAL_RUNNING) || sc->sc_invalid)
1683feb94d24SRui Paulo return;
1684feb94d24SRui Paulo
168591b30d50SMatthew Dillon while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1686feb94d24SRui Paulo ac = M_WME_GETAC(m);
1687feb94d24SRui Paulo if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1688feb94d24SRui Paulo /* there is no place left in this ring */
168991b30d50SMatthew Dillon mbufq_prepend(&sc->sc_snd, m);
1690feb94d24SRui Paulo break;
1691feb94d24SRui Paulo }
1692feb94d24SRui Paulo ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1693feb94d24SRui Paulo if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1694feb94d24SRui Paulo ieee80211_free_node(ni);
169591b30d50SMatthew Dillon if_inc_counter(ni->ni_vap->iv_ifp,
169691b30d50SMatthew Dillon IFCOUNTER_OERRORS, 1);
1697feb94d24SRui Paulo break;
1698feb94d24SRui Paulo }
1699feb94d24SRui Paulo sc->sc_tx_timer = 5;
1700feb94d24SRui Paulo }
1701feb94d24SRui Paulo }
1702feb94d24SRui Paulo
1703feb94d24SRui Paulo static int
rt2661_raw_xmit(struct ieee80211_node * ni,struct mbuf * m,const struct ieee80211_bpf_params * params)1704feb94d24SRui Paulo rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1705feb94d24SRui Paulo const struct ieee80211_bpf_params *params)
1706feb94d24SRui Paulo {
1707feb94d24SRui Paulo struct ieee80211com *ic = ni->ni_ic;
17084f1aaf2fSImre Vadász struct rt2661_softc *sc = ic->ic_softc;
1709feb94d24SRui Paulo
171091b30d50SMatthew Dillon RAL_LOCK(sc);
171191b30d50SMatthew Dillon
17125fdff524SSepherosa Ziehau /* prevent management frames from being sent if we're not ready */
171391b30d50SMatthew Dillon if (!(sc->sc_flags & RAL_RUNNING)) {
171491b30d50SMatthew Dillon RAL_UNLOCK(sc);
1715feb94d24SRui Paulo m_freem(m);
1716feb94d24SRui Paulo return ENETDOWN;
1717feb94d24SRui Paulo }
17185fdff524SSepherosa Ziehau if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
171991b30d50SMatthew Dillon RAL_UNLOCK(sc);
1720feb94d24SRui Paulo m_freem(m);
1721feb94d24SRui Paulo return ENOBUFS; /* XXX */
17225fdff524SSepherosa Ziehau }
17235fdff524SSepherosa Ziehau
1724feb94d24SRui Paulo /*
1725feb94d24SRui Paulo * Legacy path; interpret frame contents to decide
1726feb94d24SRui Paulo * precisely how to send the frame.
1727feb94d24SRui Paulo * XXX raw path
1728feb94d24SRui Paulo */
1729feb94d24SRui Paulo if (rt2661_tx_mgt(sc, m, ni) != 0)
1730feb94d24SRui Paulo goto bad;
17315fdff524SSepherosa Ziehau sc->sc_tx_timer = 5;
1732feb94d24SRui Paulo
173391b30d50SMatthew Dillon RAL_UNLOCK(sc);
173491b30d50SMatthew Dillon
1735feb94d24SRui Paulo return 0;
1736feb94d24SRui Paulo bad:
173791b30d50SMatthew Dillon RAL_UNLOCK(sc);
1738feb94d24SRui Paulo return EIO; /* XXX */
17395fdff524SSepherosa Ziehau }
17405fdff524SSepherosa Ziehau
17415fdff524SSepherosa Ziehau static void
rt2661_watchdog(void * arg)174291b30d50SMatthew Dillon rt2661_watchdog(void *arg)
17435fdff524SSepherosa Ziehau {
1744feb94d24SRui Paulo struct rt2661_softc *sc = (struct rt2661_softc *)arg;
17455fdff524SSepherosa Ziehau
174691b30d50SMatthew Dillon RAL_LOCK_ASSERT(sc);
174791b30d50SMatthew Dillon
174891b30d50SMatthew Dillon KASSERT(sc->sc_flags & RAL_RUNNING, ("not running"));
1749feb94d24SRui Paulo
1750feb94d24SRui Paulo if (sc->sc_invalid) /* card ejected */
1751feb94d24SRui Paulo return;
1752feb94d24SRui Paulo
1753feb94d24SRui Paulo if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
175491b30d50SMatthew Dillon device_printf(sc->sc_dev, "device timeout\n");
1755feb94d24SRui Paulo rt2661_init_locked(sc);
175693d249f7SMatthew Dillon #if defined(__DragonFly__)
175793d249f7SMatthew Dillon /* not implemented */
175893d249f7SMatthew Dillon #else
175991b30d50SMatthew Dillon counter_u64_add(sc->sc_ic.ic_oerrors, 1);
176093d249f7SMatthew Dillon #endif
1761feb94d24SRui Paulo /* NB: callout is reset in rt2661_init() */
17625fdff524SSepherosa Ziehau return;
17635fdff524SSepherosa Ziehau }
176491b30d50SMatthew Dillon callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
17655fdff524SSepherosa Ziehau }
17665fdff524SSepherosa Ziehau
176791b30d50SMatthew Dillon static void
rt2661_parent(struct ieee80211com * ic)176891b30d50SMatthew Dillon rt2661_parent(struct ieee80211com *ic)
17695fdff524SSepherosa Ziehau {
17704f1aaf2fSImre Vadász struct rt2661_softc *sc = ic->ic_softc;
177191b30d50SMatthew Dillon int startall = 0;
17725fdff524SSepherosa Ziehau
177391b30d50SMatthew Dillon RAL_LOCK(sc);
177491b30d50SMatthew Dillon if (ic->ic_nrunning > 0) {
177591b30d50SMatthew Dillon if ((sc->sc_flags & RAL_RUNNING) == 0) {
1776feb94d24SRui Paulo rt2661_init_locked(sc);
1777feb94d24SRui Paulo startall = 1;
1778feb94d24SRui Paulo } else
17794f898719SImre Vadász rt2661_update_promisc(ic);
178091b30d50SMatthew Dillon } else if (sc->sc_flags & RAL_RUNNING)
1781feb94d24SRui Paulo rt2661_stop_locked(sc);
178291b30d50SMatthew Dillon RAL_UNLOCK(sc);
1783feb94d24SRui Paulo if (startall)
1784feb94d24SRui Paulo ieee80211_start_all(ic);
17855fdff524SSepherosa Ziehau }
17865fdff524SSepherosa Ziehau
17875fdff524SSepherosa Ziehau static void
rt2661_bbp_write(struct rt2661_softc * sc,uint8_t reg,uint8_t val)17885fdff524SSepherosa Ziehau rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
17895fdff524SSepherosa Ziehau {
17905fdff524SSepherosa Ziehau uint32_t tmp;
17915fdff524SSepherosa Ziehau int ntries;
17925fdff524SSepherosa Ziehau
17935fdff524SSepherosa Ziehau for (ntries = 0; ntries < 100; ntries++) {
17945fdff524SSepherosa Ziehau if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
17955fdff524SSepherosa Ziehau break;
17965fdff524SSepherosa Ziehau DELAY(1);
17975fdff524SSepherosa Ziehau }
17985fdff524SSepherosa Ziehau if (ntries == 100) {
17995fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not write to BBP\n");
18005fdff524SSepherosa Ziehau return;
18015fdff524SSepherosa Ziehau }
18025fdff524SSepherosa Ziehau
18035fdff524SSepherosa Ziehau tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
18045fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
18055fdff524SSepherosa Ziehau
1806feb94d24SRui Paulo DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
18075fdff524SSepherosa Ziehau }
18085fdff524SSepherosa Ziehau
18095fdff524SSepherosa Ziehau static uint8_t
rt2661_bbp_read(struct rt2661_softc * sc,uint8_t reg)18105fdff524SSepherosa Ziehau rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
18115fdff524SSepherosa Ziehau {
18125fdff524SSepherosa Ziehau uint32_t val;
18135fdff524SSepherosa Ziehau int ntries;
18145fdff524SSepherosa Ziehau
18155fdff524SSepherosa Ziehau for (ntries = 0; ntries < 100; ntries++) {
18165fdff524SSepherosa Ziehau if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
18175fdff524SSepherosa Ziehau break;
18185fdff524SSepherosa Ziehau DELAY(1);
18195fdff524SSepherosa Ziehau }
18205fdff524SSepherosa Ziehau if (ntries == 100) {
18215fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not read from BBP\n");
18225fdff524SSepherosa Ziehau return 0;
18235fdff524SSepherosa Ziehau }
18245fdff524SSepherosa Ziehau
18255fdff524SSepherosa Ziehau val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
18265fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_PHY_CSR3, val);
18275fdff524SSepherosa Ziehau
18285fdff524SSepherosa Ziehau for (ntries = 0; ntries < 100; ntries++) {
18295fdff524SSepherosa Ziehau val = RAL_READ(sc, RT2661_PHY_CSR3);
18305fdff524SSepherosa Ziehau if (!(val & RT2661_BBP_BUSY))
18315fdff524SSepherosa Ziehau return val & 0xff;
18325fdff524SSepherosa Ziehau DELAY(1);
18335fdff524SSepherosa Ziehau }
18345fdff524SSepherosa Ziehau
18355fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not read from BBP\n");
18365fdff524SSepherosa Ziehau return 0;
18375fdff524SSepherosa Ziehau }
18385fdff524SSepherosa Ziehau
18395fdff524SSepherosa Ziehau static void
rt2661_rf_write(struct rt2661_softc * sc,uint8_t reg,uint32_t val)18405fdff524SSepherosa Ziehau rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
18415fdff524SSepherosa Ziehau {
18425fdff524SSepherosa Ziehau uint32_t tmp;
18435fdff524SSepherosa Ziehau int ntries;
18445fdff524SSepherosa Ziehau
18455fdff524SSepherosa Ziehau for (ntries = 0; ntries < 100; ntries++) {
18465fdff524SSepherosa Ziehau if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
18475fdff524SSepherosa Ziehau break;
18485fdff524SSepherosa Ziehau DELAY(1);
18495fdff524SSepherosa Ziehau }
18505fdff524SSepherosa Ziehau if (ntries == 100) {
18515fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not write to RF\n");
18525fdff524SSepherosa Ziehau return;
18535fdff524SSepherosa Ziehau }
18545fdff524SSepherosa Ziehau
18555fdff524SSepherosa Ziehau tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
18565fdff524SSepherosa Ziehau (reg & 3);
18575fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
18585fdff524SSepherosa Ziehau
18595fdff524SSepherosa Ziehau /* remember last written value in sc */
18605fdff524SSepherosa Ziehau sc->rf_regs[reg] = val;
18615fdff524SSepherosa Ziehau
1862feb94d24SRui Paulo DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
18635fdff524SSepherosa Ziehau }
18645fdff524SSepherosa Ziehau
18655fdff524SSepherosa Ziehau static int
rt2661_tx_cmd(struct rt2661_softc * sc,uint8_t cmd,uint16_t arg)18665fdff524SSepherosa Ziehau rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
18675fdff524SSepherosa Ziehau {
18685fdff524SSepherosa Ziehau if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
18695fdff524SSepherosa Ziehau return EIO; /* there is already a command pending */
18705fdff524SSepherosa Ziehau
18715fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
18725fdff524SSepherosa Ziehau RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
18735fdff524SSepherosa Ziehau
18745fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
18755fdff524SSepherosa Ziehau
18765fdff524SSepherosa Ziehau return 0;
18775fdff524SSepherosa Ziehau }
18785fdff524SSepherosa Ziehau
18795fdff524SSepherosa Ziehau static void
rt2661_select_antenna(struct rt2661_softc * sc)18805fdff524SSepherosa Ziehau rt2661_select_antenna(struct rt2661_softc *sc)
18815fdff524SSepherosa Ziehau {
18825fdff524SSepherosa Ziehau uint8_t bbp4, bbp77;
18835fdff524SSepherosa Ziehau uint32_t tmp;
18845fdff524SSepherosa Ziehau
18855fdff524SSepherosa Ziehau bbp4 = rt2661_bbp_read(sc, 4);
18865fdff524SSepherosa Ziehau bbp77 = rt2661_bbp_read(sc, 77);
18875fdff524SSepherosa Ziehau
18885fdff524SSepherosa Ziehau /* TBD */
18895fdff524SSepherosa Ziehau
18905fdff524SSepherosa Ziehau /* make sure Rx is disabled before switching antenna */
18915fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
18925fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
18935fdff524SSepherosa Ziehau
18945fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 4, bbp4);
18955fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 77, bbp77);
18965fdff524SSepherosa Ziehau
18975fdff524SSepherosa Ziehau /* restore Rx filter */
18985fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
18995fdff524SSepherosa Ziehau }
19005fdff524SSepherosa Ziehau
19015fdff524SSepherosa Ziehau /*
19025fdff524SSepherosa Ziehau * Enable multi-rate retries for frames sent at OFDM rates.
19035fdff524SSepherosa Ziehau * In 802.11b/g mode, allow fallback to CCK rates.
19045fdff524SSepherosa Ziehau */
19055fdff524SSepherosa Ziehau static void
rt2661_enable_mrr(struct rt2661_softc * sc)19065fdff524SSepherosa Ziehau rt2661_enable_mrr(struct rt2661_softc *sc)
19075fdff524SSepherosa Ziehau {
190891b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
19095fdff524SSepherosa Ziehau uint32_t tmp;
19105fdff524SSepherosa Ziehau
19115fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
19125fdff524SSepherosa Ziehau
19135fdff524SSepherosa Ziehau tmp &= ~RT2661_MRR_CCK_FALLBACK;
1914feb94d24SRui Paulo if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
19155fdff524SSepherosa Ziehau tmp |= RT2661_MRR_CCK_FALLBACK;
19165fdff524SSepherosa Ziehau tmp |= RT2661_MRR_ENABLED;
19175fdff524SSepherosa Ziehau
19185fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
19195fdff524SSepherosa Ziehau }
19205fdff524SSepherosa Ziehau
19215fdff524SSepherosa Ziehau static void
rt2661_set_txpreamble(struct rt2661_softc * sc)19225fdff524SSepherosa Ziehau rt2661_set_txpreamble(struct rt2661_softc *sc)
19235fdff524SSepherosa Ziehau {
192491b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
19255fdff524SSepherosa Ziehau uint32_t tmp;
19265fdff524SSepherosa Ziehau
19275fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
19285fdff524SSepherosa Ziehau
19295fdff524SSepherosa Ziehau tmp &= ~RT2661_SHORT_PREAMBLE;
1930feb94d24SRui Paulo if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
19315fdff524SSepherosa Ziehau tmp |= RT2661_SHORT_PREAMBLE;
19325fdff524SSepherosa Ziehau
19335fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
19345fdff524SSepherosa Ziehau }
19355fdff524SSepherosa Ziehau
19365fdff524SSepherosa Ziehau static void
rt2661_set_basicrates(struct rt2661_softc * sc,const struct ieee80211_rateset * rs)1937feb94d24SRui Paulo rt2661_set_basicrates(struct rt2661_softc *sc,
1938feb94d24SRui Paulo const struct ieee80211_rateset *rs)
19395fdff524SSepherosa Ziehau {
194091b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
19415fdff524SSepherosa Ziehau uint32_t mask = 0;
19425fdff524SSepherosa Ziehau uint8_t rate;
194391b30d50SMatthew Dillon int i;
19445fdff524SSepherosa Ziehau
19455fdff524SSepherosa Ziehau for (i = 0; i < rs->rs_nrates; i++) {
19465fdff524SSepherosa Ziehau rate = rs->rs_rates[i];
19475fdff524SSepherosa Ziehau
19485fdff524SSepherosa Ziehau if (!(rate & IEEE80211_RATE_BASIC))
19495fdff524SSepherosa Ziehau continue;
19505fdff524SSepherosa Ziehau
195191b30d50SMatthew Dillon mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,
195291b30d50SMatthew Dillon IEEE80211_RV(rate));
19535fdff524SSepherosa Ziehau }
19545fdff524SSepherosa Ziehau
19555fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
19565fdff524SSepherosa Ziehau
1957feb94d24SRui Paulo DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
19585fdff524SSepherosa Ziehau }
19595fdff524SSepherosa Ziehau
19605fdff524SSepherosa Ziehau /*
19615fdff524SSepherosa Ziehau * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
19625fdff524SSepherosa Ziehau * driver.
19635fdff524SSepherosa Ziehau */
19645fdff524SSepherosa Ziehau static void
rt2661_select_band(struct rt2661_softc * sc,struct ieee80211_channel * c)19655fdff524SSepherosa Ziehau rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
19665fdff524SSepherosa Ziehau {
19675fdff524SSepherosa Ziehau uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
19685fdff524SSepherosa Ziehau uint32_t tmp;
19695fdff524SSepherosa Ziehau
19705fdff524SSepherosa Ziehau /* update all BBP registers that depend on the band */
19715fdff524SSepherosa Ziehau bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
19725fdff524SSepherosa Ziehau bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
19735fdff524SSepherosa Ziehau if (IEEE80211_IS_CHAN_5GHZ(c)) {
19745fdff524SSepherosa Ziehau bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
19755fdff524SSepherosa Ziehau bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
19765fdff524SSepherosa Ziehau }
19775fdff524SSepherosa Ziehau if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
19785fdff524SSepherosa Ziehau (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
19795fdff524SSepherosa Ziehau bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
19805fdff524SSepherosa Ziehau }
19815fdff524SSepherosa Ziehau
19825fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 17, bbp17);
19835fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 96, bbp96);
19845fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 104, bbp104);
19855fdff524SSepherosa Ziehau
19865fdff524SSepherosa Ziehau if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
19875fdff524SSepherosa Ziehau (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
19885fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 75, 0x80);
19895fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 86, 0x80);
19905fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 88, 0x80);
19915fdff524SSepherosa Ziehau }
19925fdff524SSepherosa Ziehau
19935fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 35, bbp35);
19945fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 97, bbp97);
19955fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 98, bbp98);
19965fdff524SSepherosa Ziehau
19975fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_PHY_CSR0);
19985fdff524SSepherosa Ziehau tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
19995fdff524SSepherosa Ziehau if (IEEE80211_IS_CHAN_2GHZ(c))
20005fdff524SSepherosa Ziehau tmp |= RT2661_PA_PE_2GHZ;
20015fdff524SSepherosa Ziehau else
20025fdff524SSepherosa Ziehau tmp |= RT2661_PA_PE_5GHZ;
20035fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
20045fdff524SSepherosa Ziehau }
20055fdff524SSepherosa Ziehau
20065fdff524SSepherosa Ziehau static void
rt2661_set_chan(struct rt2661_softc * sc,struct ieee80211_channel * c)2007feb94d24SRui Paulo rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
20085fdff524SSepherosa Ziehau {
200991b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
2010feb94d24SRui Paulo const struct rfprog *rfprog;
2011feb94d24SRui Paulo uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
2012feb94d24SRui Paulo int8_t power;
2013feb94d24SRui Paulo u_int i, chan;
2014feb94d24SRui Paulo
2015feb94d24SRui Paulo chan = ieee80211_chan2ieee(ic, c);
2016feb94d24SRui Paulo KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
2017feb94d24SRui Paulo
2018feb94d24SRui Paulo /* select the appropriate RF settings based on what EEPROM says */
2019feb94d24SRui Paulo rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2020feb94d24SRui Paulo
2021feb94d24SRui Paulo /* find the settings for this channel (we know it exists) */
2022feb94d24SRui Paulo for (i = 0; rfprog[i].chan != chan; i++);
2023feb94d24SRui Paulo
2024feb94d24SRui Paulo power = sc->txpow[i];
2025feb94d24SRui Paulo if (power < 0) {
2026feb94d24SRui Paulo bbp94 += power;
2027feb94d24SRui Paulo power = 0;
2028feb94d24SRui Paulo } else if (power > 31) {
2029feb94d24SRui Paulo bbp94 += power - 31;
2030feb94d24SRui Paulo power = 31;
2031feb94d24SRui Paulo }
2032feb94d24SRui Paulo
2033feb94d24SRui Paulo /*
2034feb94d24SRui Paulo * If we are switching from the 2GHz band to the 5GHz band or
2035feb94d24SRui Paulo * vice-versa, BBP registers need to be reprogrammed.
2036feb94d24SRui Paulo */
2037feb94d24SRui Paulo if (c->ic_flags != sc->sc_curchan->ic_flags) {
2038feb94d24SRui Paulo rt2661_select_band(sc, c);
2039feb94d24SRui Paulo rt2661_select_antenna(sc);
2040feb94d24SRui Paulo }
2041feb94d24SRui Paulo sc->sc_curchan = c;
20425fdff524SSepherosa Ziehau
20435fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
20445fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
20455fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
20465fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
20475fdff524SSepherosa Ziehau
20485fdff524SSepherosa Ziehau DELAY(200);
20495fdff524SSepherosa Ziehau
20505fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
20515fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
20525fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
20535fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
20545fdff524SSepherosa Ziehau
20555fdff524SSepherosa Ziehau DELAY(200);
20565fdff524SSepherosa Ziehau
20575fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
20585fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
20595fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
20605fdff524SSepherosa Ziehau rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
20615fdff524SSepherosa Ziehau
20625fdff524SSepherosa Ziehau /* enable smart mode for MIMO-capable RFs */
20635fdff524SSepherosa Ziehau bbp3 = rt2661_bbp_read(sc, 3);
20645fdff524SSepherosa Ziehau
20655fdff524SSepherosa Ziehau bbp3 &= ~RT2661_SMART_MODE;
20665fdff524SSepherosa Ziehau if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
20675fdff524SSepherosa Ziehau bbp3 |= RT2661_SMART_MODE;
20685fdff524SSepherosa Ziehau
20695fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 3, bbp3);
20705fdff524SSepherosa Ziehau
20715fdff524SSepherosa Ziehau if (bbp94 != RT2661_BBPR94_DEFAULT)
20725fdff524SSepherosa Ziehau rt2661_bbp_write(sc, 94, bbp94);
20735fdff524SSepherosa Ziehau
20745fdff524SSepherosa Ziehau /* 5GHz radio needs a 1ms delay here */
20755fdff524SSepherosa Ziehau if (IEEE80211_IS_CHAN_5GHZ(c))
20765fdff524SSepherosa Ziehau DELAY(1000);
20775fdff524SSepherosa Ziehau }
20785fdff524SSepherosa Ziehau
20795fdff524SSepherosa Ziehau static void
rt2661_set_bssid(struct rt2661_softc * sc,const uint8_t * bssid)20805fdff524SSepherosa Ziehau rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
20815fdff524SSepherosa Ziehau {
20825fdff524SSepherosa Ziehau uint32_t tmp;
20835fdff524SSepherosa Ziehau
20845fdff524SSepherosa Ziehau tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
20855fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
20865fdff524SSepherosa Ziehau
20875fdff524SSepherosa Ziehau tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
20885fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
20895fdff524SSepherosa Ziehau }
20905fdff524SSepherosa Ziehau
20915fdff524SSepherosa Ziehau static void
rt2661_set_macaddr(struct rt2661_softc * sc,const uint8_t * addr)20925fdff524SSepherosa Ziehau rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
20935fdff524SSepherosa Ziehau {
20945fdff524SSepherosa Ziehau uint32_t tmp;
20955fdff524SSepherosa Ziehau
20965fdff524SSepherosa Ziehau tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
20975fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
20985fdff524SSepherosa Ziehau
20995fdff524SSepherosa Ziehau tmp = addr[4] | addr[5] << 8;
21005fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
21015fdff524SSepherosa Ziehau }
21025fdff524SSepherosa Ziehau
21035fdff524SSepherosa Ziehau static void
rt2661_update_promisc(struct ieee80211com * ic)21044f898719SImre Vadász rt2661_update_promisc(struct ieee80211com *ic)
21055fdff524SSepherosa Ziehau {
21064f898719SImre Vadász struct rt2661_softc *sc = ic->ic_softc;
21075fdff524SSepherosa Ziehau uint32_t tmp;
21085fdff524SSepherosa Ziehau
21095fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
21105fdff524SSepherosa Ziehau
21115fdff524SSepherosa Ziehau tmp &= ~RT2661_DROP_NOT_TO_ME;
211291b30d50SMatthew Dillon if (ic->ic_promisc == 0)
21135fdff524SSepherosa Ziehau tmp |= RT2661_DROP_NOT_TO_ME;
21145fdff524SSepherosa Ziehau
21155fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
21165fdff524SSepherosa Ziehau
21174f898719SImre Vadász DPRINTF(sc, "%s promiscuous mode\n",
211891b30d50SMatthew Dillon (ic->ic_promisc > 0) ? "entering" : "leaving");
21195fdff524SSepherosa Ziehau }
21205fdff524SSepherosa Ziehau
21215fdff524SSepherosa Ziehau /*
21225fdff524SSepherosa Ziehau * Update QoS (802.11e) settings for each h/w Tx ring.
21235fdff524SSepherosa Ziehau */
21245fdff524SSepherosa Ziehau static int
rt2661_wme_update(struct ieee80211com * ic)21255fdff524SSepherosa Ziehau rt2661_wme_update(struct ieee80211com *ic)
21265fdff524SSepherosa Ziehau {
21274f1aaf2fSImre Vadász struct rt2661_softc *sc = ic->ic_softc;
21285fdff524SSepherosa Ziehau const struct wmeParams *wmep;
21295fdff524SSepherosa Ziehau
21305fdff524SSepherosa Ziehau wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
21315fdff524SSepherosa Ziehau
21325fdff524SSepherosa Ziehau /* XXX: not sure about shifts. */
21335fdff524SSepherosa Ziehau /* XXX: the reference driver plays with AC_VI settings too. */
21345fdff524SSepherosa Ziehau
21355fdff524SSepherosa Ziehau /* update TxOp */
21365fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
21375fdff524SSepherosa Ziehau wmep[WME_AC_BE].wmep_txopLimit << 16 |
21385fdff524SSepherosa Ziehau wmep[WME_AC_BK].wmep_txopLimit);
21395fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
21405fdff524SSepherosa Ziehau wmep[WME_AC_VI].wmep_txopLimit << 16 |
21415fdff524SSepherosa Ziehau wmep[WME_AC_VO].wmep_txopLimit);
21425fdff524SSepherosa Ziehau
21435fdff524SSepherosa Ziehau /* update CWmin */
21445fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_CWMIN_CSR,
21455fdff524SSepherosa Ziehau wmep[WME_AC_BE].wmep_logcwmin << 12 |
21465fdff524SSepherosa Ziehau wmep[WME_AC_BK].wmep_logcwmin << 8 |
21475fdff524SSepherosa Ziehau wmep[WME_AC_VI].wmep_logcwmin << 4 |
21485fdff524SSepherosa Ziehau wmep[WME_AC_VO].wmep_logcwmin);
21495fdff524SSepherosa Ziehau
21505fdff524SSepherosa Ziehau /* update CWmax */
21515fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_CWMAX_CSR,
21525fdff524SSepherosa Ziehau wmep[WME_AC_BE].wmep_logcwmax << 12 |
21535fdff524SSepherosa Ziehau wmep[WME_AC_BK].wmep_logcwmax << 8 |
21545fdff524SSepherosa Ziehau wmep[WME_AC_VI].wmep_logcwmax << 4 |
21555fdff524SSepherosa Ziehau wmep[WME_AC_VO].wmep_logcwmax);
21565fdff524SSepherosa Ziehau
21575fdff524SSepherosa Ziehau /* update Aifsn */
21585fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_AIFSN_CSR,
21595fdff524SSepherosa Ziehau wmep[WME_AC_BE].wmep_aifsn << 12 |
21605fdff524SSepherosa Ziehau wmep[WME_AC_BK].wmep_aifsn << 8 |
21615fdff524SSepherosa Ziehau wmep[WME_AC_VI].wmep_aifsn << 4 |
21625fdff524SSepherosa Ziehau wmep[WME_AC_VO].wmep_aifsn);
21635fdff524SSepherosa Ziehau
21645fdff524SSepherosa Ziehau return 0;
21655fdff524SSepherosa Ziehau }
21665fdff524SSepherosa Ziehau
21675fdff524SSepherosa Ziehau static void
rt2661_update_slot(struct ieee80211com * ic)21684f898719SImre Vadász rt2661_update_slot(struct ieee80211com *ic)
21695fdff524SSepherosa Ziehau {
21704f898719SImre Vadász struct rt2661_softc *sc = ic->ic_softc;
21715fdff524SSepherosa Ziehau uint8_t slottime;
21725fdff524SSepherosa Ziehau uint32_t tmp;
21735fdff524SSepherosa Ziehau
217491b30d50SMatthew Dillon slottime = IEEE80211_GET_SLOTTIME(ic);
21755fdff524SSepherosa Ziehau
21765fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_MAC_CSR9);
21775fdff524SSepherosa Ziehau tmp = (tmp & ~0xff) | slottime;
21785fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
21795fdff524SSepherosa Ziehau }
21805fdff524SSepherosa Ziehau
21815fdff524SSepherosa Ziehau static const char *
rt2661_get_rf(int rev)21825fdff524SSepherosa Ziehau rt2661_get_rf(int rev)
21835fdff524SSepherosa Ziehau {
21845fdff524SSepherosa Ziehau switch (rev) {
21855fdff524SSepherosa Ziehau case RT2661_RF_5225: return "RT5225";
21865fdff524SSepherosa Ziehau case RT2661_RF_5325: return "RT5325 (MIMO XR)";
21875fdff524SSepherosa Ziehau case RT2661_RF_2527: return "RT2527";
21885fdff524SSepherosa Ziehau case RT2661_RF_2529: return "RT2529 (MIMO XR)";
21895fdff524SSepherosa Ziehau default: return "unknown";
21905fdff524SSepherosa Ziehau }
21915fdff524SSepherosa Ziehau }
21925fdff524SSepherosa Ziehau
21935fdff524SSepherosa Ziehau static void
rt2661_read_eeprom(struct rt2661_softc * sc,uint8_t macaddr[IEEE80211_ADDR_LEN])2194feb94d24SRui Paulo rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
21955fdff524SSepherosa Ziehau {
21965fdff524SSepherosa Ziehau uint16_t val;
2197feb94d24SRui Paulo int i;
21985fdff524SSepherosa Ziehau
21995fdff524SSepherosa Ziehau /* read MAC address */
22005fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2201feb94d24SRui Paulo macaddr[0] = val & 0xff;
2202feb94d24SRui Paulo macaddr[1] = val >> 8;
22035fdff524SSepherosa Ziehau
22045fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2205feb94d24SRui Paulo macaddr[2] = val & 0xff;
2206feb94d24SRui Paulo macaddr[3] = val >> 8;
22075fdff524SSepherosa Ziehau
22085fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2209feb94d24SRui Paulo macaddr[4] = val & 0xff;
2210feb94d24SRui Paulo macaddr[5] = val >> 8;
22115fdff524SSepherosa Ziehau
22125fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
22135fdff524SSepherosa Ziehau /* XXX: test if different from 0xffff? */
22145fdff524SSepherosa Ziehau sc->rf_rev = (val >> 11) & 0x1f;
22155fdff524SSepherosa Ziehau sc->hw_radio = (val >> 10) & 0x1;
22165fdff524SSepherosa Ziehau sc->rx_ant = (val >> 4) & 0x3;
22175fdff524SSepherosa Ziehau sc->tx_ant = (val >> 2) & 0x3;
22185fdff524SSepherosa Ziehau sc->nb_ant = val & 0x3;
22195fdff524SSepherosa Ziehau
2220feb94d24SRui Paulo DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
22215fdff524SSepherosa Ziehau
22225fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
22235fdff524SSepherosa Ziehau sc->ext_5ghz_lna = (val >> 6) & 0x1;
22245fdff524SSepherosa Ziehau sc->ext_2ghz_lna = (val >> 4) & 0x1;
22255fdff524SSepherosa Ziehau
2226feb94d24SRui Paulo DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2227feb94d24SRui Paulo sc->ext_2ghz_lna, sc->ext_5ghz_lna);
222899fda2c4SSepherosa Ziehau
22295fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2230feb94d24SRui Paulo if ((val & 0xff) != 0xff)
2231feb94d24SRui Paulo sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
22325fdff524SSepherosa Ziehau
22337f742cc9SSepherosa Ziehau /* Only [-10, 10] is valid */
2234feb94d24SRui Paulo if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2235feb94d24SRui Paulo sc->rssi_2ghz_corr = 0;
22367f742cc9SSepherosa Ziehau
22375fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
22385fdff524SSepherosa Ziehau if ((val & 0xff) != 0xff)
22395fdff524SSepherosa Ziehau sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
22405fdff524SSepherosa Ziehau
22417f742cc9SSepherosa Ziehau /* Only [-10, 10] is valid */
22427f742cc9SSepherosa Ziehau if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
22437f742cc9SSepherosa Ziehau sc->rssi_5ghz_corr = 0;
22447f742cc9SSepherosa Ziehau
22455fdff524SSepherosa Ziehau /* adjust RSSI correction for external low-noise amplifier */
2246feb94d24SRui Paulo if (sc->ext_2ghz_lna)
2247feb94d24SRui Paulo sc->rssi_2ghz_corr -= 14;
22485fdff524SSepherosa Ziehau if (sc->ext_5ghz_lna)
22495fdff524SSepherosa Ziehau sc->rssi_5ghz_corr -= 14;
22505fdff524SSepherosa Ziehau
2251feb94d24SRui Paulo DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2252feb94d24SRui Paulo sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
22535fdff524SSepherosa Ziehau
22545fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
22555fdff524SSepherosa Ziehau if ((val >> 8) != 0xff)
2256feb94d24SRui Paulo sc->rfprog = (val >> 8) & 0x3;
22575fdff524SSepherosa Ziehau if ((val & 0xff) != 0xff)
22585fdff524SSepherosa Ziehau sc->rffreq = val & 0xff;
22595fdff524SSepherosa Ziehau
2260feb94d24SRui Paulo DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
226199fda2c4SSepherosa Ziehau
2262feb94d24SRui Paulo /* read Tx power for all a/b/g channels */
2263feb94d24SRui Paulo for (i = 0; i < 19; i++) {
2264feb94d24SRui Paulo val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2265feb94d24SRui Paulo sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2266feb94d24SRui Paulo DPRINTF(sc, "Channel=%d Tx power=%d\n",
2267feb94d24SRui Paulo rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2268feb94d24SRui Paulo sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2269feb94d24SRui Paulo DPRINTF(sc, "Channel=%d Tx power=%d\n",
2270feb94d24SRui Paulo rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2271feb94d24SRui Paulo }
22725fdff524SSepherosa Ziehau
22735fdff524SSepherosa Ziehau /* read vendor-specific BBP values */
22745fdff524SSepherosa Ziehau for (i = 0; i < 16; i++) {
22755fdff524SSepherosa Ziehau val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
22765fdff524SSepherosa Ziehau if (val == 0 || val == 0xffff)
22775fdff524SSepherosa Ziehau continue; /* skip invalid entries */
22785fdff524SSepherosa Ziehau sc->bbp_prom[i].reg = val >> 8;
22795fdff524SSepherosa Ziehau sc->bbp_prom[i].val = val & 0xff;
2280feb94d24SRui Paulo DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2281feb94d24SRui Paulo sc->bbp_prom[i].val);
22825fdff524SSepherosa Ziehau }
22835fdff524SSepherosa Ziehau }
22845fdff524SSepherosa Ziehau
22855fdff524SSepherosa Ziehau static int
rt2661_bbp_init(struct rt2661_softc * sc)22865fdff524SSepherosa Ziehau rt2661_bbp_init(struct rt2661_softc *sc)
22875fdff524SSepherosa Ziehau {
22885fdff524SSepherosa Ziehau int i, ntries;
22895fdff524SSepherosa Ziehau uint8_t val;
22905fdff524SSepherosa Ziehau
22915fdff524SSepherosa Ziehau /* wait for BBP to be ready */
22925fdff524SSepherosa Ziehau for (ntries = 0; ntries < 100; ntries++) {
22935fdff524SSepherosa Ziehau val = rt2661_bbp_read(sc, 0);
22945fdff524SSepherosa Ziehau if (val != 0 && val != 0xff)
22955fdff524SSepherosa Ziehau break;
22965fdff524SSepherosa Ziehau DELAY(100);
22975fdff524SSepherosa Ziehau }
22985fdff524SSepherosa Ziehau if (ntries == 100) {
22995fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "timeout waiting for BBP\n");
23005fdff524SSepherosa Ziehau return EIO;
23015fdff524SSepherosa Ziehau }
23025fdff524SSepherosa Ziehau
23035fdff524SSepherosa Ziehau /* initialize BBP registers to default values */
230491b30d50SMatthew Dillon for (i = 0; i < nitems(rt2661_def_bbp); i++) {
23055fdff524SSepherosa Ziehau rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
23065fdff524SSepherosa Ziehau rt2661_def_bbp[i].val);
23075fdff524SSepherosa Ziehau }
23085fdff524SSepherosa Ziehau
23095fdff524SSepherosa Ziehau /* write vendor-specific BBP values (from EEPROM) */
23105fdff524SSepherosa Ziehau for (i = 0; i < 16; i++) {
23115fdff524SSepherosa Ziehau if (sc->bbp_prom[i].reg == 0)
23125fdff524SSepherosa Ziehau continue;
23135fdff524SSepherosa Ziehau rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
23145fdff524SSepherosa Ziehau }
23155fdff524SSepherosa Ziehau
23165fdff524SSepherosa Ziehau return 0;
23175fdff524SSepherosa Ziehau }
23185fdff524SSepherosa Ziehau
23195fdff524SSepherosa Ziehau static void
rt2661_init_locked(struct rt2661_softc * sc)2320feb94d24SRui Paulo rt2661_init_locked(struct rt2661_softc *sc)
23215fdff524SSepherosa Ziehau {
232291b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
232391b30d50SMatthew Dillon struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
23245fdff524SSepherosa Ziehau uint32_t tmp, sta[3];
2325feb94d24SRui Paulo int i, error, ntries;
23265fdff524SSepherosa Ziehau
232791b30d50SMatthew Dillon RAL_LOCK_ASSERT(sc);
232891b30d50SMatthew Dillon
2329feb94d24SRui Paulo if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2330feb94d24SRui Paulo error = rt2661_load_microcode(sc);
2331feb94d24SRui Paulo if (error != 0) {
233291b30d50SMatthew Dillon device_printf(sc->sc_dev,
2333feb94d24SRui Paulo "%s: could not load 8051 microcode, error %d\n",
2334feb94d24SRui Paulo __func__, error);
2335feb94d24SRui Paulo return;
2336feb94d24SRui Paulo }
2337feb94d24SRui Paulo sc->sc_flags |= RAL_FW_LOADED;
2338feb94d24SRui Paulo }
2339feb94d24SRui Paulo
2340feb94d24SRui Paulo rt2661_stop_locked(sc);
23415fdff524SSepherosa Ziehau
23425fdff524SSepherosa Ziehau /* initialize Tx rings */
23435fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
23445fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
23455fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
23465fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
23475fdff524SSepherosa Ziehau
23485fdff524SSepherosa Ziehau /* initialize Mgt ring */
23495fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
23505fdff524SSepherosa Ziehau
23515fdff524SSepherosa Ziehau /* initialize Rx ring */
23525fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
23535fdff524SSepherosa Ziehau
23545fdff524SSepherosa Ziehau /* initialize Tx rings sizes */
23555fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TX_RING_CSR0,
23565fdff524SSepherosa Ziehau RT2661_TX_RING_COUNT << 24 |
23575fdff524SSepherosa Ziehau RT2661_TX_RING_COUNT << 16 |
23585fdff524SSepherosa Ziehau RT2661_TX_RING_COUNT << 8 |
23595fdff524SSepherosa Ziehau RT2661_TX_RING_COUNT);
23605fdff524SSepherosa Ziehau
23615fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TX_RING_CSR1,
23625fdff524SSepherosa Ziehau RT2661_TX_DESC_WSIZE << 16 |
23635fdff524SSepherosa Ziehau RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
23645fdff524SSepherosa Ziehau RT2661_MGT_RING_COUNT);
23655fdff524SSepherosa Ziehau
23665fdff524SSepherosa Ziehau /* initialize Rx rings */
23675fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_RX_RING_CSR,
23685fdff524SSepherosa Ziehau RT2661_RX_DESC_BACK << 16 |
23695fdff524SSepherosa Ziehau RT2661_RX_DESC_WSIZE << 8 |
23705fdff524SSepherosa Ziehau RT2661_RX_RING_COUNT);
23715fdff524SSepherosa Ziehau
23725fdff524SSepherosa Ziehau /* XXX: some magic here */
23735fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
23745fdff524SSepherosa Ziehau
23755fdff524SSepherosa Ziehau /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
23765fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
23775fdff524SSepherosa Ziehau
23785fdff524SSepherosa Ziehau /* load base address of Rx ring */
23795fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
23805fdff524SSepherosa Ziehau
23815fdff524SSepherosa Ziehau /* initialize MAC registers to default values */
238291b30d50SMatthew Dillon for (i = 0; i < nitems(rt2661_def_mac); i++)
23835fdff524SSepherosa Ziehau RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
23845fdff524SSepherosa Ziehau
238591b30d50SMatthew Dillon rt2661_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr);
23865fdff524SSepherosa Ziehau
23875fdff524SSepherosa Ziehau /* set host ready */
23885fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
23895fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
23905fdff524SSepherosa Ziehau
23915fdff524SSepherosa Ziehau /* wait for BBP/RF to wakeup */
23925fdff524SSepherosa Ziehau for (ntries = 0; ntries < 1000; ntries++) {
23935fdff524SSepherosa Ziehau if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
23945fdff524SSepherosa Ziehau break;
23955fdff524SSepherosa Ziehau DELAY(1000);
23965fdff524SSepherosa Ziehau }
23975fdff524SSepherosa Ziehau if (ntries == 1000) {
239893d249f7SMatthew Dillon kprintf("timeout waiting for BBP/RF to wakeup\n");
2399feb94d24SRui Paulo rt2661_stop_locked(sc);
24005fdff524SSepherosa Ziehau return;
24015fdff524SSepherosa Ziehau }
24025fdff524SSepherosa Ziehau
24035fdff524SSepherosa Ziehau if (rt2661_bbp_init(sc) != 0) {
2404feb94d24SRui Paulo rt2661_stop_locked(sc);
24055fdff524SSepherosa Ziehau return;
24065fdff524SSepherosa Ziehau }
24075fdff524SSepherosa Ziehau
24085fdff524SSepherosa Ziehau /* select default channel */
24095fdff524SSepherosa Ziehau sc->sc_curchan = ic->ic_curchan;
24105fdff524SSepherosa Ziehau rt2661_select_band(sc, sc->sc_curchan);
24115fdff524SSepherosa Ziehau rt2661_select_antenna(sc);
24125fdff524SSepherosa Ziehau rt2661_set_chan(sc, sc->sc_curchan);
24135fdff524SSepherosa Ziehau
24145fdff524SSepherosa Ziehau /* update Rx filter */
24155fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
24165fdff524SSepherosa Ziehau
24175fdff524SSepherosa Ziehau tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
24185fdff524SSepherosa Ziehau if (ic->ic_opmode != IEEE80211_M_MONITOR) {
24195fdff524SSepherosa Ziehau tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
24205fdff524SSepherosa Ziehau RT2661_DROP_ACKCTS;
2421feb94d24SRui Paulo if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2422feb94d24SRui Paulo ic->ic_opmode != IEEE80211_M_MBSS)
24235fdff524SSepherosa Ziehau tmp |= RT2661_DROP_TODS;
242491b30d50SMatthew Dillon if (ic->ic_promisc == 0)
24255fdff524SSepherosa Ziehau tmp |= RT2661_DROP_NOT_TO_ME;
24265fdff524SSepherosa Ziehau }
24275fdff524SSepherosa Ziehau
24285fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
24295fdff524SSepherosa Ziehau
24305fdff524SSepherosa Ziehau /* clear STA registers */
243191b30d50SMatthew Dillon RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, nitems(sta));
24325fdff524SSepherosa Ziehau
24335fdff524SSepherosa Ziehau /* initialize ASIC */
24345fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
24355fdff524SSepherosa Ziehau
24365fdff524SSepherosa Ziehau /* clear any pending interrupt */
24375fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
24385fdff524SSepherosa Ziehau
24395fdff524SSepherosa Ziehau /* enable interrupts */
24405fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
24415fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
24425fdff524SSepherosa Ziehau
24435fdff524SSepherosa Ziehau /* kick Rx */
24445fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
24455fdff524SSepherosa Ziehau
244691b30d50SMatthew Dillon sc->sc_flags |= RAL_RUNNING;
24475fdff524SSepherosa Ziehau
244891b30d50SMatthew Dillon callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
24495fdff524SSepherosa Ziehau }
24505fdff524SSepherosa Ziehau
2451feb94d24SRui Paulo static void
rt2661_init(void * priv)2452feb94d24SRui Paulo rt2661_init(void *priv)
24535fdff524SSepherosa Ziehau {
24545fdff524SSepherosa Ziehau struct rt2661_softc *sc = priv;
245591b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
2456feb94d24SRui Paulo
245791b30d50SMatthew Dillon RAL_LOCK(sc);
2458feb94d24SRui Paulo rt2661_init_locked(sc);
245991b30d50SMatthew Dillon RAL_UNLOCK(sc);
2460feb94d24SRui Paulo
246191b30d50SMatthew Dillon if (sc->sc_flags & RAL_RUNNING)
2462feb94d24SRui Paulo ieee80211_start_all(ic); /* start all vap's */
2463feb94d24SRui Paulo }
2464feb94d24SRui Paulo
24658406cf70SSascha Wildner static void
rt2661_stop_locked(struct rt2661_softc * sc)2466feb94d24SRui Paulo rt2661_stop_locked(struct rt2661_softc *sc)
2467feb94d24SRui Paulo {
2468feb94d24SRui Paulo volatile int *flags = &sc->sc_flags;
246991b30d50SMatthew Dillon uint32_t tmp;
24705fdff524SSepherosa Ziehau
247193d249f7SMatthew Dillon #if defined(__DragonFly__)
247293d249f7SMatthew Dillon while (*flags & RAL_INPUT_RUNNING)
247393d249f7SMatthew Dillon lksleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
247493d249f7SMatthew Dillon #else
2475feb94d24SRui Paulo while (*flags & RAL_INPUT_RUNNING)
247691b30d50SMatthew Dillon msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
247793d249f7SMatthew Dillon #endif
247831358101SSascha Wildner
2479feb94d24SRui Paulo callout_stop(&sc->watchdog_ch);
24805fdff524SSepherosa Ziehau sc->sc_tx_timer = 0;
2481feb94d24SRui Paulo
248291b30d50SMatthew Dillon if (sc->sc_flags & RAL_RUNNING) {
248391b30d50SMatthew Dillon sc->sc_flags &= ~RAL_RUNNING;
24845fdff524SSepherosa Ziehau
24855fdff524SSepherosa Ziehau /* abort Tx (for all 5 Tx rings) */
24865fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
24875fdff524SSepherosa Ziehau
24885fdff524SSepherosa Ziehau /* disable Rx (value remains after reset!) */
24895fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
24905fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
24915fdff524SSepherosa Ziehau
24925fdff524SSepherosa Ziehau /* reset ASIC */
24935fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
24945fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
24955fdff524SSepherosa Ziehau
24965fdff524SSepherosa Ziehau /* disable interrupts */
24975fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
24985fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
24995fdff524SSepherosa Ziehau
25005fdff524SSepherosa Ziehau /* clear any pending interrupt */
25015fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
25025fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
25035fdff524SSepherosa Ziehau
25045fdff524SSepherosa Ziehau /* reset Tx and Rx rings */
25055fdff524SSepherosa Ziehau rt2661_reset_tx_ring(sc, &sc->txq[0]);
25065fdff524SSepherosa Ziehau rt2661_reset_tx_ring(sc, &sc->txq[1]);
25075fdff524SSepherosa Ziehau rt2661_reset_tx_ring(sc, &sc->txq[2]);
25085fdff524SSepherosa Ziehau rt2661_reset_tx_ring(sc, &sc->txq[3]);
25095fdff524SSepherosa Ziehau rt2661_reset_tx_ring(sc, &sc->mgtq);
25105fdff524SSepherosa Ziehau rt2661_reset_rx_ring(sc, &sc->rxq);
2511feb94d24SRui Paulo }
2512feb94d24SRui Paulo }
25135717dc1aSSepherosa Ziehau
25148406cf70SSascha Wildner static void
rt2661_stop(void * priv)2515feb94d24SRui Paulo rt2661_stop(void *priv)
2516feb94d24SRui Paulo {
2517feb94d24SRui Paulo struct rt2661_softc *sc = priv;
2518feb94d24SRui Paulo
251991b30d50SMatthew Dillon RAL_LOCK(sc);
2520feb94d24SRui Paulo rt2661_stop_locked(sc);
252191b30d50SMatthew Dillon RAL_UNLOCK(sc);
25225fdff524SSepherosa Ziehau }
25235fdff524SSepherosa Ziehau
25245fdff524SSepherosa Ziehau static int
rt2661_load_microcode(struct rt2661_softc * sc)2525feb94d24SRui Paulo rt2661_load_microcode(struct rt2661_softc *sc)
25265fdff524SSepherosa Ziehau {
2527feb94d24SRui Paulo const struct firmware *fp;
2528feb94d24SRui Paulo const char *imagename;
2529feb94d24SRui Paulo int ntries, error;
25305fdff524SSepherosa Ziehau
253191b30d50SMatthew Dillon RAL_LOCK_ASSERT(sc);
253291b30d50SMatthew Dillon
2533feb94d24SRui Paulo switch (sc->sc_id) {
2534feb94d24SRui Paulo case 0x0301: imagename = "rt2561sfw"; break;
2535feb94d24SRui Paulo case 0x0302: imagename = "rt2561fw"; break;
2536feb94d24SRui Paulo case 0x0401: imagename = "rt2661fw"; break;
2537feb94d24SRui Paulo default:
253891b30d50SMatthew Dillon device_printf(sc->sc_dev, "%s: unexpected pci device id 0x%x, "
2539feb94d24SRui Paulo "don't know how to retrieve firmware\n",
2540feb94d24SRui Paulo __func__, sc->sc_id);
2541feb94d24SRui Paulo return EINVAL;
2542feb94d24SRui Paulo }
254391b30d50SMatthew Dillon RAL_UNLOCK(sc);
2544feb94d24SRui Paulo fp = firmware_get(imagename);
254591b30d50SMatthew Dillon RAL_LOCK(sc);
2546feb94d24SRui Paulo if (fp == NULL) {
254791b30d50SMatthew Dillon device_printf(sc->sc_dev,
254891b30d50SMatthew Dillon "%s: unable to retrieve firmware image %s\n",
2549feb94d24SRui Paulo __func__, imagename);
2550feb94d24SRui Paulo return EINVAL;
2551feb94d24SRui Paulo }
2552feb94d24SRui Paulo
2553feb94d24SRui Paulo /*
2554feb94d24SRui Paulo * Load 8051 microcode into NIC.
2555feb94d24SRui Paulo */
25565fdff524SSepherosa Ziehau /* reset 8051 */
25575fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
25585fdff524SSepherosa Ziehau
25595fdff524SSepherosa Ziehau /* cancel any pending Host to MCU command */
25605fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
25615fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
25625fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
25635fdff524SSepherosa Ziehau
25645fdff524SSepherosa Ziehau /* write 8051's microcode */
25655fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2566feb94d24SRui Paulo RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
25675fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
25685fdff524SSepherosa Ziehau
25695fdff524SSepherosa Ziehau /* kick 8051's ass */
25705fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
25715fdff524SSepherosa Ziehau
25725fdff524SSepherosa Ziehau /* wait for 8051 to initialize */
25735fdff524SSepherosa Ziehau for (ntries = 0; ntries < 500; ntries++) {
25745fdff524SSepherosa Ziehau if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
25755fdff524SSepherosa Ziehau break;
25765fdff524SSepherosa Ziehau DELAY(100);
25775fdff524SSepherosa Ziehau }
25785fdff524SSepherosa Ziehau if (ntries == 500) {
257991b30d50SMatthew Dillon device_printf(sc->sc_dev,
258091b30d50SMatthew Dillon "%s: timeout waiting for MCU to initialize\n", __func__);
2581feb94d24SRui Paulo error = EIO;
2582feb94d24SRui Paulo } else
2583feb94d24SRui Paulo error = 0;
2584feb94d24SRui Paulo
2585feb94d24SRui Paulo firmware_put(fp, FIRMWARE_UNLOAD);
2586feb94d24SRui Paulo return error;
25875fdff524SSepherosa Ziehau }
2588feb94d24SRui Paulo
2589feb94d24SRui Paulo #ifdef notyet
2590feb94d24SRui Paulo /*
2591feb94d24SRui Paulo * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2592feb94d24SRui Paulo * false CCA count. This function is called periodically (every seconds) when
2593feb94d24SRui Paulo * in the RUN state. Values taken from the reference driver.
2594feb94d24SRui Paulo */
2595feb94d24SRui Paulo static void
rt2661_rx_tune(struct rt2661_softc * sc)2596feb94d24SRui Paulo rt2661_rx_tune(struct rt2661_softc *sc)
2597feb94d24SRui Paulo {
2598feb94d24SRui Paulo uint8_t bbp17;
2599feb94d24SRui Paulo uint16_t cca;
2600feb94d24SRui Paulo int lo, hi, dbm;
2601feb94d24SRui Paulo
2602feb94d24SRui Paulo /*
2603feb94d24SRui Paulo * Tuning range depends on operating band and on the presence of an
2604feb94d24SRui Paulo * external low-noise amplifier.
2605feb94d24SRui Paulo */
2606feb94d24SRui Paulo lo = 0x20;
2607feb94d24SRui Paulo if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2608feb94d24SRui Paulo lo += 0x08;
2609feb94d24SRui Paulo if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2610feb94d24SRui Paulo (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2611feb94d24SRui Paulo lo += 0x10;
2612feb94d24SRui Paulo hi = lo + 0x20;
2613feb94d24SRui Paulo
2614feb94d24SRui Paulo /* retrieve false CCA count since last call (clear on read) */
2615feb94d24SRui Paulo cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2616feb94d24SRui Paulo
2617feb94d24SRui Paulo if (dbm >= -35) {
2618feb94d24SRui Paulo bbp17 = 0x60;
2619feb94d24SRui Paulo } else if (dbm >= -58) {
2620feb94d24SRui Paulo bbp17 = hi;
2621feb94d24SRui Paulo } else if (dbm >= -66) {
2622feb94d24SRui Paulo bbp17 = lo + 0x10;
2623feb94d24SRui Paulo } else if (dbm >= -74) {
2624feb94d24SRui Paulo bbp17 = lo + 0x08;
2625feb94d24SRui Paulo } else {
2626feb94d24SRui Paulo /* RSSI < -74dBm, tune using false CCA count */
2627feb94d24SRui Paulo
2628feb94d24SRui Paulo bbp17 = sc->bbp17; /* current value */
2629feb94d24SRui Paulo
2630feb94d24SRui Paulo hi -= 2 * (-74 - dbm);
2631feb94d24SRui Paulo if (hi < lo)
2632feb94d24SRui Paulo hi = lo;
2633feb94d24SRui Paulo
2634feb94d24SRui Paulo if (bbp17 > hi) {
2635feb94d24SRui Paulo bbp17 = hi;
2636feb94d24SRui Paulo
2637feb94d24SRui Paulo } else if (cca > 512) {
2638feb94d24SRui Paulo if (++bbp17 > hi)
2639feb94d24SRui Paulo bbp17 = hi;
2640feb94d24SRui Paulo } else if (cca < 100) {
2641feb94d24SRui Paulo if (--bbp17 < lo)
2642feb94d24SRui Paulo bbp17 = lo;
2643feb94d24SRui Paulo }
2644feb94d24SRui Paulo }
2645feb94d24SRui Paulo
2646feb94d24SRui Paulo if (bbp17 != sc->bbp17) {
2647feb94d24SRui Paulo rt2661_bbp_write(sc, 17, bbp17);
2648feb94d24SRui Paulo sc->bbp17 = bbp17;
2649feb94d24SRui Paulo }
2650feb94d24SRui Paulo }
2651feb94d24SRui Paulo
2652feb94d24SRui Paulo /*
2653feb94d24SRui Paulo * Enter/Leave radar detection mode.
2654feb94d24SRui Paulo * This is for 802.11h additional regulatory domains.
2655feb94d24SRui Paulo */
2656feb94d24SRui Paulo static void
rt2661_radar_start(struct rt2661_softc * sc)2657feb94d24SRui Paulo rt2661_radar_start(struct rt2661_softc *sc)
2658feb94d24SRui Paulo {
2659feb94d24SRui Paulo uint32_t tmp;
2660feb94d24SRui Paulo
2661feb94d24SRui Paulo /* disable Rx */
2662feb94d24SRui Paulo tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2663feb94d24SRui Paulo RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2664feb94d24SRui Paulo
2665feb94d24SRui Paulo rt2661_bbp_write(sc, 82, 0x20);
2666feb94d24SRui Paulo rt2661_bbp_write(sc, 83, 0x00);
2667feb94d24SRui Paulo rt2661_bbp_write(sc, 84, 0x40);
2668feb94d24SRui Paulo
2669feb94d24SRui Paulo /* save current BBP registers values */
2670feb94d24SRui Paulo sc->bbp18 = rt2661_bbp_read(sc, 18);
2671feb94d24SRui Paulo sc->bbp21 = rt2661_bbp_read(sc, 21);
2672feb94d24SRui Paulo sc->bbp22 = rt2661_bbp_read(sc, 22);
2673feb94d24SRui Paulo sc->bbp16 = rt2661_bbp_read(sc, 16);
2674feb94d24SRui Paulo sc->bbp17 = rt2661_bbp_read(sc, 17);
2675feb94d24SRui Paulo sc->bbp64 = rt2661_bbp_read(sc, 64);
2676feb94d24SRui Paulo
2677feb94d24SRui Paulo rt2661_bbp_write(sc, 18, 0xff);
2678feb94d24SRui Paulo rt2661_bbp_write(sc, 21, 0x3f);
2679feb94d24SRui Paulo rt2661_bbp_write(sc, 22, 0x3f);
2680feb94d24SRui Paulo rt2661_bbp_write(sc, 16, 0xbd);
2681feb94d24SRui Paulo rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2682feb94d24SRui Paulo rt2661_bbp_write(sc, 64, 0x21);
2683feb94d24SRui Paulo
2684feb94d24SRui Paulo /* restore Rx filter */
2685feb94d24SRui Paulo RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
26865fdff524SSepherosa Ziehau }
26875fdff524SSepherosa Ziehau
26885fdff524SSepherosa Ziehau static int
rt2661_radar_stop(struct rt2661_softc * sc)2689feb94d24SRui Paulo rt2661_radar_stop(struct rt2661_softc *sc)
26905fdff524SSepherosa Ziehau {
2691feb94d24SRui Paulo uint8_t bbp66;
2692feb94d24SRui Paulo
2693feb94d24SRui Paulo /* read radar detection result */
2694feb94d24SRui Paulo bbp66 = rt2661_bbp_read(sc, 66);
2695feb94d24SRui Paulo
2696feb94d24SRui Paulo /* restore BBP registers values */
2697feb94d24SRui Paulo rt2661_bbp_write(sc, 16, sc->bbp16);
2698feb94d24SRui Paulo rt2661_bbp_write(sc, 17, sc->bbp17);
2699feb94d24SRui Paulo rt2661_bbp_write(sc, 18, sc->bbp18);
2700feb94d24SRui Paulo rt2661_bbp_write(sc, 21, sc->bbp21);
2701feb94d24SRui Paulo rt2661_bbp_write(sc, 22, sc->bbp22);
2702feb94d24SRui Paulo rt2661_bbp_write(sc, 64, sc->bbp64);
2703feb94d24SRui Paulo
2704feb94d24SRui Paulo return bbp66 == 1;
2705feb94d24SRui Paulo }
2706feb94d24SRui Paulo #endif
2707feb94d24SRui Paulo
2708feb94d24SRui Paulo static int
rt2661_prepare_beacon(struct rt2661_softc * sc,struct ieee80211vap * vap)2709feb94d24SRui Paulo rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
2710feb94d24SRui Paulo {
2711feb94d24SRui Paulo struct ieee80211com *ic = vap->iv_ic;
27125fdff524SSepherosa Ziehau struct rt2661_tx_desc desc;
27135fdff524SSepherosa Ziehau struct mbuf *m0;
27145fdff524SSepherosa Ziehau int rate;
27155fdff524SSepherosa Ziehau
271691b30d50SMatthew Dillon if ((m0 = ieee80211_beacon_alloc(vap->iv_bss))== NULL) {
27175fdff524SSepherosa Ziehau device_printf(sc->sc_dev, "could not allocate beacon frame\n");
27185fdff524SSepherosa Ziehau return ENOBUFS;
27195fdff524SSepherosa Ziehau }
27205fdff524SSepherosa Ziehau
27215fdff524SSepherosa Ziehau /* send beacons at the lowest available rate */
2722feb94d24SRui Paulo rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
27235fdff524SSepherosa Ziehau
27245fdff524SSepherosa Ziehau rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2725feb94d24SRui Paulo m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
27265fdff524SSepherosa Ziehau
27275fdff524SSepherosa Ziehau /* copy the first 24 bytes of Tx descriptor into NIC memory */
27285fdff524SSepherosa Ziehau RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
27295fdff524SSepherosa Ziehau
27305fdff524SSepherosa Ziehau /* copy beacon header and payload into NIC memory */
27315fdff524SSepherosa Ziehau RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
27325fdff524SSepherosa Ziehau mtod(m0, uint8_t *), m0->m_pkthdr.len);
27335fdff524SSepherosa Ziehau
27345fdff524SSepherosa Ziehau m_freem(m0);
2735feb94d24SRui Paulo
27365fdff524SSepherosa Ziehau return 0;
27375fdff524SSepherosa Ziehau }
27385fdff524SSepherosa Ziehau
27395fdff524SSepherosa Ziehau /*
27405fdff524SSepherosa Ziehau * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
27415fdff524SSepherosa Ziehau * and HostAP operating modes.
27425fdff524SSepherosa Ziehau */
27435fdff524SSepherosa Ziehau static void
rt2661_enable_tsf_sync(struct rt2661_softc * sc)27445fdff524SSepherosa Ziehau rt2661_enable_tsf_sync(struct rt2661_softc *sc)
27455fdff524SSepherosa Ziehau {
274691b30d50SMatthew Dillon struct ieee80211com *ic = &sc->sc_ic;
2747feb94d24SRui Paulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
27485fdff524SSepherosa Ziehau uint32_t tmp;
27495fdff524SSepherosa Ziehau
2750feb94d24SRui Paulo if (vap->iv_opmode != IEEE80211_M_STA) {
27515fdff524SSepherosa Ziehau /*
27525fdff524SSepherosa Ziehau * Change default 16ms TBTT adjustment to 8ms.
27535fdff524SSepherosa Ziehau * Must be done before enabling beacon generation.
27545fdff524SSepherosa Ziehau */
27555fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
27565fdff524SSepherosa Ziehau }
27575fdff524SSepherosa Ziehau
27585fdff524SSepherosa Ziehau tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
27595fdff524SSepherosa Ziehau
27605fdff524SSepherosa Ziehau /* set beacon interval (in 1/16ms unit) */
2761feb94d24SRui Paulo tmp |= vap->iv_bss->ni_intval * 16;
27625fdff524SSepherosa Ziehau
27635fdff524SSepherosa Ziehau tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2764feb94d24SRui Paulo if (vap->iv_opmode == IEEE80211_M_STA)
27655fdff524SSepherosa Ziehau tmp |= RT2661_TSF_MODE(1);
27665fdff524SSepherosa Ziehau else
27675fdff524SSepherosa Ziehau tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
27685fdff524SSepherosa Ziehau
27695fdff524SSepherosa Ziehau RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
27705fdff524SSepherosa Ziehau }
27715fdff524SSepherosa Ziehau
2772feb94d24SRui Paulo static void
rt2661_enable_tsf(struct rt2661_softc * sc)2773feb94d24SRui Paulo rt2661_enable_tsf(struct rt2661_softc *sc)
2774feb94d24SRui Paulo {
2775feb94d24SRui Paulo RAL_WRITE(sc, RT2661_TXRX_CSR9,
2776feb94d24SRui Paulo (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000)
2777feb94d24SRui Paulo | RT2661_TSF_TICKING | RT2661_TSF_MODE(2));
2778feb94d24SRui Paulo }
2779feb94d24SRui Paulo
27805fdff524SSepherosa Ziehau /*
27815fdff524SSepherosa Ziehau * Retrieve the "Received Signal Strength Indicator" from the raw values
27825fdff524SSepherosa Ziehau * contained in Rx descriptors. The computation depends on which band the
27835fdff524SSepherosa Ziehau * frame was received. Correction values taken from the reference driver.
27845fdff524SSepherosa Ziehau */
27855fdff524SSepherosa Ziehau static int
rt2661_get_rssi(struct rt2661_softc * sc,uint8_t raw)2786feb94d24SRui Paulo rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
27875fdff524SSepherosa Ziehau {
27885fdff524SSepherosa Ziehau int lna, agc, rssi;
27895fdff524SSepherosa Ziehau
27905fdff524SSepherosa Ziehau lna = (raw >> 5) & 0x3;
27915fdff524SSepherosa Ziehau agc = raw & 0x1f;
27925fdff524SSepherosa Ziehau
2793d2eb9874SSepherosa Ziehau if (lna == 0) {
2794d2eb9874SSepherosa Ziehau /*
2795feb94d24SRui Paulo * No mapping available.
2796d2eb9874SSepherosa Ziehau *
2797d2eb9874SSepherosa Ziehau * NB: Since RSSI is relative to noise floor, -1 is
2798d2eb9874SSepherosa Ziehau * adequate for caller to know error happened.
2799d2eb9874SSepherosa Ziehau */
2800d2eb9874SSepherosa Ziehau return -1;
2801d2eb9874SSepherosa Ziehau }
2802d2eb9874SSepherosa Ziehau
2803a6b13394SSepherosa Ziehau rssi = (2 * agc) - RT2661_NOISE_FLOOR;
28045fdff524SSepherosa Ziehau
28055fdff524SSepherosa Ziehau if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2806feb94d24SRui Paulo rssi += sc->rssi_2ghz_corr;
28075fdff524SSepherosa Ziehau
28085fdff524SSepherosa Ziehau if (lna == 1)
28095fdff524SSepherosa Ziehau rssi -= 64;
28105fdff524SSepherosa Ziehau else if (lna == 2)
28115fdff524SSepherosa Ziehau rssi -= 74;
28125fdff524SSepherosa Ziehau else if (lna == 3)
28135fdff524SSepherosa Ziehau rssi -= 90;
28145fdff524SSepherosa Ziehau } else {
28155fdff524SSepherosa Ziehau rssi += sc->rssi_5ghz_corr;
28165fdff524SSepherosa Ziehau
28175fdff524SSepherosa Ziehau if (lna == 1)
28185fdff524SSepherosa Ziehau rssi -= 64;
28195fdff524SSepherosa Ziehau else if (lna == 2)
28205fdff524SSepherosa Ziehau rssi -= 86;
28215fdff524SSepherosa Ziehau else if (lna == 3)
28225fdff524SSepherosa Ziehau rssi -= 100;
28235fdff524SSepherosa Ziehau }
28245fdff524SSepherosa Ziehau return rssi;
28255fdff524SSepherosa Ziehau }
28265fdff524SSepherosa Ziehau
28275fdff524SSepherosa Ziehau static void
rt2661_scan_start(struct ieee80211com * ic)2828feb94d24SRui Paulo rt2661_scan_start(struct ieee80211com *ic)
28295fdff524SSepherosa Ziehau {
28304f1aaf2fSImre Vadász struct rt2661_softc *sc = ic->ic_softc;
2831feb94d24SRui Paulo uint32_t tmp;
28325fdff524SSepherosa Ziehau
2833feb94d24SRui Paulo /* abort TSF synchronization */
2834feb94d24SRui Paulo tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
2835feb94d24SRui Paulo RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
283691b30d50SMatthew Dillon rt2661_set_bssid(sc, ieee80211broadcastaddr);
28375fdff524SSepherosa Ziehau }
28386c40999eSSepherosa Ziehau
28396c40999eSSepherosa Ziehau static void
rt2661_scan_end(struct ieee80211com * ic)2840feb94d24SRui Paulo rt2661_scan_end(struct ieee80211com *ic)
28416c40999eSSepherosa Ziehau {
28424f1aaf2fSImre Vadász struct rt2661_softc *sc = ic->ic_softc;
2843feb94d24SRui Paulo struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
28446c40999eSSepherosa Ziehau
2845feb94d24SRui Paulo rt2661_enable_tsf_sync(sc);
2846feb94d24SRui Paulo /* XXX keep local copy */
2847feb94d24SRui Paulo rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
28486c40999eSSepherosa Ziehau }
2849ce42f143SSepherosa Ziehau
2850ce42f143SSepherosa Ziehau static void
rt2661_set_channel(struct ieee80211com * ic)2851feb94d24SRui Paulo rt2661_set_channel(struct ieee80211com *ic)
2852ce42f143SSepherosa Ziehau {
28534f1aaf2fSImre Vadász struct rt2661_softc *sc = ic->ic_softc;
2854ce42f143SSepherosa Ziehau
285591b30d50SMatthew Dillon RAL_LOCK(sc);
2856feb94d24SRui Paulo rt2661_set_chan(sc, ic->ic_curchan);
285791b30d50SMatthew Dillon RAL_UNLOCK(sc);
285891b30d50SMatthew Dillon
285999fda2c4SSepherosa Ziehau }
2860