xref: /dflybsd-src/sys/dev/netif/jme/if_jmevar.h (revision 9f20b7b32e9053a8bedc86c39cb471fc7e141fd0)
1 /*-
2  * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice unmodified, this list of conditions, and the following
10  *    disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
28  * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $
29  */
30 
31 #ifndef	_IF_JMEVAR_H
32 #define	_IF_JMEVAR_H
33 
34 #include <sys/queue.h>
35 #include <sys/callout.h>
36 #include <sys/taskqueue.h>
37 
38 /*
39  * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
40  * descriptors should be multiple of JME_NDESC_ALIGN.
41  */
42 #define	JME_TX_DESC_CNT_DEF	384
43 #define	JME_RX_DESC_CNT_DEF	256
44 
45 #define JME_NDESC_ALIGN		16
46 #define JME_NDESC_MAX		1024
47 
48 #define JME_NRXRING_1		1
49 #define JME_NRXRING_2		2
50 #define JME_NRXRING_4		4
51 
52 #define JME_NRXRING_MIN		JME_NRXRING_1
53 #define JME_NRXRING_MAX		JME_NRXRING_4
54 
55 #define JME_NSERIALIZE		(JME_NRXRING_MAX + 2)
56 
57 #define JME_NMSIX		(JME_NRXRING_MAX + 1)
58 
59 /*
60  * Tx/Rx descriptor queue base should be 16bytes aligned and
61  * should not cross 4G bytes boundary on the 64bits address
62  * mode.
63  */
64 #define	JME_TX_RING_ALIGN	16
65 #define	JME_RX_RING_ALIGN	16
66 #define	JME_MAXSEGSIZE		4096
67 #define	JME_TSO_MAXSIZE		(65535 + sizeof(struct ether_vlan_header))
68 #define	JME_MAXTXSEGS		32
69 #define	JME_RX_BUF_ALIGN	sizeof(uint64_t)
70 #define	JME_SSB_ALIGN		16
71 
72 #if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
73 #define JME_RING_BOUNDARY	0x100000000ULL
74 #else
75 #define JME_RING_BOUNDARY	0
76 #endif
77 
78 #define	JME_ADDR_LO(x)		((uint64_t) (x) & 0xFFFFFFFF)
79 #define	JME_ADDR_HI(x)		((uint64_t) (x) >> 32)
80 
81 #define	JME_MSI_MESSAGES	8
82 #define	JME_MSIX_MESSAGES	8
83 
84 /* Water mark to kick reclaiming Tx buffers. */
85 #define	JME_TX_DESC_HIWAT(sc)	\
86 	((sc)->jme_tx_desc_cnt - (((sc)->jme_tx_desc_cnt * 3) / 10))
87 
88 /*
89  * JMC250 can send 9K jumbo frame on Tx path and can receive
90  * 65535 bytes.
91  */
92 #define JME_JUMBO_FRAMELEN	9216
93 #define JME_JUMBO_MTU							\
94 	(JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) -	\
95 	 ETHER_HDR_LEN - ETHER_CRC_LEN)
96 #define	JME_MAX_MTU							\
97 	(ETHER_MAX_LEN + sizeof(struct ether_vlan_header) -		\
98 	 ETHER_HDR_LEN - ETHER_CRC_LEN)
99 /*
100  * JMC250 can't handle Tx checksum offload/TSO if frame length
101  * is larger than its FIFO size(2K). It's also good idea to not
102  * use jumbo frame if hardware is running at half-duplex media.
103  * Because the jumbo frame may not fit into the Tx FIFO,
104  * collisions make hardware fetch frame from host memory with
105  * DMA again which in turn slows down Tx performance
106  * significantly.
107  */
108 #define	JME_TX_FIFO_SIZE	2000
109 /*
110  * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
111  * larger than 4K bytes in length, Rx FIFO threshold should be
112  * adjusted to minimize Rx FIFO overrun.
113  */
114 #define	JME_RX_FIFO_SIZE	4000
115 
116 #define	JME_DESC_INC(x, y)	((x) = ((x) + 1) % (y))
117 
118 struct jme_txdesc {
119 	struct mbuf		*tx_m;
120 	bus_dmamap_t		tx_dmamap;
121 	int			tx_ndesc;
122 	struct jme_desc		*tx_desc;
123 };
124 
125 struct jme_rxdesc {
126 	struct mbuf 		*rx_m;
127 	bus_dmamap_t		rx_dmamap;
128 	struct jme_desc		*rx_desc;
129 };
130 
131 struct jme_softc;
132 
133 /*
134  * RX ring/descs
135  */
136 struct jme_rxdata {
137 	struct lwkt_serialize	jme_rx_serialize;
138 	struct jme_softc	*jme_sc;
139 	uint32_t		jme_rx_coal;
140 	uint32_t		jme_rx_comp;
141 	uint32_t		jme_rx_empty;
142 	int			jme_rx_idx;
143 	bus_dma_tag_t		jme_rx_tag;	/* RX mbuf tag */
144 	bus_dmamap_t		jme_rx_sparemap;
145 	struct jme_rxdesc	*jme_rxdesc;
146 
147 	struct jme_desc		*jme_rx_ring;
148 	bus_addr_t		jme_rx_ring_paddr;
149 	bus_dma_tag_t		jme_rx_ring_tag;
150 	bus_dmamap_t		jme_rx_ring_map;
151 
152 	int			jme_rx_cons;
153 
154 	int			jme_rxlen;
155 	struct mbuf		*jme_rxhead;
156 	struct mbuf		*jme_rxtail;
157 };
158 
159 struct jme_chain_data {
160 	/*
161 	 * Top level tags
162 	 */
163 	bus_dma_tag_t		jme_ring_tag;	/* parent ring tag */
164 	bus_dma_tag_t		jme_buffer_tag;	/* parent mbuf/ssb tag */
165 
166 	/*
167 	 * Shadow status block
168 	 */
169 	struct jme_ssb		*jme_ssb_block;
170 	bus_addr_t		jme_ssb_block_paddr;
171 	bus_dma_tag_t		jme_ssb_tag;
172 	bus_dmamap_t		jme_ssb_map;
173 
174 	/*
175 	 * TX ring/descs
176 	 */
177 	struct lwkt_serialize	jme_tx_serialize;
178 	struct jme_softc	*jme_sc;
179 	bus_dma_tag_t		jme_tx_tag;	/* TX mbuf tag */
180 	struct jme_txdesc	*jme_txdesc;
181 
182 	struct jme_desc		*jme_tx_ring;
183 	bus_addr_t		jme_tx_ring_paddr;
184 	bus_dma_tag_t		jme_tx_ring_tag;
185 	bus_dmamap_t		jme_tx_ring_map;
186 
187 	int			jme_tx_prod;
188 	int			jme_tx_cons;
189 	int			jme_tx_cnt;
190 
191 	struct jme_rxdata	jme_rx_data[JME_NRXRING_MAX];
192 };
193 
194 struct jme_msix_data {
195 	int			jme_msix_rid;
196 	int			jme_msix_cpuid;
197 	u_int			jme_msix_vector;
198 	uint32_t		jme_msix_intrs;
199 	struct resource		*jme_msix_res;
200 	void			*jme_msix_handle;
201 	struct lwkt_serialize	*jme_msix_serialize;
202 	char			jme_msix_desc[64];
203 
204 	driver_intr_t		*jme_msix_func;
205 	void			*jme_msix_arg;
206 };
207 
208 #define JME_TX_RING_SIZE(sc)	\
209     (sizeof(struct jme_desc) * (sc)->jme_tx_desc_cnt)
210 #define JME_RX_RING_SIZE(sc)	\
211     (sizeof(struct jme_desc) * (sc)->jme_rx_desc_cnt)
212 #define	JME_SSB_SIZE		sizeof(struct jme_ssb)
213 
214 /*
215  * Software state per device.
216  */
217 struct jme_softc {
218 	struct arpcom		arpcom;
219 	device_t		jme_dev;
220 
221 	int			jme_mem_rid;
222 	struct resource		*jme_mem_res;
223 	bus_space_tag_t		jme_mem_bt;
224 	bus_space_handle_t	jme_mem_bh;
225 
226 	int			jme_irq_type;
227 	int			jme_irq_rid;
228 	struct resource		*jme_irq_res;
229 	void			*jme_irq_handle;
230 	struct jme_msix_data	jme_msix[JME_NMSIX];
231 	int			jme_msix_cnt;
232 	uint32_t		jme_msinum[JME_MSINUM_CNT];
233 
234 	device_t		jme_miibus;
235 	int			jme_phyaddr;
236 	bus_addr_t		jme_lowaddr;
237 
238 	uint32_t		jme_clksrc;
239 	uint32_t		jme_clksrc_1000;
240 	uint32_t		jme_tx_dma_size;
241 	uint32_t		jme_rx_dma_size;
242 
243 	uint32_t		jme_caps;
244 #define	JME_CAP_FPGA		0x0001
245 #define	JME_CAP_PCIE		0x0002
246 #define	JME_CAP_PMCAP		0x0004
247 #define	JME_CAP_FASTETH		0x0008
248 #define	JME_CAP_JUMBO		0x0010
249 
250 	uint32_t		jme_workaround;
251 #define JME_WA_EXTFIFO		0x0001
252 #define JME_WA_HDX		0x0002
253 
254 	uint32_t		jme_flags;
255 #define	JME_FLAG_MSI		0x0001
256 #define	JME_FLAG_MSIX		0x0002
257 #define	JME_FLAG_DETACH		0x0004
258 #define	JME_FLAG_LINK		0x0008
259 
260 	struct lwkt_serialize	jme_serialize;
261 	struct lwkt_serialize	*jme_serialize_arr[JME_NSERIALIZE];
262 	int			jme_serialize_cnt;
263 
264 	struct callout		jme_tick_ch;
265 	struct jme_chain_data	jme_cdata;
266 	int			jme_if_flags;
267 	uint32_t		jme_txcsr;
268 	uint32_t		jme_rxcsr;
269 
270 	int			jme_txd_spare;
271 
272 	struct sysctl_ctx_list	jme_sysctl_ctx;
273 	struct sysctl_oid	*jme_sysctl_tree;
274 
275 	/*
276 	 * Sysctl variables
277 	 */
278 	int			jme_tx_coal_to;
279 	int			jme_tx_coal_pkt;
280 	int			jme_rx_coal_to;
281 	int			jme_rx_coal_pkt;
282 	int			jme_rx_desc_cnt;
283 	int			jme_tx_desc_cnt;
284 	int			jme_rx_ring_cnt;
285 	int			jme_rss_debug;
286 	u_int			jme_rx_ring_pkt[JME_NRXRING_MAX];
287 };
288 
289 /* Register access macros. */
290 #define CSR_WRITE_4(_sc, reg, val)	\
291 	bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
292 #define CSR_READ_4(_sc, reg)		\
293 	bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
294 
295 #define	JME_MAXERR	5
296 
297 #define	JME_RXCHAIN_RESET(sc, ring)				\
298 do {								\
299 	(sc)->jme_cdata.jme_rx_data[(ring)].jme_rxhead = NULL;	\
300 	(sc)->jme_cdata.jme_rx_data[(ring)].jme_rxtail = NULL;	\
301 	(sc)->jme_cdata.jme_rx_data[(ring)].jme_rxlen = 0;	\
302 } while (0)
303 
304 #define	JME_TX_TIMEOUT		5
305 #define JME_TIMEOUT		1000
306 #define JME_PHY_TIMEOUT		1000
307 #define JME_EEPROM_TIMEOUT	1000
308 
309 #define JME_TXD_RSVD		1
310 
311 #endif
312